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authorSami Mujawar <sami.mujawar@arm.com>2018-04-24 15:19:06 +0100
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2018-04-26 19:01:52 +0200
commited9be80fa9521edc2ef959d493904d4800e64ca1 (patch)
tree6d356684c29b507c6b148c48834abf1be67be8cf
parent3f20ed76ce78c94759163918572231778c688ce1 (diff)
downloadedk2-platforms-ed9be80fa9521edc2ef959d493904d4800e64ca1.tar.xz
Platform/ARM: Fix platform timer offset in GTDT
The FVP_PLATFORM_TIMER_COUNT is the sum of the memory mapped platform timers and the watchdog timers. The watchdog timers can be disabled by setting the FVP_WATCHDOG_COUNT (defined by PcdWatchdogCount) to zero. On the VExpress platform, if the FVP_WATCHDOG_COUNT is set to zero, the FVP_PLATFORM_TIMER_COUNT is 1 as VExpress has one memory mapped timer. The code however incorrectly sets the platform timer offset to zero in the GTDT. This causes the OS to read the platform timer information from an invalid offset, and may crash. Updated the GTDT table to set the platform timer offset to zero only when the FVP_PLATFORM_TIMER_COUNT is zero. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
-rw-r--r--Platform/ARM/VExpressPkg/AcpiTables/Gtdt.aslc2
1 files changed, 1 insertions, 1 deletions
diff --git a/Platform/ARM/VExpressPkg/AcpiTables/Gtdt.aslc b/Platform/ARM/VExpressPkg/AcpiTables/Gtdt.aslc
index ae570574b2..1cb4b49830 100644
--- a/Platform/ARM/VExpressPkg/AcpiTables/Gtdt.aslc
+++ b/Platform/ARM/VExpressPkg/AcpiTables/Gtdt.aslc
@@ -108,7 +108,7 @@ FVP_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
FVP_GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags
FVP_CNT_READ_BASE_ADDRESS, // UINT64 CntReadBasePhysicalAddress
FVP_PLATFORM_TIMER_COUNT, // UINT32 PlatformTimerCount
-#if (FVP_WATCHDOG_COUNT != 0)
+#if (FVP_PLATFORM_TIMER_COUNT != 0)
sizeof (EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 PlatfromTimerOffset
#else
0