diff options
author | xli24 <xli24@6f19259b-4bc3-4df7-8a09-765794883524> | 2007-09-28 04:40:49 +0000 |
---|---|---|
committer | xli24 <xli24@6f19259b-4bc3-4df7-8a09-765794883524> | 2007-09-28 04:40:49 +0000 |
commit | ff62de37300f4c1af964367a9ea0fca0f79570e8 (patch) | |
tree | 2dc57be38b04e3325c0e9f71ac3b16b8be82a95d | |
parent | 73c7e13392ea74bc55786f59a7fe89ba938014ca (diff) | |
download | edk2-platforms-ff62de37300f4c1af964367a9ea0fca0f79570e8.tar.xz |
PCI Bus Driver Enhancement
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3960 6f19259b-4bc3-4df7-8a09-765794883524
4 files changed, 43 insertions, 7 deletions
diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c index 988d301969..e0b6694ba2 100644 --- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c +++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c @@ -200,6 +200,7 @@ Returns: // Get the bus number to start with
//
StartBusNumber = (UINT8) (pConfiguration->AddrRangeMin);
+ PaddedBusRange = (UINT8) (pConfiguration->AddrRangeMax);
//
// Initialize the subordinate bus number
@@ -207,6 +208,14 @@ Returns: SubBusNumber = StartBusNumber;
//
+ // Reset all assigned PCI bus number
+ //
+ ResetAllPpbBusNumber (
+ RootBridgeDev,
+ StartBusNumber
+ );
+
+ //
// Assign bus number
//
Status = PciScanBus (
diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c index 432c6f77c3..4c9c800147 100644 --- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c +++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c @@ -2161,7 +2161,7 @@ Returns: }
EFI_STATUS
-ResetAllPpbBusReg (
+ResetAllPpbBusNumber (
IN PCI_IO_DEVICE *Bridge,
IN UINT8 StartBusNumber
)
@@ -2188,6 +2188,7 @@ Returns: UINT32 Register;
UINT8 Func;
UINT64 Address;
+ UINT8 SecondaryBus;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
PciRootBridgeIo = Bridge->PciRootBridgeIo;
@@ -2207,6 +2208,7 @@ Returns: );
if (!EFI_ERROR (Status) && (IS_PCI_BRIDGE (&Pci))) {
+
Register = 0;
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x18);
Status = PciRootBridgeIoRead (
@@ -2217,6 +2219,12 @@ Returns: 1,
&Register
);
+ SecondaryBus = (UINT8)(Register >> 8);
+
+ if (SecondaryBus != 0) {
+ ResetAllPpbBusNumber (Bridge, SecondaryBus);
+ }
+
//
// Reset register 18h, 19h, 1Ah on PCI Bridge
//
diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.c index 7a4684d96d..0812bf0363 100644 --- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.c +++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.c @@ -1258,8 +1258,6 @@ Returns: SecondBus = 0;
Register = 0;
- ResetAllPpbBusReg (Bridge, StartBusNumber);
-
for (Device = 0; Device <= PCI_MAX_DEVICE; Device++) {
for (Func = 0; Func <= PCI_MAX_FUNC; Func++) {
@@ -1278,6 +1276,8 @@ Returns: (IS_PCI_BRIDGE (&Pci) ||
IS_CARDBUS_BRIDGE (&Pci))) {
+ DEBUG((EFI_D_ERROR, "Found DEV(%02d,%02d,%02d)\n", StartBusNumber, Device, Func ));
+
//
// Get the bridge information
//
@@ -1294,6 +1294,14 @@ Returns: return Status;
}
+ //
+ // Add feature to support customized secondary bus number
+ //
+ if (*SubBusNumber == 0) {
+ *SubBusNumber = *PaddedBusRange;
+ *PaddedBusRange = 0;
+ }
+
(*SubBusNumber)++;
SecondBus = (*SubBusNumber);
@@ -1350,6 +1358,7 @@ Returns: EfiPciBeforeChildBusEnumeration
);
+ DEBUG((EFI_D_ERROR, "Scan PPB(%02d,%02d,%02d)\n", PciDevice->BusNumber, PciDevice->DeviceNumber,PciDevice->FunctionNumber ));
Status = PciScanBus (
PciDevice,
(UINT8) (SecondBus),
@@ -1446,8 +1455,6 @@ Returns: Attributes = (EFI_HPC_PADDING_ATTRIBUTES) 0;
BusRange = 0;
- ResetAllPpbBusReg (Bridge, StartBusNumber);
-
for (Device = 0; Device <= PCI_MAX_DEVICE; Device++) {
for (Func = 0; Func <= PCI_MAX_FUNC; Func++) {
@@ -1473,6 +1480,8 @@ Returns: continue;
}
+ DEBUG((EFI_D_ERROR, "Found DEV(%02d,%02d,%02d)\n", StartBusNumber, Device, Func ));
+
//
// Get the PCI device information
//
@@ -1534,7 +1543,6 @@ Returns: PciDevice->FunctionNumber,
EfiPciBeforeChildBusEnumeration
);
- continue;
}
}
}
@@ -1583,6 +1591,14 @@ Returns: }
}
+ //
+ // Add feature to support customized secondary bus number
+ //
+ if (*SubBusNumber == 0) {
+ *SubBusNumber = *PaddedBusRange;
+ *PaddedBusRange = 0;
+ }
+
(*SubBusNumber)++;
SecondBus = *SubBusNumber;
@@ -1629,6 +1645,7 @@ Returns: EfiPciBeforeChildBusEnumeration
);
+ DEBUG((EFI_D_ERROR, "Scan PPB(%02d,%02d,%02d)\n", PciDevice->BusNumber, PciDevice->DeviceNumber,PciDevice->FunctionNumber ));
Status = PciScanBus (
PciDevice,
(UINT8) (SecondBus),
@@ -1851,6 +1868,7 @@ Returns: //
NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);
+ DEBUG((EFI_D_ERROR, "PCI Bus First Scanning\n"));
RootBridgeHandle = NULL;
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
@@ -1901,6 +1919,7 @@ Returns: //
NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);
+ DEBUG((EFI_D_ERROR, "PCI Bus Second Scanning\n"));
RootBridgeHandle = NULL;
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h index 3210a01056..34a7787196 100644 --- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h +++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h @@ -705,7 +705,7 @@ Returns: ;
EFI_STATUS
-ResetAllPpbBusReg (
+ResetAllPpbBusNumber (
IN PCI_IO_DEVICE *Bridge,
IN UINT8 StartBusNumber
)
|