Started working on an ArmEb package. GIC is ported. SEC is a start. Still missing memory map and DRAM init stuff. Hey but it compiles.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10090 6f19259b-4bc3-4df7-8a09-765794883524
author: andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> 2010-02-25 20:31:00 +0000
committer: andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> 2010-02-25 20:31:00 +0000
commit: 1fde2f618c76ea2a79b5b16e121cead5dbaf02bc (patch)
tree: d866638aa14dca1ac5bfe402ed2684189722204a /ArmEbPkg
parent: 5aa324d9f3a4b9ab76cd17b1363cf757e53f84e5 (diff)
download: edk2-platforms-1fde2f618c76ea2a79b5b16e121cead5dbaf02bc.tar.xz
15 files changed, 1733 insertions, 0 deletions
diff --git a/ArmEbPkg/ArmEbPkg.dec b/ArmEbPkg/ArmEbPkg.dec
new file mode 100644
index 0000000000..28c4282a62
--- /dev/null
+++ b/ArmEbPkg/ArmEbPkg.dec
@@ -0,0 +1,42 @@
+#/** @file
+# Omap35xx SoC package.
+#
+# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
+#
+# All rights reserved.
+#    This program and the accompanying materials are licensed and made available under
+#    the terms and conditions of the BSD License which accompanies this distribution.
+#    The full text of the license may be found at
+#    http://opensource.org/licenses/bsd-license.php
+#
+#    THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#    WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+  DEC_SPECIFICATION              = 0x00010005
+  PACKAGE_NAME                   = ArmEbPkg
+  PACKAGE_GUID                   = 44577A0D-361A-45B2-B33D-BB9EE60D5A4F
+  PACKAGE_VERSION                = 0.1
+
+################################################################################
+#
+# Include Section - list of Include Paths that are provided by this package.
+#                   Comments are used for Keywords and Module Types.
+#
+# Supported Module Types:
+#  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#
+################################################################################
+[Includes.common]
+  Include                        # Root include for the package
+
+[Guids.common]
+  gArmEbTokenSpaceGuid    =  { 0x44577A0D, 0x361A, 0x45B2, { 0xb3, 0x3d, 0xbb, 0x9e, 0xe6, 0x0d, 0x5a, 0x4f} } 
+
+[PcdsFeatureFlag.common]
+
+[PcdsFixedAtBuild.common]
+  gArmEbTokenSpaceGuid.PcdConsoleUart|0x12345678|UINT32|0x00000202
+  
diff --git a/ArmEbPkg/ArmEbPkg.dsc b/ArmEbPkg/ArmEbPkg.dsc
new file mode 100644
index 0000000000..723de37e7d
--- /dev/null
+++ b/ArmEbPkg/ArmEbPkg.dsc
@@ -0,0 +1,195 @@
+#/** @file
+# ARM EB package.
+#
+# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
+#
+#  All rights reserved. This program and the accompanying materials
+#    are licensed and made available under the terms and conditions of the BSD License
+#    which accompanies this distribution. The full text of the license may be found at
+#    http://opensource.org/licenses/bsd-license.php
+#
+#    THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#    WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+  PLATFORM_NAME                  = ArmEbPkg
+  PLATFORM_GUID                  = F4C1AD3E-9D3E-4F61-8791-B3BB1C43D04C
+  PLATFORM_VERSION               = 0.1
+  DSC_SPECIFICATION              = 0x00010005
+  OUTPUT_DIRECTORY               = Build/ArmEB
+  SUPPORTED_ARCHITECTURES        = ARM
+  BUILD_TARGETS                  = DEBUG|RELEASE
+  SKUID_IDENTIFIER               = DEFAULT
+#
+#  Add .fdf file after we get a critical mass of drivers ported over
+#  FLASH_DEFINITION               = ArmEbPkg/ArmEbPkg.fdf
+  DEFINE TARGET_HACK             = DEBUG
+
+
+[LibraryClasses.common]
+!if DEBUG_TARGET == RELEASE
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!else
+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!endif
+
+  ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+  
+  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+
+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+  
+  CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
+  DefaultExceptioHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
+  PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
+  
+  RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf
+
+  IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+  
+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+
+  DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
+  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+  UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
+
+#
+# Assume everything is fixed at build
+#
+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+
+  UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+    
+ # UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
+  UncachedMemoryAllocationLib|ArmPkg/Library/DebugUncachedMemoryAllocationLib/DebugUncachedMemoryAllocationLib.inf
+
+  CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+  PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+
+  SerialPortLib|ArmEbPkg/Library/SerialPortLib/SerialPortLib.inf
+  
+  #
+  # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window 
+  # in the debugger will show load and unload commands for symbols. You can cut and paste this
+  # into the command window to load symbols. We should be able to use a script to do this, but
+  # the version of RVD I have does not support scipts accessing system memory.
+  #
+#  PeCoffExtraActionLib|ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
+  PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
+
+
+
+[LibraryClasses.common.SEC]
+  ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
+  UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+  ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
+  LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+
+[LibraryClasses.common.DXE_DRIVER]
+  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+
+
+[LibraryClasses.ARM]
+  NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
+
+
+[BuildOptions]
+  XCODE:*_*_ARM_ARCHCC_FLAGS     == -arch armv7 -march=armv7
+  XCODE:*_*_ARM_ARCHASM_FLAGS    == -arch armv7
+  XCODE:*_*_ARM_ARCHDLINK_FLAGS  == -arch armv7
+
+  RVCT:*_*_ARM_ARCHCC_FLAGS     == --cpu 7-A
+  RVCT:*_*_ARM_ARCHASM_FLAGS    == --cpu 7-A
+ 
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+  
+[PcdsFixedAtBuild.common]
+
+# DEBUG_ASSERT_ENABLED       0x01
+# DEBUG_PRINT_ENABLED        0x02
+# DEBUG_CODE_ENABLED         0x04
+# CLEAR_MEMORY_ENABLED       0x08
+# ASSERT_BREAKPOINT_ENABLED  0x10
+# ASSERT_DEADLOOP_ENABLED    0x20
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f
+
+#  DEBUG_INIT      0x00000001  // Initialization
+#  DEBUG_WARN      0x00000002  // Warnings
+#  DEBUG_LOAD      0x00000004  // Load events
+#  DEBUG_FS        0x00000008  // EFI File system
+#  DEBUG_POOL      0x00000010  // Alloc & Free's
+#  DEBUG_PAGE      0x00000020  // Alloc & Free's
+#  DEBUG_INFO      0x00000040  // Verbose
+#  DEBUG_DISPATCH  0x00000080  // PEI/DXE Dispatchers
+#  DEBUG_VARIABLE  0x00000100  // Variable
+#  DEBUG_BM        0x00000400  // Boot Manager
+#  DEBUG_BLKIO     0x00001000  // BlkIo Driver
+#  DEBUG_NET       0x00004000  // SNI Driver
+#  DEBUG_UNDI      0x00010000  // UNDI Driver
+#  DEBUG_LOADFILE  0x00020000  // UNDI Driver
+#  DEBUG_EVENT     0x00080000  // Event messages
+#  DEBUG_ERROR     0x80000000  // Error
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000004
+
+  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
+  
+  gEmbeddedTokenSpaceGuid.PcdPrePiTempMemorySize|0
+  gEmbeddedTokenSpaceGuid.PcdPrePiBfvBaseAddress|0
+  gEmbeddedTokenSpaceGuid.PcdPrePiBfvSize|0
+  gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase|0
+  gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize|0
+
+  gEmbeddedTokenSpaceGuid.PcdPrePiHobBase|0x80001000
+  gEmbeddedTokenSpaceGuid.PcdPrePiStackBase|0x87FE0000 # stack at top of memory
+  gEmbeddedTokenSpaceGuid.PcdPrePiStackSize|0x20000    # 128K stack
+  gEmbeddedTokenSpaceGuid.PcdMemoryBase|0x80000000
+  gEmbeddedTokenSpaceGuid.PcdMemorySize|0x10000000
+
+  gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x80000000
+  gArmTokenSpaceGuid.PcdCpuResetAddress|0x80008000
+  gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+[Components.common]
+  ArmEbPkg/Library/ResetSystemLib/ResetSystemLib.inf
+  ArmEbPkg/Library/SerialPortLib/SerialPortLib.inf
+#  Omap35xxPkg/Library/BeagleBoardTimerLib/BeagleBoardTimerLib.inf  
+#  Omap35xxPkg/Library/OmapLib/OmapLib.inf
+  
+#  Omap35xxPkg/Flash/Flash.inf
+#  Omap35xxPkg/MMCHSDxe/MMCHS.inf
+#  Omap35xxPkg/SmbusDxe/Smbus.inf
+#  Omap35xxPkg/Gpio/Gpio.inf
+  ArmEbPkg/Sec/Sec.inf
+  ArmEbPkg/InterruptDxe/InterruptDxe.inf
+#  Omap35xxPkg/TimerDxe/TimerDxe.inf 
+#  Omap35xxPkg/TPS65950Dxe/TPS65950.inf
+  
+  
+
diff --git a/ArmEbPkg/Include/ArmEbUart.h b/ArmEbPkg/Include/ArmEbUart.h
new file mode 100644
index 0000000000..7c8fd11ed6
--- /dev/null
+++ b/ArmEbPkg/Include/ArmEbUart.h
@@ -0,0 +1,75 @@
+/*++
+
+Copyright (c) 2006 - 2009, Intel Corporation                                                         
+Portions copyright (c) 2009, Hewlett-Packard Company                                                           
+Portions copyright (c) 2010, Apple, Inc. All rights reserved.                                                          
+All rights reserved. This program and the accompanying materials                          
+are licensed and made available under the terms and conditions of the BSD License         
+which accompanies this distribution.  The full text of the license may be found at        
+http://opensource.org/licenses/bsd-license.php                                            
+                                                                                          
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.  
+
+--*/
+
+#ifndef __ARM_EB_UART_H__
+#define __ARM_EB_UART_H__
+
+
+#define SERIAL_PORT_MAX_TIMEOUT            100000000    // 100 seconds
+
+
+// EB constants
+#define EB_UART1_BASE   0x10009000
+
+// PL011 Registers
+#define UARTDR          0x000
+#define UARTRSR         0x004
+#define UARTECR         0x004
+#define UARTFR          0x018
+#define UARTILPR        0x020
+#define UARTIBRD        0x024
+#define UARTFBRD        0x028
+#define UARTLCR_H       0x02C
+#define UARTCR          0x030
+#define UARTIFLS        0x034
+#define UARTIMSC        0x038
+#define UARTRIS         0x03C
+#define UARTMIS         0x040
+#define UARTICR         0x044
+#define UARTDMACR       0x048
+
+// If the required baud rate is 115200 and UARTCLK = 24MHz then:
+// Baud Rate Divisor = (24�10^6)/(16�115200) = 13.020833
+// This means BRDI = 13 and BRDF = 0.020833
+// Therefore, fractional part, m = integer(0.020833�64) = integer(1.33331) = 1
+// Generated baud rate divider = 13+1/64 = 13.015625
+// Generated baud rate = (24�10^6)/(16�13.015625) = 115246.098
+// Error = (115246.098-115200)/115200 � 100 = 0.04%
+#define UART_115200_IDIV    13
+#define UART_115200_FDIV    1
+
+// add more baud rates here as needed
+
+// data status bits
+#define UART_DATA_ERROR_MASK      0x0F00
+
+// status reg bits
+#define UART_STATUS_ERROR_MASK    0x0F
+
+// flag reg bits
+#define UART_TX_EMPTY_FLAG_MASK   0x80
+#define UART_RX_FULL_FLAG_MASK    0x40
+#define UART_TX_FULL_FLAG_MASK    0x20
+#define UART_RX_EMPTY_FLAG_MASK   0x10
+#define UART_BUSY_FLAG_MASK       0x08
+
+// control reg bits
+#define UART_CTSEN_CONTROL_MASK   0x8000
+#define UART_RTSEN_CONTROL_MASK   0x4000
+#define UART_RTS_CONTROL_MASK     0x0800
+#define UART_DTR_CONTROL_MASK     0x0400
+
+
+#endif 
diff --git a/ArmEbPkg/InterruptDxe/InterruptDxe.c b/ArmEbPkg/InterruptDxe/InterruptDxe.c
new file mode 100644
index 0000000000..b8e1aa5d1d
--- /dev/null
+++ b/ArmEbPkg/InterruptDxe/InterruptDxe.c
@@ -0,0 +1,495 @@
+/** @file
+  Portions copyright (c) 2010, Apple Inc. All rights reserved.
+  
+  All rights reserved. This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+/*++
+
+Copyright (c) 2009, Hewlett-Packard Company                                                         
+All rights reserved. This program and the accompanying materials                          
+are licensed and made available under the terms and conditions of the BSD License         
+which accompanies this distribution.  The full text of the license may be found at        
+http://opensource.org/licenses/bsd-license.php                                            
+                                                                                          
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.   
+
+Module Name:
+
+  Gic.c
+
+Abstract:
+
+  Driver implementing the GIC interrupt controller protocol
+
+--*/
+
+#include <PiDxe.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+
+#include <Protocol/Cpu.h>
+#include <Protocol/HardwareInterrupt.h>
+
+
+//
+// EB board definitions
+//
+#define EB_GIC1_CPU_INTF_BASE   0x10040000
+#define EB_GIC1_DIST_BASE       0x10041000
+#define EB_GIC2_CPU_INTF_BASE   0x10050000
+#define EB_GIC2_DIST_BASE       0x10051000
+#define EB_GIC3_CPU_INTF_BASE   0x10060000
+#define EB_GIC3_DIST_BASE       0x10061000
+#define EB_GIC4_CPU_INTF_BASE   0x10070000
+#define EB_GIC5_DIST_BASE       0x10071000
+
+// number of interrupts sources supported by each GIC on the EB
+#define EB_NUM_GIC_INTERRUPTS   96  
+
+// number of 32-bit registers needed to represent those interrupts as a bit
+// (used for enable set, enable clear, pending set, pending clear, and active regs)
+#define EB_NUM_GIC_REG_PER_INT_BITS   (EB_NUM_GIC_INTERRUPTS / 32)
+
+// number of 32-bit registers needed to represent those interrupts as two bits
+// (used for configuration reg)
+#define EB_NUM_GIC_REG_PER_INT_CFG    (EB_NUM_GIC_INTERRUPTS / 16)
+
+// number of 32-bit registers needed to represent interrupts as 8-bit priority field
+// (used for priority regs)
+#define EB_NUM_GIC_REG_PER_INT_BYTES  (EB_NUM_GIC_INTERRUPTS / 4)
+
+#define GIC_DEFAULT_PRIORITY  0x80
+
+//
+// GIC definitions
+//
+
+// Distributor
+#define GIC_ICDDCR          0x000 // Distributor Control Register
+#define GIC_ICDICTR         0x004 // Interrupt Controller Type Register
+#define GIC_ICDIIDR         0x008 // Implementer Identification Register
+
+// each reg base below repeats for EB_NUM_GIC_REG_PER_INT_BITS (see GIC spec)
+#define GIC_ICDISR          0x080 // Interrupt Security Registers
+#define GIC_ICDISER         0x100 // Interrupt Set-Enable Registers
+#define GIC_ICDICER         0x180 // Interrupt Clear-Enable Registers
+#define GIC_ICDSPR          0x200 // Interrupt Set-Pending Registers
+#define GIC_ICDCPR          0x280 // Interrupt Clear-Pending Registers
+#define GIC_ICDABR          0x300 // Active Bit Registers
+
+// each reg base below repeats for EB_NUM_GIC_REG_PER_INT_BYTES
+#define GIC_ICDIPR          0x400 // Interrupt Priority Registers
+
+// each reg base below repeats for EB_NUM_GIC_INTERRUPTS
+#define GIC_ICDIPTR         0x800 // Interrupt Processor Target Registers
+#define GIC_ICDICFR         0xC00 // Interrupt Configuration Registers
+
+// just one of these
+#define GIC_ICDSGIR         0xF00 // Software Generated Interrupt Register
+
+
+// Cpu interface
+#define GIC_ICCICR          0x00  // CPU Interface Controler Register
+#define GIC_ICCPMR          0x04  // Interrupt Priority Mask Register
+#define GIC_ICCBPR          0x08  // Binary Point Register
+#define GIC_ICCIAR          0x0C  // Interrupt Acknowledge Register
+#define GIC_ICCEIOR         0x10  // End Of Interrupt Register
+#define GIC_ICCRPR          0x14  // Running Priority Register
+#define GIC_ICCPIR          0x18  // Highest Pending Interrupt Register
+#define GIC_ICCABPR         0x1C  // Aliased Binary Point Register
+#define GIC_ICCIDR          0xFC  // Identification Register
+
+extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol;
+
+//
+// Notifications
+//
+VOID      *CpuProtocolNotificationToken = NULL;
+EFI_EVENT CpuProtocolNotificationEvent  = (EFI_EVENT)NULL;
+EFI_EVENT EfiExitBootServicesEvent      = (EFI_EVENT)NULL;
+
+
+HARDWARE_INTERRUPT_HANDLER  gRegisteredInterruptHandlers[EB_NUM_GIC_INTERRUPTS];
+
+/**
+  Register Handler for the specified interrupt source.
+
+  @param This     Instance pointer for this protocol
+  @param Source   Hardware source of the interrupt
+  @param Handler  Callback for interrupt. NULL to unregister
+
+  @retval EFI_SUCCESS Source was updated to support Handler.
+  @retval EFI_DEVICE_ERROR  Hardware could not be programmed.
+
+**/
+EFI_STATUS
+EFIAPI
+RegisterInterruptSource (
+  IN EFI_HARDWARE_INTERRUPT_PROTOCOL    *This,
+  IN HARDWARE_INTERRUPT_SOURCE          Source,
+  IN HARDWARE_INTERRUPT_HANDLER         Handler
+  )
+{
+  if (Source > EB_NUM_GIC_INTERRUPTS) {
+    ASSERT(FALSE);
+    return EFI_UNSUPPORTED;
+  } 
+  
+  if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  if ((Handler != NULL) && (gRegisteredInterruptHandlers[Source] != NULL)) {
+    return EFI_ALREADY_STARTED;
+  }
+
+  gRegisteredInterruptHandlers[Source] = Handler;
+  return This->EnableInterruptSource(This, Source);
+}
+
+
+/**
+  Enable interrupt source Source.
+
+  @param This     Instance pointer for this protocol
+  @param Source   Hardware source of the interrupt
+
+  @retval EFI_SUCCESS       Source interrupt enabled.
+  @retval EFI_DEVICE_ERROR  Hardware could not be programmed.
+
+**/
+EFI_STATUS
+EFIAPI
+EnableInterruptSource (
+  IN EFI_HARDWARE_INTERRUPT_PROTOCOL    *This,
+  IN HARDWARE_INTERRUPT_SOURCE          Source
+  )
+{
+  UINT32    RegOffset;
+  UINTN     RegShift;
+  
+  if (Source > EB_NUM_GIC_INTERRUPTS) {
+    ASSERT(FALSE);
+    return EFI_UNSUPPORTED;
+  }
+  
+  // calculate enable register offset and bit position
+  RegOffset = Source / 32;
+  RegShift = Source % 32;
+
+  // write set-enable register
+  MmioWrite32 (EB_GIC1_DIST_BASE+GIC_ICDISER+(4*RegOffset), 1 << RegShift);
+  
+  return EFI_SUCCESS;
+}
+
+
+/**
+  Disable interrupt source Source.
+
+  @param This     Instance pointer for this protocol
+  @param Source   Hardware source of the interrupt
+
+  @retval EFI_SUCCESS       Source interrupt disabled.
+  @retval EFI_DEVICE_ERROR  Hardware could not be programmed.
+
+**/
+EFI_STATUS
+EFIAPI
+DisableInterruptSource (
+  IN EFI_HARDWARE_INTERRUPT_PROTOCOL    *This,
+  IN HARDWARE_INTERRUPT_SOURCE          Source
+  )
+{
+  UINT32    RegOffset;
+  UINTN     RegShift;
+  
+  if (Source > EB_NUM_GIC_INTERRUPTS) {
+    ASSERT(FALSE);
+    return EFI_UNSUPPORTED;
+  }
+  
+  // calculate enable register offset and bit position
+  RegOffset = Source / 32;
+  RegShift = Source % 32;
+
+  // write set-enable register
+  MmioWrite32 (EB_GIC1_DIST_BASE+GIC_ICDICER+(4*RegOffset), 1 << RegShift);
+  
+  return EFI_SUCCESS;
+}
+
+
+
+/**
+  Return current state of interrupt source Source.
+
+  @param This     Instance pointer for this protocol
+  @param Source   Hardware source of the interrupt
+  @param InterruptState  TRUE: source enabled, FALSE: source disabled.
+
+  @retval EFI_SUCCESS       InterruptState is valid
+  @retval EFI_DEVICE_ERROR  InterruptState is not valid
+
+**/
+EFI_STATUS
+EFIAPI
+GetInterruptSourceState (
+  IN EFI_HARDWARE_INTERRUPT_PROTOCOL    *This,
+  IN HARDWARE_INTERRUPT_SOURCE          Source,
+  IN BOOLEAN                            *InterruptState
+  )
+{
+  UINT32    RegOffset;
+  UINTN     RegShift;
+  
+  if (Source > EB_NUM_GIC_INTERRUPTS) {
+    ASSERT(FALSE);
+    return EFI_UNSUPPORTED;
+  }
+  
+  // calculate enable register offset and bit position
+  RegOffset = Source / 32;
+  RegShift = Source % 32;
+    
+  if ((MmioRead32 (EB_GIC1_DIST_BASE+GIC_ICDISER+(4*RegOffset)) & (1<<RegShift)) == 0) {
+    *InterruptState = FALSE;
+  } else {
+    *InterruptState = TRUE;
+  }
+  
+  return EFI_SUCCESS;
+}
+
+/**
+  Signal to the hardware that the End Of Intrrupt state 
+  has been reached.
+
+  @param This     Instance pointer for this protocol
+  @param Source   Hardware source of the interrupt
+
+  @retval EFI_SUCCESS       Source interrupt EOI'ed.
+  @retval EFI_DEVICE_ERROR  Hardware could not be programmed.
+
+**/
+EFI_STATUS
+EFIAPI
+EndOfInterrupt (
+  IN EFI_HARDWARE_INTERRUPT_PROTOCOL    *This,
+  IN HARDWARE_INTERRUPT_SOURCE          Source
+  )
+{
+  if (Source > EB_NUM_GIC_INTERRUPTS) {
+    ASSERT(FALSE);
+    return EFI_UNSUPPORTED;
+  }
+
+  MmioWrite32 (EB_GIC1_CPU_INTF_BASE+GIC_ICCEIOR, Source);
+  return EFI_SUCCESS;
+}
+
+
+/**
+  EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.
+
+  @param  InterruptType    Defines the type of interrupt or exception that
+                           occurred on the processor.This parameter is processor architecture specific.
+  @param  SystemContext    A pointer to the processor context when
+                           the interrupt occurred on the processor.
+
+  @return None
+
+**/
+VOID
+EFIAPI
+IrqInterruptHandler (
+  IN EFI_EXCEPTION_TYPE           InterruptType,
+  IN EFI_SYSTEM_CONTEXT           SystemContext
+  )
+{
+  UINT32                      GicInterrupt;
+  HARDWARE_INTERRUPT_HANDLER  InterruptHandler;
+
+  GicInterrupt = MmioRead32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCIAR);
+  if (GicInterrupt >= EB_NUM_GIC_INTERRUPTS) {
+    MmioWrite32 (EB_GIC1_CPU_INTF_BASE+GIC_ICCEIOR, GicInterrupt);
+  }
+  
+  InterruptHandler = gRegisteredInterruptHandlers[GicInterrupt];
+  if (InterruptHandler != NULL) {
+    // Call the registered interrupt handler.
+    InterruptHandler (GicInterrupt, SystemContext);
+  } else {
+    DEBUG ((EFI_D_ERROR, "Spurious GIC interrupt: %x\n", GicInterrupt));
+  }
+
+  EndOfInterrupt (&gHardwareInterruptProtocol, GicInterrupt);
+}
+
+
+//
+// Making this global saves a few bytes in image size
+//
+EFI_HANDLE  gHardwareInterruptHandle = NULL;
+
+//
+// The protocol instance produced by this driver
+//
+EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol = {
+  RegisterInterruptSource,
+  EnableInterruptSource,
+  DisableInterruptSource,
+  GetInterruptSourceState,
+  EndOfInterrupt
+};
+
+
+/**
+  Shutdown our hardware
+  
+  DXE Core will disable interrupts and turn off the timer and disable interrupts
+  after all the event handlers have run.
+
+  @param[in]  Event   The Event that is being processed
+  @param[in]  Context Event Context
+**/
+VOID
+EFIAPI
+ExitBootServicesEvent (
+  IN EFI_EVENT  Event,
+  IN VOID       *Context
+  )
+{
+  UINTN    i;
+  
+  for (i = 0; i < EB_NUM_GIC_INTERRUPTS; i++) {
+    DisableInterruptSource (&gHardwareInterruptProtocol, i);
+  }
+}
+
+
+//
+// Notification routines
+//
+VOID
+CpuProtocolInstalledNotification (
+  IN EFI_EVENT   Event,
+  IN VOID        *Context
+  )
+{
+  EFI_STATUS              Status;
+  EFI_CPU_ARCH_PROTOCOL   *Cpu;
+  
+  //
+  // Get the cpu protocol that this driver requires.
+  //
+  Status = gBS->LocateProtocol(&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);
+  ASSERT_EFI_ERROR(Status);
+
+  //
+  // Unregister the default exception handler.
+  //
+  Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, NULL);
+  ASSERT_EFI_ERROR(Status);
+
+  //
+  // Register to receive interrupts
+  //
+  Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, IrqInterruptHandler);
+  ASSERT_EFI_ERROR(Status);
+}
+
+/**
+  Initialize the state information for the CPU Architectural Protocol
+
+  @param  ImageHandle   of the loaded driver
+  @param  SystemTable   Pointer to the System Table
+
+  @retval EFI_SUCCESS           Protocol registered
+  @retval EFI_OUT_OF_RESOURCES  Cannot allocate protocol data structure
+  @retval EFI_DEVICE_ERROR      Hardware problems
+
+**/
+EFI_STATUS
+InterruptDxeInitialize (
+  IN EFI_HANDLE         ImageHandle,
+  IN EFI_SYSTEM_TABLE   *SystemTable
+  )
+{
+  EFI_STATUS  Status;
+  UINTN      i;
+  UINT32      RegOffset;
+  UINTN       RegShift;
+
+  
+  // Make sure the Interrupt Controller Protocol is not already installed in the system.
+  ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
+
+  for (i = 0; i < EB_NUM_GIC_INTERRUPTS; i++) {
+    DisableInterruptSource (&gHardwareInterruptProtocol, i);
+    
+    // Set Priority 
+    RegOffset = i / 4;
+    RegShift = (i % 4) * 8;
+    MmioAndThenOr32 (
+      EB_GIC1_DIST_BASE+GIC_ICDIPR+(4*RegOffset), 
+      ~(0xff << RegShift), 
+      GIC_DEFAULT_PRIORITY << RegShift
+      );
+  }
+
+  // configure interrupts for cpu 0
+  for (i = 0; i < EB_NUM_GIC_REG_PER_INT_BYTES; i++) {
+    MmioWrite32 (EB_GIC1_DIST_BASE + GIC_ICDIPTR + (i*4), 0x01010101);
+  }
+
+  // set binary point reg to 0x7 (no preemption)
+  MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCBPR, 0x7);
+
+  // set priority mask reg to 0xff to allow all priorities through
+  MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCPMR, 0xff);
+  
+  // enable gic cpu interface
+  MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCICR, 0x1);
+
+  // enable gic distributor
+  MmioWrite32 (EB_GIC1_DIST_BASE + GIC_ICCICR, 0x1);
+
+  
+  ZeroMem (&gRegisteredInterruptHandlers, sizeof (gRegisteredInterruptHandlers));
+  
+  Status = gBS->InstallMultipleProtocolInterfaces (
+                  &gHardwareInterruptHandle,
+                  &gHardwareInterruptProtocolGuid,   &gHardwareInterruptProtocol,
+                  NULL
+                  );
+  ASSERT_EFI_ERROR (Status);
+  
+  // Set up to be notified when the Cpu protocol is installed.
+  Status = gBS->CreateEvent (EVT_NOTIFY_SIGNAL, TPL_CALLBACK, CpuProtocolInstalledNotification, NULL, &CpuProtocolNotificationEvent);    
+  ASSERT_EFI_ERROR (Status);
+
+  Status = gBS->RegisterProtocolNotify (&gEfiCpuArchProtocolGuid, CpuProtocolNotificationEvent, (VOID *)&CpuProtocolNotificationToken);
+  ASSERT_EFI_ERROR (Status);
+
+  // Register for an ExitBootServicesEvent
+  Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);
+  ASSERT_EFI_ERROR (Status);
+
+  return Status;
+}
+
diff --git a/ArmEbPkg/InterruptDxe/InterruptDxe.inf b/ArmEbPkg/InterruptDxe/InterruptDxe.inf
new file mode 100644
index 0000000000..aeaf625797
--- /dev/null
+++ b/ArmEbPkg/InterruptDxe/InterruptDxe.inf
@@ -0,0 +1,53 @@
+#/** @file
+#  
+#  Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
+#  All rights reserved. This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = GicInterruptDxe
+  FILE_GUID                      = A7496828-946E-43BF-97D6-AA0272001899
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+
+  ENTRY_POINT                    = InterruptDxeInitialize
+
+
+[Sources.common]
+  InterruptDxe.c
+
+
+[Packages]
+  MdePkg/MdePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmEbPkg/ArmEbPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  UefiLib
+  UefiBootServicesTableLib
+  DebugLib
+  PrintLib
+  UefiDriverEntryPoint
+  IoLib
+
+[Guids]
+  
+
+[Protocols]
+  gHardwareInterruptProtocolGuid
+  gEfiCpuArchProtocolGuid
+  
+[FixedPcd.common]
+  gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
+
+[depex]
+  TRUE
diff --git a/ArmEbPkg/Library/ResetSystemLib/ResetSystemLib.c b/ArmEbPkg/Library/ResetSystemLib/ResetSystemLib.c
new file mode 100644
index 0000000000..7bf6417bd7
--- /dev/null
+++ b/ArmEbPkg/Library/ResetSystemLib/ResetSystemLib.c
@@ -0,0 +1,88 @@
+/** @file
+  Template library implementation to support ResetSystem Runtime call.
+  
+  Fill in the templates with what ever makes you system reset.
+
+
+  Copyright (c) 2008-2009, Apple Inc. All rights reserved.
+  
+  All rights reserved. This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include <PiDxe.h>
+
+#include <Library/PcdLib.h>
+#include <Library/ArmLib.h>
+#include <Library/CacheMaintenanceLib.h>
+#include <Library/DebugLib.h>
+#include <Library/EfiResetSystemLib.h>
+
+#include <ArmEbUart.h>
+
+/**
+  Resets the entire platform.
+
+  @param  ResetType             The type of reset to perform.
+  @param  ResetStatus           The status code for the reset.
+  @param  DataSize              The size, in bytes, of WatchdogData.
+  @param  ResetData             For a ResetType of EfiResetCold, EfiResetWarm, or
+                                EfiResetShutdown the data buffer starts with a Null-terminated
+                                Unicode string, optionally followed by additional binary data.
+
+**/
+EFI_STATUS
+EFIAPI
+LibResetSystem (
+  IN EFI_RESET_TYPE   ResetType,
+  IN EFI_STATUS       ResetStatus,
+  IN UINTN            DataSize,
+  IN CHAR16           *ResetData OPTIONAL
+  )
+{
+  if (ResetData != NULL) {
+    DEBUG ((EFI_D_ERROR, "%s", ResetData));
+  }
+
+  switch (ResetType) {
+  case EfiResetWarm:
+    // Map a warm reset into a cold reset
+  case EfiResetCold:
+  case EfiResetShutdown:
+  default:
+    break;
+  }
+
+  // If the reset didn't work, return an error.
+  ASSERT (FALSE);
+  return EFI_DEVICE_ERROR;
+}
+  
+
+
+/**
+  Initialize any infrastructure required for LibResetSystem () to function.
+
+  @param  ImageHandle   The firmware allocated handle for the EFI image.
+  @param  SystemTable   A pointer to the EFI System Table.
+  
+  @retval EFI_SUCCESS   The constructor always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+LibInitializeResetSystem (
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
+  )
+{
+  return EFI_SUCCESS;
+}
+
diff --git a/ArmEbPkg/Library/ResetSystemLib/ResetSystemLib.inf b/ArmEbPkg/Library/ResetSystemLib/ResetSystemLib.inf
new file mode 100644
index 0000000000..8b900660a6
--- /dev/null
+++ b/ArmEbPkg/Library/ResetSystemLib/ResetSystemLib.inf
@@ -0,0 +1,40 @@
+#/** @file
+# Reset System lib to make it easy to port new platforms
+#
+# Copyright (c) 2008, Apple Inc.
+#
+#  All rights reserved. This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution. The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = ArmEbResetSystemLib
+  FILE_GUID                      = DA6BF954-F0FF-4A1A-88D7-16560B9A9D20
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = EfiResetSystemLib
+
+
+[Sources.common]
+  ResetSystemLib.c
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  MdePkg/MdePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmEbPkg/ArmEbPkg.dec
+
+[Pcd.common]
+  gArmTokenSpaceGuid.PcdCpuResetAddress
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
+  
+[LibraryClasses]
+  DebugLib
+  BeagleBoardSystemLib
diff --git a/ArmEbPkg/Library/SerialPortLib/SerialPortLib.c b/ArmEbPkg/Library/SerialPortLib/SerialPortLib.c
new file mode 100644
index 0000000000..d98164667f
--- /dev/null
+++ b/ArmEbPkg/Library/SerialPortLib/SerialPortLib.c
@@ -0,0 +1,137 @@
+/** @file
+  Serial I/O Port library functions with no library constructor/destructor
+
+
+  Copyright (c) 2008-2010, Apple Inc. All rights reserved.
+  
+  All rights reserved. This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+#include <Library/DebugLib.h>
+#include <Library/SerialPortLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+#include <ArmEbUart.h>
+
+/*
+
+  Programmed hardware of Serial port.
+
+  @return    Always return EFI_UNSUPPORTED.
+
+**/
+RETURN_STATUS
+EFIAPI
+SerialPortInitialize (
+  VOID
+  )
+{
+  UINT32  Base = PcdGet32 (PcdConsoleUart);
+  
+  // initialize baud rate generator to 115200 based on EB clock REFCLK24MHZ
+  MmioWrite32 (Base + UARTIBRD, UART_115200_IDIV);
+  MmioWrite32 (Base + UARTFBRD, UART_115200_FDIV);
+
+  // no parity, 1 stop, no fifo, 8 data bits
+  MmioWrite32 (Base + UARTLCR_H, 0x60);
+
+  // clear any pending errors
+  MmioWrite32 (Base + UARTECR, 0);
+
+  // enable tx, rx, and uart overall
+  MmioWrite32 (Base + UARTCR, 0x301);
+
+  return RETURN_SUCCESS;
+}
+
+/**
+  Write data to serial device.
+
+  @param  Buffer           Point of data buffer which need to be writed.
+  @param  NumberOfBytes    Number of output bytes which are cached in Buffer.
+
+  @retval 0                Write data failed.
+  @retval !0               Actual number of bytes writed to serial device.
+
+**/
+UINTN
+EFIAPI
+SerialPortWrite (
+  IN UINT8     *Buffer,
+  IN UINTN     NumberOfBytes
+)
+{
+  UINT32 FR = PcdGet32(PcdConsoleUart) + UARTFR;
+  UINT32 DR = PcdGet32(PcdConsoleUart) + UARTDR;
+  UINTN  Count;
+    
+  for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
+    while ((MmioRead32 (FR) & UART_TX_EMPTY_FLAG_MASK) != 0);
+    MmioWrite8 (DR, *Buffer);
+  }
+
+  return NumberOfBytes;
+}
+
+
+/**
+  Read data from serial device and save the datas in buffer.
+
+  @param  Buffer           Point of data buffer which need to be writed.
+  @param  NumberOfBytes    Number of output bytes which are cached in Buffer.
+
+  @retval 0                Read data failed.
+  @retval !0               Aactual number of bytes read from serial device.
+
+**/
+UINTN
+EFIAPI
+SerialPortRead (
+  OUT UINT8     *Buffer,
+  IN  UINTN     NumberOfBytes
+)
+{
+  UINT32  FR = PcdGet32(PcdConsoleUart) + UARTFR;
+  UINT32  DR = PcdGet32(PcdConsoleUart) + UARTDR;
+  UINTN   Count;
+    
+  for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
+    while ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0);
+    *Buffer = MmioRead8 (DR);
+  }
+
+  return NumberOfBytes;
+}
+
+
+/**
+  Check to see if any data is avaiable to be read from the debug device.
+
+  @retval EFI_SUCCESS       At least one byte of data is avaiable to be read
+  @retval EFI_NOT_READY     No data is avaiable to be read
+  @retval EFI_DEVICE_ERROR  The serial device is not functioning properly
+
+**/
+BOOLEAN
+EFIAPI
+SerialPortPoll (
+  VOID
+  )
+{
+  UINT32 FR = PcdGet32(PcdConsoleUart) + UARTFR;
+
+  if ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0) {
+    return TRUE;
+  } else {
+    return FALSE;
+  }
+}
+
diff --git a/ArmEbPkg/Library/SerialPortLib/SerialPortLib.inf b/ArmEbPkg/Library/SerialPortLib/SerialPortLib.inf
new file mode 100644
index 0000000000..375c7371f7
--- /dev/null
+++ b/ArmEbPkg/Library/SerialPortLib/SerialPortLib.inf
@@ -0,0 +1,42 @@
+#/** @file
+# EDK Serial port lib
+#
+# Copyright (c) 2009, Apple Inc.
+#
+#  All rights reserved. This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution. The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = ArmEbSerialPortLib
+  FILE_GUID                      = 3019EF69-DDE6-4E23-A511-1A8C0279345A
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = SerialPortLib
+
+
+#
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC
+#
+
+[Sources.common]
+  SerialPortLib.c
+
+[LibraryClasses]
+  DebugLib
+  IoLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  ArmEbPkg/ArmEbPkg.dec
+  
+[FixedPcd]
+  gArmEbTokenSpaceGuid.PcdConsoleUart
+
diff --git a/ArmEbPkg/Sec/Cache.c b/ArmEbPkg/Sec/Cache.c
new file mode 100644
index 0000000000..b27a179513
--- /dev/null
+++ b/ArmEbPkg/Sec/Cache.c
@@ -0,0 +1,79 @@
+/** @file
+
+  Copyright (c) 2008-2009, Apple Inc. All rights reserved.
+  
+  All rights reserved. This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+
+#include <Library/ArmLib.h>
+#include <Library/PrePiLib.h>
+#include <Library/PcdLib.h>
+
+// DDR attributes
+#define DDR_ATTRIBUTES_CACHED                ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
+#define DDR_ATTRIBUTES_UNCACHED              ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
+
+// SoC registers. L3 interconnects
+#define SOC_REGISTERS_L3_PHYSICAL_BASE       0x68000000
+#define SOC_REGISTERS_L3_PHYSICAL_LENGTH     0x08000000
+#define SOC_REGISTERS_L3_ATTRIBUTES          ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
+
+// SoC registers. L4 interconnects
+#define SOC_REGISTERS_L4_PHYSICAL_BASE       0x48000000
+#define SOC_REGISTERS_L4_PHYSICAL_LENGTH     0x08000000
+#define SOC_REGISTERS_L4_ATTRIBUTES          ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
+
+VOID
+InitCache (
+  IN  UINT32  MemoryBase,
+  IN  UINT32  MemoryLength
+  )
+{
+  UINT32                        CacheAttributes;
+  ARM_MEMORY_REGION_DESCRIPTOR  MemoryTable[5];
+  VOID                          *TranslationTableBase;
+  UINTN                         TranslationTableSize;
+
+  if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
+    CacheAttributes = DDR_ATTRIBUTES_CACHED;
+  } else {
+    CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
+  }
+
+  // DDR
+  MemoryTable[0].PhysicalBase = MemoryBase;
+  MemoryTable[0].VirtualBase  = MemoryBase;
+  MemoryTable[0].Length       = MemoryLength;
+  MemoryTable[0].Attributes   = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
+
+  // SOC Registers. L3 interconnects
+  MemoryTable[1].PhysicalBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
+  MemoryTable[1].VirtualBase  = SOC_REGISTERS_L3_PHYSICAL_BASE;
+  MemoryTable[1].Length       = SOC_REGISTERS_L3_PHYSICAL_LENGTH;
+  MemoryTable[1].Attributes   = SOC_REGISTERS_L3_ATTRIBUTES;
+  
+  // SOC Registers. L4 interconnects
+  MemoryTable[2].PhysicalBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
+  MemoryTable[2].VirtualBase  = SOC_REGISTERS_L4_PHYSICAL_BASE;
+  MemoryTable[2].Length       = SOC_REGISTERS_L4_PHYSICAL_LENGTH;
+  MemoryTable[2].Attributes   = SOC_REGISTERS_L4_ATTRIBUTES;
+
+  // End of Table
+  MemoryTable[3].PhysicalBase = 0;
+  MemoryTable[3].VirtualBase  = 0;
+  MemoryTable[3].Length       = 0;
+  MemoryTable[3].Attributes   = (ARM_MEMORY_REGION_ATTRIBUTES)0;
+  
+  ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
+  
+  BuildMemoryAllocationHob ((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
+}
diff --git a/ArmEbPkg/Sec/LzmaDecompress.h b/ArmEbPkg/Sec/LzmaDecompress.h
new file mode 100644
index 0000000000..59f265517f
--- /dev/null
+++ b/ArmEbPkg/Sec/LzmaDecompress.h
@@ -0,0 +1,103 @@
+/** @file
+  LZMA Decompress Library header file
+
+  Copyright (c) 2006 - 2010, Intel Corporation<BR>
+  All rights reserved. This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __LZMA_DECOMPRESS_H___
+#define __LZMA_DECOMPRESS_H___
+
+/**
+  Examines a GUIDed section and returns the size of the decoded buffer and the
+  size of an scratch buffer required to actually decode the data in a GUIDed section.
+
+  Examines a GUIDed section specified by InputSection.  
+  If GUID for InputSection does not match the GUID that this handler supports,
+  then RETURN_UNSUPPORTED is returned.  
+  If the required information can not be retrieved from InputSection,
+  then RETURN_INVALID_PARAMETER is returned.
+  If the GUID of InputSection does match the GUID that this handler supports,
+  then the size required to hold the decoded buffer is returned in OututBufferSize,
+  the size of an optional scratch buffer is returned in ScratchSize, and the Attributes field
+  from EFI_GUID_DEFINED_SECTION header of InputSection is returned in SectionAttribute.
+  
+  If InputSection is NULL, then ASSERT().
+  If OutputBufferSize is NULL, then ASSERT().
+  If ScratchBufferSize is NULL, then ASSERT().
+  If SectionAttribute is NULL, then ASSERT().
+
+
+  @param[in]  InputSection       A pointer to a GUIDed section of an FFS formatted file.
+  @param[out] OutputBufferSize   A pointer to the size, in bytes, of an output buffer required
+                                 if the buffer specified by InputSection were decoded.
+  @param[out] ScratchBufferSize  A pointer to the size, in bytes, required as scratch space
+                                 if the buffer specified by InputSection were decoded.
+  @param[out] SectionAttribute   A pointer to the attributes of the GUIDed section. See the Attributes
+                                 field of EFI_GUID_DEFINED_SECTION in the PI Specification.
+
+  @retval  RETURN_SUCCESS            The information about InputSection was returned.
+  @retval  RETURN_UNSUPPORTED        The section specified by InputSection does not match the GUID this handler supports.
+  @retval  RETURN_INVALID_PARAMETER  The information can not be retrieved from the section specified by InputSection.
+
+**/
+RETURN_STATUS
+EFIAPI
+LzmaGuidedSectionGetInfo (
+  IN  CONST VOID  *InputSection,
+  OUT UINT32      *OutputBufferSize,
+  OUT UINT32      *ScratchBufferSize,
+  OUT UINT16      *SectionAttribute
+  );
+
+/**
+  Decompress a LZAM compressed GUIDed section into a caller allocated output buffer.
+  
+  Decodes the GUIDed section specified by InputSection.  
+  If GUID for InputSection does not match the GUID that this handler supports, then RETURN_UNSUPPORTED is returned.  
+  If the data in InputSection can not be decoded, then RETURN_INVALID_PARAMETER is returned.
+  If the GUID of InputSection does match the GUID that this handler supports, then InputSection
+  is decoded into the buffer specified by OutputBuffer and the authentication status of this
+  decode operation is returned in AuthenticationStatus.  If the decoded buffer is identical to the
+  data in InputSection, then OutputBuffer is set to point at the data in InputSection.  Otherwise,
+  the decoded data will be placed in caller allocated buffer specified by OutputBuffer.
+  
+  If InputSection is NULL, then ASSERT().
+  If OutputBuffer is NULL, then ASSERT().
+  If ScratchBuffer is NULL and this decode operation requires a scratch buffer, then ASSERT().
+  If AuthenticationStatus is NULL, then ASSERT().
+
+
+  @param[in]  InputSection  A pointer to a GUIDed section of an FFS formatted file.
+  @param[out] OutputBuffer  A pointer to a buffer that contains the result of a decode operation. 
+  @param[out] ScratchBuffer A caller allocated buffer that may be required by this function
+                            as a scratch buffer to perform the decode operation. 
+  @param[out] AuthenticationStatus 
+                            A pointer to the authentication status of the decoded output buffer.
+                            See the definition of authentication status in the EFI_PEI_GUIDED_SECTION_EXTRACTION_PPI
+                            section of the PI Specification. EFI_AUTH_STATUS_PLATFORM_OVERRIDE must
+                            never be set by this handler.
+
+  @retval  RETURN_SUCCESS            The buffer specified by InputSection was decoded.
+  @retval  RETURN_UNSUPPORTED        The section specified by InputSection does not match the GUID this handler supports.
+  @retval  RETURN_INVALID_PARAMETER  The section specified by InputSection can not be decoded.
+
+**/
+RETURN_STATUS
+EFIAPI
+LzmaGuidedSectionExtraction (
+  IN CONST  VOID    *InputSection,
+  OUT       VOID    **OutputBuffer,
+  OUT       VOID    *ScratchBuffer,        OPTIONAL
+  OUT       UINT32  *AuthenticationStatus
+  );
+  
+#endif // __LZMADECOMPRESS_H__
+
diff --git a/ArmEbPkg/Sec/ModuleEntryPoint.S b/ArmEbPkg/Sec/ModuleEntryPoint.S
new file mode 100755
index 0000000000..aaa9482477
--- /dev/null
+++ b/ArmEbPkg/Sec/ModuleEntryPoint.S
@@ -0,0 +1,50 @@
+#------------------------------------------------------------------------------ 
+#
+# Copyright (c) 2008-2009 Apple Inc. All rights reserved.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution.  The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+#include <Library/PcdLib.h>
+
+.text
+.align 3
+
+.globl ASM_PFX(CEntryPoint)
+.globl ASM_PFX(_ModuleEntryPoint)
+
+ASM_PFX(_ModuleEntryPoint):
+
+  //
+  // Set stack based on PCD values. Need to do it this way to make C code work 
+  // when it runs from FLASH. 
+  //  
+  LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2)    /* stack base arg2  */
+  LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3)    /* stack size arg3  */
+  add     r4, r2, r3
+
+  //Enter SVC mode and set up SVC stack pointer
+  mov     r0,#0x13|0x80|0x40
+  msr     CPSR_c,r0
+  sub     r4, r4, #0x400
+  mov     r13,r4
+
+  // Call C entry point
+  LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1)    /* memory size arg1          */
+  LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0)    /* memory size arg0         */
+
+  blx      ASM_PFX(CEntryPoint) /* Assume C code is ARM      */
+
+ShouldNeverGetHere:
+  /* _CEntryPoint should never return */
+  b       ShouldNeverGetHere
+
+  
diff --git a/ArmEbPkg/Sec/ModuleEntryPoint.asm b/ArmEbPkg/Sec/ModuleEntryPoint.asm
new file mode 100755
index 0000000000..ef245242a1
--- /dev/null
+++ b/ArmEbPkg/Sec/ModuleEntryPoint.asm
@@ -0,0 +1,53 @@
+//------------------------------------------------------------------------------ 
+//
+// Copyright (c) 2008-2009 Apple Inc. All rights reserved.
+//
+// All rights reserved. This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution.  The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+#include <Library/PcdLib.h>
+#include <AutoGen.h>
+  INCLUDE AsmMacroIoLib.inc
+  
+  IMPORT  CEntryPoint
+  EXPORT  _ModuleEntryPoint
+        
+  PRESERVE8
+  AREA    ModuleEntryPoint, CODE, READONLY
+  
+
+_ModuleEntryPoint
+ 
+
+  //
+  // Set stack based on PCD values. Need to do it this way to make C code work 
+  // when it runs from FLASH. 
+  //  
+  LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2)    /* stack base arg2  */
+  LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3)    /* stack size arg3  */
+  add     r4, r2, r3
+
+  //Enter SVC mode and set up SVC stack pointer
+  mov     r0,#0x13|0x80|0x40
+  msr     CPSR_c,r0
+  mov     r13,r4
+
+  // Call C entry point
+  LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1)    /* memory size arg1          */
+  LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0)    /* memory size arg0         */
+  blx     CEntryPoint       /* Assume C code is thumb    */
+
+ShouldNeverGetHere
+  /* _CEntryPoint should never return */
+  b       ShouldNeverGetHere
+  
+  END
+
diff --git a/ArmEbPkg/Sec/Sec.c b/ArmEbPkg/Sec/Sec.c
new file mode 100755
index 0000000000..0f9e03bb07
--- /dev/null
+++ b/ArmEbPkg/Sec/Sec.c
@@ -0,0 +1,220 @@
+/** @file
+  C Entry point for the SEC. First C code after the reset vector.
+
+  Copyright (c) 2008-2009, Apple Inc. All rights reserved.
+  
+  All rights reserved. This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+
+#include <Library/DebugLib.h>
+#include <Library/PrePiLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+#include <Library/ArmLib.h>
+#include <Library/PeCoffGetEntryPointLib.h>
+
+#include <Ppi/GuidedSectionExtraction.h>
+#include <Guid/LzmaDecompress.h>
+
+#include "LzmaDecompress.h"
+
+VOID
+EFIAPI 
+_ModuleEntryPoint(
+  VOID
+  );
+
+CHAR8 *
+DeCygwinPathIfNeeded (
+  IN  CHAR8   *Name
+  );
+
+RETURN_STATUS
+EFIAPI
+SerialPortInitialize (
+  VOID
+  );
+  
+  
+VOID
+UartInit (
+  VOID
+  )
+{
+  // SEC phase needs to run library constructors by hand.
+  // This assumes we are linked agains the SerialLib
+  // In non SEC modules the init call is in autogenerated code.
+  SerialPortInitialize ();
+}
+
+VOID
+InitCache (
+  IN  UINT32  MemoryBase,
+  IN  UINT32  MemoryLength
+  );
+
+EFI_STATUS
+EFIAPI
+ExtractGuidedSectionLibConstructor (
+  VOID
+  );
+
+EFI_STATUS
+EFIAPI
+LzmaDecompressLibConstructor (
+  VOID
+  );
+
+/**
+  If the build is done on cygwin the paths are cygpaths. 
+  /cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert
+  them to work with RVD commands
+
+  This is just code to help print out RVD symbol load command.
+  If you build with cygwin paths aren't compatible with RVD.
+
+  @param  Name  Path to convert if needed
+
+**/
+CHAR8 *
+SecDeCygwinPathIfNeeded (
+  IN  CHAR8   *Name
+  )
+{
+  CHAR8   *Ptr;
+  UINTN   Index;
+  UINTN   Len;
+  
+  Ptr = AsciiStrStr (Name, "/cygdrive/");
+  if (Ptr == NULL) {
+    return Name;
+  }
+  
+  Len = AsciiStrLen (Ptr);
+  
+  // convert "/cygdrive" to spaces
+  for (Index = 0; Index < 9; Index++) {
+    Ptr[Index] = ' ';
+  }
+
+  // convert /c to c:
+  Ptr[9]  = Ptr[10];
+  Ptr[10] = ':';
+  
+  // switch path seperators
+  for (Index = 11; Index < Len; Index++) {
+    if (Ptr[Index] == '/') {
+      Ptr[Index] = '\\' ;
+    }
+  }
+
+  return Name;
+}
+
+
+VOID
+CEntryPoint (
+  IN  VOID  *MemoryBase,
+  IN  UINTN MemorySize,
+  IN  VOID  *StackBase,
+  IN  UINTN StackSize
+  )
+{
+  VOID *HobBase;
+
+  // Build a basic HOB list
+  HobBase      = (VOID *)(UINTN)(FixedPcdGet32(PcdEmbeddedFdBaseAddress) + FixedPcdGet32(PcdEmbeddedFdSize));
+  CreateHobList (MemoryBase, MemorySize, HobBase, StackBase);
+
+
+  // Enable program flow prediction, if supported.
+  ArmEnableBranchPrediction ();
+
+  // Initialize CPU cache
+  InitCache ((UINT32)MemoryBase, (UINT32)MemorySize);
+
+  // Add memory allocation hob for relocated FD
+  BuildMemoryAllocationHob (FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);
+
+  // Add the FVs to the hob list
+  BuildFvHob (PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));
+
+  // Start talking
+  UartInit ();
+  DEBUG ((EFI_D_ERROR, "UART Enabled\n"));
+
+  DEBUG_CODE_BEGIN ();
+    //
+    // On a debug build print out information about the SEC. This is really info about
+    // the PE/COFF file we are currently running from. Useful for loading symbols in a
+    // debugger. Remember our image is really part of the FV.
+    //
+    RETURN_STATUS       Status;
+    EFI_PEI_FV_HANDLE   VolumeHandle;
+    EFI_PEI_FILE_HANDLE FileHandle;
+    VOID                *PeCoffImage;
+    UINT32              Offset;
+    CHAR8               *FilePath;
+    FfsAnyFvFindFirstFile (EFI_FV_FILETYPE_SECURITY_CORE, &VolumeHandle, &FileHandle);
+    Status = FfsFindSectionData (EFI_SECTION_TE, FileHandle, &PeCoffImage);
+    if (EFI_ERROR (Status)) {
+      // Usually is a TE (PI striped down PE/COFF), but could be a full PE/COFF
+      Status = FfsFindSectionData (EFI_SECTION_PE32, FileHandle, &PeCoffImage);
+    }
+    if (!EFI_ERROR (Status)) {
+      Offset = PeCoffGetSizeOfHeaders (PeCoffImage);
+      FilePath = PeCoffLoaderGetPdbPointer (PeCoffImage);
+      if (FilePath != NULL) {
+      
+        // 
+        // In general you should never have to use #ifdef __CC_ARM in the code. It
+        // is hidden in the away in the MdePkg. But here we would like to print differnt things
+        // for different toolchains. 
+        //
+#ifdef __CC_ARM
+        // Print out the command for the RVD debugger to load symbols for this image
+        DEBUG ((EFI_D_ERROR, "load /a /ni /np %a &0x%08x\n", SecDeCygwinPathIfNeeded (FilePath), (CHAR8 *)PeCoffImage + Offset));
+#elif __GNUC__
+        // This may not work correctly if you generate PE/COFF directlyas then the Offset would not be required
+        DEBUG ((EFI_D_ERROR, "add-symbol-file %a 0x%08x\n", FilePath, PeCoffImage + Offset));
+#else
+        DEBUG ((EFI_D_ERROR, "SEC starts at 0x%08x with an entry point at 0x%08x %a\n", PeCoffImage, _ModuleEntryPoint, FilePath));
+#endif
+      }
+    }
+
+   
+  DEBUG_CODE_END ();
+
+
+  // SEC phase needs to run library constructors by hand.
+  ExtractGuidedSectionLibConstructor ();
+  LzmaDecompressLibConstructor ();
+
+  // Build HOBs to pass up our version of stuff the DXE Core needs to save space
+  BuildPeCoffLoaderHob ();
+  BuildExtractSectionHob (
+    &gLzmaCustomDecompressGuid,
+    LzmaGuidedSectionGetInfo,
+    LzmaGuidedSectionExtraction
+    );
+
+  // Assume the FV that contains the SEC (our code) also contains a compressed FV.
+  DecompressFirstFv ();
+
+  // Load the DXE Core and transfer control to it
+  LoadDxeCoreFromFv (NULL, 0);
+  
+  // DXE Core should always load and never return
+  ASSERT (FALSE);
+}
+
diff --git a/ArmEbPkg/Sec/Sec.inf b/ArmEbPkg/Sec/Sec.inf
new file mode 100755
index 0000000000..f323072d17
--- /dev/null
+++ b/ArmEbPkg/Sec/Sec.inf
@@ -0,0 +1,61 @@
+
+#/** @file
+#  SEC - Reset vector code that jumps to C and loads DXE core
+#  
+#  Copyright (c) 2008, Apple Inc. <BR>
+#  All rights reserved. This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = BeagleBoardSec
+  FILE_GUID                      = d959e387-7b91-452c-90e0-a1dbac90ddb8
+  MODULE_TYPE                    = SEC
+  VERSION_STRING                 = 1.0
+
+
+[Sources.ARM]
+  ModuleEntryPoint.S   | GCC
+  ModuleEntryPoint.asm | RVCT
+
+[Sources.ARM]
+  Sec.c
+  Cache.c
+  
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmPkg/ArmPkg.dec
+  IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  ArmLib
+  IoLib
+  ExtractGuidedSectionLib
+  LzmaDecompressLib
+  PeCoffGetEntryPointLib
+
+[FeaturePcd]  
+  gEmbeddedTokenSpaceGuid.PcdCacheEnable
+
+[FixedPcd]
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
+  gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
+  gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
+  gEmbeddedTokenSpaceGuid.PcdPrePiStackSize
+  gEmbeddedTokenSpaceGuid.PcdPrePiStackBase
+  gEmbeddedTokenSpaceGuid.PcdMemoryBase
+  gEmbeddedTokenSpaceGuid.PcdMemorySize
+
author	andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524>	2010-02-25 20:31:00 +0000
committer	andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524>	2010-02-25 20:31:00 +0000
commit	1fde2f618c76ea2a79b5b16e121cead5dbaf02bc (patch)
tree	d866638aa14dca1ac5bfe402ed2684189722204a /ArmEbPkg
parent	5aa324d9f3a4b9ab76cd17b1363cf757e53f84e5 (diff)
download	edk2-platforms-1fde2f618c76ea2a79b5b16e121cead5dbaf02bc.tar.xz