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author | Leendert van Doorn <leendert@paramecium.org> | 2016-03-24 15:30:06 -0500 |
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committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2016-03-25 07:17:53 +0100 |
commit | f0bbcdf80df932cb72aae4707ad4274fdfcc5726 (patch) | |
tree | 7b3c6a4c684fbc28d47850b33d55ad7e4956a5de /ArmPkg/Library/ArmExceptionLib | |
parent | 91673dfdfe78906023f07e585002689e8baf654e (diff) | |
download | edk2-platforms-f0bbcdf80df932cb72aae4707ad4274fdfcc5726.tar.xz |
ArmPkg|EmbeddedPkg: make PcdCpuVectorBaseAddress 64 bits wide
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leo Duran <leo.duran@amd.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Diffstat (limited to 'ArmPkg/Library/ArmExceptionLib')
-rw-r--r-- | ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c index 0cf0766b9c..e8ea1f159d 100644 --- a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c +++ b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c @@ -103,7 +103,7 @@ InitializeCpuExceptionHandlers( // if we are requested to copy exceptin handlers to another location
if (gArmRelocateVectorTable) {
- VectorBase = PcdGet32(PcdCpuVectorBaseAddress);
+ VectorBase = PcdGet64(PcdCpuVectorBaseAddress);
Status = CopyExceptionHandlers(VectorBase);
}
@@ -118,7 +118,7 @@ InitializeCpuExceptionHandlers( // for encapsulated FVs.
ASSERT(((UINTN)ExceptionHandlersStart & gExceptionVectorAlignmentMask) == 0);
- // We do not copy the Exception Table at PcdGet32(PcdCpuVectorBaseAddress). We just set Vector
+ // We do not copy the Exception Table at PcdGet64(PcdCpuVectorBaseAddress). We just set Vector
// Base Address to point into CpuDxe code.
VectorBase = (UINTN)ExceptionHandlersStart;
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