diff options
| author | AJFISH <AJFISH@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-01-12 18:47:28 +0000 |
|---|---|---|
| committer | AJFISH <AJFISH@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-01-12 18:47:28 +0000 |
| commit | c2b5ca8b562776a04359e72f13a95aed001af738 (patch) | |
| tree | 462b83c018a113ff4e3400ceacdfbe5c936d1d90 /ArmPkg/Library/ArmLib/Arm11 | |
| parent | 06dc4de11b391315b24ac0445991d0b11c861d42 (diff) | |
| download | edk2-platforms-c2b5ca8b562776a04359e72f13a95aed001af738.tar.xz | |
Need to add some extra functions to the libraries to support paging in the CpuDxe driver (still working on that). Also looks like some of the .INF file hade the token used to search replace the copyright headers and not the headers so I updated that.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9716 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Library/ArmLib/Arm11')
| -rw-r--r-- | ArmPkg/Library/ArmLib/Arm11/Arm11ArmLib.inf | 16 | ||||
| -rw-r--r-- | ArmPkg/Library/ArmLib/Arm11/Arm11ArmLibPrePi.inf | 16 | ||||
| -rw-r--r-- | ArmPkg/Library/ArmLib/Arm11/Arm11Support.S | 6 | ||||
| -rw-r--r-- | ArmPkg/Library/ArmLib/Arm11/Arm11Support.asm | 6 |
4 files changed, 42 insertions, 2 deletions
diff --git a/ArmPkg/Library/ArmLib/Arm11/Arm11ArmLib.inf b/ArmPkg/Library/ArmLib/Arm11/Arm11ArmLib.inf index 8042e4dd31..39d0bef800 100644 --- a/ArmPkg/Library/ArmLib/Arm11/Arm11ArmLib.inf +++ b/ArmPkg/Library/ArmLib/Arm11/Arm11ArmLib.inf @@ -1,4 +1,18 @@ -#%HEADER%
+#/** @file
+# Semihosting serail port lib
+#
+# Copyright (c) 2008 - 2010, Apple Inc.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = Arm11ArmLib
diff --git a/ArmPkg/Library/ArmLib/Arm11/Arm11ArmLibPrePi.inf b/ArmPkg/Library/ArmLib/Arm11/Arm11ArmLibPrePi.inf index 040179e445..11443d8358 100644 --- a/ArmPkg/Library/ArmLib/Arm11/Arm11ArmLibPrePi.inf +++ b/ArmPkg/Library/ArmLib/Arm11/Arm11ArmLibPrePi.inf @@ -1,4 +1,18 @@ -#%HEADER%
+#/** @file
+# Semihosting serail port lib
+#
+# Copyright (c) 2008 - 2010, Apple Inc.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = Arm11ArmLib
diff --git a/ArmPkg/Library/ArmLib/Arm11/Arm11Support.S b/ArmPkg/Library/ArmLib/Arm11/Arm11Support.S index eec8f20b4e..e3b7746317 100644 --- a/ArmPkg/Library/ArmLib/Arm11/Arm11Support.S +++ b/ArmPkg/Library/ArmLib/Arm11/Arm11Support.S @@ -23,6 +23,7 @@ .globl ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA) .globl ASM_PFX(ArmEnableMmu) .globl ASM_PFX(ArmDisableMmu) +.globl ASM_PFX(ArmMmuEnabled) .globl ASM_PFX(ArmEnableDataCache) .globl ASM_PFX(ArmDisableDataCache) .globl ASM_PFX(ArmEnableInstructionCache) @@ -76,6 +77,11 @@ ASM_PFX(ArmEnableMmu): mcr p15,0,R0,c1,c0,0 bx LR +ASM_PFX(ArmMmuEnabled): + mrc p15,0,R0,c1,c0,0 + and R0,R0,#1 + bx LR + ASM_PFX(ArmDisableMmu): mrc p15,0,R0,c1,c0,0 bic R0,R0,#1 diff --git a/ArmPkg/Library/ArmLib/Arm11/Arm11Support.asm b/ArmPkg/Library/ArmLib/Arm11/Arm11Support.asm index e0be8f0c07..a2ed2e6f2a 100644 --- a/ArmPkg/Library/ArmLib/Arm11/Arm11Support.asm +++ b/ArmPkg/Library/ArmLib/Arm11/Arm11Support.asm @@ -21,6 +21,7 @@ EXPORT ArmCleanInvalidateDataCacheEntryByMVA EXPORT ArmEnableMmu EXPORT ArmDisableMmu + EXPORT ArmMmuEnabled EXPORT ArmEnableDataCache EXPORT ArmDisableDataCache EXPORT ArmEnableInstructionCache @@ -80,6 +81,11 @@ ArmEnableMmu mcr p15,0,R0,c1,c0,0 bx LR +ArmMmuEnabled + mrc p15,0,R0,c1,c0,0 + and R0,R0,#1 + bx LR + ArmDisableMmu mrc p15,0,R0,c1,c0,0 bic R0,R0,#1 |