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author | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-02-02 23:19:30 +0000 |
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committer | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-02-02 23:19:30 +0000 |
commit | 2ac288f9199196dfc4ab05bee0a7815ca361174a (patch) | |
tree | 66ba7102ed0f7e8b6deab5416f868aa43c82ad50 /ArmPkg/Library/ArmLib/Common | |
parent | 5d23922674950ec2d2654b4c606692696681b544 (diff) | |
download | edk2-platforms-2ac288f9199196dfc4ab05bee0a7815ca361174a.tar.xz |
Fix issue with fixing tabs.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11297 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Library/ArmLib/Common')
-rw-r--r-- | ArmPkg/Library/ArmLib/Common/ArmLibSupport.S | 52 | ||||
-rw-r--r-- | ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm | 52 |
2 files changed, 52 insertions, 52 deletions
diff --git a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S index 94b11a5d77..29ccf6dceb 100644 --- a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S @@ -42,48 +42,48 @@ ASM_PFX(Cp15CacheInfo): bx LR ASM_PFX(ArmEnableInterrupts): -\s\smrs R0,CPSR -\s\sbic R0,R0,#0x80\s\s\s\s@Enable IRQ interrupts -\s\smsr CPSR_c,R0 -\s\sbx LR + mrs R0,CPSR + bic R0,R0,#0x80 @Enable IRQ interrupts + msr CPSR_c,R0 + bx LR ASM_PFX(ArmDisableInterrupts): -\s\smrs R0,CPSR -\s\sorr R1,R0,#0x80\s\s\s\s@Disable IRQ interrupts -\s\smsr CPSR_c,R1 + mrs R0,CPSR + orr R1,R0,#0x80 @Disable IRQ interrupts + msr CPSR_c,R1 tst R0,#0x80 moveq R0,#1 movne R0,#0 -\s\sbx LR + bx LR ASM_PFX(ArmGetInterruptState): -\s\smrs R0,CPSR -\s\stst R0,#0x80\s\s @Check if IRQ is enabled. -\s\smoveq R0,#1 -\s\smovne R0,#0 -\s\sbx LR + mrs R0,CPSR + tst R0,#0x80 @Check if IRQ is enabled. + moveq R0,#1 + movne R0,#0 + bx LR ASM_PFX(ArmEnableFiq): -\s\smrs R0,CPSR -\s\sbic R0,R0,#0x40\s\s\s\s@Enable FIQ interrupts -\s\smsr CPSR_c,R0 -\s\sbx LR + mrs R0,CPSR + bic R0,R0,#0x40 @Enable FIQ interrupts + msr CPSR_c,R0 + bx LR ASM_PFX(ArmDisableFiq): -\s\smrs R0,CPSR -\s\sorr R1,R0,#0x40\s\s\s\s@Disable FIQ interrupts -\s\smsr CPSR_c,R1 + mrs R0,CPSR + orr R1,R0,#0x40 @Disable FIQ interrupts + msr CPSR_c,R1 tst R0,#0x80 moveq R0,#1 movne R0,#0 -\s\sbx LR + bx LR ASM_PFX(ArmGetFiqState): -\s\smrs R0,CPSR -\s\stst R0,#0x80\s\s @Check if FIQ is enabled. -\s\smoveq R0,#1 -\s\smovne R0,#0 -\s\sbx LR + mrs R0,CPSR + tst R0,#0x80 @Check if FIQ is enabled. + moveq R0,#1 + movne R0,#0 + bx LR ASM_PFX(ArmInvalidateTlb): mov r0,#0 diff --git a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm index 0b023fed42..4d6c253cd2 100644 --- a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm +++ b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm @@ -48,48 +48,48 @@ ArmIsMPCore bx LR ArmEnableInterrupts -\s\smrs R0,CPSR -\s\sbic R0,R0,#0x80\s\s\s\s;Enable IRQ interrupts -\s\smsr CPSR_c,R0 -\s\sbx LR + mrs R0,CPSR + bic R0,R0,#0x80 ;Enable IRQ interrupts + msr CPSR_c,R0 + bx LR ArmDisableInterrupts -\s\smrs R0,CPSR -\s\sorr R1,R0,#0x80\s\s\s\s;Disable IRQ interrupts -\s\smsr CPSR_c,R1 + mrs R0,CPSR + orr R1,R0,#0x80 ;Disable IRQ interrupts + msr CPSR_c,R1 tst R0,#0x80 moveq R0,#1 movne R0,#0 -\s\sbx LR + bx LR ArmGetInterruptState -\s\smrs R0,CPSR -\s\stst R0,#0x80\s\s ;Check if IRQ is enabled. -\s\smoveq R0,#1 -\s\smovne R0,#0 -\s\sbx LR + mrs R0,CPSR + tst R0,#0x80 ;Check if IRQ is enabled. + moveq R0,#1 + movne R0,#0 + bx LR ArmEnableFiq -\s\smrs R0,CPSR -\s\sbic R0,R0,#0x40\s\s\s\s;Enable IRQ interrupts -\s\smsr CPSR_c,R0 -\s\sbx LR + mrs R0,CPSR + bic R0,R0,#0x40 ;Enable IRQ interrupts + msr CPSR_c,R0 + bx LR ArmDisableFiq -\s\smrs R0,CPSR -\s\sorr R1,R0,#0x40\s\s\s\s;Disable IRQ interrupts -\s\smsr CPSR_c,R1 + mrs R0,CPSR + orr R1,R0,#0x40 ;Disable IRQ interrupts + msr CPSR_c,R1 tst R0,#0x40 moveq R0,#1 movne R0,#0 -\s\sbx LR + bx LR ArmGetFiqState -\s\smrs R0,CPSR -\s\stst R0,#0x40\s\s ;Check if IRQ is enabled. -\s\smoveq R0,#1 -\s\smovne R0,#0 -\s\sbx LR + mrs R0,CPSR + tst R0,#0x40 ;Check if IRQ is enabled. + moveq R0,#1 + movne R0,#0 + bx LR ArmInvalidateTlb mov r0,#0 |