diff options
| author | Guo Mang <mang.guo@intel.com> | 2017-04-27 11:26:09 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2017-04-27 13:02:36 +0800 |
| commit | 671af2a59d05554ca2e49551562773ef914441da (patch) | |
| tree | 0bb470010c8698045bec673e685c2da41f099922 /ArmPkg | |
| parent | 27f2c07cb03e3b51987e63fa2d06374ee0b5325f (diff) | |
| download | edk2-platforms-671af2a59d05554ca2e49551562773ef914441da.tar.xz | |
ArmPkg: Remove unused Package
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'ArmPkg')
257 files changed, 0 insertions, 37914 deletions
diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec deleted file mode 100644 index c4b4da2f95..0000000000 --- a/ArmPkg/ArmPkg.dec +++ /dev/null @@ -1,324 +0,0 @@ -#/** @file
-# ARM processor package.
-#
-# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2017, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- DEC_SPECIFICATION = 0x00010005
- PACKAGE_NAME = ArmPkg
- PACKAGE_GUID = 5CFBD99E-3C43-4E7F-8054-9CDEAFF7710F
- PACKAGE_VERSION = 0.1
-
-################################################################################
-#
-# Include Section - list of Include Paths that are provided by this package.
-# Comments are used for Keywords and Module Types.
-#
-# Supported Module Types:
-# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
-#
-################################################################################
-[Includes.common]
- Include # Root include for the package
-
-[LibraryClasses.common]
- ArmLib|Include/Library/ArmLib.h
- ArmMmuLib|Include/Library/ArmMmuLib.h
- SemihostLib|Include/Library/Semihosting.h
- UncachedMemoryAllocationLib|Include/Library/UncachedMemoryAllocationLib.h
- DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h
- ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h
- ArmGicArchLib|Include/Library/ArmGicArchLib.h
-
-[Guids.common]
- gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }
-
- ## ARM MPCore table
- # Include/Guid/ArmMpCoreInfo.h
- gArmMpCoreInfoGuid = { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }
-
-[Ppis]
- ## Include/Ppi/ArmMpCoreInfo.h
- gArmMpCoreInfoPpiGuid = { 0x6847cc74, 0xe9ec, 0x4f8f, {0xa2, 0x9d, 0xab, 0x44, 0xe7, 0x54, 0xa8, 0xfc} }
-
-[PcdsFeatureFlag.common]
- gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE|BOOLEAN|0x00000001
-
- # On ARM Architecture with the Security Extension, the address for the
- # Vector Table can be mapped anywhere in the memory map. It means we can
- # point the Exception Vector Table to its location in CpuDxe.
- # By default we copy the Vector Table at PcdGet64(PcdCpuVectorBaseAddress)
- gArmTokenSpaceGuid.PcdRelocateVectorTable|TRUE|BOOLEAN|0x00000022
- # Set this PCD to TRUE if the Exception Vector is changed to add debugger support before
- # it has been configured by the CPU DXE
- gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032
-
- # Define if the spin-table mechanism is used by the secondary cores when booting
- # Linux (instead of PSCI)
- gArmTokenSpaceGuid.PcdArmLinuxSpinTable|FALSE|BOOLEAN|0x00000033
-
- # Define if the GICv3 controller should use the GICv2 legacy
- gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042
-
-[PcdsFeatureFlag.ARM]
- # Whether to map normal memory as non-shareable. FALSE is the safe choice, but
- # TRUE may be appropriate to fix performance problems if you don't care about
- # hardware coherency (i.e., no virtualization or cache coherent DMA)
- gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride|FALSE|BOOLEAN|0x00000043
-
-[PcdsFixedAtBuild.common]
- gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006
-
- # This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file.
- # Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.
- gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024
-
- # This PCD will free the unallocated buffers if their size reach this threshold.
- # We set the default value to 512MB.
- gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold|0x20000000|UINT64|0x00000003
- gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT64|0x00000004
- gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005
-
- #
- # ARM Secure Firmware PCDs
- #
- gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT64|0x00000015
- gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016
- gArmTokenSpaceGuid.PcdSecureFvBaseAddress|0x0|UINT64|0x0000002F
- gArmTokenSpaceGuid.PcdSecureFvSize|0x0|UINT32|0x00000030
-
- #
- # ARM Hypervisor Firmware PCDs
- #
- gArmTokenSpaceGuid.PcdHypFdBaseAddress|0|UINT32|0x0000003A
- gArmTokenSpaceGuid.PcdHypFdSize|0|UINT32|0x0000003B
- gArmTokenSpaceGuid.PcdHypFvBaseAddress|0|UINT32|0x0000003C
- gArmTokenSpaceGuid.PcdHypFvSize|0|UINT32|0x0000003D
-
- # Use ClusterId + CoreId to identify the PrimaryCore
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0xF03|UINT32|0x00000031
- # The Primary Core is ClusterId[0] & CoreId[0]
- gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037
-
- #
- # ARM L2x0 PCDs
- #
- gArmTokenSpaceGuid.PcdL2x0ControllerBase|0|UINT32|0x0000001B
-
- #
- # BdsLib
- #
- # The compressed Linux kernel is expected to be under 128MB from the beginning of the System Memory
- gArmTokenSpaceGuid.PcdArmLinuxKernelMaxOffset|0x08000000|UINT32|0x0000001F
- # Maximum file size for TFTP servers that do not support 'tsize' extension
- gArmTokenSpaceGuid.PcdMaxTftpFileSize|0x01000000|UINT32|0x00000000
-
- #
- # ARM Normal (or Non Secure) Firmware PCDs
- #
- gArmTokenSpaceGuid.PcdFdSize|0|UINT32|0x0000002C
- gArmTokenSpaceGuid.PcdFvSize|0|UINT32|0x0000002E
-
- #
- # Value to add to a host address to obtain a device address, using
- # unsigned 64-bit integer arithmetic on both ARM and AArch64. This
- # means we can rely on truncation on overflow to specify negative
- # offsets.
- #
- gArmTokenSpaceGuid.PcdArmDmaDeviceOffset|0x0|UINT64|0x0000044
-
-[PcdsFixedAtBuild.common, PcdsPatchableInModule.common]
- gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT64|0x0000002B
- gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT64|0x0000002D
-
-[PcdsFixedAtBuild.ARM]
- #
- # ARM Security Extension
- #
-
- # Secure Configuration Register
- # - BIT0 : NS - Non Secure bit
- # - BIT1 : IRQ Handler
- # - BIT2 : FIQ Handler
- # - BIT3 : EA - External Abort
- # - BIT4 : FW - F bit writable
- # - BIT5 : AW - A bit writable
- # - BIT6 : nET - Not Early Termination
- # - BIT7 : SCD - Secure Monitor Call Disable
- # - BIT8 : HCE - Hyp Call enable
- # - BIT9 : SIF - Secure Instruction Fetch
- # 0x31 = NS | EA | FW
- gArmTokenSpaceGuid.PcdArmScr|0x31|UINT32|0x00000038
-
- # By default we do not do a transition to non-secure mode
- gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x0|UINT32|0x0000003E
-
- # The Linux ATAGs are expected to be under 0x4000 (16KB) from the beginning of the System Memory
- gArmTokenSpaceGuid.PcdArmLinuxAtagMaxOffset|0x4000|UINT32|0x00000020
-
- # If the fixed FDT address is not available, then it should be loaded below the kernel.
- # The recommendation from the Linux kernel is to have the FDT below 16KB.
- # (see the kernel doc: Documentation/arm/Booting)
- gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x4000|UINT32|0x00000023
- # The FDT blob must be loaded at a 64bit aligned address.
- gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x8|UINT32|0x00000026
-
- # Non Secure Access Control Register
- # - BIT15 : NSASEDIS - Disable Non-secure Advanced SIMD functionality
- # - BIT14 : NSD32DIS - Disable Non-secure use of D16-D31
- # - BIT11 : cp11 - Non-secure access to coprocessor 11 enable
- # - BIT10 : cp10 - Non-secure access to coprocessor 10 enable
- # 0xC00 = cp10 | cp11
- gArmTokenSpaceGuid.PcdArmNsacr|0xC00|UINT32|0x00000039
-
-[PcdsFixedAtBuild.AARCH64]
- #
- # AArch64 Security Extension
- #
-
- # Secure Configuration Register
- # - BIT0 : NS - Non Secure bit
- # - BIT1 : IRQ Handler
- # - BIT2 : FIQ Handler
- # - BIT3 : EA - External Abort
- # - BIT4 : FW - F bit writable
- # - BIT5 : AW - A bit writable
- # - BIT6 : nET - Not Early Termination
- # - BIT7 : SCD - Secure Monitor Call Disable
- # - BIT8 : HCE - Hyp Call enable
- # - BIT9 : SIF - Secure Instruction Fetch
- # - BIT10: RW - Register width control for lower exception levels
- # - BIT11: SIF - Enables Secure EL1 access to EL1 Architectural Timer
- # - BIT12: TWI - Trap WFI
- # - BIT13: TWE - Trap WFE
- # 0x501 = NS | HCE | RW
- gArmTokenSpaceGuid.PcdArmScr|0x501|UINT32|0x00000038
-
- # By default we do transition to EL2 non-secure mode with Stack for EL2.
- # Mode Description Bits
- # NS EL2 SP2 all interrupts disabled = 0x3c9
- # NS EL1 SP1 all interrupts disabled = 0x3c5
- # Other modes include using SP0 or switching to Aarch32, but these are
- # not currently supported.
- gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x3c9|UINT32|0x0000003E
- # If the fixed FDT address is not available, then it should be loaded above the kernel.
- # The recommendation from the AArch64 Linux kernel is to have the FDT below 512MB.
- # (see the kernel doc: Documentation/arm64/booting.txt)
- gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x20000000|UINT32|0x00000023
- # The FDT blob must be loaded at a 2MB aligned address.
- gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x00200000|UINT32|0x00000026
-
-
-#
-# These PCDs are also defined as 'PcdsDynamic' or 'PcdsPatchableInModule' to be
-# redefined when using UEFI in a context of virtual machine.
-#
-[PcdsFixedAtBuild.common, PcdsDynamic.common, PcdsPatchableInModule.common]
-
- # System Memory (DRAM): These PCDs define the region of in-built system memory
- # Some platforms can get DRAM extensions, these additional regions will be declared
- # to UEFI by ArmPlatformLib
- gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT64|0x00000029
- gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT64|0x0000002A
-
-[PcdsFixedAtBuild.common, PcdsDynamic.common]
- #
- # ARM Architectural Timer
- #
- gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0|UINT32|0x00000034
-
- # ARM Architectural Timer Interrupt(GIC PPI) numbers
- gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|29|UINT32|0x00000035
- gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|30|UINT32|0x00000036
- gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|26|UINT32|0x00000040
- gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|27|UINT32|0x00000041
-
- #
- # ARM Generic Watchdog
- #
-
- gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x2A440000|UINT64|0x00000007
- gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2A450000|UINT64|0x00000008
- gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|93|UINT32|0x00000009
-
- #
- # ARM Generic Interrupt Controller
- #
- gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT64|0x0000000C
- # Base address for the GIC Redistributor region that contains the boot CPU
- gArmTokenSpaceGuid.PcdGicRedistributorsBase|0|UINT64|0x0000000E
- gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT64|0x0000000D
- gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025
-
- #
- # Bases, sizes and translation offsets of IO and MMIO spaces, respectively.
- # Note that "IO" is just another MMIO range that simulates IO space; there
- # are no special instructions to access it.
- #
- # The base addresses PcdPciIoBase, PcdPciMmio32Base and PcdPciMmio64Base are
- # specific to their containing address spaces. In order to get the physical
- # address for the CPU, for a given access, the respective translation value
- # has to be added.
- #
- # The translations always have to be initialized like this, using UINT64:
- #
- # UINT64 IoCpuBase; // mapping target in 64-bit cpu-physical space
- # UINT64 Mmio32CpuBase; // mapping target in 64-bit cpu-physical space
- # UINT64 Mmio64CpuBase; // mapping target in 64-bit cpu-physical space
- #
- # PcdPciIoTranslation = IoCpuBase - PcdPciIoBase;
- # PcdPciMmio32Translation = Mmio32CpuBase - (UINT64)PcdPciMmio32Base;
- # PcdPciMmio64Translation = Mmio64CpuBase - PcdPciMmio64Base;
- #
- # because (a) the target address space (ie. the cpu-physical space) is
- # 64-bit, and (b) the translation values are meant as offsets for *modular*
- # arithmetic.
- #
- # Accordingly, the translation itself needs to be implemented as:
- #
- # UINT64 UntranslatedIoAddress; // input parameter
- # UINT32 UntranslatedMmio32Address; // input parameter
- # UINT64 UntranslatedMmio64Address; // input parameter
- #
- # UINT64 TranslatedIoAddress; // output parameter
- # UINT64 TranslatedMmio32Address; // output parameter
- # UINT64 TranslatedMmio64Address; // output parameter
- #
- # TranslatedIoAddress = UntranslatedIoAddress +
- # PcdPciIoTranslation;
- # TranslatedMmio32Address = (UINT64)UntranslatedMmio32Address +
- # PcdPciMmio32Translation;
- # TranslatedMmio64Address = UntranslatedMmio64Address +
- # PcdPciMmio64Translation;
- #
- # The modular arithmetic performed in UINT64 ensures that the translation
- # works correctly regardless of the relation between IoCpuBase and
- # PcdPciIoBase, Mmio32CpuBase and PcdPciMmio32Base, and Mmio64CpuBase and
- # PcdPciMmio64Base.
- #
- gArmTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x00000050
- gArmTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x00000051
- gArmTokenSpaceGuid.PcdPciIoTranslation|0x0|UINT64|0x00000052
- gArmTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT32|0x00000053
- gArmTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT32|0x00000054
- gArmTokenSpaceGuid.PcdPciMmio32Translation|0x0|UINT64|0x00000055
- gArmTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x00000056
- gArmTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x00000057
- gArmTokenSpaceGuid.PcdPciMmio64Translation|0x0|UINT64|0x00000058
-
- #
- # Inclusive range of allowed PCI buses.
- #
- gArmTokenSpaceGuid.PcdPciBusMin|0x0|UINT32|0x00000059
- gArmTokenSpaceGuid.PcdPciBusMax|0x0|UINT32|0x0000005A
diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc deleted file mode 100644 index 9144334cb8..0000000000 --- a/ArmPkg/ArmPkg.dsc +++ /dev/null @@ -1,155 +0,0 @@ -#/** @file
-# ARM processor package.
-#
-# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2015, ARM Ltd. All rights reserved.<BR>
-# Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-################################################################################
-#
-# Defines Section - statements that will be processed to create a Makefile.
-#
-################################################################################
-[Defines]
- PLATFORM_NAME = ArmPkg
- PLATFORM_GUID = 5CFBD99E-3C43-4E7F-8054-9CDEAFF7710F
- PLATFORM_VERSION = 0.1
- DSC_SPECIFICATION = 0x00010005
- OUTPUT_DIRECTORY = Build/Arm
- SUPPORTED_ARCHITECTURES = ARM|AARCH64
- BUILD_TARGETS = DEBUG|RELEASE
- SKUID_IDENTIFIER = DEFAULT
-
-[BuildOptions]
- XCODE:*_*_ARM_PLATFORM_FLAGS == -arch armv7
- GCC:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a -mfpu=neon
- # We use A15 to get the Secure and Virtualization extensions
- RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15
-
- RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
- *_*_*_CC_FLAGS = -DDISABLE_NEW_DEPRECATED_INTERFACES
-
-[LibraryClasses.common]
- BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
- BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
- CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
- DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
- HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
- MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
- PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
- TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf
- UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
- UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
- UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
- DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
- UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
- PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
- PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
-
- NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
- UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
- HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
-
- SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf
- UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
- DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
- DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
- CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf
-
- CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
- ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
- ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf
- ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
- ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
- ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
- DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
-
- UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
- PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
- SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
-
- BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
- FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
-
- ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
- FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
- SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
-
- IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
-
- ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
- ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
-
-[LibraryClasses.common.PEIM]
- HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
- PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
- MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
- PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
- PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
-
-[LibraryClasses.ARM, LibraryClasses.AARCH64]
- NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
-
- # Add support for GCC stack protector
- NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
-
-[Components.common]
- ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
- ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
- ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
- ArmPkg/Library/BdsLib/BdsLib.inf
- ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
- ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf
- ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
- ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
- ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
- ArmPkg/Library/SemiHostingDebugLib/SemiHostingDebugLib.inf
- ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf
- ArmPkg/Library/SemihostLib/SemihostLib.inf
- ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
- ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf
- ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf
- ArmPkg/Library/ArmExceptionLib/ArmRelocateExceptionLib.inf
-
- ArmPkg/Drivers/CpuDxe/CpuDxe.inf
- ArmPkg/Drivers/CpuPei/CpuPei.inf
- ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
- ArmPkg/Drivers/ArmGic/ArmGicLib.inf
- ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
- ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
- ArmPkg/Drivers/TimerDxe/TimerDxe.inf
-
- ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
- ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.inf
-
- ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
- ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf
- ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf
-
- ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
-
- ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
-
- ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
- ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
- ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf
- ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf
- ArmPkg/Library/ArmLib/ArmBaseLib.inf
- ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf
- ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf
- ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
- ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
-
-[Components.AARCH64]
- ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf
diff --git a/ArmPkg/Contributions.txt b/ArmPkg/Contributions.txt deleted file mode 100644 index f87cbd73c6..0000000000 --- a/ArmPkg/Contributions.txt +++ /dev/null @@ -1,218 +0,0 @@ -
-======================
-= Code Contributions =
-======================
-
-To make a contribution to a TianoCore project, follow these steps.
-1. Create a change description in the format specified below to
- use in the source control commit log.
-2. Your commit message must include your "Signed-off-by" signature,
- and "Contributed-under" message.
-3. Your "Contributed-under" message explicitly states that the
- contribution is made under the terms of the specified
- contribution agreement. Your "Contributed-under" message
- must include the name of contribution agreement and version.
- For example: Contributed-under: TianoCore Contribution Agreement 1.0
- The "TianoCore Contribution Agreement" is included below in
- this document.
-4. Submit your code to the TianoCore project using the process
- that the project documents on its web page. If the process is
- not documented, then submit the code on development email list
- for the project.
-5. It is preferred that contributions are submitted using the same
- copyright license as the base project. When that is not possible,
- then contributions using the following licenses can be accepted:
- * BSD (2-clause): http://opensource.org/licenses/BSD-2-Clause
- * BSD (3-clause): http://opensource.org/licenses/BSD-3-Clause
- * MIT: http://opensource.org/licenses/MIT
- * Python-2.0: http://opensource.org/licenses/Python-2.0
- * Zlib: http://opensource.org/licenses/Zlib
-
- Contributions of code put into the public domain can also be
- accepted.
-
- Contributions using other licenses might be accepted, but further
- review will be required.
-
-=====================================================
-= Change Description / Commit Message / Patch Email =
-=====================================================
-
-Your change description should use the standard format for a
-commit message, and must include your "Signed-off-by" signature
-and the "Contributed-under" message.
-
-== Sample Change Description / Commit Message =
-
-=== Start of sample patch email message ===
-
-From: Contributor Name <contributor@example.com>
-Subject: [PATCH] CodeModule: Brief-single-line-summary
-
-Full-commit-message
-
-Contributed-under: TianoCore Contribution Agreement 1.0
-Signed-off-by: Contributor Name <contributor@example.com>
----
-
-An extra message for the patch email which will not be considered part
-of the commit message can be added here.
-
-Patch content inline or attached
-
-=== End of sample patch email message ===
-
-=== Notes for sample patch email ===
-
-* The first line of commit message is taken from the email's subject
- line following [PATCH]. The remaining portion of the commit message
- is the email's content until the '---' line.
-* git format-patch is one way to create this format
-
-=== Definitions for sample patch email ===
-
-* "CodeModule" is a short idenfier for the affected code. For
- example MdePkg, or MdeModulePkg UsbBusDxe.
-* "Brief-single-line-summary" is a short summary of the change.
-* The entire first line should be less than ~70 characters.
-* "Full-commit-message" a verbose multiple line comment describing
- the change. Each line should be less than ~70 characters.
-* "Contributed-under" explicitely states that the contribution is
- made under the terms of the contribtion agreement. This
- agreement is included below in this document.
-* "Signed-off-by" is the contributor's signature identifying them
- by their real/legal name and their email address.
-
-========================================
-= TianoCore Contribution Agreement 1.0 =
-========================================
-
-INTEL CORPORATION ("INTEL") MAKES AVAILABLE SOFTWARE, DOCUMENTATION,
-INFORMATION AND/OR OTHER MATERIALS FOR USE IN THE TIANOCORE OPEN SOURCE
-PROJECT (COLLECTIVELY "CONTENT"). USE OF THE CONTENT IS GOVERNED BY THE
-TERMS AND CONDITIONS OF THIS AGREEMENT BETWEEN YOU AND INTEL AND/OR THE
-TERMS AND CONDITIONS OF LICENSE AGREEMENTS OR NOTICES INDICATED OR
-REFERENCED BELOW. BY USING THE CONTENT, YOU AGREE THAT YOUR USE OF THE
-CONTENT IS GOVERNED BY THIS AGREEMENT AND/OR THE TERMS AND CONDITIONS
-OF ANY APPLICABLE LICENSE AGREEMENTS OR NOTICES INDICATED OR REFERENCED
-BELOW. IF YOU DO NOT AGREE TO THE TERMS AND CONDITIONS OF THIS
-AGREEMENT AND THE TERMS AND CONDITIONS OF ANY APPLICABLE LICENSE
-AGREEMENTS OR NOTICES INDICATED OR REFERENCED BELOW, THEN YOU MAY NOT
-USE THE CONTENT.
-
-Unless otherwise indicated, all Content made available on the TianoCore
-site is provided to you under the terms and conditions of the BSD
-License ("BSD"). A copy of the BSD License is available at
-http://opensource.org/licenses/bsd-license.php
-or when applicable, in the associated License.txt file.
-
-Certain other content may be made available under other licenses as
-indicated in or with such Content. (For example, in a License.txt file.)
-
-You accept and agree to the following terms and conditions for Your
-present and future Contributions submitted to TianoCore site. Except
-for the license granted to Intel hereunder, You reserve all right,
-title, and interest in and to Your Contributions.
-
-== SECTION 1: Definitions ==
-* "You" or "Contributor" shall mean the copyright owner or legal
- entity authorized by the copyright owner that is making a
- Contribution hereunder. All other entities that control, are
- controlled by, or are under common control with that entity are
- considered to be a single Contributor. For the purposes of this
- definition, "control" means (i) the power, direct or indirect, to
- cause the direction or management of such entity, whether by
- contract or otherwise, or (ii) ownership of fifty percent (50%)
- or more of the outstanding shares, or (iii) beneficial ownership
- of such entity.
-* "Contribution" shall mean any original work of authorship,
- including any modifications or additions to an existing work,
- that is intentionally submitted by You to the TinaoCore site for
- inclusion in, or documentation of, any of the Content. For the
- purposes of this definition, "submitted" means any form of
- electronic, verbal, or written communication sent to the
- TianoCore site or its representatives, including but not limited
- to communication on electronic mailing lists, source code
- control systems, and issue tracking systems that are managed by,
- or on behalf of, the TianoCore site for the purpose of
- discussing and improving the Content, but excluding
- communication that is conspicuously marked or otherwise
- designated in writing by You as "Not a Contribution."
-
-== SECTION 2: License for Contributions ==
-* Contributor hereby agrees that redistribution and use of the
- Contribution in source and binary forms, with or without
- modification, are permitted provided that the following
- conditions are met:
-** Redistributions of source code must retain the Contributor's
- copyright notice, this list of conditions and the following
- disclaimer.
-** Redistributions in binary form must reproduce the Contributor's
- copyright notice, this list of conditions and the following
- disclaimer in the documentation and/or other materials provided
- with the distribution.
-* Disclaimer. None of the names of Contributor, Intel, or the names
- of their respective contributors may be used to endorse or
- promote products derived from this software without specific
- prior written permission.
-* Contributor grants a license (with the right to sublicense) under
- claims of Contributor's patents that Contributor can license that
- are infringed by the Contribution (as delivered by Contributor) to
- make, use, distribute, sell, offer for sale, and import the
- Contribution and derivative works thereof solely to the minimum
- extent necessary for licensee to exercise the granted copyright
- license; this patent license applies solely to those portions of
- the Contribution that are unmodified. No hardware per se is
- licensed.
-* EXCEPT AS EXPRESSLY SET FORTH IN SECTION 3 BELOW, THE
- CONTRIBUTION IS PROVIDED BY THE CONTRIBUTOR "AS IS" AND ANY
- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- CONTRIBUTOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THE
- CONTRIBUTION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
- DAMAGE.
-
-== SECTION 3: Representations ==
-* You represent that You are legally entitled to grant the above
- license. If your employer(s) has rights to intellectual property
- that You create that includes Your Contributions, You represent
- that You have received permission to make Contributions on behalf
- of that employer, that Your employer has waived such rights for
- Your Contributions.
-* You represent that each of Your Contributions is Your original
- creation (see Section 4 for submissions on behalf of others).
- You represent that Your Contribution submissions include complete
- details of any third-party license or other restriction
- (including, but not limited to, related patents and trademarks)
- of which You are personally aware and which are associated with
- any part of Your Contributions.
-
-== SECTION 4: Third Party Contributions ==
-* Should You wish to submit work that is not Your original creation,
- You may submit it to TianoCore site separately from any
- Contribution, identifying the complete details of its source
- and of any license or other restriction (including, but not
- limited to, related patents, trademarks, and license agreements)
- of which You are personally aware, and conspicuously marking the
- work as "Submitted on behalf of a third-party: [named here]".
-
-== SECTION 5: Miscellaneous ==
-* Applicable Laws. Any claims arising under or relating to this
- Agreement shall be governed by the internal substantive laws of
- the State of Delaware or federal courts located in Delaware,
- without regard to principles of conflict of laws.
-* Language. This Agreement is in the English language only, which
- language shall be controlling in all respects, and all versions
- of this Agreement in any other language shall be for accommodation
- only and shall not be binding. All communications and notices made
- or given pursuant to this Agreement, and all documentation and
- support to be provided, unless otherwise noted, shall be in the
- English language.
-
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c b/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c deleted file mode 100644 index be77b8361c..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c +++ /dev/null @@ -1,141 +0,0 @@ -/*++
-
-Copyright (c) 2013-2014, ARM Ltd. All rights reserved.<BR>
-
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
---*/
-
-#include "ArmGicDxe.h"
-
-VOID
-EFIAPI
-IrqInterruptHandler (
- IN EFI_EXCEPTION_TYPE InterruptType,
- IN EFI_SYSTEM_CONTEXT SystemContext
- );
-
-VOID
-EFIAPI
-ExitBootServicesEvent (
- IN EFI_EVENT Event,
- IN VOID *Context
- );
-
-//
-// Making this global saves a few bytes in image size
-//
-EFI_HANDLE gHardwareInterruptHandle = NULL;
-
-//
-// Notifications
-//
-EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
-
-// Maximum Number of Interrupts
-UINTN mGicNumInterrupts = 0;
-
-HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers = NULL;
-
-/**
- Register Handler for the specified interrupt source.
-
- @param This Instance pointer for this protocol
- @param Source Hardware source of the interrupt
- @param Handler Callback for interrupt. NULL to unregister
-
- @retval EFI_SUCCESS Source was updated to support Handler.
- @retval EFI_DEVICE_ERROR Hardware could not be programmed.
-
-**/
-EFI_STATUS
-EFIAPI
-RegisterInterruptSource (
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
- IN HARDWARE_INTERRUPT_SOURCE Source,
- IN HARDWARE_INTERRUPT_HANDLER Handler
- )
-{
- if (Source >= mGicNumInterrupts) {
- ASSERT(FALSE);
- return EFI_UNSUPPORTED;
- }
-
- if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- if ((Handler != NULL) && (gRegisteredInterruptHandlers[Source] != NULL)) {
- return EFI_ALREADY_STARTED;
- }
-
- gRegisteredInterruptHandlers[Source] = Handler;
-
- // If the interrupt handler is unregistered then disable the interrupt
- if (NULL == Handler){
- return This->DisableInterruptSource (This, Source);
- } else {
- return This->EnableInterruptSource (This, Source);
- }
-}
-
-EFI_STATUS
-InstallAndRegisterInterruptService (
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,
- IN EFI_EVENT_NOTIFY ExitBootServicesEvent
- )
-{
- EFI_STATUS Status;
- EFI_CPU_ARCH_PROTOCOL *Cpu;
-
- // Initialize the array for the Interrupt Handlers
- gRegisteredInterruptHandlers = (HARDWARE_INTERRUPT_HANDLER*)AllocateZeroPool (sizeof(HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts);
- if (gRegisteredInterruptHandlers == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
-
- Status = gBS->InstallMultipleProtocolInterfaces (
- &gHardwareInterruptHandle,
- &gHardwareInterruptProtocolGuid, InterruptProtocol,
- NULL
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Get the CPU protocol that this driver requires.
- //
- Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Unregister the default exception handler.
- //
- Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Register to receive interrupts
- //
- Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, InterruptHandler);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- // Register for an ExitBootServicesEvent
- Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);
-
- return Status;
-}
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicDxe.c b/ArmPkg/Drivers/ArmGic/ArmGicDxe.c deleted file mode 100644 index 2bb064f89a..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicDxe.c +++ /dev/null @@ -1,59 +0,0 @@ -/*++
-
-Copyright (c) 2013-2014, ARM Ltd. All rights reserved.<BR>
-
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-Module Name:
-
- ArmGicDxe.c
-
-Abstract:
-
- Driver implementing the GIC interrupt controller protocol
-
---*/
-
-#include <PiDxe.h>
-
-#include "ArmGicDxe.h"
-
-/**
- Initialize the state information for the CPU Architectural Protocol
-
- @param ImageHandle of the loaded driver
- @param SystemTable Pointer to the System Table
-
- @retval EFI_SUCCESS Protocol registered
- @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
- @retval EFI_DEVICE_ERROR Hardware problems
- @retval EFI_UNSUPPORTED GIC version not supported
-
-**/
-EFI_STATUS
-InterruptDxeInitialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
- ARM_GIC_ARCH_REVISION Revision;
-
- Revision = ArmGicGetSupportedArchRevision ();
-
- if (Revision == ARM_GIC_ARCH_REVISION_2) {
- Status = GicV2DxeInitialize (ImageHandle, SystemTable);
- } else if (Revision == ARM_GIC_ARCH_REVISION_3) {
- Status = GicV3DxeInitialize (ImageHandle, SystemTable);
- } else {
- Status = EFI_UNSUPPORTED;
- }
-
- return Status;
-}
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicDxe.h b/ArmPkg/Drivers/ArmGic/ArmGicDxe.h deleted file mode 100644 index af33aa90b0..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicDxe.h +++ /dev/null @@ -1,67 +0,0 @@ -/*++
-
-Copyright (c) 2013-2014, ARM Ltd. All rights reserved.<BR>
-
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
---*/
-
-#ifndef __ARM_GIC_DXE_H__
-#define __ARM_GIC_DXE_H__
-
-#include <Library/ArmGicLib.h>
-#include <Library/ArmLib.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#include <Protocol/Cpu.h>
-#include <Protocol/HardwareInterrupt.h>
-
-extern UINTN mGicNumInterrupts;
-extern HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers;
-
-//
-// Common API
-//
-EFI_STATUS
-InstallAndRegisterInterruptService (
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,
- IN EFI_EVENT_NOTIFY ExitBootServicesEvent
- );
-
-EFI_STATUS
-EFIAPI
-RegisterInterruptSource (
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
- IN HARDWARE_INTERRUPT_SOURCE Source,
- IN HARDWARE_INTERRUPT_HANDLER Handler
- );
-
-//
-// GicV2 API
-//
-EFI_STATUS
-GicV2DxeInitialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- );
-
-//
-// GicV3 API
-//
-EFI_STATUS
-GicV3DxeInitialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- );
-
-#endif
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf b/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf deleted file mode 100644 index e554301c4b..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf +++ /dev/null @@ -1,60 +0,0 @@ -#/** @file
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2012 - 2015, ARM Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmGicDxe
- FILE_GUID = DE371F7C-DEC4-4D21-ADF1-593ABCC15882
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
-
- ENTRY_POINT = InterruptDxeInitialize
-
-[Sources.common]
- ArmGicDxe.c
- ArmGicCommonDxe.c
-
- GicV2/ArmGicV2Dxe.c
- GicV3/ArmGicV3Dxe.c
-
-[Packages]
- MdePkg/MdePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- ArmGicLib
- BaseLib
- UefiLib
- UefiBootServicesTableLib
- DebugLib
- PrintLib
- MemoryAllocationLib
- UefiDriverEntryPoint
- IoLib
- PcdLib
-
-[Protocols]
- gHardwareInterruptProtocolGuid
- gEfiCpuArchProtocolGuid
-
-[Pcd.common]
- gArmTokenSpaceGuid.PcdGicDistributorBase
- gArmTokenSpaceGuid.PcdGicRedistributorsBase
- gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
- gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy
-
-[Depex]
- gEfiCpuArchProtocolGuid
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmGicLib.c deleted file mode 100644 index e658e9bff5..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ /dev/null @@ -1,330 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2015, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Base.h>
-#include <Library/ArmGicLib.h>
-#include <Library/ArmLib.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/PcdLib.h>
-
-/**
- *
- * Return whether the Source interrupt index refers to a shared interrupt (SPI)
- */
-STATIC
-BOOLEAN
-SourceIsSpi (
- IN UINTN Source
- )
-{
- return Source >= 32 && Source < 1020;
-}
-
-/**
- * Return the base address of the GIC redistributor for the current CPU
- *
- * @param Revision GIC Revision. The GIC redistributor might have a different
- * granularity following the GIC revision.
- *
- * @retval Base address of the associated GIC Redistributor
- */
-STATIC
-UINTN
-GicGetCpuRedistributorBase (
- IN UINTN GicRedistributorBase,
- IN ARM_GIC_ARCH_REVISION Revision
- )
-{
- UINTN Index;
- UINTN MpId;
- UINTN CpuAffinity;
- UINTN Affinity;
- UINTN GicRedistributorGranularity;
- UINTN GicCpuRedistributorBase;
-
- MpId = ArmReadMpidr ();
- // Define CPU affinity as Affinity0[0:8], Affinity1[9:15], Affinity2[16:23], Affinity3[24:32]
- // whereas Affinity3 is defined at [32:39] in MPIDR
- CpuAffinity = (MpId & (ARM_CORE_AFF0 | ARM_CORE_AFF1 | ARM_CORE_AFF2)) | ((MpId & ARM_CORE_AFF3) >> 8);
-
- if (Revision == ARM_GIC_ARCH_REVISION_3) {
- // 2 x 64KB frame: Redistributor control frame + SGI Control & Generation frame
- GicRedistributorGranularity = ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_SGI_PPI_FRAME_SIZE;
- } else {
- ASSERT_EFI_ERROR (EFI_UNSUPPORTED);
- return 0;
- }
-
- GicCpuRedistributorBase = GicRedistributorBase;
-
- for (Index = 0; Index < PcdGet32 (PcdCoreCount); Index++) {
- Affinity = MmioRead64 (GicCpuRedistributorBase + ARM_GICR_TYPER) >> 32;
- if (Affinity == CpuAffinity) {
- return GicCpuRedistributorBase;
- }
-
- // Move to the next GIC Redistributor frame
- GicCpuRedistributorBase += GicRedistributorGranularity;
- }
-
- // The Redistributor has not been found for the current CPU
- ASSERT_EFI_ERROR (EFI_NOT_FOUND);
- return 0;
-}
-
-UINTN
-EFIAPI
-ArmGicGetInterfaceIdentification (
- IN INTN GicInterruptInterfaceBase
- )
-{
- // Read the GIC Identification Register
- return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIIDR);
-}
-
-UINTN
-EFIAPI
-ArmGicGetMaxNumInterrupts (
- IN INTN GicDistributorBase
- )
-{
- return 32 * ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F) + 1);
-}
-
-VOID
-EFIAPI
-ArmGicSendSgiTo (
- IN INTN GicDistributorBase,
- IN INTN TargetListFilter,
- IN INTN CPUTargetList,
- IN INTN SgiId
- )
-{
- MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId);
-}
-
-/*
- * Acknowledge and return the value of the Interrupt Acknowledge Register
- *
- * InterruptId is returned separately from the register value because in
- * the GICv2 the register value contains the CpuId and InterruptId while
- * in the GICv3 the register value is only the InterruptId.
- *
- * @param GicInterruptInterfaceBase Base Address of the GIC CPU Interface
- * @param InterruptId InterruptId read from the Interrupt Acknowledge Register
- *
- * @retval value returned by the Interrupt Acknowledge Register
- *
- */
-UINTN
-EFIAPI
-ArmGicAcknowledgeInterrupt (
- IN UINTN GicInterruptInterfaceBase,
- OUT UINTN *InterruptId
- )
-{
- UINTN Value;
- ARM_GIC_ARCH_REVISION Revision;
-
- Revision = ArmGicGetSupportedArchRevision ();
- if (Revision == ARM_GIC_ARCH_REVISION_2) {
- Value = ArmGicV2AcknowledgeInterrupt (GicInterruptInterfaceBase);
- // InterruptId is required for the caller to know if a valid or spurious
- // interrupt has been read
- ASSERT (InterruptId != NULL);
- if (InterruptId != NULL) {
- *InterruptId = Value & ARM_GIC_ICCIAR_ACKINTID;
- }
- } else if (Revision == ARM_GIC_ARCH_REVISION_3) {
- Value = ArmGicV3AcknowledgeInterrupt ();
- } else {
- ASSERT_EFI_ERROR (EFI_UNSUPPORTED);
- // Report Spurious interrupt which is what the above controllers would
- // return if no interrupt was available
- Value = 1023;
- }
-
- return Value;
-}
-
-VOID
-EFIAPI
-ArmGicEndOfInterrupt (
- IN UINTN GicInterruptInterfaceBase,
- IN UINTN Source
- )
-{
- ARM_GIC_ARCH_REVISION Revision;
-
- Revision = ArmGicGetSupportedArchRevision ();
- if (Revision == ARM_GIC_ARCH_REVISION_2) {
- ArmGicV2EndOfInterrupt (GicInterruptInterfaceBase, Source);
- } else if (Revision == ARM_GIC_ARCH_REVISION_3) {
- ArmGicV3EndOfInterrupt (Source);
- } else {
- ASSERT_EFI_ERROR (EFI_UNSUPPORTED);
- }
-}
-
-VOID
-EFIAPI
-ArmGicEnableInterrupt (
- IN UINTN GicDistributorBase,
- IN UINTN GicRedistributorBase,
- IN UINTN Source
- )
-{
- UINT32 RegOffset;
- UINTN RegShift;
- ARM_GIC_ARCH_REVISION Revision;
- UINTN GicCpuRedistributorBase;
-
- // Calculate enable register offset and bit position
- RegOffset = Source / 32;
- RegShift = Source % 32;
-
- Revision = ArmGicGetSupportedArchRevision ();
- if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
- FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
- SourceIsSpi (Source)) {
- // Write set-enable register
- MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset), 1 << RegShift);
- } else {
- GicCpuRedistributorBase = GicGetCpuRedistributorBase (GicRedistributorBase, Revision);
- if (GicCpuRedistributorBase == 0) {
- ASSERT_EFI_ERROR (EFI_NOT_FOUND);
- return;
- }
-
- // Write set-enable register
- MmioWrite32 (GicCpuRedistributorBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + (4 * RegOffset), 1 << RegShift);
- }
-}
-
-VOID
-EFIAPI
-ArmGicDisableInterrupt (
- IN UINTN GicDistributorBase,
- IN UINTN GicRedistributorBase,
- IN UINTN Source
- )
-{
- UINT32 RegOffset;
- UINTN RegShift;
- ARM_GIC_ARCH_REVISION Revision;
- UINTN GicCpuRedistributorBase;
-
- // Calculate enable register offset and bit position
- RegOffset = Source / 32;
- RegShift = Source % 32;
-
- Revision = ArmGicGetSupportedArchRevision ();
- if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
- FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
- SourceIsSpi (Source)) {
- // Write clear-enable register
- MmioWrite32 (GicDistributorBase + ARM_GIC_ICDICER + (4 * RegOffset), 1 << RegShift);
- } else {
- GicCpuRedistributorBase = GicGetCpuRedistributorBase (GicRedistributorBase, Revision);
- if (GicCpuRedistributorBase == 0) {
- return;
- }
-
- // Write clear-enable register
- MmioWrite32 (GicCpuRedistributorBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICENABLER + (4 * RegOffset), 1 << RegShift);
- }
-}
-
-BOOLEAN
-EFIAPI
-ArmGicIsInterruptEnabled (
- IN UINTN GicDistributorBase,
- IN UINTN GicRedistributorBase,
- IN UINTN Source
- )
-{
- UINT32 RegOffset;
- UINTN RegShift;
- ARM_GIC_ARCH_REVISION Revision;
- UINTN GicCpuRedistributorBase;
- UINT32 Interrupts;
-
- // Calculate enable register offset and bit position
- RegOffset = Source / 32;
- RegShift = Source % 32;
-
- Revision = ArmGicGetSupportedArchRevision ();
- if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
- FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
- SourceIsSpi (Source)) {
- Interrupts = ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset)) & (1 << RegShift)) != 0);
- } else {
- GicCpuRedistributorBase = GicGetCpuRedistributorBase (GicRedistributorBase, Revision);
- if (GicCpuRedistributorBase == 0) {
- return 0;
- }
-
- // Read set-enable register
- Interrupts = MmioRead32 (GicCpuRedistributorBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + (4 * RegOffset));
- }
-
- return ((Interrupts & (1 << RegShift)) != 0);
-}
-
-VOID
-EFIAPI
-ArmGicDisableDistributor (
- IN INTN GicDistributorBase
- )
-{
- // Disable Gic Distributor
- MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x0);
-}
-
-VOID
-EFIAPI
-ArmGicEnableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
- )
-{
- ARM_GIC_ARCH_REVISION Revision;
-
- Revision = ArmGicGetSupportedArchRevision ();
- if (Revision == ARM_GIC_ARCH_REVISION_2) {
- ArmGicV2EnableInterruptInterface (GicInterruptInterfaceBase);
- } else if (Revision == ARM_GIC_ARCH_REVISION_3) {
- ArmGicV3EnableInterruptInterface ();
- } else {
- ASSERT_EFI_ERROR (EFI_UNSUPPORTED);
- }
-}
-
-VOID
-EFIAPI
-ArmGicDisableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
- )
-{
- ARM_GIC_ARCH_REVISION Revision;
-
- Revision = ArmGicGetSupportedArchRevision ();
- if (Revision == ARM_GIC_ARCH_REVISION_2) {
- ArmGicV2DisableInterruptInterface (GicInterruptInterfaceBase);
- } else if (Revision == ARM_GIC_ARCH_REVISION_3) {
- ArmGicV3DisableInterruptInterface ();
- } else {
- ASSERT_EFI_ERROR (EFI_UNSUPPORTED);
- }
-}
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.inf b/ArmPkg/Drivers/ArmGic/ArmGicLib.inf deleted file mode 100644 index 047adac85f..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.inf +++ /dev/null @@ -1,51 +0,0 @@ -#/* @file
-# Copyright (c) 2011-2015, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmGicLib
- FILE_GUID = 03d05ee4-cdeb-458c-9dfc-993f09bdf405
- MODULE_TYPE = SEC
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmGicLib
-
-[Sources]
- ArmGicLib.c
- ArmGicNonSecLib.c
-
- GicV2/ArmGicV2Lib.c
- GicV2/ArmGicV2NonSecLib.c
-
-[Sources.ARM]
- GicV3/Arm/ArmGicV3.S | GCC
- GicV3/Arm/ArmGicV3.asm | RVCT
-
-[Sources.AARCH64]
- GicV3/AArch64/ArmGicV3.S
-
-[LibraryClasses]
- ArmLib
- DebugLib
- IoLib
- ArmGicArchLib
-
-[Packages]
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
- MdePkg/MdePkg.dec
-
-[Pcd]
- gArmPlatformTokenSpaceGuid.PcdCoreCount
-
-[FeaturePcd]
- gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c b/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c deleted file mode 100644 index f90391b716..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c +++ /dev/null @@ -1,41 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2015, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Uefi.h>
-#include <Library/IoLib.h>
-#include <Library/ArmGicLib.h>
-
-VOID
-EFIAPI
-ArmGicEnableDistributor (
- IN INTN GicDistributorBase
- )
-{
- ARM_GIC_ARCH_REVISION Revision;
-
- /*
- * Enable GIC distributor in Non-Secure world.
- * Note: The ICDDCR register is banked when Security extensions are implemented
- */
- Revision = ArmGicGetSupportedArchRevision ();
- if (Revision == ARM_GIC_ARCH_REVISION_2) {
- MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);
- } else {
- if (MmioRead32 (GicDistributorBase + ARM_GIC_ICDDCR) & ARM_GIC_ICDDCR_ARE) {
- MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x2);
- } else {
- MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);
- }
- }
-}
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicSecLib.c b/ArmPkg/Drivers/ArmGic/ArmGicSecLib.c deleted file mode 100644 index d64806d2f1..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicSecLib.c +++ /dev/null @@ -1,64 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Base.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/ArmGicLib.h>
-
-/*
- * This function configures the interrupts set by the mask to be secure.
- *
- */
-VOID
-EFIAPI
-ArmGicSetSecureInterrupts (
- IN UINTN GicDistributorBase,
- IN UINTN* GicSecureInterruptMask,
- IN UINTN GicSecureInterruptMaskSize
- )
-{
- UINTN Index;
- UINT32 InterruptStatus;
-
- // We must not have more interrupts defined by the mask than the number of available interrupts
- ASSERT(GicSecureInterruptMaskSize <= (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32));
-
- // Set all the interrupts defined by the mask as Secure
- for (Index = 0; Index < GicSecureInterruptMaskSize; Index++) {
- InterruptStatus = MmioRead32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4));
- MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), InterruptStatus & (~GicSecureInterruptMask[Index]));
- }
-}
-
-VOID
-EFIAPI
-ArmGicEnableDistributor (
- IN INTN GicDistributorBase
- )
-{
- // Turn on the GIC distributor
- MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 1);
-}
-
-VOID
-EFIAPI
-ArmGicSetupNonSecure (
- IN UINTN MpId,
- IN INTN GicDistributorBase,
- IN INTN GicInterruptInterfaceBase
- )
-{
- ArmGicV2SetupNonSecure (MpId, GicDistributorBase, GicInterruptInterfaceBase);
-}
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf b/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf deleted file mode 100644 index fc2e1bc01e..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf +++ /dev/null @@ -1,52 +0,0 @@ -#/* @file
-# Copyright (c) 2011-2015, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmGicSecLib
- FILE_GUID = 85f3cf80-b5f4-11df-9855-0002a5d5c51b
- MODULE_TYPE = SEC
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmGicLib
-
-[Sources]
- ArmGicLib.c
- ArmGicSecLib.c
-
- GicV2/ArmGicV2Lib.c
- GicV2/ArmGicV2SecLib.c
-
-[Sources.ARM]
- GicV3/Arm/ArmGicV3.S | GCC
- GicV3/Arm/ArmGicV3.asm | RVCT
-
-[Sources.AARCH64]
- GicV3/AArch64/ArmGicV3.S
-
-[Packages]
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
-
-[LibraryClasses]
- ArmLib
- DebugLib
- IoLib
- ArmGicArchLib
-
-[Pcd]
- gArmPlatformTokenSpaceGuid.PcdCoreCount
-
-[FeaturePcd]
- gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy
diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c deleted file mode 100644 index b9ecd5543a..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c +++ /dev/null @@ -1,317 +0,0 @@ -/*++
-
-Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
-Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
-Portions copyright (c) 2011-2016, ARM Ltd. All rights reserved.<BR>
-
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-Module Name:
-
- GicV2/ArmGicV2Dxe.c
-
-Abstract:
-
- Driver implementing the GicV2 interrupt controller protocol
-
---*/
-
-#include <Library/ArmGicLib.h>
-
-#include "ArmGicDxe.h"
-
-#define ARM_GIC_DEFAULT_PRIORITY 0x80
-
-extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol;
-
-STATIC UINT32 mGicInterruptInterfaceBase;
-STATIC UINT32 mGicDistributorBase;
-
-/**
- Enable interrupt source Source.
-
- @param This Instance pointer for this protocol
- @param Source Hardware source of the interrupt
-
- @retval EFI_SUCCESS Source interrupt enabled.
- @retval EFI_UNSUPPORTED Source interrupt is not supported
-
-**/
-EFI_STATUS
-EFIAPI
-GicV2EnableInterruptSource (
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
- IN HARDWARE_INTERRUPT_SOURCE Source
- )
-{
- if (Source >= mGicNumInterrupts) {
- ASSERT(FALSE);
- return EFI_UNSUPPORTED;
- }
-
- ArmGicEnableInterrupt (mGicDistributorBase, 0, Source);
-
- return EFI_SUCCESS;
-}
-
-/**
- Disable interrupt source Source.
-
- @param This Instance pointer for this protocol
- @param Source Hardware source of the interrupt
-
- @retval EFI_SUCCESS Source interrupt disabled.
- @retval EFI_UNSUPPORTED Source interrupt is not supported
-
-**/
-EFI_STATUS
-EFIAPI
-GicV2DisableInterruptSource (
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
- IN HARDWARE_INTERRUPT_SOURCE Source
- )
-{
- if (Source >= mGicNumInterrupts) {
- ASSERT(FALSE);
- return EFI_UNSUPPORTED;
- }
-
- ArmGicDisableInterrupt (mGicDistributorBase, 0, Source);
-
- return EFI_SUCCESS;
-}
-
-/**
- Return current state of interrupt source Source.
-
- @param This Instance pointer for this protocol
- @param Source Hardware source of the interrupt
- @param InterruptState TRUE: source enabled, FALSE: source disabled.
-
- @retval EFI_SUCCESS InterruptState is valid
- @retval EFI_UNSUPPORTED Source interrupt is not supported
-
-**/
-EFI_STATUS
-EFIAPI
-GicV2GetInterruptSourceState (
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
- IN HARDWARE_INTERRUPT_SOURCE Source,
- IN BOOLEAN *InterruptState
- )
-{
- if (Source >= mGicNumInterrupts) {
- ASSERT(FALSE);
- return EFI_UNSUPPORTED;
- }
-
- *InterruptState = ArmGicIsInterruptEnabled (mGicDistributorBase, 0, Source);
-
- return EFI_SUCCESS;
-}
-
-/**
- Signal to the hardware that the End Of Interrupt state
- has been reached.
-
- @param This Instance pointer for this protocol
- @param Source Hardware source of the interrupt
-
- @retval EFI_SUCCESS Source interrupt EOI'ed.
- @retval EFI_UNSUPPORTED Source interrupt is not supported
-
-**/
-EFI_STATUS
-EFIAPI
-GicV2EndOfInterrupt (
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
- IN HARDWARE_INTERRUPT_SOURCE Source
- )
-{
- if (Source >= mGicNumInterrupts) {
- ASSERT(FALSE);
- return EFI_UNSUPPORTED;
- }
-
- ArmGicV2EndOfInterrupt (mGicInterruptInterfaceBase, Source);
- return EFI_SUCCESS;
-}
-
-/**
- EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.
-
- @param InterruptType Defines the type of interrupt or exception that
- occurred on the processor.This parameter is processor architecture specific.
- @param SystemContext A pointer to the processor context when
- the interrupt occurred on the processor.
-
- @return None
-
-**/
-VOID
-EFIAPI
-GicV2IrqInterruptHandler (
- IN EFI_EXCEPTION_TYPE InterruptType,
- IN EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- UINT32 GicInterrupt;
- HARDWARE_INTERRUPT_HANDLER InterruptHandler;
-
- GicInterrupt = ArmGicV2AcknowledgeInterrupt (mGicInterruptInterfaceBase);
-
- // Special Interrupts (ID1020-ID1023) have an Interrupt ID greater than the number of interrupt (ie: Spurious interrupt).
- if ((GicInterrupt & ARM_GIC_ICCIAR_ACKINTID) >= mGicNumInterrupts) {
- // The special interrupt do not need to be acknowledge
- return;
- }
-
- InterruptHandler = gRegisteredInterruptHandlers[GicInterrupt];
- if (InterruptHandler != NULL) {
- // Call the registered interrupt handler.
- InterruptHandler (GicInterrupt, SystemContext);
- } else {
- DEBUG ((EFI_D_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt));
- GicV2EndOfInterrupt (&gHardwareInterruptV2Protocol, GicInterrupt);
- }
-}
-
-//
-// The protocol instance produced by this driver
-//
-EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol = {
- RegisterInterruptSource,
- GicV2EnableInterruptSource,
- GicV2DisableInterruptSource,
- GicV2GetInterruptSourceState,
- GicV2EndOfInterrupt
-};
-
-/**
- Shutdown our hardware
-
- DXE Core will disable interrupts and turn off the timer and disable interrupts
- after all the event handlers have run.
-
- @param[in] Event The Event that is being processed
- @param[in] Context Event Context
-**/
-VOID
-EFIAPI
-GicV2ExitBootServicesEvent (
- IN EFI_EVENT Event,
- IN VOID *Context
- )
-{
- UINTN Index;
- UINT32 GicInterrupt;
-
- // Disable all the interrupts
- for (Index = 0; Index < mGicNumInterrupts; Index++) {
- GicV2DisableInterruptSource (&gHardwareInterruptV2Protocol, Index);
- }
-
- // Acknowledge all pending interrupts
- do {
- GicInterrupt = ArmGicV2AcknowledgeInterrupt (mGicInterruptInterfaceBase);
-
- if ((GicInterrupt & ARM_GIC_ICCIAR_ACKINTID) < mGicNumInterrupts) {
- GicV2EndOfInterrupt (&gHardwareInterruptV2Protocol, GicInterrupt);
- }
- } while (!ARM_GIC_IS_SPECIAL_INTERRUPTS (GicInterrupt));
-
- // Disable Gic Interface
- ArmGicV2DisableInterruptInterface (mGicInterruptInterfaceBase);
-
- // Disable Gic Distributor
- ArmGicDisableDistributor (mGicDistributorBase);
-}
-
-/**
- Initialize the state information for the CPU Architectural Protocol
-
- @param ImageHandle of the loaded driver
- @param SystemTable Pointer to the System Table
-
- @retval EFI_SUCCESS Protocol registered
- @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
- @retval EFI_DEVICE_ERROR Hardware problems
-
-**/
-EFI_STATUS
-GicV2DxeInitialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
- UINTN Index;
- UINT32 RegOffset;
- UINTN RegShift;
- UINT32 CpuTarget;
-
- // Make sure the Interrupt Controller Protocol is not already installed in the system.
- ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
-
- mGicInterruptInterfaceBase = PcdGet64 (PcdGicInterruptInterfaceBase);
- mGicDistributorBase = PcdGet64 (PcdGicDistributorBase);
- mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);
-
- for (Index = 0; Index < mGicNumInterrupts; Index++) {
- GicV2DisableInterruptSource (&gHardwareInterruptV2Protocol, Index);
-
- // Set Priority
- RegOffset = Index / 4;
- RegShift = (Index % 4) * 8;
- MmioAndThenOr32 (
- mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
- ~(0xff << RegShift),
- ARM_GIC_DEFAULT_PRIORITY << RegShift
- );
- }
-
- //
- // Targets the interrupts to the Primary Cpu
- //
-
- // Only Primary CPU will run this code. We can identify our GIC CPU ID by reading
- // the GIC Distributor Target register. The 8 first GICD_ITARGETSRn are banked to each
- // connected CPU. These 8 registers hold the CPU targets fields for interrupts 0-31.
- // More Info in the GIC Specification about "Interrupt Processor Targets Registers"
- //
- // Read the first Interrupt Processor Targets Register (that corresponds to the 4
- // first SGIs)
- CpuTarget = MmioRead32 (mGicDistributorBase + ARM_GIC_ICDIPTR);
-
- // The CPU target is a bit field mapping each CPU to a GIC CPU Interface. This value
- // is 0 when we run on a uniprocessor platform.
- if (CpuTarget != 0) {
- // The 8 first Interrupt Processor Targets Registers are read-only
- for (Index = 8; Index < (mGicNumInterrupts / 4); Index++) {
- MmioWrite32 (mGicDistributorBase + ARM_GIC_ICDIPTR + (Index * 4), CpuTarget);
- }
- }
-
- // Set binary point reg to 0x7 (no preemption)
- MmioWrite32 (mGicInterruptInterfaceBase + ARM_GIC_ICCBPR, 0x7);
-
- // Set priority mask reg to 0xff to allow all priorities through
- MmioWrite32 (mGicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0xff);
-
- // Enable gic cpu interface
- ArmGicEnableInterruptInterface (mGicInterruptInterfaceBase);
-
- // Enable gic distributor
- ArmGicEnableDistributor (mGicDistributorBase);
-
- Status = InstallAndRegisterInterruptService (
- &gHardwareInterruptV2Protocol, GicV2IrqInterruptHandler, GicV2ExitBootServicesEvent);
-
- return Status;
-}
diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c deleted file mode 100644 index 5ac1d89ac5..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c +++ /dev/null @@ -1,36 +0,0 @@ -/** @file
-*
-* Copyright (c) 2013-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmGicLib.h>
-#include <Library/IoLib.h>
-
-UINTN
-EFIAPI
-ArmGicV2AcknowledgeInterrupt (
- IN UINTN GicInterruptInterfaceBase
- )
-{
- // Read the Interrupt Acknowledge Register
- return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
-}
-
-VOID
-EFIAPI
-ArmGicV2EndOfInterrupt (
- IN UINTN GicInterruptInterfaceBase,
- IN UINTN Source
- )
-{
- MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source);
-}
diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c deleted file mode 100644 index 92b764f422..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c +++ /dev/null @@ -1,42 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Uefi.h>
-#include <Library/IoLib.h>
-#include <Library/ArmGicLib.h>
-
-
-VOID
-EFIAPI
-ArmGicV2EnableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
- )
-{
- /*
- * Enable the CPU interface in Non-Secure world
- * Note: The ICCICR register is banked when Security extensions are implemented
- */
- MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x1);
-}
-
-VOID
-EFIAPI
-ArmGicV2DisableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
- )
-{
- // Disable Gic Interface
- MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x0);
- MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x0);
-}
diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2SecLib.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2SecLib.c deleted file mode 100644 index ac1e0e4945..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2SecLib.c +++ /dev/null @@ -1,100 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Base.h>
-#include <Library/ArmLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/ArmGicLib.h>
-
-/*
- * This function configures the all interrupts to be Non-secure.
- *
- */
-VOID
-EFIAPI
-ArmGicV2SetupNonSecure (
- IN UINTN MpId,
- IN INTN GicDistributorBase,
- IN INTN GicInterruptInterfaceBase
- )
-{
- UINTN InterruptId;
- UINTN CachedPriorityMask;
- UINTN Index;
- UINTN MaxInterrupts;
-
- CachedPriorityMask = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR);
-
- // Set priority Mask so that no interrupts get through to CPU
- MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0);
-
- InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
- MaxInterrupts = ArmGicGetMaxNumInterrupts (GicDistributorBase);
-
- // Only try to clear valid interrupts. Ignore spurious interrupts.
- while ((InterruptId & 0x3FF) < MaxInterrupts) {
- // Some of the SGI's are still pending, read Ack register and send End of Interrupt Signal
- ArmGicEndOfInterrupt (GicInterruptInterfaceBase, InterruptId);
-
- // Next
- InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
- }
-
- // Only the primary core should set the Non Secure bit to the SPIs (Shared Peripheral Interrupt).
- if (ArmPlatformIsPrimaryCore (MpId)) {
- // Ensure all GIC interrupts are Non-Secure
- for (Index = 0; Index < (MaxInterrupts / 32); Index++) {
- MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), 0xffffffff);
- }
- } else {
- // The secondary cores only set the Non Secure bit to their banked PPIs
- MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR, 0xffffffff);
- }
-
- // Ensure all interrupts can get through the priority mask
- MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, CachedPriorityMask);
-}
-
-VOID
-EFIAPI
-ArmGicV2EnableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
- )
-{
- // Set Priority Mask to allow interrupts
- MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x000000FF);
-
- // Enable CPU interface in Secure world
- // Enable CPU interface in Non-secure World
- // Signal Secure Interrupts to CPU using FIQ line *
- MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR,
- ARM_GIC_ICCICR_ENABLE_SECURE |
- ARM_GIC_ICCICR_ENABLE_NS |
- ARM_GIC_ICCICR_SIGNAL_SECURE_TO_FIQ);
-}
-
-VOID
-EFIAPI
-ArmGicV2DisableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
- )
-{
- UINT32 ControlValue;
-
- // Disable CPU interface in Secure world and Non-secure World
- ControlValue = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR);
- MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, ControlValue & ~(ARM_GIC_ICCICR_ENABLE_SECURE | ARM_GIC_ICCICR_ENABLE_NS));
-}
diff --git a/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S b/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S deleted file mode 100644 index a4e0a4170a..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S +++ /dev/null @@ -1,112 +0,0 @@ -#
-# Copyright (c) 2014, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials are licensed and made available
-# under the terms and conditions of the BSD License which accompanies this
-# distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-
-#include <AsmMacroIoLibV8.h>
-
-#if !defined(__clang__)
-
-//
-// Clang versions before v3.6 do not support the GNU extension that allows
-// system registers outside of the IMPLEMENTATION DEFINED range to be specified
-// using the generic notation below. However, clang knows these registers by
-// their architectural names, so it has no need for these aliases anyway.
-//
-#define ICC_SRE_EL1 S3_0_C12_C12_5
-#define ICC_SRE_EL2 S3_4_C12_C9_5
-#define ICC_SRE_EL3 S3_6_C12_C12_5
-#define ICC_IGRPEN1_EL1 S3_0_C12_C12_7
-#define ICC_EOIR1_EL1 S3_0_C12_C12_1
-#define ICC_IAR1_EL1 S3_0_C12_C12_0
-#define ICC_PMR_EL1 S3_0_C4_C6_0
-#define ICC_BPR1_EL1 S3_0_C12_C12_3
-
-#endif
-
-//UINT32
-//EFIAPI
-//ArmGicV3GetControlSystemRegisterEnable (
-// VOID
-// );
-ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable)
- EL1_OR_EL2_OR_EL3(x1)
-1: mrs x0, ICC_SRE_EL1
- b 4f
-2: mrs x0, ICC_SRE_EL2
- b 4f
-3: mrs x0, ICC_SRE_EL3
-4: ret
-
-//VOID
-//EFIAPI
-//ArmGicV3SetControlSystemRegisterEnable (
-// IN UINT32 ControlSystemRegisterEnable
-// );
-ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable)
- EL1_OR_EL2_OR_EL3(x1)
-1: msr ICC_SRE_EL1, x0
- b 4f
-2: msr ICC_SRE_EL2, x0
- b 4f
-3: msr ICC_SRE_EL3, x0
-4: isb
- ret
-
-//VOID
-//ArmGicV3EnableInterruptInterface (
-// VOID
-// );
-ASM_FUNC(ArmGicV3EnableInterruptInterface)
- mov x0, #1
- msr ICC_IGRPEN1_EL1, x0
- ret
-
-//VOID
-//ArmGicV3DisableInterruptInterface (
-// VOID
-// );
-ASM_FUNC(ArmGicV3DisableInterruptInterface)
- mov x0, #0
- msr ICC_IGRPEN1_EL1, x0
- ret
-
-//VOID
-//ArmGicV3EndOfInterrupt (
-// IN UINTN InterruptId
-// );
-ASM_FUNC(ArmGicV3EndOfInterrupt)
- msr ICC_EOIR1_EL1, x0
- ret
-
-//UINTN
-//ArmGicV3AcknowledgeInterrupt (
-// VOID
-// );
-ASM_FUNC(ArmGicV3AcknowledgeInterrupt)
- mrs x0, ICC_IAR1_EL1
- ret
-
-//VOID
-//ArmGicV3SetPriorityMask (
-// IN UINTN Priority
-// );
-ASM_FUNC(ArmGicV3SetPriorityMask)
- msr ICC_PMR_EL1, x0
- ret
-
-//VOID
-//ArmGicV3SetBinaryPointer (
-// IN UINTN BinaryPoint
-// );
-ASM_FUNC(ArmGicV3SetBinaryPointer)
- msr ICC_BPR1_EL1, x0
- ret
diff --git a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S deleted file mode 100644 index a72f3c8651..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S +++ /dev/null @@ -1,86 +0,0 @@ -#
-# Copyright (c) 2014, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials are licensed and made available
-# under the terms and conditions of the BSD License which accompanies this
-# distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-
-#include <AsmMacroIoLib.h>
-#include <Library/ArmLib.h>
-
-// For the moment we assume this will run in SVC mode on ARMv7
-
-//UINT32
-//EFIAPI
-//ArmGicGetControlSystemRegisterEnable (
-// VOID
-// );
-ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable)
- mrc p15, 0, r0, c12, c12, 5 // ICC_SRE
- bx lr
-
-//VOID
-//EFIAPI
-//ArmGicSetControlSystemRegisterEnable (
-// IN UINT32 ControlSystemRegisterEnable
-// );
-ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable)
- mcr p15, 0, r0, c12, c12, 5 // ICC_SRE
- isb
- bx lr
-
-//VOID
-//ArmGicV3EnableInterruptInterface (
-// VOID
-// );
-ASM_FUNC(ArmGicV3EnableInterruptInterface)
- mov r0, #1
- mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
- bx lr
-
-//VOID
-//ArmGicV3DisableInterruptInterface (
-// VOID
-// );
-ASM_FUNC(ArmGicV3DisableInterruptInterface)
- mov r0, #0
- mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
- bx lr
-
-//VOID
-//ArmGicV3EndOfInterrupt (
-// IN UINTN InterruptId
-// );
-ASM_FUNC(ArmGicV3EndOfInterrupt)
- mcr p15, 0, r0, c12, c12, 1 //ICC_EOIR1
- bx lr
-
-//UINTN
-//ArmGicV3AcknowledgeInterrupt (
-// VOID
-// );
-ASM_FUNC(ArmGicV3AcknowledgeInterrupt)
- mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1
- bx lr
-
-//VOID
-//ArmGicV3SetPriorityMask (
-// IN UINTN Priority
-// );
-ASM_FUNC(ArmGicV3SetPriorityMask)
- mcr p15, 0, r0, c4, c6, 0 //ICC_PMR
- bx lr
-
-//VOID
-//ArmGicV3SetBinaryPointer (
-// IN UINTN BinaryPoint
-// );
-ASM_FUNC(ArmGicV3SetBinaryPointer)
- mcr p15, 0, r0, c12, c12, 3 //ICC_BPR1
- bx lr
diff --git a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm deleted file mode 100644 index 4228fb59be..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm +++ /dev/null @@ -1,88 +0,0 @@ -//
-// Copyright (c) 2014, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials are licensed and made available
-// under the terms and conditions of the BSD License which accompanies this
-// distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-// For the moment we assume this will run in SVC mode on ARMv7
-
-
- INCLUDE AsmMacroExport.inc
-
-//UINT32
-//EFIAPI
-//ArmGicGetControlSystemRegisterEnable (
-// VOID
-// );
- RVCT_ASM_EXPORT ArmGicV3GetControlSystemRegisterEnable
- mrc p15, 0, r0, c12, c12, 5 // ICC_SRE
- bx lr
-
-//VOID
-//EFIAPI
-//ArmGicSetControlSystemRegisterEnable (
-// IN UINT32 ControlSystemRegisterEnable
-// );
- RVCT_ASM_EXPORT ArmGicV3SetControlSystemRegisterEnable
- mcr p15, 0, r0, c12, c12, 5 // ICC_SRE
- isb
- bx lr
-
-//VOID
-//ArmGicV3EnableInterruptInterface (
-// VOID
-// );
- RVCT_ASM_EXPORT ArmGicV3EnableInterruptInterface
- mov r0, #1
- mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
- bx lr
-
-//VOID
-//ArmGicV3DisableInterruptInterface (
-// VOID
-// );
- RVCT_ASM_EXPORT ArmGicV3DisableInterruptInterface
- mov r0, #0
- mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
- bx lr
-
-//VOID
-//ArmGicV3EndOfInterrupt (
-// IN UINTN InterruptId
-// );
- RVCT_ASM_EXPORT ArmGicV3EndOfInterrupt
- mcr p15, 0, r0, c12, c12, 1 //ICC_EOIR1
- bx lr
-
-//UINTN
-//ArmGicV3AcknowledgeInterrupt (
-// VOID
-// );
- RVCT_ASM_EXPORT ArmGicV3AcknowledgeInterrupt
- mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1
- bx lr
-
-//VOID
-//ArmGicV3SetPriorityMask (
-// IN UINTN Priority
-// );
- RVCT_ASM_EXPORT ArmGicV3SetPriorityMask
- mcr p15, 0, r0, c4, c6, 0 //ICC_PMR
- bx lr
-
-//VOID
-//ArmGicV3SetBinaryPointer (
-// IN UINTN BinaryPoint
-// );
- RVCT_ASM_EXPORT ArmGicV3SetBinaryPointer
- mcr p15, 0, r0, c12, c12, 3 //ICC_BPR1
- bx lr
-
- END
diff --git a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c deleted file mode 100644 index 8af97a93b1..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c +++ /dev/null @@ -1,337 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2016, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmGicLib.h>
-
-#include "ArmGicDxe.h"
-
-#define ARM_GIC_DEFAULT_PRIORITY 0x80
-
-extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol;
-
-STATIC UINTN mGicDistributorBase;
-STATIC UINTN mGicRedistributorsBase;
-
-/**
- Enable interrupt source Source.
-
- @param This Instance pointer for this protocol
- @param Source Hardware source of the interrupt
-
- @retval EFI_SUCCESS Source interrupt enabled.
- @retval EFI_DEVICE_ERROR Hardware could not be programmed.
-
-**/
-EFI_STATUS
-EFIAPI
-GicV3EnableInterruptSource (
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
- IN HARDWARE_INTERRUPT_SOURCE Source
- )
-{
- if (Source >= mGicNumInterrupts) {
- ASSERT(FALSE);
- return EFI_UNSUPPORTED;
- }
-
- ArmGicEnableInterrupt (mGicDistributorBase, mGicRedistributorsBase, Source);
-
- return EFI_SUCCESS;
-}
-
-/**
- Disable interrupt source Source.
-
- @param This Instance pointer for this protocol
- @param Source Hardware source of the interrupt
-
- @retval EFI_SUCCESS Source interrupt disabled.
- @retval EFI_DEVICE_ERROR Hardware could not be programmed.
-
-**/
-EFI_STATUS
-EFIAPI
-GicV3DisableInterruptSource (
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
- IN HARDWARE_INTERRUPT_SOURCE Source
- )
-{
- if (Source >= mGicNumInterrupts) {
- ASSERT(FALSE);
- return EFI_UNSUPPORTED;
- }
-
- ArmGicDisableInterrupt (mGicDistributorBase, mGicRedistributorsBase, Source);
-
- return EFI_SUCCESS;
-}
-
-/**
- Return current state of interrupt source Source.
-
- @param This Instance pointer for this protocol
- @param Source Hardware source of the interrupt
- @param InterruptState TRUE: source enabled, FALSE: source disabled.
-
- @retval EFI_SUCCESS InterruptState is valid
- @retval EFI_DEVICE_ERROR InterruptState is not valid
-
-**/
-EFI_STATUS
-EFIAPI
-GicV3GetInterruptSourceState (
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
- IN HARDWARE_INTERRUPT_SOURCE Source,
- IN BOOLEAN *InterruptState
- )
-{
- if (Source >= mGicNumInterrupts) {
- ASSERT(FALSE);
- return EFI_UNSUPPORTED;
- }
-
- *InterruptState = ArmGicIsInterruptEnabled (mGicDistributorBase, mGicRedistributorsBase, Source);
-
- return EFI_SUCCESS;
-}
-
-/**
- Signal to the hardware that the End Of Interrupt state
- has been reached.
-
- @param This Instance pointer for this protocol
- @param Source Hardware source of the interrupt
-
- @retval EFI_SUCCESS Source interrupt EOI'ed.
- @retval EFI_DEVICE_ERROR Hardware could not be programmed.
-
-**/
-EFI_STATUS
-EFIAPI
-GicV3EndOfInterrupt (
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
- IN HARDWARE_INTERRUPT_SOURCE Source
- )
-{
- if (Source >= mGicNumInterrupts) {
- ASSERT(FALSE);
- return EFI_UNSUPPORTED;
- }
-
- ArmGicV3EndOfInterrupt (Source);
- return EFI_SUCCESS;
-}
-
-/**
- EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.
-
- @param InterruptType Defines the type of interrupt or exception that
- occurred on the processor.This parameter is processor architecture specific.
- @param SystemContext A pointer to the processor context when
- the interrupt occurred on the processor.
-
- @return None
-
-**/
-VOID
-EFIAPI
-GicV3IrqInterruptHandler (
- IN EFI_EXCEPTION_TYPE InterruptType,
- IN EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- UINT32 GicInterrupt;
- HARDWARE_INTERRUPT_HANDLER InterruptHandler;
-
- GicInterrupt = ArmGicV3AcknowledgeInterrupt ();
-
- // Special Interrupts (ID1020-ID1023) have an Interrupt ID greater than the
- // number of interrupt (ie: Spurious interrupt).
- if ((GicInterrupt & ARM_GIC_ICCIAR_ACKINTID) >= mGicNumInterrupts) {
- // The special interrupt do not need to be acknowledge
- return;
- }
-
- InterruptHandler = gRegisteredInterruptHandlers[GicInterrupt];
- if (InterruptHandler != NULL) {
- // Call the registered interrupt handler.
- InterruptHandler (GicInterrupt, SystemContext);
- } else {
- DEBUG ((EFI_D_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt));
- GicV3EndOfInterrupt (&gHardwareInterruptV3Protocol, GicInterrupt);
- }
-}
-
-//
-// The protocol instance produced by this driver
-//
-EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol = {
- RegisterInterruptSource,
- GicV3EnableInterruptSource,
- GicV3DisableInterruptSource,
- GicV3GetInterruptSourceState,
- GicV3EndOfInterrupt
-};
-
-/**
- Shutdown our hardware
-
- DXE Core will disable interrupts and turn off the timer and disable interrupts
- after all the event handlers have run.
-
- @param[in] Event The Event that is being processed
- @param[in] Context Event Context
-**/
-VOID
-EFIAPI
-GicV3ExitBootServicesEvent (
- IN EFI_EVENT Event,
- IN VOID *Context
- )
-{
- UINTN Index;
-
- // Acknowledge all pending interrupts
- for (Index = 0; Index < mGicNumInterrupts; Index++) {
- GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Index);
- }
-
- for (Index = 0; Index < mGicNumInterrupts; Index++) {
- GicV3EndOfInterrupt (&gHardwareInterruptV3Protocol, Index);
- }
-
- // Disable Gic Interface
- ArmGicV3DisableInterruptInterface ();
-
- // Disable Gic Distributor
- ArmGicDisableDistributor (mGicDistributorBase);
-}
-
-/**
- Initialize the state information for the CPU Architectural Protocol
-
- @param ImageHandle of the loaded driver
- @param SystemTable Pointer to the System Table
-
- @retval EFI_SUCCESS Protocol registered
- @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
- @retval EFI_DEVICE_ERROR Hardware problems
-
-**/
-EFI_STATUS
-GicV3DxeInitialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
- UINTN Index;
- UINT32 RegOffset;
- UINTN RegShift;
- UINT64 CpuTarget;
- UINT64 MpId;
-
- // Make sure the Interrupt Controller Protocol is not already installed in the system.
- ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
-
- mGicDistributorBase = PcdGet64 (PcdGicDistributorBase);
- mGicRedistributorsBase = PcdGet64 (PcdGicRedistributorsBase);
- mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);
-
- //
- // We will be driving this GIC in native v3 mode, i.e., with Affinity
- // Routing enabled. So ensure that the ARE bit is set.
- //
- if (!FeaturePcdGet (PcdArmGicV3WithV2Legacy)) {
- MmioOr32 (mGicDistributorBase + ARM_GIC_ICDDCR, ARM_GIC_ICDDCR_ARE);
- }
-
- for (Index = 0; Index < mGicNumInterrupts; Index++) {
- GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Index);
-
- // Set Priority
- RegOffset = Index / 4;
- RegShift = (Index % 4) * 8;
- MmioAndThenOr32 (
- mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
- ~(0xff << RegShift),
- ARM_GIC_DEFAULT_PRIORITY << RegShift
- );
- }
-
- //
- // Targets the interrupts to the Primary Cpu
- //
-
- if (FeaturePcdGet (PcdArmGicV3WithV2Legacy)) {
- // Only Primary CPU will run this code. We can identify our GIC CPU ID by reading
- // the GIC Distributor Target register. The 8 first GICD_ITARGETSRn are banked to each
- // connected CPU. These 8 registers hold the CPU targets fields for interrupts 0-31.
- // More Info in the GIC Specification about "Interrupt Processor Targets Registers"
- //
- // Read the first Interrupt Processor Targets Register (that corresponds to the 4
- // first SGIs)
- CpuTarget = MmioRead32 (mGicDistributorBase + ARM_GIC_ICDIPTR);
-
- // The CPU target is a bit field mapping each CPU to a GIC CPU Interface. This value
- // is 0 when we run on a uniprocessor platform.
- if (CpuTarget != 0) {
- // The 8 first Interrupt Processor Targets Registers are read-only
- for (Index = 8; Index < (mGicNumInterrupts / 4); Index++) {
- MmioWrite32 (mGicDistributorBase + ARM_GIC_ICDIPTR + (Index * 4), CpuTarget);
- }
- }
- } else {
- MpId = ArmReadMpidr ();
- CpuTarget = MpId & (ARM_CORE_AFF0 | ARM_CORE_AFF1 | ARM_CORE_AFF2 | ARM_CORE_AFF3);
-
- if ((MmioRead32 (mGicDistributorBase + ARM_GIC_ICDDCR) & ARM_GIC_ICDDCR_DS) != 0) {
- //
- // If the Disable Security (DS) control bit is set, we are dealing with a
- // GIC that has only one security state. In this case, let's assume we are
- // executing in non-secure state (which is appropriate for DXE modules)
- // and that no other firmware has performed any configuration on the GIC.
- // This means we need to reconfigure all interrupts to non-secure Group 1
- // first.
- //
- MmioWrite32 (mGicRedistributorsBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GIC_ICDISR, 0xffffffff);
-
- for (Index = 32; Index < mGicNumInterrupts; Index += 32) {
- MmioWrite32 (mGicDistributorBase + ARM_GIC_ICDISR + Index / 8, 0xffffffff);
- }
- }
-
- // Route the SPIs to the primary CPU. SPIs start at the INTID 32
- for (Index = 0; Index < (mGicNumInterrupts - 32); Index++) {
- MmioWrite32 (mGicDistributorBase + ARM_GICD_IROUTER + (Index * 8), CpuTarget | ARM_GICD_IROUTER_IRM);
- }
- }
-
- // Set binary point reg to 0x7 (no preemption)
- ArmGicV3SetBinaryPointer (0x7);
-
- // Set priority mask reg to 0xff to allow all priorities through
- ArmGicV3SetPriorityMask (0xff);
-
- // Enable gic cpu interface
- ArmGicV3EnableInterruptInterface ();
-
- // Enable gic distributor
- ArmGicEnableDistributor (mGicDistributorBase);
-
- Status = InstallAndRegisterInterruptService (
- &gHardwareInterruptV3Protocol, GicV3IrqInterruptHandler, GicV3ExitBootServicesEvent);
-
- return Status;
-}
diff --git a/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c b/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c deleted file mode 100644 index fecf6a87ad..0000000000 --- a/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c +++ /dev/null @@ -1,559 +0,0 @@ -/** @file
- Produces the CPU I/O 2 Protocol.
-
-Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
-Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
-
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiDxe.h>
-
-#include <Protocol/CpuIo2.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/PcdLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#define MAX_IO_PORT_ADDRESS 0xFFFF
-
-//
-// Handle for the CPU I/O 2 Protocol
-//
-STATIC EFI_HANDLE mHandle = NULL;
-
-//
-// Lookup table for increment values based on transfer widths
-//
-STATIC CONST UINT8 mInStride[] = {
- 1, // EfiCpuIoWidthUint8
- 2, // EfiCpuIoWidthUint16
- 4, // EfiCpuIoWidthUint32
- 8, // EfiCpuIoWidthUint64
- 0, // EfiCpuIoWidthFifoUint8
- 0, // EfiCpuIoWidthFifoUint16
- 0, // EfiCpuIoWidthFifoUint32
- 0, // EfiCpuIoWidthFifoUint64
- 1, // EfiCpuIoWidthFillUint8
- 2, // EfiCpuIoWidthFillUint16
- 4, // EfiCpuIoWidthFillUint32
- 8 // EfiCpuIoWidthFillUint64
-};
-
-//
-// Lookup table for increment values based on transfer widths
-//
-STATIC CONST UINT8 mOutStride[] = {
- 1, // EfiCpuIoWidthUint8
- 2, // EfiCpuIoWidthUint16
- 4, // EfiCpuIoWidthUint32
- 8, // EfiCpuIoWidthUint64
- 1, // EfiCpuIoWidthFifoUint8
- 2, // EfiCpuIoWidthFifoUint16
- 4, // EfiCpuIoWidthFifoUint32
- 8, // EfiCpuIoWidthFifoUint64
- 0, // EfiCpuIoWidthFillUint8
- 0, // EfiCpuIoWidthFillUint16
- 0, // EfiCpuIoWidthFillUint32
- 0 // EfiCpuIoWidthFillUint64
-};
-
-/**
- Check parameters to a CPU I/O 2 Protocol service request.
-
- The I/O operations are carried out exactly as requested. The caller is responsible
- for satisfying any alignment and I/O width restrictions that a PI System on a
- platform might require. For example on some platforms, width requests of
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
- be handled by the driver.
-
- @param[in] MmioOperation TRUE for an MMIO operation, FALSE for I/O Port operation.
- @param[in] Width Signifies the width of the I/O or Memory operation.
- @param[in] Address The base address of the I/O operation.
- @param[in] Count The number of I/O operations to perform. The number of
- bytes moved is Width size * Count, starting at Address.
- @param[in] Buffer For read operations, the destination buffer to store the results.
- For write operations, the source buffer from which to write data.
-
- @retval EFI_SUCCESS The parameters for this request pass the checks.
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-STATIC
-EFI_STATUS
-CpuIoCheckParameter (
- IN BOOLEAN MmioOperation,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- )
-{
- UINT64 MaxCount;
- UINT64 Limit;
-
- //
- // Check to see if Buffer is NULL
- //
- if (Buffer == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // Check to see if Width is in the valid range
- //
- if ((UINT32)Width >= EfiCpuIoWidthMaximum) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // For FIFO type, the target address won't increase during the access,
- // so treat Count as 1
- //
- if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
- Count = 1;
- }
-
- //
- // Check to see if Width is in the valid range for I/O Port operations
- //
- Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
- if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // Check to see if Address is aligned
- //
- if ((Address & (UINT64)(mInStride[Width] - 1)) != 0) {
- return EFI_UNSUPPORTED;
- }
-
- //
- // Check to see if any address associated with this transfer exceeds the maximum
- // allowed address. The maximum address implied by the parameters passed in is
- // Address + Size * Count. If the following condition is met, then the transfer
- // is not supported.
- //
- // Address + Size * Count > (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS) + 1
- //
- // Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count
- // can also be the maximum integer value supported by the CPU, this range
- // check must be adjusted to avoid all oveflow conditions.
- //
- // The following form of the range check is equivalent but assumes that
- // MAX_ADDRESS and MAX_IO_PORT_ADDRESS are of the form (2^n - 1).
- //
- Limit = (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS);
- if (Count == 0) {
- if (Address > Limit) {
- return EFI_UNSUPPORTED;
- }
- } else {
- MaxCount = RShiftU64 (Limit, Width);
- if (MaxCount < (Count - 1)) {
- return EFI_UNSUPPORTED;
- }
- if (Address > LShiftU64 (MaxCount - Count + 1, Width)) {
- return EFI_UNSUPPORTED;
- }
- }
-
- //
- // Check to see if Buffer is aligned
- //
- if (((UINTN)Buffer & ((MIN (sizeof (UINTN), mInStride[Width]) - 1))) != 0) {
- return EFI_UNSUPPORTED;
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- Reads memory-mapped registers.
-
- The I/O operations are carried out exactly as requested. The caller is responsible
- for satisfying any alignment and I/O width restrictions that a PI System on a
- platform might require. For example on some platforms, width requests of
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
- be handled by the driver.
-
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
- each of the Count operations that is performed.
-
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times on the same Address.
-
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times from the first element of Buffer.
-
- @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O or Memory operation.
- @param[in] Address The base address of the I/O operation.
- @param[in] Count The number of I/O operations to perform. The number of
- bytes moved is Width size * Count, starting at Address.
- @param[out] Buffer For read operations, the destination buffer to store the results.
- For write operations, the source buffer from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the PI system.
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-STATIC
-EFI_STATUS
-EFIAPI
-CpuMemoryServiceRead (
- IN EFI_CPU_IO2_PROTOCOL *This,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- OUT VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 InStride;
- UINT8 OutStride;
- EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
- UINT8 *Uint8Buffer;
-
- Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Select loop based on the width of the transfer
- //
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
- for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
- if (OperationWidth == EfiCpuIoWidthUint8) {
- *Uint8Buffer = MmioRead8 ((UINTN)Address);
- } else if (OperationWidth == EfiCpuIoWidthUint16) {
- *((UINT16 *)Uint8Buffer) = MmioRead16 ((UINTN)Address);
- } else if (OperationWidth == EfiCpuIoWidthUint32) {
- *((UINT32 *)Uint8Buffer) = MmioRead32 ((UINTN)Address);
- } else if (OperationWidth == EfiCpuIoWidthUint64) {
- *((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
- }
- }
- return EFI_SUCCESS;
-}
-
-/**
- Writes memory-mapped registers.
-
- The I/O operations are carried out exactly as requested. The caller is responsible
- for satisfying any alignment and I/O width restrictions that a PI System on a
- platform might require. For example on some platforms, width requests of
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
- be handled by the driver.
-
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
- each of the Count operations that is performed.
-
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times on the same Address.
-
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times from the first element of Buffer.
-
- @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O or Memory operation.
- @param[in] Address The base address of the I/O operation.
- @param[in] Count The number of I/O operations to perform. The number of
- bytes moved is Width size * Count, starting at Address.
- @param[in] Buffer For read operations, the destination buffer to store the results.
- For write operations, the source buffer from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the PI system.
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-STATIC
-EFI_STATUS
-EFIAPI
-CpuMemoryServiceWrite (
- IN EFI_CPU_IO2_PROTOCOL *This,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 InStride;
- UINT8 OutStride;
- EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
- UINT8 *Uint8Buffer;
-
- Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Select loop based on the width of the transfer
- //
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
- for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
- if (OperationWidth == EfiCpuIoWidthUint8) {
- MmioWrite8 ((UINTN)Address, *Uint8Buffer);
- } else if (OperationWidth == EfiCpuIoWidthUint16) {
- MmioWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
- } else if (OperationWidth == EfiCpuIoWidthUint32) {
- MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
- } else if (OperationWidth == EfiCpuIoWidthUint64) {
- MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
- }
- }
- return EFI_SUCCESS;
-}
-
-/**
- Reads I/O registers.
-
- The I/O operations are carried out exactly as requested. The caller is responsible
- for satisfying any alignment and I/O width restrictions that a PI System on a
- platform might require. For example on some platforms, width requests of
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
- be handled by the driver.
-
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
- each of the Count operations that is performed.
-
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times on the same Address.
-
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times from the first element of Buffer.
-
- @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O or Memory operation.
- @param[in] Address The base address of the I/O operation.
- @param[in] Count The number of I/O operations to perform. The number of
- bytes moved is Width size * Count, starting at Address.
- @param[out] Buffer For read operations, the destination buffer to store the results.
- For write operations, the source buffer from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the PI system.
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-STATIC
-EFI_STATUS
-EFIAPI
-CpuIoServiceRead (
- IN EFI_CPU_IO2_PROTOCOL *This,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- OUT VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 InStride;
- UINT8 OutStride;
- EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
- UINT8 *Uint8Buffer;
-
- Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Address += PcdGet64 (PcdPciIoTranslation);
-
- //
- // Select loop based on the width of the transfer
- //
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
-
- for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
- if (OperationWidth == EfiCpuIoWidthUint8) {
- *Uint8Buffer = MmioRead8 ((UINTN)Address);
- } else if (OperationWidth == EfiCpuIoWidthUint16) {
- *((UINT16 *)Uint8Buffer) = MmioRead16 ((UINTN)Address);
- } else if (OperationWidth == EfiCpuIoWidthUint32) {
- *((UINT32 *)Uint8Buffer) = MmioRead32 ((UINTN)Address);
- }
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- Write I/O registers.
-
- The I/O operations are carried out exactly as requested. The caller is responsible
- for satisfying any alignment and I/O width restrictions that a PI System on a
- platform might require. For example on some platforms, width requests of
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
- be handled by the driver.
-
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
- each of the Count operations that is performed.
-
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times on the same Address.
-
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times from the first element of Buffer.
-
- @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O or Memory operation.
- @param[in] Address The base address of the I/O operation.
- @param[in] Count The number of I/O operations to perform. The number of
- bytes moved is Width size * Count, starting at Address.
- @param[in] Buffer For read operations, the destination buffer to store the results.
- For write operations, the source buffer from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the PI system.
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-STATIC
-EFI_STATUS
-EFIAPI
-CpuIoServiceWrite (
- IN EFI_CPU_IO2_PROTOCOL *This,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 InStride;
- UINT8 OutStride;
- EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
- UINT8 *Uint8Buffer;
-
- //
- // Make sure the parameters are valid
- //
- Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Address += PcdGet64 (PcdPciIoTranslation);
-
- //
- // Select loop based on the width of the transfer
- //
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
-
- for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
- if (OperationWidth == EfiCpuIoWidthUint8) {
- MmioWrite8 ((UINTN)Address, *Uint8Buffer);
- } else if (OperationWidth == EfiCpuIoWidthUint16) {
- MmioWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
- } else if (OperationWidth == EfiCpuIoWidthUint32) {
- MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
- }
- }
-
- return EFI_SUCCESS;
-}
-
-//
-// CPU I/O 2 Protocol instance
-//
-STATIC EFI_CPU_IO2_PROTOCOL mCpuIo2 = {
- {
- CpuMemoryServiceRead,
- CpuMemoryServiceWrite
- },
- {
- CpuIoServiceRead,
- CpuIoServiceWrite
- }
-};
-
-
-/**
- The user Entry Point for module CpuIo2Dxe. The user code starts with this function.
-
- @param[in] ImageHandle The firmware allocated handle for the EFI image.
- @param[in] SystemTable A pointer to the EFI System Table.
-
- @retval EFI_SUCCESS The entry point is executed successfully.
- @retval other Some error occurs when executing this entry point.
-
-**/
-EFI_STATUS
-EFIAPI
-ArmPciCpuIo2Initialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
-
- ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiCpuIo2ProtocolGuid);
- Status = gBS->InstallMultipleProtocolInterfaces (
- &mHandle,
- &gEfiCpuIo2ProtocolGuid, &mCpuIo2,
- NULL
- );
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
diff --git a/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf b/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf deleted file mode 100644 index f7eab9d0e9..0000000000 --- a/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf +++ /dev/null @@ -1,53 +0,0 @@ -## @file
-# Produces the CPU I/O 2 Protocol by using the services of the I/O Library.
-#
-# Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR>
-# Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmPciCpuIo2Dxe
- FILE_GUID = 168D1A6E-F4A5-448A-9E95-795661BB3067
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
- ENTRY_POINT = ArmPciCpuIo2Initialize
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = ARM AARCH64
-#
-
-[Sources]
- ArmPciCpuIo2Dxe.c
-
-[Packages]
- ArmPkg/ArmPkg.dec
- MdePkg/MdePkg.dec
-
-[LibraryClasses]
- UefiDriverEntryPoint
- BaseLib
- DebugLib
- IoLib
- PcdLib
- UefiBootServicesTableLib
-
-[Pcd]
- gArmTokenSpaceGuid.PcdPciIoTranslation
-
-[Protocols]
- gEfiCpuIo2ProtocolGuid ## PRODUCES
-
-[Depex]
- TRUE
diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c deleted file mode 100644 index 3e216c7cb2..0000000000 --- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c +++ /dev/null @@ -1,347 +0,0 @@ -/*++
-
-Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
-Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
-Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-
---*/
-
-#include <Library/MemoryAllocationLib.h>
-#include "CpuDxe.h"
-
-#define TT_ATTR_INDX_INVALID ((UINT32)~0)
-
-STATIC
-UINT64
-GetFirstPageAttribute (
- IN UINT64 *FirstLevelTableAddress,
- IN UINTN TableLevel
- )
-{
- UINT64 FirstEntry;
-
- // Get the first entry of the table
- FirstEntry = *FirstLevelTableAddress;
-
- if ((TableLevel != 3) && (FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {
- // Only valid for Levels 0, 1 and 2
-
- // Get the attribute of the subsequent table
- return GetFirstPageAttribute ((UINT64*)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1);
- } else if (((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) ||
- ((TableLevel == 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3)))
- {
- return FirstEntry & TT_ATTR_INDX_MASK;
- } else {
- return TT_ATTR_INDX_INVALID;
- }
-}
-
-STATIC
-UINT64
-GetNextEntryAttribute (
- IN UINT64 *TableAddress,
- IN UINTN EntryCount,
- IN UINTN TableLevel,
- IN UINT64 BaseAddress,
- IN OUT UINT32 *PrevEntryAttribute,
- IN OUT UINT64 *StartGcdRegion
- )
-{
- UINTN Index;
- UINT64 Entry;
- UINT32 EntryAttribute;
- UINT32 EntryType;
- EFI_STATUS Status;
- UINTN NumberOfDescriptors;
- EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
-
- // Get the memory space map from GCD
- MemorySpaceMap = NULL;
- Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
- ASSERT_EFI_ERROR (Status);
-
- // We cannot get more than 3-level page table
- ASSERT (TableLevel <= 3);
-
- // While the top level table might not contain TT_ENTRY_COUNT entries;
- // the subsequent ones should be filled up
- for (Index = 0; Index < EntryCount; Index++) {
- Entry = TableAddress[Index];
- EntryType = Entry & TT_TYPE_MASK;
- EntryAttribute = Entry & TT_ATTR_INDX_MASK;
-
- // If Entry is a Table Descriptor type entry then go through the sub-level table
- if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||
- ((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) {
- if ((*PrevEntryAttribute == TT_ATTR_INDX_INVALID) || (EntryAttribute != *PrevEntryAttribute)) {
- if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {
- // Update GCD with the last region
- SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
- *StartGcdRegion,
- (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,
- PageAttributeToGcdAttribute (*PrevEntryAttribute));
- }
-
- // Start of the new region
- *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));
- *PrevEntryAttribute = EntryAttribute;
- } else {
- continue;
- }
- } else if (EntryType == TT_TYPE_TABLE_ENTRY) {
- // Table Entry type is only valid for Level 0, 1, 2
- ASSERT (TableLevel < 3);
-
- // Increase the level number and scan the sub-level table
- GetNextEntryAttribute ((UINT64*)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),
- TT_ENTRY_COUNT, TableLevel + 1,
- (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))),
- PrevEntryAttribute, StartGcdRegion);
- } else {
- if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {
- // Update GCD with the last region
- SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
- *StartGcdRegion,
- (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,
- PageAttributeToGcdAttribute (*PrevEntryAttribute));
-
- // Start of the new region
- *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));
- *PrevEntryAttribute = TT_ATTR_INDX_INVALID;
- }
- }
- }
-
- FreePool (MemorySpaceMap);
-
- return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL(TableLevel));
-}
-
-EFI_STATUS
-SyncCacheConfig (
- IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
- )
-{
- EFI_STATUS Status;
- UINT32 PageAttribute = 0;
- UINT64 *FirstLevelTableAddress;
- UINTN TableLevel;
- UINTN TableCount;
- UINTN NumberOfDescriptors;
- EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
- UINTN Tcr;
- UINTN T0SZ;
- UINT64 BaseAddressGcdRegion;
- UINT64 EndAddressGcdRegion;
-
- // This code assumes MMU is enabled and filed with section translations
- ASSERT (ArmMmuEnabled ());
-
- //
- // Get the memory space map from GCD
- //
- MemorySpaceMap = NULL;
- Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
- ASSERT_EFI_ERROR (Status);
-
- // The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs
- // to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a
- // GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were
- // a client) to update its copy of the attributes. This is bad architecture and should be replaced
- // with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead.
-
- // Obtain page table base
- FirstLevelTableAddress = (UINT64*)(ArmGetTTBR0BaseAddress ());
-
- // Get Translation Control Register value
- Tcr = ArmGetTCR ();
- // Get Address Region Size
- T0SZ = Tcr & TCR_T0SZ_MASK;
-
- // Get the level of the first table for the indicated Address Region Size
- GetRootTranslationTableInfo (T0SZ, &TableLevel, &TableCount);
-
- // First Attribute of the Page Tables
- PageAttribute = GetFirstPageAttribute (FirstLevelTableAddress, TableLevel);
-
- // We scan from the start of the memory map (ie: at the address 0x0)
- BaseAddressGcdRegion = 0x0;
- EndAddressGcdRegion = GetNextEntryAttribute (FirstLevelTableAddress,
- TableCount, TableLevel,
- BaseAddressGcdRegion,
- &PageAttribute, &BaseAddressGcdRegion);
-
- // Update GCD with the last region if valid
- if (PageAttribute != TT_ATTR_INDX_INVALID) {
- SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
- BaseAddressGcdRegion,
- EndAddressGcdRegion - BaseAddressGcdRegion,
- PageAttributeToGcdAttribute (PageAttribute));
- }
-
- FreePool (MemorySpaceMap);
-
- return EFI_SUCCESS;
-}
-
-UINT64
-EfiAttributeToArmAttribute (
- IN UINT64 EfiAttributes
- )
-{
- UINT64 ArmAttributes;
-
- switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {
- case EFI_MEMORY_UC:
- if (ArmReadCurrentEL () == AARCH64_EL2) {
- ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;
- } else {
- ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
- }
- break;
- case EFI_MEMORY_WC:
- ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
- break;
- case EFI_MEMORY_WT:
- ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;
- break;
- case EFI_MEMORY_WB:
- ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;
- break;
- default:
- ArmAttributes = TT_ATTR_INDX_MASK;
- }
-
- // Set the access flag to match the block attributes
- ArmAttributes |= TT_AF;
-
- // Determine protection attributes
- if (EfiAttributes & EFI_MEMORY_RO) {
- ArmAttributes |= TT_AP_RO_RO;
- }
-
- // Process eXecute Never attribute
- if (EfiAttributes & EFI_MEMORY_XP) {
- ArmAttributes |= TT_PXN_MASK;
- }
-
- return ArmAttributes;
-}
-
-// This function will recursively go down the page table to find the first block address linked to 'BaseAddress'.
-// And then the function will identify the size of the region that has the same page table attribute.
-EFI_STATUS
-GetMemoryRegionRec (
- IN UINT64 *TranslationTable,
- IN UINTN TableLevel,
- IN UINT64 *LastBlockEntry,
- IN OUT UINTN *BaseAddress,
- OUT UINTN *RegionLength,
- OUT UINTN *RegionAttributes
- )
-{
- EFI_STATUS Status;
- UINT64 *NextTranslationTable;
- UINT64 *BlockEntry;
- UINT64 BlockEntryType;
- UINT64 EntryType;
-
- if (TableLevel != 3) {
- BlockEntryType = TT_TYPE_BLOCK_ENTRY;
- } else {
- BlockEntryType = TT_TYPE_BLOCK_ENTRY_LEVEL3;
- }
-
- // Find the block entry linked to the Base Address
- BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress);
- EntryType = *BlockEntry & TT_TYPE_MASK;
-
- if ((TableLevel < 3) && (EntryType == TT_TYPE_TABLE_ENTRY)) {
- NextTranslationTable = (UINT64*)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);
-
- // The entry is a page table, so we go to the next level
- Status = GetMemoryRegionRec (
- NextTranslationTable, // Address of the next level page table
- TableLevel + 1, // Next Page Table level
- (UINTN*)TT_LAST_BLOCK_ADDRESS(NextTranslationTable, TT_ENTRY_COUNT),
- BaseAddress, RegionLength, RegionAttributes);
-
- // In case of 'Success', it means the end of the block region has been found into the upper
- // level translation table
- if (!EFI_ERROR(Status)) {
- return EFI_SUCCESS;
- }
-
- // Now we processed the table move to the next entry
- BlockEntry++;
- } else if (EntryType == BlockEntryType) {
- // We have found the BlockEntry attached to the address. We save its start address (the start
- // address might be before the 'BaseAdress') and attributes
- *BaseAddress = *BaseAddress & ~(TT_ADDRESS_AT_LEVEL(TableLevel) - 1);
- *RegionLength = 0;
- *RegionAttributes = *BlockEntry & TT_ATTRIBUTES_MASK;
- } else {
- // We have an 'Invalid' entry
- return EFI_UNSUPPORTED;
- }
-
- while (BlockEntry <= LastBlockEntry) {
- if ((*BlockEntry & TT_ATTRIBUTES_MASK) == *RegionAttributes) {
- *RegionLength = *RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL(TableLevel);
- } else {
- // In case we have found the end of the region we return success
- return EFI_SUCCESS;
- }
- BlockEntry++;
- }
-
- // If we have reached the end of the TranslationTable and we have not found the end of the region then
- // we return EFI_NOT_FOUND.
- // The caller will continue to look for the memory region at its level
- return EFI_NOT_FOUND;
-}
-
-EFI_STATUS
-GetMemoryRegion (
- IN OUT UINTN *BaseAddress,
- OUT UINTN *RegionLength,
- OUT UINTN *RegionAttributes
- )
-{
- EFI_STATUS Status;
- UINT64 *TranslationTable;
- UINTN TableLevel;
- UINTN EntryCount;
- UINTN T0SZ;
-
- ASSERT ((BaseAddress != NULL) && (RegionLength != NULL) && (RegionAttributes != NULL));
-
- TranslationTable = ArmGetTTBR0BaseAddress ();
-
- T0SZ = ArmGetTCR () & TCR_T0SZ_MASK;
- // Get the Table info from T0SZ
- GetRootTranslationTableInfo (T0SZ, &TableLevel, &EntryCount);
-
- Status = GetMemoryRegionRec (TranslationTable, TableLevel,
- (UINTN*)TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount),
- BaseAddress, RegionLength, RegionAttributes);
-
- // If the region continues up to the end of the root table then GetMemoryRegionRec()
- // will return EFI_NOT_FOUND
- if (Status == EFI_NOT_FOUND) {
- return EFI_SUCCESS;
- } else {
- return Status;
- }
-}
diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c deleted file mode 100644 index 12ca5b2667..0000000000 --- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c +++ /dev/null @@ -1,514 +0,0 @@ -/*++
-
-Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
-Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
-Portions copyright (c) 2013, ARM Ltd. All rights reserved.<BR>
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-
---*/
-
-#include <Library/MemoryAllocationLib.h>
-#include "CpuDxe.h"
-
-EFI_STATUS
-SectionToGcdAttributes (
- IN UINT32 SectionAttributes,
- OUT UINT64 *GcdAttributes
- )
-{
- *GcdAttributes = 0;
-
- // determine cacheability attributes
- switch(SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) {
- case TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED:
- *GcdAttributes |= EFI_MEMORY_UC;
- break;
- case TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE:
- *GcdAttributes |= EFI_MEMORY_UC;
- break;
- case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC:
- *GcdAttributes |= EFI_MEMORY_WT;
- break;
- case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC:
- *GcdAttributes |= EFI_MEMORY_WB;
- break;
- case TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE:
- *GcdAttributes |= EFI_MEMORY_WC;
- break;
- case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC:
- *GcdAttributes |= EFI_MEMORY_WB;
- break;
- case TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE:
- *GcdAttributes |= EFI_MEMORY_UC;
- break;
- default:
- return EFI_UNSUPPORTED;
- }
-
- // determine protection attributes
- switch(SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {
- case TT_DESCRIPTOR_SECTION_AP_NO_NO: // no read, no write
- //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
- break;
-
- case TT_DESCRIPTOR_SECTION_AP_RW_NO:
- case TT_DESCRIPTOR_SECTION_AP_RW_RW:
- // normal read/write access, do not add additional attributes
- break;
-
- // read only cases map to write-protect
- case TT_DESCRIPTOR_SECTION_AP_RO_NO:
- case TT_DESCRIPTOR_SECTION_AP_RO_RO:
- *GcdAttributes |= EFI_MEMORY_RO;
- break;
-
- default:
- return EFI_UNSUPPORTED;
- }
-
- // now process eXectue Never attribute
- if ((SectionAttributes & TT_DESCRIPTOR_SECTION_XN_MASK) != 0 ) {
- *GcdAttributes |= EFI_MEMORY_XP;
- }
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-PageToGcdAttributes (
- IN UINT32 PageAttributes,
- OUT UINT64 *GcdAttributes
- )
-{
- *GcdAttributes = 0;
-
- // determine cacheability attributes
- switch(PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {
- case TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED:
- *GcdAttributes |= EFI_MEMORY_UC;
- break;
- case TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE:
- *GcdAttributes |= EFI_MEMORY_UC;
- break;
- case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC:
- *GcdAttributes |= EFI_MEMORY_WT;
- break;
- case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC:
- *GcdAttributes |= EFI_MEMORY_WB;
- break;
- case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE:
- *GcdAttributes |= EFI_MEMORY_WC;
- break;
- case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC:
- *GcdAttributes |= EFI_MEMORY_WB;
- break;
- case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE:
- *GcdAttributes |= EFI_MEMORY_UC;
- break;
- default:
- return EFI_UNSUPPORTED;
- }
-
- // determine protection attributes
- switch(PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {
- case TT_DESCRIPTOR_PAGE_AP_NO_NO: // no read, no write
- //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
- break;
-
- case TT_DESCRIPTOR_PAGE_AP_RW_NO:
- case TT_DESCRIPTOR_PAGE_AP_RW_RW:
- // normal read/write access, do not add additional attributes
- break;
-
- // read only cases map to write-protect
- case TT_DESCRIPTOR_PAGE_AP_RO_NO:
- case TT_DESCRIPTOR_PAGE_AP_RO_RO:
- *GcdAttributes |= EFI_MEMORY_RO;
- break;
-
- default:
- return EFI_UNSUPPORTED;
- }
-
- // now process eXectue Never attribute
- if ((PageAttributes & TT_DESCRIPTOR_PAGE_XN_MASK) != 0 ) {
- *GcdAttributes |= EFI_MEMORY_XP;
- }
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-SyncCacheConfigPage (
- IN UINT32 SectionIndex,
- IN UINT32 FirstLevelDescriptor,
- IN UINTN NumberOfDescriptors,
- IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
- IN OUT EFI_PHYSICAL_ADDRESS *NextRegionBase,
- IN OUT UINT64 *NextRegionLength,
- IN OUT UINT32 *NextSectionAttributes
- )
-{
- EFI_STATUS Status;
- UINT32 i;
- volatile ARM_PAGE_TABLE_ENTRY *SecondLevelTable;
- UINT32 NextPageAttributes = 0;
- UINT32 PageAttributes = 0;
- UINT32 BaseAddress;
- UINT64 GcdAttributes;
-
- // Get the Base Address from FirstLevelDescriptor;
- BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
-
- // Convert SectionAttributes into PageAttributes
- NextPageAttributes =
- TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(*NextSectionAttributes,0) |
- TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(*NextSectionAttributes);
-
- // obtain page table base
- SecondLevelTable = (ARM_PAGE_TABLE_ENTRY *)(FirstLevelDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
-
- for (i=0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {
- if ((SecondLevelTable[i] & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {
- // extract attributes (cacheability and permissions)
- PageAttributes = SecondLevelTable[i] & (TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK | TT_DESCRIPTOR_PAGE_AP_MASK);
-
- if (NextPageAttributes == 0) {
- // start on a new region
- *NextRegionLength = 0;
- *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
- NextPageAttributes = PageAttributes;
- } else if (PageAttributes != NextPageAttributes) {
- // Convert Section Attributes into GCD Attributes
- Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);
- ASSERT_EFI_ERROR (Status);
-
- // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
- SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);
-
- // start on a new region
- *NextRegionLength = 0;
- *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
- NextPageAttributes = PageAttributes;
- }
- } else if (NextPageAttributes != 0) {
- // Convert Page Attributes into GCD Attributes
- Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);
- ASSERT_EFI_ERROR (Status);
-
- // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
- SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);
-
- *NextRegionLength = 0;
- *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
- NextPageAttributes = 0;
- }
- *NextRegionLength += TT_DESCRIPTOR_PAGE_SIZE;
- }
-
- // Convert back PageAttributes into SectionAttributes
- *NextSectionAttributes =
- TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(NextPageAttributes,0) |
- TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(NextPageAttributes);
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-SyncCacheConfig (
- IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
- )
-{
- EFI_STATUS Status;
- UINT32 i;
- EFI_PHYSICAL_ADDRESS NextRegionBase;
- UINT64 NextRegionLength;
- UINT32 NextSectionAttributes = 0;
- UINT32 SectionAttributes = 0;
- UINT64 GcdAttributes;
- volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
- UINTN NumberOfDescriptors;
- EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
-
-
- DEBUG ((EFI_D_PAGE, "SyncCacheConfig()\n"));
-
- // This code assumes MMU is enabled and filed with section translations
- ASSERT (ArmMmuEnabled ());
-
- //
- // Get the memory space map from GCD
- //
- MemorySpaceMap = NULL;
- Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
- ASSERT_EFI_ERROR (Status);
-
-
- // The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs
- // to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a
- // GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were
- // a client) to update its copy of the attributes. This is bad architecture and should be replaced
- // with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead.
-
- // obtain page table base
- FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)(ArmGetTTBR0BaseAddress ());
-
- // Get the first region
- NextSectionAttributes = FirstLevelTable[0] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);
-
- // iterate through each 1MB descriptor
- NextRegionBase = NextRegionLength = 0;
- for (i=0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {
- if ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) {
- // extract attributes (cacheability and permissions)
- SectionAttributes = FirstLevelTable[i] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);
-
- if (NextSectionAttributes == 0) {
- // start on a new region
- NextRegionLength = 0;
- NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
- NextSectionAttributes = SectionAttributes;
- } else if (SectionAttributes != NextSectionAttributes) {
- // Convert Section Attributes into GCD Attributes
- Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
- ASSERT_EFI_ERROR (Status);
-
- // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
- SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
-
- // start on a new region
- NextRegionLength = 0;
- NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
- NextSectionAttributes = SectionAttributes;
- }
- NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
- } else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i])) {
- // In this case any bits set in the 'NextSectionAttributes' are garbage and were set from
- // bits that are actually part of the pagetable address. We clear it out to zero so that
- // the SyncCacheConfigPage will use the page attributes instead of trying to convert the
- // section attributes into page attributes
- NextSectionAttributes = 0;
- Status = SyncCacheConfigPage (
- i,FirstLevelTable[i],
- NumberOfDescriptors, MemorySpaceMap,
- &NextRegionBase,&NextRegionLength,&NextSectionAttributes);
- ASSERT_EFI_ERROR (Status);
- } else {
- // We do not support yet 16MB sections
- ASSERT ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) != TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION);
-
- // start on a new region
- if (NextSectionAttributes != 0) {
- // Convert Section Attributes into GCD Attributes
- Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
- ASSERT_EFI_ERROR (Status);
-
- // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
- SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
-
- NextRegionLength = 0;
- NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
- NextSectionAttributes = 0;
- }
- NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
- }
- } // section entry loop
-
- if (NextSectionAttributes != 0) {
- // Convert Section Attributes into GCD Attributes
- Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
- ASSERT_EFI_ERROR (Status);
-
- // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
- SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
- }
-
- FreePool (MemorySpaceMap);
-
- return EFI_SUCCESS;
-}
-
-UINT64
-EfiAttributeToArmAttribute (
- IN UINT64 EfiAttributes
- )
-{
- UINT64 ArmAttributes;
-
- switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {
- case EFI_MEMORY_UC:
- // Map to strongly ordered
- ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0
- break;
-
- case EFI_MEMORY_WC:
- // Map to normal non-cachable
- ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
- break;
-
- case EFI_MEMORY_WT:
- // Write through with no-allocate
- ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC; // TEX [2:0] = 0, C=1, B=0
- break;
-
- case EFI_MEMORY_WB:
- // Write back (with allocate)
- ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC; // TEX [2:0] = 001, C=1, B=1
- break;
-
- case EFI_MEMORY_UCE:
- default:
- ArmAttributes = TT_DESCRIPTOR_SECTION_TYPE_FAULT;
- break;
- }
-
- // Determine protection attributes
- if (EfiAttributes & EFI_MEMORY_RO) {
- ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RO_RO;
- } else {
- ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RW_RW;
- }
-
- // Determine eXecute Never attribute
- if (EfiAttributes & EFI_MEMORY_XP) {
- ArmAttributes |= TT_DESCRIPTOR_SECTION_XN_MASK;
- }
-
- return ArmAttributes;
-}
-
-EFI_STATUS
-GetMemoryRegionPage (
- IN UINT32 *PageTable,
- IN OUT UINTN *BaseAddress,
- OUT UINTN *RegionLength,
- OUT UINTN *RegionAttributes
- )
-{
- UINT32 PageAttributes;
- UINT32 TableIndex;
- UINT32 PageDescriptor;
-
- // Convert the section attributes into page attributes
- PageAttributes = ConvertSectionAttributesToPageAttributes (*RegionAttributes, 0);
-
- // Calculate index into first level translation table for start of modification
- TableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
- ASSERT (TableIndex < TRANSLATION_TABLE_PAGE_COUNT);
-
- // Go through the page table to find the end of the section
- for (; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {
- // Get the section at the given index
- PageDescriptor = PageTable[TableIndex];
-
- if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_FAULT) {
- // Case: End of the boundary of the region
- return EFI_SUCCESS;
- } else if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_PAGE) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {
- if ((PageDescriptor & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK) == PageAttributes) {
- *RegionLength = *RegionLength + TT_DESCRIPTOR_PAGE_SIZE;
- } else {
- // Case: End of the boundary of the region
- return EFI_SUCCESS;
- }
- } else {
- // We do not support Large Page yet. We return EFI_SUCCESS that means end of the region.
- ASSERT(0);
- return EFI_SUCCESS;
- }
- }
-
- return EFI_NOT_FOUND;
-}
-
-EFI_STATUS
-GetMemoryRegion (
- IN OUT UINTN *BaseAddress,
- OUT UINTN *RegionLength,
- OUT UINTN *RegionAttributes
- )
-{
- EFI_STATUS Status;
- UINT32 TableIndex;
- UINT32 PageAttributes;
- UINT32 PageTableIndex;
- UINT32 SectionDescriptor;
- ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
- UINT32 *PageTable;
-
- // Initialize the arguments
- *RegionLength = 0;
-
- // Obtain page table base
- FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
-
- // Calculate index into first level translation table for start of modification
- TableIndex = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (*BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
- ASSERT (TableIndex < TRANSLATION_TABLE_SECTION_COUNT);
-
- // Get the section at the given index
- SectionDescriptor = FirstLevelTable[TableIndex];
-
- // If 'BaseAddress' belongs to the section then round it to the section boundary
- if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
- ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))
- {
- *BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;
- *RegionAttributes = SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK;
- } else {
- // Otherwise, we round it to the page boundary
- *BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK;
-
- // Get the attribute at the page table level (Level 2)
- PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
-
- // Calculate index into first level translation table for start of modification
- PageTableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
- ASSERT (PageTableIndex < TRANSLATION_TABLE_PAGE_COUNT);
-
- PageAttributes = PageTable[PageTableIndex] & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK;
- *RegionAttributes = TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (PageAttributes, 0) |
- TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (PageAttributes);
- }
-
- for (;TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {
- // Get the section at the given index
- SectionDescriptor = FirstLevelTable[TableIndex];
-
- // If the entry is a level-2 page table then we scan it to find the end of the region
- if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (SectionDescriptor)) {
- // Extract the page table location from the descriptor
- PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
-
- // Scan the page table to find the end of the region.
- Status = GetMemoryRegionPage (PageTable, BaseAddress, RegionLength, RegionAttributes);
-
- // If we have found the end of the region (Status == EFI_SUCCESS) then we exit the for-loop
- if (Status == EFI_SUCCESS) {
- break;
- }
- } else if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
- ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION)) {
- if ((SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK) != *RegionAttributes) {
- // If the attributes of the section differ from the one targeted then we exit the loop
- break;
- } else {
- *RegionLength = *RegionLength + TT_DESCRIPTOR_SECTION_SIZE;
- }
- } else {
- // If we are on an invalid section then it means it is the end of our section.
- break;
- }
- }
-
- return EFI_SUCCESS;
-}
diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.c b/ArmPkg/Drivers/CpuDxe/CpuDxe.c deleted file mode 100644 index 5e923d45b7..0000000000 --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.c +++ /dev/null @@ -1,289 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011, ARM Limited. All rights reserved.
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuDxe.h"
-
-#include <Guid/IdleLoopEvent.h>
-
-BOOLEAN mIsFlushingGCD;
-
-/**
- This function flushes the range of addresses from Start to Start+Length
- from the processor's data cache. If Start is not aligned to a cache line
- boundary, then the bytes before Start to the preceding cache line boundary
- are also flushed. If Start+Length is not aligned to a cache line boundary,
- then the bytes past Start+Length to the end of the next cache line boundary
- are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
- supported. If the data cache is fully coherent with all DMA operations, then
- this function can just return EFI_SUCCESS. If the processor does not support
- flushing a range of the data cache, then the entire data cache can be flushed.
-
- @param This The EFI_CPU_ARCH_PROTOCOL instance.
- @param Start The beginning physical address to flush from the processor's data
- cache.
- @param Length The number of bytes to flush from the processor's data cache. This
- function may flush more bytes than Length specifies depending upon
- the granularity of the flush operation that the processor supports.
- @param FlushType Specifies the type of flush operation to perform.
-
- @retval EFI_SUCCESS The address range from Start to Start+Length was flushed from
- the processor's data cache.
- @retval EFI_UNSUPPORTED The processor does not support the cache flush type specified
- by FlushType.
- @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed
- from the processor's data cache.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuFlushCpuDataCache (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN EFI_PHYSICAL_ADDRESS Start,
- IN UINT64 Length,
- IN EFI_CPU_FLUSH_TYPE FlushType
- )
-{
-
- switch (FlushType) {
- case EfiCpuFlushTypeWriteBack:
- WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
- break;
- case EfiCpuFlushTypeInvalidate:
- InvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
- break;
- case EfiCpuFlushTypeWriteBackInvalidate:
- WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
- break;
- default:
- return EFI_INVALID_PARAMETER;
- }
-
- return EFI_SUCCESS;
-}
-
-
-/**
- This function enables interrupt processing by the processor.
-
- @param This The EFI_CPU_ARCH_PROTOCOL instance.
-
- @retval EFI_SUCCESS Interrupts are enabled on the processor.
- @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuEnableInterrupt (
- IN EFI_CPU_ARCH_PROTOCOL *This
- )
-{
- ArmEnableInterrupts ();
-
- return EFI_SUCCESS;
-}
-
-
-/**
- This function disables interrupt processing by the processor.
-
- @param This The EFI_CPU_ARCH_PROTOCOL instance.
-
- @retval EFI_SUCCESS Interrupts are disabled on the processor.
- @retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuDisableInterrupt (
- IN EFI_CPU_ARCH_PROTOCOL *This
- )
-{
- ArmDisableInterrupts ();
-
- return EFI_SUCCESS;
-}
-
-
-/**
- This function retrieves the processor's current interrupt state a returns it in
- State. If interrupts are currently enabled, then TRUE is returned. If interrupts
- are currently disabled, then FALSE is returned.
-
- @param This The EFI_CPU_ARCH_PROTOCOL instance.
- @param State A pointer to the processor's current interrupt state. Set to TRUE if
- interrupts are enabled and FALSE if interrupts are disabled.
-
- @retval EFI_SUCCESS The processor's current interrupt state was returned in State.
- @retval EFI_INVALID_PARAMETER State is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuGetInterruptState (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- OUT BOOLEAN *State
- )
-{
- if (State == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- *State = ArmGetInterruptState();
- return EFI_SUCCESS;
-}
-
-
-/**
- This function generates an INIT on the processor. If this function succeeds, then the
- processor will be reset, and control will not be returned to the caller. If InitType is
- not supported by this processor, or the processor cannot programmatically generate an
- INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error
- occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.
-
- @param This The EFI_CPU_ARCH_PROTOCOL instance.
- @param InitType The type of processor INIT to perform.
-
- @retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen.
- @retval EFI_UNSUPPORTED The processor INIT operation specified by InitType is not supported
- by this processor.
- @retval EFI_DEVICE_ERROR The processor INIT failed.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuInit (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN EFI_CPU_INIT_TYPE InitType
- )
-{
- return EFI_UNSUPPORTED;
-}
-
-EFI_STATUS
-EFIAPI
-CpuRegisterInterruptHandler (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN EFI_EXCEPTION_TYPE InterruptType,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
- )
-{
- return RegisterInterruptHandler (InterruptType, InterruptHandler);
-}
-
-EFI_STATUS
-EFIAPI
-CpuGetTimerValue (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN UINT32 TimerIndex,
- OUT UINT64 *TimerValue,
- OUT UINT64 *TimerPeriod OPTIONAL
- )
-{
- return EFI_UNSUPPORTED;
-}
-
-/**
- Callback function for idle events.
-
- @param Event Event whose notification function is being invoked.
- @param Context The pointer to the notification function's context,
- which is implementation-dependent.
-
-**/
-VOID
-EFIAPI
-IdleLoopEventCallback (
- IN EFI_EVENT Event,
- IN VOID *Context
- )
-{
- CpuSleep ();
-}
-
-//
-// Globals used to initialize the protocol
-//
-EFI_HANDLE mCpuHandle = NULL;
-EFI_CPU_ARCH_PROTOCOL mCpu = {
- CpuFlushCpuDataCache,
- CpuEnableInterrupt,
- CpuDisableInterrupt,
- CpuGetInterruptState,
- CpuInit,
- CpuRegisterInterruptHandler,
- CpuGetTimerValue,
- CpuSetMemoryAttributes,
- 0, // NumberOfTimers
- 2048, // DmaBufferAlignment
-};
-
-STATIC
-VOID
-InitializeDma (
- IN OUT EFI_CPU_ARCH_PROTOCOL *CpuArchProtocol
- )
-{
- CpuArchProtocol->DmaBufferAlignment = ArmCacheWritebackGranule ();
-}
-
-EFI_STATUS
-CpuDxeInitialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
- EFI_EVENT IdleLoopEvent;
-
- InitializeExceptions (&mCpu);
-
- InitializeDma (&mCpu);
-
- Status = gBS->InstallMultipleProtocolInterfaces (
- &mCpuHandle,
- &gEfiCpuArchProtocolGuid, &mCpu,
- NULL
- );
-
- //
- // Make sure GCD and MMU settings match. This API calls gDS->SetMemorySpaceAttributes ()
- // and that calls EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes, so this code needs to go
- // after the protocol is installed
- //
- mIsFlushingGCD = TRUE;
- SyncCacheConfig (&mCpu);
- mIsFlushingGCD = FALSE;
-
- // If the platform is a MPCore system then install the Configuration Table describing the
- // secondary core states
- if (ArmIsMpCore()) {
- PublishArmProcessorTable();
- }
-
- //
- // Setup a callback for idle events
- //
- Status = gBS->CreateEventEx (
- EVT_NOTIFY_SIGNAL,
- TPL_NOTIFY,
- IdleLoopEventCallback,
- NULL,
- &gIdleLoopEventGuid,
- &IdleLoopEvent
- );
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.h b/ArmPkg/Drivers/CpuDxe/CpuDxe.h deleted file mode 100644 index a0f71e69ec..0000000000 --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.h +++ /dev/null @@ -1,160 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __CPU_DXE_ARM_EXCEPTION_H__
-#define __CPU_DXE_ARM_EXCEPTION_H__
-
-#include <Uefi.h>
-
-#include <Library/ArmLib.h>
-#include <Library/ArmMmuLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/DxeServicesTableLib.h>
-#include <Library/CacheMaintenanceLib.h>
-#include <Library/PeCoffGetEntryPointLib.h>
-#include <Library/UefiLib.h>
-#include <Library/CpuLib.h>
-#include <Library/DefaultExceptionHandlerLib.h>
-#include <Library/DebugLib.h>
-
-#include <Guid/DebugImageInfoTable.h>
-#include <Protocol/Cpu.h>
-#include <Protocol/DebugSupport.h>
-#include <Protocol/DebugSupportPeriodicCallback.h>
-#include <Protocol/LoadedImage.h>
-
-extern BOOLEAN mIsFlushingGCD;
-
-/**
- This function registers and enables the handler specified by InterruptHandler for a processor
- interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
- handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
- The installed handler is called once for each processor interrupt or exception.
-
- @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts
- are enabled and FALSE if interrupts are disabled.
- @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
- when a processor interrupt occurs. If this parameter is NULL, then the handler
- will be uninstalled.
-
- @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
- @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
- previously installed.
- @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
- previously installed.
- @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
-
-**/
-EFI_STATUS
-RegisterInterruptHandler (
- IN EFI_EXCEPTION_TYPE InterruptType,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
- );
-
-
-/**
- This function registers and enables the handler specified by InterruptHandler for a processor
- interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
- handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
- The installed handler is called once for each processor interrupt or exception.
-
- @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts
- are enabled and FALSE if interrupts are disabled.
- @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
- when a processor interrupt occurs. If this parameter is NULL, then the handler
- will be uninstalled.
-
- @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
- @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
- previously installed.
- @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
- previously installed.
- @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
-
-**/
-EFI_STATUS
-RegisterDebuggerInterruptHandler (
- IN EFI_EXCEPTION_TYPE InterruptType,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
- );
-
-
-EFI_STATUS
-EFIAPI
-CpuSetMemoryAttributes (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN UINT64 Attributes
- );
-
-EFI_STATUS
-InitializeExceptions (
- IN EFI_CPU_ARCH_PROTOCOL *Cpu
- );
-
-EFI_STATUS
-SyncCacheConfig (
- IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
- );
-
-/**
- * Publish ARM Processor Data table in UEFI SYSTEM Table.
- * @param HobStart Pointer to the beginning of the HOB List from PEI.
- *
- * Description : This function iterates through HOB list and finds ARM processor Table Entry HOB.
- * If the ARM processor Table Entry HOB is found, the HOB data is copied to run-time memory
- * and a pointer is assigned to it in ARM processor table. Then the ARM processor table is
- * installed in EFI configuration table.
-**/
-VOID
-EFIAPI
-PublishArmProcessorTable(
- VOID
- );
-
-// The ARM Attributes might be defined on 64-bit (case of the long format description table)
-UINT64
-EfiAttributeToArmAttribute (
- IN UINT64 EfiAttributes
- );
-
-EFI_STATUS
-GetMemoryRegion (
- IN OUT UINTN *BaseAddress,
- OUT UINTN *RegionLength,
- OUT UINTN *RegionAttributes
- );
-
-VOID
-GetRootTranslationTableInfo (
- IN UINTN T0SZ,
- OUT UINTN *TableLevel,
- OUT UINTN *TableEntryCount
- );
-
-EFI_STATUS
-SetGcdMemorySpaceAttributes (
- IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
- IN UINTN NumberOfDescriptors,
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN UINT64 Attributes
- );
-
-#endif // __CPU_DXE_ARM_EXCEPTION_H__
diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.inf b/ArmPkg/Drivers/CpuDxe/CpuDxe.inf deleted file mode 100644 index d068e06803..0000000000 --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.inf +++ /dev/null @@ -1,79 +0,0 @@ -#/** @file
-#
-# DXE CPU driver
-#
-# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmCpuDxe
- FILE_GUID = B8D9777E-D72A-451F-9BDB-BAFB52A68415
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
-
- ENTRY_POINT = CpuDxeInitialize
-
-[Sources.Common]
- CpuDxe.c
- CpuDxe.h
- CpuMpCore.c
- CpuMmuCommon.c
- Exception.c
-
-[Sources.ARM]
- Arm/Mmu.c
-
-[Sources.AARCH64]
- AArch64/Mmu.c
-
-[Packages]
- ArmPkg/ArmPkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
-
-[LibraryClasses]
- ArmLib
- ArmMmuLib
- BaseMemoryLib
- CacheMaintenanceLib
- CpuLib
- CpuExceptionHandlerLib
- DebugLib
- DefaultExceptionHandlerLib
- DxeServicesTableLib
- HobLib
- PeCoffGetEntryPointLib
- UefiDriverEntryPoint
- UefiLib
-
-[Protocols]
- gEfiCpuArchProtocolGuid
- gEfiDebugSupportPeriodicCallbackProtocolGuid
-
-[Guids]
- gEfiDebugImageInfoTableGuid
- gArmMpCoreInfoGuid
- gIdleLoopEventGuid
- gEfiVectorHandoffTableGuid
-
-[Pcd.common]
- gArmTokenSpaceGuid.PcdVFPEnabled
-
-[FeaturePcd.common]
- gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport
- gArmTokenSpaceGuid.PcdDebuggerExceptionSupport
-
-[Depex]
- TRUE
diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c deleted file mode 100644 index 8150486217..0000000000 --- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c +++ /dev/null @@ -1,217 +0,0 @@ -/** @file
-*
-* Copyright (c) 2013, ARM Limited. All rights reserved.
-* Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "CpuDxe.h"
-
-/**
- Searches memory descriptors covered by given memory range.
-
- This function searches into the Gcd Memory Space for descriptors
- (from StartIndex to EndIndex) that contains the memory range
- specified by BaseAddress and Length.
-
- @param MemorySpaceMap Gcd Memory Space Map as array.
- @param NumberOfDescriptors Number of descriptors in map.
- @param BaseAddress BaseAddress for the requested range.
- @param Length Length for the requested range.
- @param StartIndex Start index into the Gcd Memory Space Map.
- @param EndIndex End index into the Gcd Memory Space Map.
-
- @retval EFI_SUCCESS Search successfully.
- @retval EFI_NOT_FOUND The requested descriptors does not exist.
-
-**/
-EFI_STATUS
-SearchGcdMemorySpaces (
- IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
- IN UINTN NumberOfDescriptors,
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- OUT UINTN *StartIndex,
- OUT UINTN *EndIndex
- )
-{
- UINTN Index;
-
- *StartIndex = 0;
- *EndIndex = 0;
- for (Index = 0; Index < NumberOfDescriptors; Index++) {
- if ((BaseAddress >= MemorySpaceMap[Index].BaseAddress) &&
- (BaseAddress < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))) {
- *StartIndex = Index;
- }
- if (((BaseAddress + Length - 1) >= MemorySpaceMap[Index].BaseAddress) &&
- ((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))) {
- *EndIndex = Index;
- return EFI_SUCCESS;
- }
- }
- return EFI_NOT_FOUND;
-}
-
-
-/**
- Sets the attributes for a specified range in Gcd Memory Space Map.
-
- This function sets the attributes for a specified range in
- Gcd Memory Space Map.
-
- @param MemorySpaceMap Gcd Memory Space Map as array
- @param NumberOfDescriptors Number of descriptors in map
- @param BaseAddress BaseAddress for the range
- @param Length Length for the range
- @param Attributes Attributes to set
-
- @retval EFI_SUCCESS Memory attributes set successfully
- @retval EFI_NOT_FOUND The specified range does not exist in Gcd Memory Space
-
-**/
-EFI_STATUS
-SetGcdMemorySpaceAttributes (
- IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
- IN UINTN NumberOfDescriptors,
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN UINT64 Attributes
- )
-{
- EFI_STATUS Status;
- UINTN Index;
- UINTN StartIndex;
- UINTN EndIndex;
- EFI_PHYSICAL_ADDRESS RegionStart;
- UINT64 RegionLength;
-
- DEBUG ((DEBUG_GCD, "SetGcdMemorySpaceAttributes[0x%lX; 0x%lX] = 0x%lX\n",
- BaseAddress, BaseAddress + Length, Attributes));
-
- // We do not support a smaller granularity than 4KB on ARM Architecture
- if ((Length & EFI_PAGE_MASK) != 0) {
- DEBUG ((DEBUG_WARN,
- "Warning: We do not support smaller granularity than 4KB on ARM Architecture (passed length: 0x%lX).\n",
- Length));
- }
-
- //
- // Get all memory descriptors covered by the memory range
- //
- Status = SearchGcdMemorySpaces (
- MemorySpaceMap,
- NumberOfDescriptors,
- BaseAddress,
- Length,
- &StartIndex,
- &EndIndex
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Go through all related descriptors and set attributes accordingly
- //
- for (Index = StartIndex; Index <= EndIndex; Index++) {
- if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
- continue;
- }
- //
- // Calculate the start and end address of the overlapping range
- //
- if (BaseAddress >= MemorySpaceMap[Index].BaseAddress) {
- RegionStart = BaseAddress;
- } else {
- RegionStart = MemorySpaceMap[Index].BaseAddress;
- }
- if ((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)) {
- RegionLength = BaseAddress + Length - RegionStart;
- } else {
- RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart;
- }
- //
- // Set memory attributes according to MTRR attribute and the original attribute of descriptor
- //
- gDS->SetMemorySpaceAttributes (
- RegionStart,
- RegionLength,
- (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (MemorySpaceMap[Index].Capabilities & Attributes)
- );
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- This function modifies the attributes for the memory region specified by BaseAddress and
- Length from their current attributes to the attributes specified by Attributes.
-
- @param This The EFI_CPU_ARCH_PROTOCOL instance.
- @param BaseAddress The physical address that is the start address of a memory region.
- @param Length The size in bytes of the memory region.
- @param Attributes The bit mask of attributes to set for the memory region.
-
- @retval EFI_SUCCESS The attributes were set for the memory region.
- @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
- BaseAddress and Length cannot be modified.
- @retval EFI_INVALID_PARAMETER Length is zero.
- @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
- the memory resource range.
- @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
- resource range specified by BaseAddress and Length.
- The bit mask of attributes is not support for the memory resource
- range specified by BaseAddress and Length.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuSetMemoryAttributes (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN UINT64 EfiAttributes
- )
-{
- EFI_STATUS Status;
- UINTN ArmAttributes;
- UINTN RegionBaseAddress;
- UINTN RegionLength;
- UINTN RegionArmAttributes;
-
- if (mIsFlushingGCD) {
- return EFI_SUCCESS;
- }
-
- if ((BaseAddress & (SIZE_4KB - 1)) != 0) {
- // Minimum granularity is SIZE_4KB (4KB on ARM)
- DEBUG ((EFI_D_PAGE, "CpuSetMemoryAttributes(%lx, %lx, %lx): Minimum ganularity is SIZE_4KB\n", BaseAddress, Length, EfiAttributes));
- return EFI_UNSUPPORTED;
- }
-
- // Convert the 'Attribute' into ARM Attribute
- ArmAttributes = EfiAttributeToArmAttribute (EfiAttributes);
-
- // Get the region starting from 'BaseAddress' and its 'Attribute'
- RegionBaseAddress = BaseAddress;
- Status = GetMemoryRegion (&RegionBaseAddress, &RegionLength, &RegionArmAttributes);
-
- // Data & Instruction Caches are flushed when we set new memory attributes.
- // So, we only set the attributes if the new region is different.
- if (EFI_ERROR (Status) || (RegionArmAttributes != ArmAttributes) ||
- ((BaseAddress + Length) > (RegionBaseAddress + RegionLength)))
- {
- return ArmSetMemoryAttributes (BaseAddress, Length, EfiAttributes);
- } else {
- return EFI_SUCCESS;
- }
-}
diff --git a/ArmPkg/Drivers/CpuDxe/CpuMpCore.c b/ArmPkg/Drivers/CpuDxe/CpuMpCore.c deleted file mode 100644 index 81d858ea25..0000000000 --- a/ArmPkg/Drivers/CpuDxe/CpuMpCore.c +++ /dev/null @@ -1,103 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/HobLib.h>
-#include <Library/DebugLib.h>
-#include <Library/MemoryAllocationLib.h>
-
-#include <Guid/ArmMpCoreInfo.h>
-
-ARM_PROCESSOR_TABLE mArmProcessorTableTemplate = {
- {
- EFI_ARM_PROCESSOR_TABLE_SIGNATURE,
- 0,
- EFI_ARM_PROCESSOR_TABLE_REVISION,
- EFI_ARM_PROCESSOR_TABLE_OEM_ID,
- EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID,
- EFI_ARM_PROCESSOR_TABLE_OEM_REVISION,
- EFI_ARM_PROCESSOR_TABLE_CREATOR_ID,
- EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION,
- { 0 },
- 0
- }, //ARM Processor table header
- 0, // Number of entries in ARM processor Table
- NULL // ARM Processor Table
-};
-
-/** Publish ARM Processor Data table in UEFI SYSTEM Table.
- * @param: HobStart Pointer to the beginning of the HOB List from PEI.
- *
- * Description : This function iterates through HOB list and finds ARM processor Table Entry HOB.
- * If the ARM processor Table Entry HOB is found, the HOB data is copied to run-time memory
- * and a pointer is assigned to it in ARM processor table. Then the ARM processor table is
- * installed in EFI configuration table.
-**/
-VOID
-EFIAPI
-PublishArmProcessorTable (
- VOID
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
-
- Hob.Raw = GetHobList ();
-
- // Iterate through the HOBs and find if there is ARM PROCESSOR ENTRY HOB
- for (; !END_OF_HOB_LIST(Hob); Hob.Raw = GET_NEXT_HOB(Hob)) {
- // Check for Correct HOB type
- if ((GET_HOB_TYPE (Hob)) == EFI_HOB_TYPE_GUID_EXTENSION) {
- // Check for correct GUID type
- if (CompareGuid(&(Hob.Guid->Name), &gArmMpCoreInfoGuid)) {
- ARM_PROCESSOR_TABLE *ArmProcessorTable;
- EFI_STATUS Status;
-
- // Allocate Runtime memory for ARM processor table
- ArmProcessorTable = (ARM_PROCESSOR_TABLE*)AllocateRuntimePool(sizeof(ARM_PROCESSOR_TABLE));
-
- // Check if the memory allocation is succesful or not
- ASSERT(NULL != ArmProcessorTable);
-
- // Set ARM processor table to default values
- CopyMem(ArmProcessorTable,&mArmProcessorTableTemplate,sizeof(ARM_PROCESSOR_TABLE));
-
- // Fill in Length fields of ARM processor table
- ArmProcessorTable->Header.Length = sizeof(ARM_PROCESSOR_TABLE);
- ArmProcessorTable->Header.DataLen = GET_GUID_HOB_DATA_SIZE(Hob);
-
- // Fill in Identifier(ARM processor table GUID)
- ArmProcessorTable->Header.Identifier = gArmMpCoreInfoGuid;
-
- // Set Number of ARM core entries in the Table
- ArmProcessorTable->NumberOfEntries = GET_GUID_HOB_DATA_SIZE(Hob)/sizeof(ARM_CORE_INFO);
-
- // Allocate runtime memory for ARM processor Table entries
- ArmProcessorTable->ArmCpus = (ARM_CORE_INFO*)AllocateRuntimePool (
- ArmProcessorTable->NumberOfEntries * sizeof(ARM_CORE_INFO));
-
- // Check if the memory allocation is succesful or not
- ASSERT(NULL != ArmProcessorTable->ArmCpus);
-
- // Copy ARM Processor Table data from HOB list to newly allocated memory
- CopyMem(ArmProcessorTable->ArmCpus,GET_GUID_HOB_DATA(Hob), ArmProcessorTable->Header.DataLen);
-
- // Install the ARM Processor table into EFI system configuration table
- Status = gBS->InstallConfigurationTable (&gArmMpCoreInfoGuid, ArmProcessorTable);
-
- ASSERT_EFI_ERROR (Status);
- }
- }
- }
-}
diff --git a/ArmPkg/Drivers/CpuDxe/Exception.c b/ArmPkg/Drivers/CpuDxe/Exception.c deleted file mode 100644 index d806a5fdf9..0000000000 --- a/ArmPkg/Drivers/CpuDxe/Exception.c +++ /dev/null @@ -1,104 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Portions Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuDxe.h"
-#include <Library/CpuExceptionHandlerLib.h>
-#include <Guid/VectorHandoffTable.h>
-
-EFI_STATUS
-InitializeExceptions (
- IN EFI_CPU_ARCH_PROTOCOL *Cpu
- ) {
- EFI_STATUS Status;
- EFI_VECTOR_HANDOFF_INFO *VectorInfoList;
- EFI_VECTOR_HANDOFF_INFO *VectorInfo;
- BOOLEAN IrqEnabled;
- BOOLEAN FiqEnabled;
-
- VectorInfo = (EFI_VECTOR_HANDOFF_INFO *)NULL;
- Status = EfiGetSystemConfigurationTable(&gEfiVectorHandoffTableGuid, (VOID **)&VectorInfoList);
- if (Status == EFI_SUCCESS && VectorInfoList != NULL) {
- VectorInfo = VectorInfoList;
- }
-
- // intialize the CpuExceptionHandlerLib so we take over the exception vector table from the DXE Core
- InitializeCpuExceptionHandlers(VectorInfo);
-
- Status = EFI_SUCCESS;
-
- //
- // Disable interrupts
- //
- Cpu->GetInterruptState (Cpu, &IrqEnabled);
- Cpu->DisableInterrupt (Cpu);
-
- //
- // EFI does not use the FIQ, but a debugger might so we must disable
- // as we take over the exception vectors.
- //
- FiqEnabled = ArmGetFiqState ();
- ArmDisableFiq ();
-
- if (FiqEnabled) {
- ArmEnableFiq ();
- }
-
- if (IrqEnabled) {
- //
- // Restore interrupt state
- //
- Status = Cpu->EnableInterrupt (Cpu);
- }
-
- //
- // On a DEBUG build, unmask SErrors so they are delivered right away rather
- // than when the OS unmasks them. This gives us a better chance of figuring
- // out the cause.
- //
- DEBUG_CODE (
- ArmEnableAsynchronousAbort ();
- );
-
- return Status;
-}
-
-/**
-This function registers and enables the handler specified by InterruptHandler for a processor
-interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
-handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
-The installed handler is called once for each processor interrupt or exception.
-
-@param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts
-are enabled and FALSE if interrupts are disabled.
-@param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
-when a processor interrupt occurs. If this parameter is NULL, then the handler
-will be uninstalled.
-
-@retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
-@retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
-previously installed.
-@retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
-previously installed.
-@retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
-
-**/
-EFI_STATUS
-RegisterInterruptHandler(
- IN EFI_EXCEPTION_TYPE InterruptType,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
- ) {
- // pass down to CpuExceptionHandlerLib
- return (EFI_STATUS)RegisterCpuInterruptHandler(InterruptType, InterruptHandler);
-}
diff --git a/ArmPkg/Drivers/CpuPei/CpuPei.c b/ArmPkg/Drivers/CpuPei/CpuPei.c deleted file mode 100644 index d54f42acfc..0000000000 --- a/ArmPkg/Drivers/CpuPei/CpuPei.c +++ /dev/null @@ -1,91 +0,0 @@ -/**@file
-
-Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
-Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>
-Copyright (c) 2011-2013, ARM Limited. All rights reserved.<BR>
-
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-Module Name:
-
- MemoryInit.c
-
-Abstract:
-
- PEIM to provide fake memory init
-
-**/
-
-
-
-//
-// The package level header files this module uses
-//
-#include <PiPei.h>
-//
-// The protocols, PPI and GUID defintions for this module
-//
-#include <Ppi/ArmMpCoreInfo.h>
-
-//
-// The Library classes this module consumes
-//
-#include <Library/DebugLib.h>
-#include <Library/PeimEntryPoint.h>
-#include <Library/PeiServicesLib.h>
-#include <Library/PcdLib.h>
-#include <Library/HobLib.h>
-#include <Library/ArmLib.h>
-
-/*++
-
-Routine Description:
-
-Arguments:
-
- FileHandle - Handle of the file being invoked.
- PeiServices - Describes the list of possible PEI Services.
-
-Returns:
-
- Status - EFI_SUCCESS if the boot mode could be set
-
---*/
-EFI_STATUS
-EFIAPI
-InitializeCpuPeim (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
- )
-{
- EFI_STATUS Status;
- ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;
- UINTN ArmCoreCount;
- ARM_CORE_INFO *ArmCoreInfoTable;
-
- // Enable program flow prediction, if supported.
- ArmEnableBranchPrediction ();
-
- // Publish the CPU memory and io spaces sizes
- BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
-
- // Only MP Core platform need to produce gArmMpCoreInfoPpiGuid
- Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID**)&ArmMpCoreInfoPpi);
- if (!EFI_ERROR(Status)) {
- // Build the MP Core Info Table
- ArmCoreCount = 0;
- Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);
- if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) {
- // Build MPCore Info HOB
- BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);
- }
- }
-
- return EFI_SUCCESS;
-}
diff --git a/ArmPkg/Drivers/CpuPei/CpuPei.inf b/ArmPkg/Drivers/CpuPei/CpuPei.inf deleted file mode 100644 index eafccd6009..0000000000 --- a/ArmPkg/Drivers/CpuPei/CpuPei.inf +++ /dev/null @@ -1,58 +0,0 @@ -## @file
-# Component description file for BootMode module
-#
-# This module provides platform specific function to detect boot mode.
-# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CpuPei
- FILE_GUID = 2FD8B7AD-F8FA-4021-9FC0-0AA572147CDC
- MODULE_TYPE = PEIM
- VERSION_STRING = 1.0
-
- ENTRY_POINT = InitializeCpuPeim
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = ARM
-#
-
-[Sources]
- CpuPei.c
-
-[Packages]
- MdePkg/MdePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- PeimEntryPoint
- DebugLib
- HobLib
- ArmLib
-
-[Ppis]
- gArmMpCoreInfoPpiGuid
-
-[Guids]
- gArmMpCoreInfoGuid
-
-[FixedPcd]
- gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
- gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
-
-[Depex]
- gEfiPeiMemoryDiscoveredPpiGuid
-
diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h deleted file mode 100644 index 9e2aebcfd5..0000000000 --- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h +++ /dev/null @@ -1,29 +0,0 @@ -/** @file
-*
-* Copyright (c) 2013-2017, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD
-* License which accompanies this distribution. The full text of the license
-* may be found at http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-#ifndef __GENERIC_WATCHDOG_H__
-#define __GENERIC_WATCHDOG_H__
-
-// Refresh Frame:
-#define GENERIC_WDOG_REFRESH_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogRefreshBase) + 0x000)
-
-// Control Frame:
-#define GENERIC_WDOG_CONTROL_STATUS_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x000)
-#define GENERIC_WDOG_OFFSET_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x008)
-#define GENERIC_WDOG_COMPARE_VALUE_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x010)
-
-// Values of bit 0 of the Control/Status Register
-#define GENERIC_WDOG_ENABLED 1
-#define GENERIC_WDOG_DISABLED 0
-
-#endif // __GENERIC_WATCHDOG_H__
diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c deleted file mode 100644 index 54a1625a32..0000000000 --- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c +++ /dev/null @@ -1,354 +0,0 @@ -/** @file
-*
-* Copyright (c) 2013-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD
-* License which accompanies this distribution. The full text of the license
-* may be found at http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <PiDxe.h>
-
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/PcdLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiRuntimeServicesTableLib.h>
-#include <Library/UefiLib.h>
-#include <Library/ArmGenericTimerCounterLib.h>
-
-#include <Protocol/WatchdogTimer.h>
-#include <Protocol/HardwareInterrupt.h>
-
-#include "GenericWatchdog.h"
-
-// The number of 100ns periods (the unit of time passed to these functions)
-// in a second
-#define TIME_UNITS_PER_SECOND 10000000
-
-// Tick frequency of the generic timer that is the basis of the generic watchdog
-UINTN mTimerFrequencyHz = 0;
-
-// In cases where the compare register was set manually, information about
-// how long the watchdog was asked to wait cannot be retrieved from hardware.
-// It is therefore stored here. 0 means the timer is not running.
-UINT64 mNumTimerTicks = 0;
-
-EFI_HARDWARE_INTERRUPT_PROTOCOL *mInterruptProtocol;
-
-EFI_STATUS
-WatchdogWriteOffsetRegister (
- UINT32 Value
- )
-{
- return MmioWrite32 (GENERIC_WDOG_OFFSET_REG, Value);
-}
-
-EFI_STATUS
-WatchdogWriteCompareRegister (
- UINT64 Value
- )
-{
- return MmioWrite64 (GENERIC_WDOG_COMPARE_VALUE_REG, Value);
-}
-
-EFI_STATUS
-WatchdogEnable (
- VOID
- )
-{
- return MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_ENABLED);
-}
-
-EFI_STATUS
-WatchdogDisable (
- VOID
- )
-{
- return MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_DISABLED);
-}
-
-/**
- On exiting boot services we must make sure the Watchdog Timer
- is stopped.
-**/
-VOID
-EFIAPI
-WatchdogExitBootServicesEvent (
- IN EFI_EVENT Event,
- IN VOID *Context
- )
-{
- WatchdogDisable ();
- mNumTimerTicks = 0;
-}
-
-/*
- This function is called when the watchdog's first signal (WS0) goes high.
- It uses the ResetSystem Runtime Service to reset the board.
-*/
-VOID
-EFIAPI
-WatchdogInterruptHandler (
- IN HARDWARE_INTERRUPT_SOURCE Source,
- IN EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- STATIC CONST CHAR16 ResetString[] = L"The generic watchdog timer ran out.";
-
- WatchdogDisable ();
-
- mInterruptProtocol->EndOfInterrupt (mInterruptProtocol, Source);
-
- gRT->ResetSystem (
- EfiResetCold,
- EFI_TIMEOUT,
- StrSize (ResetString),
- (VOID *) &ResetString
- );
-
- // If we got here then the reset didn't work
- ASSERT (FALSE);
-}
-
-/**
- This function registers the handler NotifyFunction so it is called every time
- the watchdog timer expires. It also passes the amount of time since the last
- handler call to the NotifyFunction.
- If NotifyFunction is not NULL and a handler is not already registered,
- then the new handler is registered and EFI_SUCCESS is returned.
- If NotifyFunction is NULL, and a handler is already registered,
- then that handler is unregistered.
- If an attempt is made to register a handler when a handler is already registered,
- then EFI_ALREADY_STARTED is returned.
- If an attempt is made to unregister a handler when a handler is not registered,
- then EFI_INVALID_PARAMETER is returned.
-
- @param This The EFI_TIMER_ARCH_PROTOCOL instance.
- @param NotifyFunction The function to call when a timer interrupt fires.
- This function executes at TPL_HIGH_LEVEL. The DXE
- Core will register a handler for the timer interrupt,
- so it can know how much time has passed. This
- information is used to signal timer based events.
- NULL will unregister the handler.
-
- @retval EFI_SUCCESS The watchdog timer handler was registered.
- @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already
- registered.
- @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
- previously registered.
-
-**/
-EFI_STATUS
-EFIAPI
-WatchdogRegisterHandler (
- IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
- IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
- )
-{
- // ERROR: This function is not supported.
- // The watchdog will reset the board
- return EFI_UNSUPPORTED;
-}
-
-/**
- This function sets the amount of time to wait before firing the watchdog
- timer to TimerPeriod 100 nS units. If TimerPeriod is 0, then the watchdog
- timer is disabled.
-
- @param This The EFI_WATCHDOG_TIMER_ARCH_PROTOCOL instance.
- @param TimerPeriod The amount of time in 100 nS units to wait before the watchdog
- timer is fired. If TimerPeriod is zero, then the watchdog
- timer is disabled.
-
- @retval EFI_SUCCESS The watchdog timer has been programmed to fire in Time
- 100 nS units.
- @retval EFI_DEVICE_ERROR A watchdog timer could not be programmed due to a device
- error.
-
-**/
-EFI_STATUS
-EFIAPI
-WatchdogSetTimerPeriod (
- IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
- IN UINT64 TimerPeriod // In 100ns units
- )
-{
- UINTN SystemCount;
- EFI_STATUS Status;
-
- // if TimerPerdiod is 0, this is a request to stop the watchdog.
- if (TimerPeriod == 0) {
- mNumTimerTicks = 0;
- return WatchdogDisable ();
- }
-
- // Work out how many timer ticks will equate to TimerPeriod
- mNumTimerTicks = (mTimerFrequencyHz * TimerPeriod) / TIME_UNITS_PER_SECOND;
-
- //
- // If the number of required ticks is greater than the max number the
- // watchdog's offset register (WOR) can hold, we need to manually compute and
- // set the compare register (WCV)
- //
- if (mNumTimerTicks > MAX_UINT32) {
- //
- // We need to enable the watchdog *before* writing to the compare register,
- // because enabling the watchdog causes an "explicit refresh", which
- // clobbers the compare register (WCV). In order to make sure this doesn't
- // trigger an interrupt, set the offset to max.
- //
- Status = WatchdogWriteOffsetRegister (MAX_UINT32);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- WatchdogEnable ();
- SystemCount = ArmGenericTimerGetSystemCount ();
- Status = WatchdogWriteCompareRegister (SystemCount + mNumTimerTicks);
- } else {
- Status = WatchdogWriteOffsetRegister ((UINT32)mNumTimerTicks);
- WatchdogEnable ();
- }
-
- return Status;
-}
-
-/**
- This function retrieves the period of timer interrupts in 100 ns units,
- returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
- is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
- returned, then the timer is currently disabled.
-
- @param This The EFI_TIMER_ARCH_PROTOCOL instance.
- @param TimerPeriod A pointer to the timer period to retrieve in 100
- ns units. If 0 is returned, then the timer is
- currently disabled.
-
-
- @retval EFI_SUCCESS The timer period was returned in TimerPeriod.
- @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-WatchdogGetTimerPeriod (
- IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
- OUT UINT64 *TimerPeriod
- )
-{
- if (TimerPeriod == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- *TimerPeriod = ((TIME_UNITS_PER_SECOND / mTimerFrequencyHz) * mNumTimerTicks);
-
- return EFI_SUCCESS;
-}
-
-/**
- Interface structure for the Watchdog Architectural Protocol.
-
- @par Protocol Description:
- This protocol provides a service to set the amount of time to wait
- before firing the watchdog timer, and it also provides a service to
- register a handler that is invoked when the watchdog timer fires.
-
- @par When the watchdog timer fires, control will be passed to a handler
- if one has been registered. If no handler has been registered,
- or the registered handler returns, then the system will be
- reset by calling the Runtime Service ResetSystem().
-
- @param RegisterHandler
- Registers a handler that will be called each time the
- watchdogtimer interrupt fires. TimerPeriod defines the minimum
- time between timer interrupts, so TimerPeriod will also
- be the minimum time between calls to the registered
- handler.
- NOTE: If the watchdog resets the system in hardware, then
- this function will not have any chance of executing.
-
- @param SetTimerPeriod
- Sets the period of the timer interrupt in 100 nS units.
- This function is optional, and may return EFI_UNSUPPORTED.
- If this function is supported, then the timer period will
- be rounded up to the nearest supported timer period.
-
- @param GetTimerPeriod
- Retrieves the period of the timer interrupt in 100 nS units.
-
-**/
-EFI_WATCHDOG_TIMER_ARCH_PROTOCOL gWatchdogTimer = {
- (EFI_WATCHDOG_TIMER_REGISTER_HANDLER) WatchdogRegisterHandler,
- (EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD) WatchdogSetTimerPeriod,
- (EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD) WatchdogGetTimerPeriod
-};
-
-EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
-
-EFI_STATUS
-EFIAPI
-GenericWatchdogEntry (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
- EFI_HANDLE Handle;
-
- //
- // Make sure the Watchdog Timer Architectural Protocol has not been installed
- // in the system yet.
- // This will avoid conflicts with the universal watchdog
- //
- ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid);
-
- mTimerFrequencyHz = ArmGenericTimerGetTimerFreq ();
- ASSERT (mTimerFrequencyHz != 0);
-
- // Register for an ExitBootServicesEvent
- Status = gBS->CreateEvent (
- EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY,
- WatchdogExitBootServicesEvent, NULL, &EfiExitBootServicesEvent
- );
- if (!EFI_ERROR (Status)) {
- // Install interrupt handler
- Status = gBS->LocateProtocol (
- &gHardwareInterruptProtocolGuid,
- NULL,
- (VOID **)&mInterruptProtocol
- );
- if (!EFI_ERROR (Status)) {
- Status = mInterruptProtocol->RegisterInterruptSource (
- mInterruptProtocol,
- FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
- WatchdogInterruptHandler
- );
- if (!EFI_ERROR (Status)) {
- // Install the Timer Architectural Protocol onto a new handle
- Handle = NULL;
- Status = gBS->InstallMultipleProtocolInterfaces (
- &Handle,
- &gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer,
- NULL
- );
- }
- }
- }
-
- if (EFI_ERROR (Status)) {
- // The watchdog failed to initialize
- ASSERT (FALSE);
- }
-
- mNumTimerTicks = 0;
- WatchdogDisable ();
-
- return Status;
-}
diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf deleted file mode 100644 index fece14cc18..0000000000 --- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf +++ /dev/null @@ -1,53 +0,0 @@ -#
-# Copyright (c) 2013-2014, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-[Defines]
- INF_VERSION = 0x00010016
- BASE_NAME = GenericWatchdogDxe
- FILE_GUID = 0619f5c2-4858-4caa-a86a-73a21a18df6b
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
-
- ENTRY_POINT = GenericWatchdogEntry
-
-[Sources.common]
- GenericWatchdogDxe.c
-
-[Packages]
- MdePkg/MdePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- ArmGenericTimerCounterLib
- BaseLib
- BaseMemoryLib
- DebugLib
- IoLib
- PcdLib
- UefiLib
- UefiBootServicesTableLib
- UefiDriverEntryPoint
- UefiRuntimeServicesTableLib
-
-[Pcd.common]
- gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
- gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
- gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
-
-[Protocols]
- gEfiWatchdogTimerArchProtocolGuid
- gHardwareInterruptProtocolGuid
-
-[Depex]
- gHardwareInterruptProtocolGuid
diff --git a/ArmPkg/Drivers/TimerDxe/TimerDxe.c b/ArmPkg/Drivers/TimerDxe/TimerDxe.c deleted file mode 100644 index 2416c90f55..0000000000 --- a/ArmPkg/Drivers/TimerDxe/TimerDxe.c +++ /dev/null @@ -1,435 +0,0 @@ -/** @file
- Timer Architecture Protocol driver of the ARM flavor
-
- Copyright (c) 2011-2013 ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-
-#include <PiDxe.h>
-
-#include <Library/ArmLib.h>
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-#include <Library/ArmGenericTimerCounterLib.h>
-
-#include <Protocol/Timer.h>
-#include <Protocol/HardwareInterrupt.h>
-
-// The notification function to call on every timer interrupt.
-EFI_TIMER_NOTIFY mTimerNotifyFunction = (EFI_TIMER_NOTIFY)NULL;
-EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
-
-// The current period of the timer interrupt
-UINT64 mTimerPeriod = 0;
-// The latest Timer Tick calculated for mTimerPeriod
-UINT64 mTimerTicks = 0;
-// Number of elapsed period since the last Timer interrupt
-UINT64 mElapsedPeriod = 1;
-
-// Cached copy of the Hardware Interrupt protocol instance
-EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL;
-
-/**
- This function registers the handler NotifyFunction so it is called every time
- the timer interrupt fires. It also passes the amount of time since the last
- handler call to the NotifyFunction. If NotifyFunction is NULL, then the
- handler is unregistered. If the handler is registered, then EFI_SUCCESS is
- returned. If the CPU does not support registering a timer interrupt handler,
- then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler
- when a handler is already registered, then EFI_ALREADY_STARTED is returned.
- If an attempt is made to unregister a handler when a handler is not registered,
- then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to
- register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
- is returned.
-
- @param This The EFI_TIMER_ARCH_PROTOCOL instance.
- @param NotifyFunction The function to call when a timer interrupt fires. This
- function executes at TPL_HIGH_LEVEL. The DXE Core will
- register a handler for the timer interrupt, so it can know
- how much time has passed. This information is used to
- signal timer based events. NULL will unregister the handler.
- @retval EFI_SUCCESS The timer handler was registered.
- @retval EFI_UNSUPPORTED The platform does not support timer interrupts.
- @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already
- registered.
- @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
- previously registered.
- @retval EFI_DEVICE_ERROR The timer handler could not be registered.
-
-**/
-EFI_STATUS
-EFIAPI
-TimerDriverRegisterHandler (
- IN EFI_TIMER_ARCH_PROTOCOL *This,
- IN EFI_TIMER_NOTIFY NotifyFunction
- )
-{
- if ((NotifyFunction == NULL) && (mTimerNotifyFunction == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- if ((NotifyFunction != NULL) && (mTimerNotifyFunction != NULL)) {
- return EFI_ALREADY_STARTED;
- }
-
- mTimerNotifyFunction = NotifyFunction;
-
- return EFI_SUCCESS;
-}
-
-/**
- Disable the timer
-**/
-VOID
-EFIAPI
-ExitBootServicesEvent (
- IN EFI_EVENT Event,
- IN VOID *Context
- )
-{
- ArmGenericTimerDisableTimer ();
-}
-
-/**
-
- This function adjusts the period of timer interrupts to the value specified
- by TimerPeriod. If the timer period is updated, then the selected timer
- period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
- the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
- If an error occurs while attempting to update the timer period, then the
- timer hardware will be put back in its state prior to this call, and
- EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
- is disabled. This is not the same as disabling the CPU's interrupts.
- Instead, it must either turn off the timer hardware, or it must adjust the
- interrupt controller so that a CPU interrupt is not generated when the timer
- interrupt fires.
-
- @param This The EFI_TIMER_ARCH_PROTOCOL instance.
- @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
- the timer hardware is not programmable, then EFI_UNSUPPORTED is
- returned. If the timer is programmable, then the timer period
- will be rounded up to the nearest timer period that is supported
- by the timer hardware. If TimerPeriod is set to 0, then the
- timer interrupts will be disabled.
-
-
- @retval EFI_SUCCESS The timer period was changed.
- @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
- @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
-
-**/
-EFI_STATUS
-EFIAPI
-TimerDriverSetTimerPeriod (
- IN EFI_TIMER_ARCH_PROTOCOL *This,
- IN UINT64 TimerPeriod
- )
-{
- UINT64 CounterValue;
- UINT64 TimerTicks;
- EFI_TPL OriginalTPL;
-
- // Always disable the timer
- ArmGenericTimerDisableTimer ();
-
- if (TimerPeriod != 0) {
- // mTimerTicks = TimerPeriod in 1ms unit x Frequency.10^-3
- // = TimerPeriod.10^-4 x Frequency.10^-3
- // = (TimerPeriod x Frequency) x 10^-7
- TimerTicks = MultU64x32 (TimerPeriod, ArmGenericTimerGetTimerFreq ());
- TimerTicks = DivU64x32 (TimerTicks, 10000000U);
-
- // Raise TPL to update the mTimerTicks and mTimerPeriod to ensure these values
- // are coherent in the interrupt handler
- OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
-
- mTimerTicks = TimerTicks;
- mTimerPeriod = TimerPeriod;
- mElapsedPeriod = 1;
-
- gBS->RestoreTPL (OriginalTPL);
-
- // Get value of the current timer
- CounterValue = ArmGenericTimerGetSystemCount ();
- // Set the interrupt in Current Time + mTimerTick
- ArmGenericTimerSetCompareVal (CounterValue + mTimerTicks);
-
- // Enable the timer
- ArmGenericTimerEnableTimer ();
- } else {
- // Save the new timer period
- mTimerPeriod = TimerPeriod;
- // Reset the elapsed period
- mElapsedPeriod = 1;
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- This function retrieves the period of timer interrupts in 100 ns units,
- returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
- is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
- returned, then the timer is currently disabled.
-
- @param This The EFI_TIMER_ARCH_PROTOCOL instance.
- @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If
- 0 is returned, then the timer is currently disabled.
-
-
- @retval EFI_SUCCESS The timer period was returned in TimerPeriod.
- @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-TimerDriverGetTimerPeriod (
- IN EFI_TIMER_ARCH_PROTOCOL *This,
- OUT UINT64 *TimerPeriod
- )
-{
- if (TimerPeriod == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- *TimerPeriod = mTimerPeriod;
- return EFI_SUCCESS;
-}
-
-/**
- This function generates a soft timer interrupt. If the platform does not support soft
- timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned.
- If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler()
- service, then a soft timer interrupt will be generated. If the timer interrupt is
- enabled when this service is called, then the registered handler will be invoked. The
- registered handler should not be able to distinguish a hardware-generated timer
- interrupt from a software-generated timer interrupt.
-
- @param This The EFI_TIMER_ARCH_PROTOCOL instance.
-
- @retval EFI_SUCCESS The soft timer interrupt was generated.
- @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts.
-
-**/
-EFI_STATUS
-EFIAPI
-TimerDriverGenerateSoftInterrupt (
- IN EFI_TIMER_ARCH_PROTOCOL *This
- )
-{
- return EFI_UNSUPPORTED;
-}
-
-/**
- Interface structure for the Timer Architectural Protocol.
-
- @par Protocol Description:
- This protocol provides the services to initialize a periodic timer
- interrupt, and to register a handler that is called each time the timer
- interrupt fires. It may also provide a service to adjust the rate of the
- periodic timer interrupt. When a timer interrupt occurs, the handler is
- passed the amount of time that has passed since the previous timer
- interrupt.
-
- @param RegisterHandler
- Registers a handler that will be called each time the
- timer interrupt fires. TimerPeriod defines the minimum
- time between timer interrupts, so TimerPeriod will also
- be the minimum time between calls to the registered
- handler.
-
- @param SetTimerPeriod
- Sets the period of the timer interrupt in 100 nS units.
- This function is optional, and may return EFI_UNSUPPORTED.
- If this function is supported, then the timer period will
- be rounded up to the nearest supported timer period.
-
-
- @param GetTimerPeriod
- Retrieves the period of the timer interrupt in 100 nS units.
-
- @param GenerateSoftInterrupt
- Generates a soft timer interrupt that simulates the firing of
- the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for
- a period of time.
-
-**/
-EFI_TIMER_ARCH_PROTOCOL gTimer = {
- TimerDriverRegisterHandler,
- TimerDriverSetTimerPeriod,
- TimerDriverGetTimerPeriod,
- TimerDriverGenerateSoftInterrupt
-};
-
-/**
-
- C Interrupt Handler called in the interrupt context when Source interrupt is active.
-
-
- @param Source Source of the interrupt. Hardware routing off a specific platform defines
- what source means.
-
- @param SystemContext Pointer to system register context. Mostly used by debuggers and will
- update the system context after the return from the interrupt if
- modified. Don't change these values unless you know what you are doing
-
-**/
-VOID
-EFIAPI
-TimerInterruptHandler (
- IN HARDWARE_INTERRUPT_SOURCE Source,
- IN EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- EFI_TPL OriginalTPL;
- UINT64 CurrentValue;
- UINT64 CompareValue;
-
- //
- // DXE core uses this callback for the EFI timer tick. The DXE core uses locks
- // that raise to TPL_HIGH and then restore back to current level. Thus we need
- // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick.
- //
- OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
-
- // Check if the timer interrupt is active
- if ((ArmGenericTimerGetTimerCtrlReg () ) & ARM_ARCH_TIMER_ISTATUS) {
-
- // Signal end of interrupt early to help avoid losing subsequent ticks from long duration handlers
- gInterrupt->EndOfInterrupt (gInterrupt, Source);
-
- if (mTimerNotifyFunction) {
- mTimerNotifyFunction (mTimerPeriod * mElapsedPeriod);
- }
-
- //
- // Reload the Timer
- //
-
- // Get current counter value
- CurrentValue = ArmGenericTimerGetSystemCount ();
- // Get the counter value to compare with
- CompareValue = ArmGenericTimerGetCompareVal ();
-
- // This loop is needed in case we missed interrupts (eg: case when the interrupt handling
- // has taken longer than mTickPeriod).
- // Note: Physical Counter is counting up
- mElapsedPeriod = 0;
- do {
- CompareValue += mTimerTicks;
- mElapsedPeriod++;
- } while (CompareValue < CurrentValue);
-
- // Set next compare value
- ArmGenericTimerSetCompareVal (CompareValue);
- ArmGenericTimerEnableTimer ();
- }
-
- // Enable timer interrupts
- gInterrupt->EnableInterruptSource (gInterrupt, Source);
-
- gBS->RestoreTPL (OriginalTPL);
-}
-
-
-/**
- Initialize the state information for the Timer Architectural Protocol and
- the Timer Debug support protocol that allows the debugger to break into a
- running program.
-
- @param ImageHandle of the loaded driver
- @param SystemTable Pointer to the System Table
-
- @retval EFI_SUCCESS Protocol registered
- @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
- @retval EFI_DEVICE_ERROR Hardware problems
-
-**/
-EFI_STATUS
-EFIAPI
-TimerInitialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_HANDLE Handle = NULL;
- EFI_STATUS Status;
- UINTN TimerCtrlReg;
- UINT32 TimerHypIntrNum;
-
- if (ArmIsArchTimerImplemented () == 0) {
- DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, hence cann't use this Driver \n"));
- ASSERT (0);
- }
-
- // Find the interrupt controller protocol. ASSERT if not found.
- Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL, (VOID **)&gInterrupt);
- ASSERT_EFI_ERROR (Status);
-
- // Disable the timer
- TimerCtrlReg = ArmGenericTimerGetTimerCtrlReg ();
- TimerCtrlReg |= ARM_ARCH_TIMER_IMASK;
- TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;
- ArmGenericTimerSetTimerCtrlReg (TimerCtrlReg);
- Status = TimerDriverSetTimerPeriod (&gTimer, 0);
- ASSERT_EFI_ERROR (Status);
-
- // Install secure and Non-secure interrupt handlers
- // Note: Because it is not possible to determine the security state of the
- // CPU dynamically, we just install interrupt handler for both sec and non-sec
- // timer PPI
- Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerVirtIntrNum), TimerInterruptHandler);
- ASSERT_EFI_ERROR (Status);
-
- //
- // The hypervisor timer interrupt may be omitted by implementations that
- // execute under virtualization.
- //
- TimerHypIntrNum = PcdGet32 (PcdArmArchTimerHypIntrNum);
- if (TimerHypIntrNum != 0) {
- Status = gInterrupt->RegisterInterruptSource (gInterrupt, TimerHypIntrNum, TimerInterruptHandler);
- ASSERT_EFI_ERROR (Status);
- }
-
- Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerSecIntrNum), TimerInterruptHandler);
- ASSERT_EFI_ERROR (Status);
-
- Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerIntrNum), TimerInterruptHandler);
- ASSERT_EFI_ERROR (Status);
-
- // Set up default timer
- Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
- ASSERT_EFI_ERROR (Status);
-
- // Install the Timer Architectural Protocol onto a new handle
- Status = gBS->InstallMultipleProtocolInterfaces(
- &Handle,
- &gEfiTimerArchProtocolGuid, &gTimer,
- NULL
- );
- ASSERT_EFI_ERROR(Status);
-
- // Everything is ready, unmask and enable timer interrupts
- TimerCtrlReg = ARM_ARCH_TIMER_ENABLE;
- ArmGenericTimerSetTimerCtrlReg (TimerCtrlReg);
-
- // Register for an ExitBootServicesEvent
- Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
diff --git a/ArmPkg/Drivers/TimerDxe/TimerDxe.inf b/ArmPkg/Drivers/TimerDxe/TimerDxe.inf deleted file mode 100644 index 3f345156c3..0000000000 --- a/ArmPkg/Drivers/TimerDxe/TimerDxe.inf +++ /dev/null @@ -1,60 +0,0 @@ -#/** @file
-#
-# Component description file for Timer DXE module
-#
-# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmTimerDxe
- FILE_GUID = 49ea041e-6752-42ca-b0b1-7344fe2546b7
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
-
- ENTRY_POINT = TimerInitialize
-
-[Sources.common]
- TimerDxe.c
-
-[Packages]
- MdePkg/MdePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- ArmLib
- BaseLib
- UefiRuntimeServicesTableLib
- UefiLib
- UefiBootServicesTableLib
- BaseMemoryLib
- DebugLib
- UefiDriverEntryPoint
- IoLib
- ArmGenericTimerCounterLib
-
-[Guids]
-
-[Protocols]
- gEfiTimerArchProtocolGuid
- gHardwareInterruptProtocolGuid
-
-[Pcd.common]
- gEmbeddedTokenSpaceGuid.PcdTimerPeriod
- gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
- gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
- gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
- gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
-
-[Depex]
- gHardwareInterruptProtocolGuid
diff --git a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c b/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c deleted file mode 100644 index 92aa5f8b0e..0000000000 --- a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c +++ /dev/null @@ -1,1209 +0,0 @@ -/** @file
- Support a Semi Host file system over a debuggers JTAG
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Uefi.h>
-
-#include <Guid/FileInfo.h>
-#include <Guid/FileSystemInfo.h>
-#include <Guid/FileSystemVolumeLabelInfo.h>
-
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/SemihostLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiLib.h>
-
-#include <Protocol/DevicePath.h>
-#include <Protocol/SimpleFileSystem.h>
-
-#include "SemihostFs.h"
-
-#define DEFAULT_SEMIHOST_FS_LABEL L"SemihostFs"
-
-STATIC CHAR16 *mSemihostFsLabel;
-
-EFI_SIMPLE_FILE_SYSTEM_PROTOCOL gSemihostFs = {
- EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_REVISION,
- VolumeOpen
-};
-
-EFI_FILE gSemihostFsFile = {
- EFI_FILE_PROTOCOL_REVISION,
- FileOpen,
- FileClose,
- FileDelete,
- FileRead,
- FileWrite,
- FileGetPosition,
- FileSetPosition,
- FileGetInfo,
- FileSetInfo,
- FileFlush
-};
-
-//
-// Device path for semi-hosting. It contains our autogened Caller ID GUID.
-//
-typedef struct {
- VENDOR_DEVICE_PATH Guid;
- EFI_DEVICE_PATH_PROTOCOL End;
-} SEMIHOST_DEVICE_PATH;
-
-SEMIHOST_DEVICE_PATH gDevicePath = {
- {
- { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0 } },
- EFI_CALLER_ID_GUID
- },
- { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 } }
-};
-
-typedef struct {
- LIST_ENTRY Link;
- UINT64 Signature;
- EFI_FILE File;
- CHAR8 *FileName;
- UINT64 OpenMode;
- UINT32 Position;
- UINTN SemihostHandle;
- BOOLEAN IsRoot;
- EFI_FILE_INFO Info;
-} SEMIHOST_FCB;
-
-#define SEMIHOST_FCB_SIGNATURE SIGNATURE_32( 'S', 'H', 'F', 'C' )
-#define SEMIHOST_FCB_FROM_THIS(a) CR(a, SEMIHOST_FCB, File, SEMIHOST_FCB_SIGNATURE)
-#define SEMIHOST_FCB_FROM_LINK(a) CR(a, SEMIHOST_FCB, Link, SEMIHOST_FCB_SIGNATURE);
-
-EFI_HANDLE gInstallHandle = NULL;
-LIST_ENTRY gFileList = INITIALIZE_LIST_HEAD_VARIABLE (gFileList);
-
-SEMIHOST_FCB *
-AllocateFCB (
- VOID
- )
-{
- SEMIHOST_FCB *Fcb = AllocateZeroPool (sizeof (SEMIHOST_FCB));
-
- if (Fcb != NULL) {
- CopyMem (&Fcb->File, &gSemihostFsFile, sizeof (gSemihostFsFile));
- Fcb->Signature = SEMIHOST_FCB_SIGNATURE;
- }
-
- return Fcb;
-}
-
-VOID
-FreeFCB (
- IN SEMIHOST_FCB *Fcb
- )
-{
- // Remove Fcb from gFileList.
- RemoveEntryList (&Fcb->Link);
-
- // To help debugging...
- Fcb->Signature = 0;
-
- FreePool (Fcb);
-}
-
-
-
-EFI_STATUS
-VolumeOpen (
- IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *This,
- OUT EFI_FILE **Root
- )
-{
- SEMIHOST_FCB *RootFcb = NULL;
-
- if (Root == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- RootFcb = AllocateFCB ();
- if (RootFcb == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
-
- RootFcb->IsRoot = TRUE;
- RootFcb->Info.Attribute = EFI_FILE_READ_ONLY | EFI_FILE_DIRECTORY;
-
- InsertTailList (&gFileList, &RootFcb->Link);
-
- *Root = &RootFcb->File;
-
- return EFI_SUCCESS;
-}
-
-/**
- Open a file on the host system by means of the semihosting interface.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is
- the file handle to source location.
- @param[out] NewHandle A pointer to the location to return the opened
- handle for the new file.
- @param[in] FileName The Null-terminated string of the name of the file
- to be opened.
- @param[in] OpenMode The mode to open the file : Read or Read/Write or
- Read/Write/Create
- @param[in] Attributes Only valid for EFI_FILE_MODE_CREATE, in which case these
- are the attribute bits for the newly created file. The
- mnemonics of the attribute bits are : EFI_FILE_READ_ONLY,
- EFI_FILE_HIDDEN, EFI_FILE_SYSTEM, EFI_FILE_RESERVED,
- EFI_FILE_DIRECTORY and EFI_FILE_ARCHIVE.
-
- @retval EFI_SUCCESS The file was open.
- @retval EFI_NOT_FOUND The specified file could not be found.
- @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
- @retval EFI_WRITE_PROTECTED Attempt to create a directory. This is not possible
- with the semi-hosting interface.
- @retval EFI_OUT_OF_RESOURCES Not enough resources were available to open the file.
- @retval EFI_INVALID_PARAMETER At least one of the parameters is invalid.
-
-**/
-EFI_STATUS
-FileOpen (
- IN EFI_FILE *This,
- OUT EFI_FILE **NewHandle,
- IN CHAR16 *FileName,
- IN UINT64 OpenMode,
- IN UINT64 Attributes
- )
-{
- SEMIHOST_FCB *FileFcb;
- RETURN_STATUS Return;
- EFI_STATUS Status;
- UINTN SemihostHandle;
- CHAR8 *AsciiFileName;
- UINT32 SemihostMode;
- UINTN Length;
-
- if ((FileName == NULL) || (NewHandle == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- if ( (OpenMode != EFI_FILE_MODE_READ) &&
- (OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE)) &&
- (OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE | EFI_FILE_MODE_CREATE)) ) {
- return EFI_INVALID_PARAMETER;
- }
-
- if ((OpenMode & EFI_FILE_MODE_CREATE) &&
- (Attributes & EFI_FILE_DIRECTORY) ) {
- return EFI_WRITE_PROTECTED;
- }
-
- Length = StrLen (FileName) + 1;
- AsciiFileName = AllocatePool (Length);
- if (AsciiFileName == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
- UnicodeStrToAsciiStrS (FileName, AsciiFileName, Length);
-
- // Opening '/', '\', '.', or the NULL pathname is trying to open the root directory
- if ((AsciiStrCmp (AsciiFileName, "\\") == 0) ||
- (AsciiStrCmp (AsciiFileName, "/") == 0) ||
- (AsciiStrCmp (AsciiFileName, "") == 0) ||
- (AsciiStrCmp (AsciiFileName, ".") == 0) ) {
- FreePool (AsciiFileName);
- return (VolumeOpen (&gSemihostFs, NewHandle));
- }
-
- //
- // No control is done here concerning the file path. It is passed
- // as it is to the host operating system through the semi-hosting
- // interface. We first try to open the file in the read or update
- // mode even if the file creation has been asked for. That way, if
- // the file already exists, it is not truncated to zero length. In
- // write mode (bit SEMIHOST_FILE_MODE_WRITE up), if the file already
- // exists, it is reset to an empty file.
- //
- if (OpenMode == EFI_FILE_MODE_READ) {
- SemihostMode = SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY;
- } else {
- SemihostMode = SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY | SEMIHOST_FILE_MODE_UPDATE;
- }
- Return = SemihostFileOpen (AsciiFileName, SemihostMode, &SemihostHandle);
-
- if (RETURN_ERROR (Return)) {
- if (OpenMode & EFI_FILE_MODE_CREATE) {
- //
- // In the create if does not exist case, if the opening in update
- // mode failed, create it and open it in update mode. The update
- // mode allows for both read and write from and to the file.
- //
- Return = SemihostFileOpen (
- AsciiFileName,
- SEMIHOST_FILE_MODE_WRITE | SEMIHOST_FILE_MODE_BINARY | SEMIHOST_FILE_MODE_UPDATE,
- &SemihostHandle
- );
- if (RETURN_ERROR (Return)) {
- Status = EFI_DEVICE_ERROR;
- goto Error;
- }
- } else {
- Status = EFI_NOT_FOUND;
- goto Error;
- }
- }
-
- // Allocate a control block and fill it
- FileFcb = AllocateFCB ();
- if (FileFcb == NULL) {
- Status = EFI_OUT_OF_RESOURCES;
- goto Error;
- }
-
- FileFcb->FileName = AsciiFileName;
- FileFcb->SemihostHandle = SemihostHandle;
- FileFcb->Position = 0;
- FileFcb->IsRoot = 0;
- FileFcb->OpenMode = OpenMode;
-
- Return = SemihostFileLength (SemihostHandle, &Length);
- if (RETURN_ERROR (Return)) {
- Status = EFI_DEVICE_ERROR;
- FreeFCB (FileFcb);
- goto Error;
- }
-
- FileFcb->Info.FileSize = Length;
- FileFcb->Info.PhysicalSize = Length;
- FileFcb->Info.Attribute = (OpenMode & EFI_FILE_MODE_CREATE) ? Attributes : 0;
-
- InsertTailList (&gFileList, &FileFcb->Link);
-
- *NewHandle = &FileFcb->File;
-
- return EFI_SUCCESS;
-
-Error:
-
- FreePool (AsciiFileName);
-
- return Status;
-}
-
-/**
- Worker function that truncate a file specified by its name to a given size.
-
- @param[in] FileName The Null-terminated string of the name of the file to be opened.
- @param[in] Size The target size for the file.
-
- @retval EFI_SUCCESS The file was truncated.
- @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
-
-**/
-STATIC
-EFI_STATUS
-TruncateFile (
- IN CHAR8 *FileName,
- IN UINTN Size
- )
-{
- EFI_STATUS Status;
- RETURN_STATUS Return;
- UINTN FileHandle;
- UINT8 *Buffer;
- UINTN Remaining;
- UINTN Read;
- UINTN ToRead;
-
- Status = EFI_DEVICE_ERROR;
- FileHandle = 0;
- Buffer = NULL;
-
- Return = SemihostFileOpen (
- FileName,
- SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY,
- &FileHandle
- );
- if (RETURN_ERROR (Return)) {
- goto Error;
- }
-
- Buffer = AllocatePool (Size);
- if (Buffer == NULL) {
- Status = EFI_OUT_OF_RESOURCES;
- goto Error;
- }
-
- Read = 0;
- Remaining = Size;
- while (Remaining > 0) {
- ToRead = Remaining;
- Return = SemihostFileRead (FileHandle, &ToRead, Buffer + Read);
- if (RETURN_ERROR (Return)) {
- goto Error;
- }
- Remaining -= ToRead;
- Read += ToRead;
- }
-
- Return = SemihostFileClose (FileHandle);
- FileHandle = 0;
- if (RETURN_ERROR (Return)) {
- goto Error;
- }
-
- Return = SemihostFileOpen (
- FileName,
- SEMIHOST_FILE_MODE_WRITE | SEMIHOST_FILE_MODE_BINARY,
- &FileHandle
- );
- if (RETURN_ERROR (Return)) {
- goto Error;
- }
-
- if (Size > 0) {
- Return = SemihostFileWrite (FileHandle, &Size, Buffer);
- if (RETURN_ERROR (Return)) {
- goto Error;
- }
- }
-
- Status = EFI_SUCCESS;
-
-Error:
-
- if (FileHandle != 0) {
- SemihostFileClose (FileHandle);
- }
- if (Buffer != NULL) {
- FreePool (Buffer);
- }
-
- return (Status);
-
-}
-
-/**
- Close a specified file handle.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is the file
- handle to close.
-
- @retval EFI_SUCCESS The file was closed.
- @retval EFI_INVALID_PARAMETER The parameter "This" is NULL.
-
-**/
-EFI_STATUS
-FileClose (
- IN EFI_FILE *This
- )
-{
- SEMIHOST_FCB *Fcb;
-
- if (This == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- Fcb = SEMIHOST_FCB_FROM_THIS(This);
-
- if (!Fcb->IsRoot) {
- SemihostFileClose (Fcb->SemihostHandle);
- //
- // The file size might have been reduced from its actual
- // size on the host file system with FileSetInfo(). In
- // that case, the file has to be truncated.
- //
- if (Fcb->Info.FileSize < Fcb->Info.PhysicalSize) {
- TruncateFile (Fcb->FileName, Fcb->Info.FileSize);
- }
- FreePool (Fcb->FileName);
- }
-
- FreeFCB (Fcb);
-
- return EFI_SUCCESS;
-}
-
-/**
- Close and delete a file.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is the file
- handle to delete.
-
- @retval EFI_SUCCESS The file was closed and deleted.
- @retval EFI_WARN_DELETE_FAILURE The handle was closed, but the file was not deleted.
- @retval EFI_INVALID_PARAMETER The parameter "This" is NULL.
-
-**/
-EFI_STATUS
-FileDelete (
- IN EFI_FILE *This
- )
-{
- SEMIHOST_FCB *Fcb;
- RETURN_STATUS Return;
- CHAR8 *FileName;
- UINTN NameSize;
-
- if (This == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- Fcb = SEMIHOST_FCB_FROM_THIS (This);
-
- if (!Fcb->IsRoot) {
- // Get the filename from the Fcb
- NameSize = AsciiStrLen (Fcb->FileName);
- FileName = AllocatePool (NameSize + 1);
-
- AsciiStrCpyS (FileName, NameSize + 1, Fcb->FileName);
-
- // Close the file if it's open. Disregard return status,
- // since it might give an error if the file isn't open.
- This->Close (This);
-
- // Call the semihost interface to delete the file.
- Return = SemihostFileRemove (FileName);
- if (RETURN_ERROR (Return)) {
- return EFI_WARN_DELETE_FAILURE;
- }
- return EFI_SUCCESS;
- } else {
- return EFI_WARN_DELETE_FAILURE;
- }
-}
-
-/**
- Read data from an open file.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
- is the file handle to read data from.
- @param[in out] BufferSize On input, the size of the Buffer. On output, the
- amount of data returned in Buffer. In both cases,
- the size is measured in bytes.
- @param[out] Buffer The buffer into which the data is read.
-
- @retval EFI_SUCCESS The data was read.
- @retval EFI_DEVICE_ERROR On entry, the current file position is
- beyond the end of the file, or the semi-hosting
- interface reported an error while performing the
- read operation.
- @retval EFI_INVALID_PARAMETER At least one of the three input pointers is NULL.
-
-**/
-EFI_STATUS
-FileRead (
- IN EFI_FILE *This,
- IN OUT UINTN *BufferSize,
- OUT VOID *Buffer
- )
-{
- SEMIHOST_FCB *Fcb;
- EFI_STATUS Status;
- RETURN_STATUS Return;
-
- if ((This == NULL) || (BufferSize == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- Fcb = SEMIHOST_FCB_FROM_THIS (This);
-
- if (Fcb->IsRoot) {
- // The semi-hosting interface does not allow to list files on the host machine.
- Status = EFI_UNSUPPORTED;
- } else {
- Status = EFI_SUCCESS;
- if (Fcb->Position >= Fcb->Info.FileSize) {
- *BufferSize = 0;
- if (Fcb->Position > Fcb->Info.FileSize) {
- Status = EFI_DEVICE_ERROR;
- }
- } else {
- Return = SemihostFileRead (Fcb->SemihostHandle, BufferSize, Buffer);
- if (RETURN_ERROR (Return)) {
- Status = EFI_DEVICE_ERROR;
- } else {
- Fcb->Position += *BufferSize;
- }
- }
- }
-
- return Status;
-}
-
-/**
- Worker function that extends the size of an open file.
-
- The extension is filled with zeros.
-
- @param[in] Fcb Internal description of the opened file
- @param[in] Size The number of bytes, the file has to be extended.
-
- @retval EFI_SUCCESS The file was extended.
- @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
-
-**/
-STATIC
-EFI_STATUS
-ExtendFile (
- IN SEMIHOST_FCB *Fcb,
- IN UINTN Size
- )
-{
- RETURN_STATUS Return;
- UINTN Remaining;
- CHAR8 WriteBuffer[128];
- UINTN WriteNb;
- UINTN WriteSize;
-
- Return = SemihostFileSeek (Fcb->SemihostHandle, Fcb->Info.FileSize);
- if (RETURN_ERROR (Return)) {
- return EFI_DEVICE_ERROR;
- }
-
- Remaining = Size;
- SetMem (WriteBuffer, 0, sizeof(WriteBuffer));
- while (Remaining > 0) {
- WriteNb = MIN (Remaining, sizeof(WriteBuffer));
- WriteSize = WriteNb;
- Return = SemihostFileWrite (Fcb->SemihostHandle, &WriteSize, WriteBuffer);
- if (RETURN_ERROR (Return)) {
- return EFI_DEVICE_ERROR;
- }
- Remaining -= WriteNb;
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- Write data to an open file.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
- is the file handle to write data to.
- @param[in out] BufferSize On input, the size of the Buffer. On output, the
- size of the data actually written. In both cases,
- the size is measured in bytes.
- @param[in] Buffer The buffer of data to write.
-
- @retval EFI_SUCCESS The data was written.
- @retval EFI_ACCESS_DENIED Attempt to write into a read only file or
- in a file opened in read only mode.
- @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
- @retval EFI_INVALID_PARAMETER At least one of the three input pointers is NULL.
-
-**/
-EFI_STATUS
-FileWrite (
- IN EFI_FILE *This,
- IN OUT UINTN *BufferSize,
- IN VOID *Buffer
- )
-{
- SEMIHOST_FCB *Fcb;
- EFI_STATUS Status;
- UINTN WriteSize;
- RETURN_STATUS Return;
- UINTN Length;
-
- if ((This == NULL) || (BufferSize == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- Fcb = SEMIHOST_FCB_FROM_THIS (This);
-
- // We cannot write a read-only file
- if ((Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
- || !(Fcb->OpenMode & EFI_FILE_MODE_WRITE)) {
- return EFI_ACCESS_DENIED;
- }
-
- //
- // If the position has been set past the end of the file, first grow the
- // file from its current size "Fcb->Info.FileSize" to "Fcb->Position"
- // size, filling the gap with zeros.
- //
- if (Fcb->Position > Fcb->Info.FileSize) {
- Status = ExtendFile (Fcb, Fcb->Position - Fcb->Info.FileSize);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- Fcb->Info.FileSize = Fcb->Position;
- }
-
- WriteSize = *BufferSize;
- Return = SemihostFileWrite (Fcb->SemihostHandle, &WriteSize, Buffer);
- if (RETURN_ERROR (Return)) {
- return EFI_DEVICE_ERROR;
- }
-
- Fcb->Position += *BufferSize;
- if (Fcb->Position > Fcb->Info.FileSize) {
- Fcb->Info.FileSize = Fcb->Position;
- }
-
- Return = SemihostFileLength (Fcb->SemihostHandle, &Length);
- if (RETURN_ERROR (Return)) {
- return EFI_DEVICE_ERROR;
- }
- Fcb->Info.PhysicalSize = Length;
-
- return EFI_SUCCESS;
-}
-
-/**
- Return a file's current position.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is
- the file handle to get the current position on.
- @param[out] Position The address to return the file's current position value.
-
- @retval EFI_SUCCESS The position was returned.
- @retval EFI_INVALID_PARAMETER The parameter "This" or "Position" is NULL.
-
-**/
-EFI_STATUS
-FileGetPosition (
- IN EFI_FILE *This,
- OUT UINT64 *Position
- )
-{
- SEMIHOST_FCB *Fcb;
-
- if ((This == NULL) || (Position == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- Fcb = SEMIHOST_FCB_FROM_THIS(This);
-
- *Position = Fcb->Position;
-
- return EFI_SUCCESS;
-}
-
-/**
- Set a file's current position.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is
- the file handle to set the requested position on.
- @param[in] Position The byte position from the start of the file to set.
-
- @retval EFI_SUCCESS The position was set.
- @retval EFI_DEVICE_ERROR The semi-hosting positionning operation failed.
- @retval EFI_UNSUPPORTED The seek request for nonzero is not valid on open
- directories.
- @retval EFI_INVALID_PARAMETER The parameter "This" is NULL.
-
-**/
-EFI_STATUS
-FileSetPosition (
- IN EFI_FILE *This,
- IN UINT64 Position
- )
-{
- SEMIHOST_FCB *Fcb;
- RETURN_STATUS Return;
-
- if (This == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- Fcb = SEMIHOST_FCB_FROM_THIS (This);
-
- if (Fcb->IsRoot) {
- if (Position != 0) {
- return EFI_UNSUPPORTED;
- }
- }
- else {
- //
- // UEFI Spec section 12.5:
- // "Seeking to position 0xFFFFFFFFFFFFFFFF causes the current position to
- // be set to the end of the file."
- //
- if (Position == 0xFFFFFFFFFFFFFFFF) {
- Position = Fcb->Info.FileSize;
- }
- Return = SemihostFileSeek (Fcb->SemihostHandle, MIN (Position, Fcb->Info.FileSize));
- if (RETURN_ERROR (Return)) {
- return EFI_DEVICE_ERROR;
- }
- }
-
- Fcb->Position = Position;
-
- return EFI_SUCCESS;
-}
-
-/**
- Return information about a file.
-
- @param[in] Fcb A pointer to the description of an open file.
- @param[in out] BufferSize The size, in bytes, of Buffer.
- @param[out] Buffer A pointer to the data buffer to return. Not NULL if
- "*BufferSize" is greater than 0.
-
- @retval EFI_SUCCESS The information was returned.
- @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to return the information.
- BufferSize has been updated with the size needed to
- complete the request.
-**/
-STATIC
-EFI_STATUS
-GetFileInfo (
- IN SEMIHOST_FCB *Fcb,
- IN OUT UINTN *BufferSize,
- OUT VOID *Buffer
- )
-{
- EFI_FILE_INFO *Info = NULL;
- UINTN NameSize = 0;
- UINTN ResultSize;
- UINTN Index;
-
- if (Fcb->IsRoot == TRUE) {
- ResultSize = SIZE_OF_EFI_FILE_INFO + sizeof(CHAR16);
- } else {
- NameSize = AsciiStrLen (Fcb->FileName) + 1;
- ResultSize = SIZE_OF_EFI_FILE_INFO + NameSize * sizeof (CHAR16);
- }
-
- if (*BufferSize < ResultSize) {
- *BufferSize = ResultSize;
- return EFI_BUFFER_TOO_SMALL;
- }
-
- Info = Buffer;
-
- // Copy the current file info
- CopyMem (Info, &Fcb->Info, SIZE_OF_EFI_FILE_INFO);
-
- // Fill in the structure
- Info->Size = ResultSize;
-
- if (Fcb->IsRoot == TRUE) {
- Info->FileName[0] = L'\0';
- } else {
- for (Index = 0; Index < NameSize; Index++) {
- Info->FileName[Index] = Fcb->FileName[Index];
- }
- }
-
- *BufferSize = ResultSize;
-
- return EFI_SUCCESS;
-}
-
-/**
- Return information about a file system.
-
- @param[in] Fcb A pointer to the description of an open file
- which belongs to the file system, the information
- is requested for.
- @param[in out] BufferSize The size, in bytes, of Buffer.
- @param[out] Buffer A pointer to the data buffer to return. Not NULL if
- "*BufferSize" is greater than 0.
-
- @retval EFI_SUCCESS The information was returned.
- @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to return the information.
- BufferSize has been updated with the size needed to
- complete the request.
-
-**/
-STATIC
-EFI_STATUS
-GetFilesystemInfo (
- IN SEMIHOST_FCB *Fcb,
- IN OUT UINTN *BufferSize,
- OUT VOID *Buffer
- )
-{
- EFI_FILE_SYSTEM_INFO *Info;
- EFI_STATUS Status;
- UINTN ResultSize;
- UINTN StringSize;
-
- StringSize = StrSize (mSemihostFsLabel);
- ResultSize = SIZE_OF_EFI_FILE_SYSTEM_INFO + StringSize;
-
- if (*BufferSize >= ResultSize) {
- ZeroMem (Buffer, ResultSize);
- Status = EFI_SUCCESS;
-
- Info = Buffer;
-
- Info->Size = ResultSize;
- Info->ReadOnly = FALSE;
- Info->VolumeSize = 0;
- Info->FreeSpace = 0;
- Info->BlockSize = 0;
-
- CopyMem (Info->VolumeLabel, mSemihostFsLabel, StringSize);
- } else {
- Status = EFI_BUFFER_TOO_SMALL;
- }
-
- *BufferSize = ResultSize;
- return Status;
-}
-
-/**
- Return information about a file or a file system.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
- is the file handle the requested information is for.
- @param[in] InformationType The type identifier for the information being requested :
- EFI_FILE_INFO_ID or EFI_FILE_SYSTEM_INFO_ID or
- EFI_FILE_SYSTEM_VOLUME_LABEL_ID
- @param[in out] BufferSize The size, in bytes, of Buffer.
- @param[out] Buffer A pointer to the data buffer to return. The type of the
- data inside the buffer is indicated by InformationType.
-
- @retval EFI_SUCCESS The information was returned.
- @retval EFI_UNSUPPORTED The InformationType is not known.
- @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to return the information.
- BufferSize has been updated with the size needed to
- complete the request.
- @retval EFI_INVALID_PARAMETER The parameter "This" or "InformationType" or "BufferSize"
- is NULL or "Buffer" is NULL and "*Buffersize" is greater
- than 0.
-
-**/
-EFI_STATUS
-FileGetInfo (
- IN EFI_FILE *This,
- IN EFI_GUID *InformationType,
- IN OUT UINTN *BufferSize,
- OUT VOID *Buffer
- )
-{
- SEMIHOST_FCB *Fcb;
- EFI_STATUS Status;
- UINTN ResultSize;
-
- if ((This == NULL) ||
- (InformationType == NULL) ||
- (BufferSize == NULL) ||
- ((Buffer == NULL) && (*BufferSize > 0)) ) {
- return EFI_INVALID_PARAMETER;
- }
-
- Fcb = SEMIHOST_FCB_FROM_THIS(This);
-
- if (CompareGuid (InformationType, &gEfiFileSystemInfoGuid)) {
- Status = GetFilesystemInfo (Fcb, BufferSize, Buffer);
- } else if (CompareGuid (InformationType, &gEfiFileInfoGuid)) {
- Status = GetFileInfo (Fcb, BufferSize, Buffer);
- } else if (CompareGuid (InformationType, &gEfiFileSystemVolumeLabelInfoIdGuid)) {
- ResultSize = StrSize (mSemihostFsLabel);
-
- if (*BufferSize >= ResultSize) {
- CopyMem (Buffer, mSemihostFsLabel, ResultSize);
- Status = EFI_SUCCESS;
- } else {
- Status = EFI_BUFFER_TOO_SMALL;
- }
-
- *BufferSize = ResultSize;
- } else {
- Status = EFI_UNSUPPORTED;
- }
-
- return Status;
-}
-
-/**
- Set information about a file.
-
- @param[in] Fcb A pointer to the description of the open file.
- @param[in] Info A pointer to the file information to write.
-
- @retval EFI_SUCCESS The information was set.
- @retval EFI_ACCESS_DENIED An attempt is made to change the name of a file
- to a file that is already present.
- @retval EFI_ACCESS_DENIED An attempt is being made to change the
- EFI_FILE_DIRECTORY Attribute.
- @retval EFI_ACCESS_DENIED The file is a read-only file or has been
- opened in read-only mode and an attempt is
- being made to modify a field other than
- Attribute.
- @retval EFI_WRITE_PROTECTED An attempt is being made to modify a
- read-only attribute.
- @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
- @retval EFI_OUT_OF_RESOURCES A allocation needed to process the request failed.
-
-**/
-STATIC
-EFI_STATUS
-SetFileInfo (
- IN SEMIHOST_FCB *Fcb,
- IN EFI_FILE_INFO *Info
- )
-{
- EFI_STATUS Status;
- RETURN_STATUS Return;
- BOOLEAN FileSizeIsDifferent;
- BOOLEAN FileNameIsDifferent;
- BOOLEAN ReadOnlyIsDifferent;
- CHAR8 *AsciiFileName;
- UINTN FileSize;
- UINTN Length;
- UINTN SemihostHandle;
-
- //
- // A directory can not be changed to a file and a file can
- // not be changed to a directory.
- //
- if (((Info->Attribute & EFI_FILE_DIRECTORY) != 0) != Fcb->IsRoot) {
- return EFI_ACCESS_DENIED;
- }
-
- Length = StrLen (Info->FileName) + 1;
- AsciiFileName = AllocatePool (Length);
- if (AsciiFileName == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
- UnicodeStrToAsciiStrS (Info->FileName, AsciiFileName, Length);
-
- FileSizeIsDifferent = (Info->FileSize != Fcb->Info.FileSize);
- FileNameIsDifferent = (AsciiStrCmp (AsciiFileName, Fcb->FileName) != 0);
- ReadOnlyIsDifferent = CompareMem (
- &Info->CreateTime,
- &Fcb->Info.CreateTime,
- 3 * sizeof (EFI_TIME)
- ) != 0;
-
- //
- // For a read-only file or a file opened in read-only mode, only
- // the Attribute field can be modified. As the root directory is
- // read-only (i.e. VolumeOpen()), this protects the root directory
- // description.
- //
- if ((Fcb->OpenMode == EFI_FILE_MODE_READ) ||
- (Fcb->Info.Attribute & EFI_FILE_READ_ONLY) ) {
- if (FileSizeIsDifferent || FileNameIsDifferent || ReadOnlyIsDifferent) {
- Status = EFI_ACCESS_DENIED;
- goto Error;
- }
- }
-
- if (ReadOnlyIsDifferent) {
- Status = EFI_WRITE_PROTECTED;
- goto Error;
- }
-
- Status = EFI_DEVICE_ERROR;
-
- if (FileSizeIsDifferent) {
- FileSize = Info->FileSize;
- if (Fcb->Info.FileSize < FileSize) {
- Status = ExtendFile (Fcb, FileSize - Fcb->Info.FileSize);
- if (EFI_ERROR (Status)) {
- goto Error;
- }
- //
- // The read/write position from the host file system point of view
- // is at the end of the file. If the position from this module
- // point of view is smaller than the new file size, then
- // ask the host file system to move to that position.
- //
- if (Fcb->Position < FileSize) {
- FileSetPosition (&Fcb->File, Fcb->Position);
- }
- }
- Fcb->Info.FileSize = FileSize;
-
- Return = SemihostFileLength (Fcb->SemihostHandle, &Length);
- if (RETURN_ERROR (Return)) {
- goto Error;
- }
- Fcb->Info.PhysicalSize = Length;
- }
-
- //
- // Note down in RAM the Attribute field but we can not ask
- // for its modification to the host file system as the
- // semi-host interface does not provide this feature.
- //
- Fcb->Info.Attribute = Info->Attribute;
-
- if (FileNameIsDifferent) {
- Return = SemihostFileOpen (
- AsciiFileName,
- SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY,
- &SemihostHandle
- );
- if (!RETURN_ERROR (Return)) {
- SemihostFileClose (SemihostHandle);
- Status = EFI_ACCESS_DENIED;
- goto Error;
- }
-
- Return = SemihostFileRename (Fcb->FileName, AsciiFileName);
- if (RETURN_ERROR (Return)) {
- goto Error;
- }
- FreePool (Fcb->FileName);
- Fcb->FileName = AsciiFileName;
- AsciiFileName = NULL;
- }
-
- Status = EFI_SUCCESS;
-
-Error:
- if (AsciiFileName != NULL) {
- FreePool (AsciiFileName);
- }
-
- return Status;
-}
-
-/**
- Set information about a file or a file system.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
- is the file handle the information is for.
- @param[in] InformationType The type identifier for the information being set :
- EFI_FILE_INFO_ID or EFI_FILE_SYSTEM_INFO_ID or
- EFI_FILE_SYSTEM_VOLUME_LABEL_ID
- @param[in] BufferSize The size, in bytes, of Buffer.
- @param[in] Buffer A pointer to the data buffer to write. The type of the
- data inside the buffer is indicated by InformationType.
-
- @retval EFI_SUCCESS The information was set.
- @retval EFI_UNSUPPORTED The InformationType is not known.
- @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
- @retval EFI_ACCESS_DENIED An attempt is being made to change the
- EFI_FILE_DIRECTORY Attribute.
- @retval EFI_ACCESS_DENIED InformationType is EFI_FILE_INFO_ID and
- the file is a read-only file or has been
- opened in read-only mode and an attempt is
- being made to modify a field other than
- Attribute.
- @retval EFI_ACCESS_DENIED An attempt is made to change the name of a file
- to a file that is already present.
- @retval EFI_WRITE_PROTECTED An attempt is being made to modify a
- read-only attribute.
- @retval EFI_BAD_BUFFER_SIZE The size of the buffer is lower than that indicated by
- the data inside the buffer.
- @retval EFI_OUT_OF_RESOURCES An allocation needed to process the request failed.
- @retval EFI_INVALID_PARAMETER At least one of the parameters is invalid.
-
-**/
-EFI_STATUS
-FileSetInfo (
- IN EFI_FILE *This,
- IN EFI_GUID *InformationType,
- IN UINTN BufferSize,
- IN VOID *Buffer
- )
-{
- SEMIHOST_FCB *Fcb;
- EFI_FILE_INFO *Info;
- EFI_FILE_SYSTEM_INFO *SystemInfo;
- CHAR16 *VolumeLabel;
-
- if ((This == NULL) || (InformationType == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- Fcb = SEMIHOST_FCB_FROM_THIS (This);
-
- if (CompareGuid (InformationType, &gEfiFileInfoGuid)) {
- Info = Buffer;
- if (Info->Size < (SIZE_OF_EFI_FILE_INFO + StrSize (Info->FileName))) {
- return EFI_INVALID_PARAMETER;
- }
- if (BufferSize < Info->Size) {
- return EFI_BAD_BUFFER_SIZE;
- }
- return SetFileInfo (Fcb, Info);
- } else if (CompareGuid (InformationType, &gEfiFileSystemInfoGuid)) {
- SystemInfo = Buffer;
- if (SystemInfo->Size <
- (SIZE_OF_EFI_FILE_SYSTEM_INFO + StrSize (SystemInfo->VolumeLabel))) {
- return EFI_INVALID_PARAMETER;
- }
- if (BufferSize < SystemInfo->Size) {
- return EFI_BAD_BUFFER_SIZE;
- }
- Buffer = SystemInfo->VolumeLabel;
-
- if (StrSize (Buffer) > 0) {
- VolumeLabel = AllocateCopyPool (StrSize (Buffer), Buffer);
- if (VolumeLabel != NULL) {
- FreePool (mSemihostFsLabel);
- mSemihostFsLabel = VolumeLabel;
- return EFI_SUCCESS;
- } else {
- return EFI_OUT_OF_RESOURCES;
- }
- } else {
- return EFI_INVALID_PARAMETER;
- }
- } else if (!CompareGuid (InformationType, &gEfiFileSystemVolumeLabelInfoIdGuid)) {
- return EFI_UNSUPPORTED;
- } else {
- return EFI_UNSUPPORTED;
- }
-}
-
-EFI_STATUS
-FileFlush (
- IN EFI_FILE *File
- )
-{
- SEMIHOST_FCB *Fcb;
-
- Fcb = SEMIHOST_FCB_FROM_THIS(File);
-
- if (Fcb->IsRoot) {
- return EFI_SUCCESS;
- } else {
- if ((Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
- || !(Fcb->OpenMode & EFI_FILE_MODE_WRITE)) {
- return EFI_ACCESS_DENIED;
- } else {
- return EFI_SUCCESS;
- }
- }
-}
-
-EFI_STATUS
-SemihostFsEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
-
- Status = EFI_NOT_FOUND;
-
- if (SemihostConnectionSupported ()) {
- mSemihostFsLabel = AllocateCopyPool (StrSize (DEFAULT_SEMIHOST_FS_LABEL), DEFAULT_SEMIHOST_FS_LABEL);
- if (mSemihostFsLabel == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
-
- Status = gBS->InstallMultipleProtocolInterfaces (
- &gInstallHandle,
- &gEfiSimpleFileSystemProtocolGuid, &gSemihostFs,
- &gEfiDevicePathProtocolGuid, &gDevicePath,
- NULL
- );
-
- if (EFI_ERROR(Status)) {
- FreePool (mSemihostFsLabel);
- }
- }
-
- return Status;
-}
diff --git a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h b/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h deleted file mode 100644 index 93395743ba..0000000000 --- a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h +++ /dev/null @@ -1,252 +0,0 @@ -/** @file
- Support a Semi Host file system over a debuggers JTAG
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __SEMIHOST_FS_H__
-#define __SEMIHOST_FS_H__
-
-EFI_STATUS
-VolumeOpen (
- IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *This,
- OUT EFI_FILE **Root
- );
-
-/**
- Open a file on the host system by means of the semihosting interface.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is
- the file handle to source location.
- @param[out] NewHandle A pointer to the location to return the opened
- handle for the new file.
- @param[in] FileName The Null-terminated string of the name of the file
- to be opened.
- @param[in] OpenMode The mode to open the file : Read or Read/Write or
- Read/Write/Create
- @param[in] Attributes Only valid for EFI_FILE_MODE_CREATE, in which case these
- are the attribute bits for the newly created file. The
- mnemonics of the attribute bits are : EFI_FILE_READ_ONLY,
- EFI_FILE_HIDDEN, EFI_FILE_SYSTEM, EFI_FILE_RESERVED,
- EFI_FILE_DIRECTORY and EFI_FILE_ARCHIVE.
-
- @retval EFI_SUCCESS The file was open.
- @retval EFI_NOT_FOUND The specified file could not be found.
- @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
- @retval EFI_WRITE_PROTECTED Attempt to create a directory. This is not possible
- with the semi-hosting interface.
- @retval EFI_OUT_OF_RESOURCES Not enough resources were available to open the file.
- @retval EFI_INVALID_PARAMETER At least one of the parameters is invalid.
-
-**/
-EFI_STATUS
-FileOpen (
- IN EFI_FILE *This,
- OUT EFI_FILE **NewHandle,
- IN CHAR16 *FileName,
- IN UINT64 OpenMode,
- IN UINT64 Attributes
- );
-
-/**
- Close a specified file handle.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is the file
- handle to close.
-
- @retval EFI_SUCCESS The file was closed.
- @retval EFI_INVALID_PARAMETER The parameter "This" is NULL.
-
-**/
-EFI_STATUS
-FileClose (
- IN EFI_FILE *This
- );
-
-/**
- Close and delete a file.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is the file
- handle to delete.
-
- @retval EFI_SUCCESS The file was closed and deleted.
- @retval EFI_WARN_DELETE_FAILURE The handle was closed, but the file was not deleted.
- @retval EFI_INVALID_PARAMETER The parameter "This" is NULL.
-
-**/
-EFI_STATUS
-FileDelete (
- IN EFI_FILE *This
- );
-
-/**
- Read data from an open file.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
- is the file handle to read data from.
- @param[in out] BufferSize On input, the size of the Buffer. On output, the
- amount of data returned in Buffer. In both cases,
- the size is measured in bytes.
- @param[out] Buffer The buffer into which the data is read.
-
- @retval EFI_SUCCESS The data was read.
- @retval EFI_DEVICE_ERROR On entry, the current file position is
- beyond the end of the file, or the semi-hosting
- interface reported an error while performing the
- read operation.
- @retval EFI_INVALID_PARAMETER The parameter "This" or the parameter "Buffer"
- is NULL.
-**/
-EFI_STATUS
-FileRead (
- IN EFI_FILE *This,
- IN OUT UINTN *BufferSize,
- OUT VOID *Buffer
- );
-
-/**
- Write data to an open file.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
- is the file handle to write data to.
- @param[in out] BufferSize On input, the size of the Buffer. On output, the
- size of the data actually written. In both cases,
- the size is measured in bytes.
- @param[in] Buffer The buffer of data to write.
-
- @retval EFI_SUCCESS The data was written.
- @retval EFI_ACCESS_DENIED Attempt to write into a read only file or
- in a file opened in read only mode.
- @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
- @retval EFI_INVALID_PARAMETER The parameter "This" or the parameter "Buffer"
- is NULL.
-
-**/
-EFI_STATUS
-FileWrite (
- IN EFI_FILE *This,
- IN OUT UINTN *BufferSize,
- IN VOID *Buffer
- );
-
-/**
- Return a file's current position.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is
- the file handle to get the current position on.
- @param[out] Position The address to return the file's current position value.
-
- @retval EFI_SUCCESS The position was returned.
- @retval EFI_INVALID_PARAMETER Position is a NULL pointer.
-
-**/
-EFI_STATUS
-FileGetPosition (
- IN EFI_FILE *File,
- OUT UINT64 *Position
- );
-
-/**
- Set a file's current position.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is
- the file handle to set the requested position on.
- @param[in] Position The byte position from the start of the file to set.
-
- @retval EFI_SUCCESS The position was set.
- @retval EFI_DEVICE_ERROR The semi-hosting positionning operation failed.
- @retval EFI_UNSUPPORTED The seek request for nonzero is not valid on open
- directories.
-
-**/
-EFI_STATUS
-FileSetPosition (
- IN EFI_FILE *File,
- IN UINT64 Position
- );
-
-/**
- Return information about a file or a file system.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
- is the file handle the requested information is for.
- @param[in] InformationType The type identifier for the information being requested :
- EFI_FILE_INFO_ID or EFI_FILE_SYSTEM_INFO_ID or
- EFI_FILE_SYSTEM_VOLUME_LABEL_ID
- @param[in out] BufferSize The size, in bytes, of Buffer.
- @param[out] Buffer A pointer to the data buffer to return. The type of the
- data inside the buffer is indicated by InformationType.
-
- @retval EFI_SUCCESS The information was returned.
- @retval EFI_UNSUPPORTED The InformationType is not known.
- @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to return the information.
- BufferSize has been updated with the size needed to
- complete the request.
- @retval EFI_INVALID_PARAMETER The parameter "This" or the parameter "Buffer"
- is NULL.
-
-**/
-EFI_STATUS
-FileGetInfo (
- IN EFI_FILE *This,
- IN EFI_GUID *InformationType,
- IN OUT UINTN *BufferSize,
- OUT VOID *Buffer
- );
-
-/**
- Set information about a file or a file system.
-
- @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
- is the file handle the information is for.
- @param[in] InformationType The type identifier for the information being set :
- EFI_FILE_INFO_ID or EFI_FILE_SYSTEM_INFO_ID or
- EFI_FILE_SYSTEM_VOLUME_LABEL_ID
- @param[in] BufferSize The size, in bytes, of Buffer.
- @param[in] Buffer A pointer to the data buffer to write. The type of the
- data inside the buffer is indicated by InformationType.
-
- @retval EFI_SUCCESS The information was set.
- @retval EFI_UNSUPPORTED The InformationType is not known.
- @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
- @retval EFI_ACCESS_DENIED An attempt is being made to change the
- EFI_FILE_DIRECTORY Attribute.
- @retval EFI_ACCESS_DENIED InformationType is EFI_FILE_INFO_ID and
- the file is a read-only file or has been
- opened in read-only mode and an attempt is
- being made to modify a field other than
- Attribute.
- @retval EFI_ACCESS_DENIED An attempt is made to change the name of a file
- to a file that is already present.
- @retval EFI_WRITE_PROTECTED An attempt is being made to modify a
- read-only attribute.
- @retval EFI_BAD_BUFFER_SIZE The size of the buffer is lower than that indicated by
- the data inside the buffer.
- @retval EFI_OUT_OF_RESOURCES An allocation needed to process the request failed.
- @retval EFI_INVALID_PARAMETER At least one of the parameters is invalid.
-
-**/
-EFI_STATUS
-FileSetInfo (
- IN EFI_FILE *This,
- IN EFI_GUID *InformationType,
- IN UINTN BufferSize,
- IN VOID *Buffer
- );
-
-EFI_STATUS
-FileFlush (
- IN EFI_FILE *File
- );
-
-#endif // __SEMIHOST_FS_H__
-
diff --git a/ArmPkg/Filesystem/SemihostFs/SemihostFs.inf b/ArmPkg/Filesystem/SemihostFs/SemihostFs.inf deleted file mode 100644 index 164df2d85e..0000000000 --- a/ArmPkg/Filesystem/SemihostFs/SemihostFs.inf +++ /dev/null @@ -1,48 +0,0 @@ -#/** @file
-# Support a Semi Host file system over a debuggers JTAG
-#
-# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
-# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = SemihostFs
- FILE_GUID = C5B9C74A-6D72-4719-99AB-C59F199091EB
- MODULE_TYPE = UEFI_DRIVER
- VERSION_STRING = 1.0
-
- ENTRY_POINT = SemihostFsEntryPoint
-
-[Sources.ARM, Sources.AARCH64]
- Arm/SemihostFs.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- BaseLib
- MemoryAllocationLib
- SemihostLib
- UefiDriverEntryPoint
- UefiLib
-
-[Guids]
- gEfiFileSystemInfoGuid
- gEfiFileInfoGuid
- gEfiFileSystemVolumeLabelInfoIdGuid
-
-[Protocols]
- gEfiSimpleFileSystemProtocolGuid
- gEfiDevicePathProtocolGuid
-
diff --git a/ArmPkg/Include/AsmMacroExport.inc b/ArmPkg/Include/AsmMacroExport.inc deleted file mode 100644 index 818d6b2c22..0000000000 --- a/ArmPkg/Include/AsmMacroExport.inc +++ /dev/null @@ -1,29 +0,0 @@ -;%HEADER%
-;/** @file
-; Macros to centralize the EXPORT, AREA, and definition of an assembly
-; function. The AREA prefix is required to put the function in its own
-; section so that removal of unused functions in the final link is performed.
-; This provides equivalent functionality to the compiler's --split-sections
-; option.
-;
-; Copyright (c) 2015 HP Development Company, L.P.
-;
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;**/
-
-
- MACRO
- RVCT_ASM_EXPORT $func
- EXPORT $func
- AREA s_$func, CODE, READONLY
-$func
- MEND
-
- END
diff --git a/ArmPkg/Include/AsmMacroIoLib.h b/ArmPkg/Include/AsmMacroIoLib.h deleted file mode 100644 index 16d2a30729..0000000000 --- a/ArmPkg/Include/AsmMacroIoLib.h +++ /dev/null @@ -1,45 +0,0 @@ -/** @file
- Macros to work around lack of Apple support for LDR register, =expr
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
- Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-
-#ifndef __MACRO_IO_LIB_H__
-#define __MACRO_IO_LIB_H__
-
-#define _ASM_FUNC(Name, Section) \
- .global Name ; \
- .section #Section, "ax" ; \
- .type Name, %function ; \
- .p2align 2 ; \
- Name:
-
-#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)
-
-#define MOV32(Reg, Val) \
- movw Reg, #(Val) & 0xffff ; \
- movt Reg, #(Val) >> 16
-
-#define ADRL(Reg, Sym) \
- movw Reg, #:lower16:(Sym) - (. + 16) ; \
- movt Reg, #:upper16:(Sym) - (. + 12) ; \
- add Reg, Reg, pc
-
-#define LDRL(Reg, Sym) \
- movw Reg, #:lower16:(Sym) - (. + 16) ; \
- movt Reg, #:upper16:(Sym) - (. + 12) ; \
- ldr Reg, [pc, Reg]
-
-#endif
diff --git a/ArmPkg/Include/AsmMacroIoLib.inc b/ArmPkg/Include/AsmMacroIoLib.inc deleted file mode 100644 index ce7a1488da..0000000000 --- a/ArmPkg/Include/AsmMacroIoLib.inc +++ /dev/null @@ -1,39 +0,0 @@ -;%HEADER%
-;/** @file
-; Macros to work around lack of Apple support for LDR register, =expr
-;
-; Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
-; Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-;
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;**/
-
-
- MACRO
- adrll $Reg, $Symbol
- add $Reg, pc, #-8
- RELOC R_ARM_ALU_PC_G0_NC, $Symbol
- add $Reg, $Reg, #-4
- RELOC R_ARM_ALU_PC_G1_NC, $Symbol
- add $Reg, $Reg, #0
- RELOC R_ARM_ALU_PC_G2, $Symbol
- MEND
-
- MACRO
- ldrl $Reg, $Symbol
- add $Reg, pc, #-8
- RELOC R_ARM_ALU_PC_G0_NC, $Symbol
- add $Reg, $Reg, #-4
- RELOC R_ARM_ALU_PC_G1_NC, $Symbol
- ldr $Reg, [$Reg, #0]
- RELOC R_ARM_LDR_PC_G2, $Symbol
- MEND
-
- END
diff --git a/ArmPkg/Include/AsmMacroIoLibV8.h b/ArmPkg/Include/AsmMacroIoLibV8.h deleted file mode 100644 index db43d3b52e..0000000000 --- a/ArmPkg/Include/AsmMacroIoLibV8.h +++ /dev/null @@ -1,63 +0,0 @@ -/** @file
- Macros to work around lack of Clang support for LDR register, =expr
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
- Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-
-#ifndef __MACRO_IO_LIBV8_H__
-#define __MACRO_IO_LIBV8_H__
-
-// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
-// This only selects between EL1 and EL2, else we die.
-// Provide the Macro with a safe temp xreg to use.
-#define EL1_OR_EL2(SAFE_XREG) \
- mrs SAFE_XREG, CurrentEL ;\
- cmp SAFE_XREG, #0x8 ;\
- b.gt . ;\
- b.eq 2f ;\
- cbnz SAFE_XREG, 1f ;\
- b . ;// We should never get here
-
-
-// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
-// This only selects between EL1 and EL2 and EL3, else we die.
-// Provide the Macro with a safe temp xreg to use.
-#define EL1_OR_EL2_OR_EL3(SAFE_XREG) \
- mrs SAFE_XREG, CurrentEL ;\
- cmp SAFE_XREG, #0x8 ;\
- b.gt 3f ;\
- b.eq 2f ;\
- cbnz SAFE_XREG, 1f ;\
- b . ;// We should never get here
-
-#define _ASM_FUNC(Name, Section) \
- .global Name ; \
- .section #Section, "ax" ; \
- .type Name, %function ; \
- Name:
-
-#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)
-
-#define MOV32(Reg, Val) \
- movz Reg, (Val) >> 16, lsl #16 ; \
- movk Reg, (Val) & 0xffff
-
-#define MOV64(Reg, Val) \
- movz Reg, (Val) >> 48, lsl #48 ; \
- movk Reg, ((Val) >> 32) & 0xffff, lsl #32 ; \
- movk Reg, ((Val) >> 16) & 0xffff, lsl #16 ; \
- movk Reg, (Val) & 0xffff
-
-#endif // __MACRO_IO_LIBV8_H__
diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h deleted file mode 100644 index cebfc5da42..0000000000 --- a/ArmPkg/Include/Chipset/AArch64.h +++ /dev/null @@ -1,238 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011 - 2015, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __AARCH64_H__
-#define __AARCH64_H__
-
-#include <Chipset/AArch64Mmu.h>
-
-// ARM Interrupt ID in Exception Table
-#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_AARCH64_IRQ
-
-// CPACR - Coprocessor Access Control Register definitions
-#define CPACR_TTA_EN (1UL << 28)
-#define CPACR_FPEN_EL1 (1UL << 20)
-#define CPACR_FPEN_FULL (3UL << 20)
-#define CPACR_CP_FULL_ACCESS 0x300000
-
-// Coprocessor Trap Register (CPTR)
-#define AARCH64_CPTR_TFP (1 << 10)
-
-// ID_AA64PFR0 - AArch64 Processor Feature Register 0 definitions
-#define AARCH64_PFR0_FP (0xF << 16)
-#define AARCH64_PFR0_GIC (0xF << 24)
-
-// SCR - Secure Configuration Register definitions
-#define SCR_NS (1 << 0)
-#define SCR_IRQ (1 << 1)
-#define SCR_FIQ (1 << 2)
-#define SCR_EA (1 << 3)
-#define SCR_FW (1 << 4)
-#define SCR_AW (1 << 5)
-
-// MIDR - Main ID Register definitions
-#define ARM_CPU_TYPE_SHIFT 4
-#define ARM_CPU_TYPE_MASK 0xFFF
-#define ARM_CPU_TYPE_AEMv8 0xD0F
-#define ARM_CPU_TYPE_A53 0xD03
-#define ARM_CPU_TYPE_A57 0xD07
-#define ARM_CPU_TYPE_A72 0xD08
-#define ARM_CPU_TYPE_A15 0xC0F
-#define ARM_CPU_TYPE_A9 0xC09
-#define ARM_CPU_TYPE_A7 0xC07
-#define ARM_CPU_TYPE_A5 0xC05
-
-#define ARM_CPU_REV_MASK ((0xF << 20) | (0xF) )
-#define ARM_CPU_REV(rn, pn) ((((rn) & 0xF) << 20) | ((pn) & 0xF))
-
-// Hypervisor Configuration Register
-#define ARM_HCR_FMO BIT3
-#define ARM_HCR_IMO BIT4
-#define ARM_HCR_AMO BIT5
-#define ARM_HCR_TSC BIT19
-#define ARM_HCR_TGE BIT27
-
-// Exception Syndrome Register
-#define AARCH64_ESR_EC(Ecr) ((0x3F << 26) & (Ecr))
-#define AARCH64_ESR_ISS(Ecr) ((0x1FFFFFF) & (Ecr))
-
-#define AARCH64_ESR_EC_SMC32 (0x13 << 26)
-#define AARCH64_ESR_EC_SMC64 (0x17 << 26)
-
-// AArch64 Exception Level
-#define AARCH64_EL3 0xC
-#define AARCH64_EL2 0x8
-#define AARCH64_EL1 0x4
-
-// Saved Program Status Register definitions
-#define SPSR_A BIT8
-#define SPSR_I BIT7
-#define SPSR_F BIT6
-
-#define SPSR_AARCH32 BIT4
-
-#define SPSR_AARCH32_MODE_USER 0x0
-#define SPSR_AARCH32_MODE_FIQ 0x1
-#define SPSR_AARCH32_MODE_IRQ 0x2
-#define SPSR_AARCH32_MODE_SVC 0x3
-#define SPSR_AARCH32_MODE_ABORT 0x7
-#define SPSR_AARCH32_MODE_UNDEF 0xB
-#define SPSR_AARCH32_MODE_SYS 0xF
-
-// Counter-timer Hypervisor Control register definitions
-#define CNTHCTL_EL2_EL1PCTEN BIT0
-#define CNTHCTL_EL2_EL1PCEN BIT1
-
-#define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 11)-1)
-
-// Vector table offset definitions
-#define ARM_VECTOR_CUR_SP0_SYNC 0x000
-#define ARM_VECTOR_CUR_SP0_IRQ 0x080
-#define ARM_VECTOR_CUR_SP0_FIQ 0x100
-#define ARM_VECTOR_CUR_SP0_SERR 0x180
-
-#define ARM_VECTOR_CUR_SPx_SYNC 0x200
-#define ARM_VECTOR_CUR_SPx_IRQ 0x280
-#define ARM_VECTOR_CUR_SPx_FIQ 0x300
-#define ARM_VECTOR_CUR_SPx_SERR 0x380
-
-#define ARM_VECTOR_LOW_A64_SYNC 0x400
-#define ARM_VECTOR_LOW_A64_IRQ 0x480
-#define ARM_VECTOR_LOW_A64_FIQ 0x500
-#define ARM_VECTOR_LOW_A64_SERR 0x580
-
-#define ARM_VECTOR_LOW_A32_SYNC 0x600
-#define ARM_VECTOR_LOW_A32_IRQ 0x680
-#define ARM_VECTOR_LOW_A32_FIQ 0x700
-#define ARM_VECTOR_LOW_A32_SERR 0x780
-
-#define VECTOR_BASE(tbl) \
- .section .text.##tbl##,"ax"; \
- .align 11; \
- .org 0x0; \
- GCC_ASM_EXPORT(tbl); \
- ASM_PFX(tbl): \
-
-#define VECTOR_ENTRY(tbl, off) \
- .org off
-
-#define VECTOR_END(tbl) \
- .org 0x800; \
- .previous
-
-VOID
-EFIAPI
-ArmEnableSWPInstruction (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmReadCbar (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmReadTpidrurw (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteTpidrurw (
- UINTN Value
- );
-
-UINTN
-EFIAPI
-ArmGetTCR (
- VOID
- );
-
-VOID
-EFIAPI
-ArmSetTCR (
- UINTN Value
- );
-
-UINTN
-EFIAPI
-ArmGetMAIR (
- VOID
- );
-
-VOID
-EFIAPI
-ArmSetMAIR (
- UINTN Value
- );
-
-VOID
-EFIAPI
-ArmDisableAlignmentCheck (
- VOID
- );
-
-VOID
-EFIAPI
-ArmEnableAlignmentCheck (
- VOID
- );
-
-VOID
-EFIAPI
-ArmDisableStackAlignmentCheck (
- VOID
- );
-
-VOID
-EFIAPI
-ArmEnableStackAlignmentCheck (
- VOID
- );
-
-VOID
-EFIAPI
-ArmDisableAllExceptions (
- VOID
- );
-
-VOID
-ArmWriteHcr (
- IN UINTN Hcr
- );
-
-UINTN
-ArmReadHcr (
- VOID
- );
-
-UINTN
-ArmReadCurrentEL (
- VOID
- );
-
-UINT64
-PageAttributeToGcdAttribute (
- IN UINT64 PageAttributes
- );
-
-UINTN
-ArmWriteCptr (
- IN UINT64 Cptr
- );
-
-#endif // __AARCH64_H__
diff --git a/ArmPkg/Include/Chipset/AArch64Mmu.h b/ArmPkg/Include/Chipset/AArch64Mmu.h deleted file mode 100644 index ff77b16b25..0000000000 --- a/ArmPkg/Include/Chipset/AArch64Mmu.h +++ /dev/null @@ -1,204 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __AARCH64_MMU_H_
-#define __AARCH64_MMU_H_
-
-//
-// Memory Attribute Indirection register Definitions
-//
-#define MAIR_ATTR_DEVICE_MEMORY 0x0ULL
-#define MAIR_ATTR_NORMAL_MEMORY_NON_CACHEABLE 0x44ULL
-#define MAIR_ATTR_NORMAL_MEMORY_WRITE_THROUGH 0xBBULL
-#define MAIR_ATTR_NORMAL_MEMORY_WRITE_BACK 0xFFULL
-
-#define MAIR_ATTR(n,value) ((value) << (((n) >> 2)*8))
-
-//
-// Long-descriptor Translation Table format
-//
-
-// Return the smallest offset from the table level.
-// The first offset starts at 12bit. There are 4 levels of 9-bit address range from level 3 to level 0
-#define TT_ADDRESS_OFFSET_AT_LEVEL(TableLevel) (12 + ((3 - (TableLevel)) * 9))
-
-#define TT_BLOCK_ENTRY_SIZE_AT_LEVEL(Level) (1ULL << TT_ADDRESS_OFFSET_AT_LEVEL(Level))
-
-// Get the associated entry in the given Translation Table
-#define TT_GET_ENTRY_FOR_ADDRESS(TranslationTable, Level, Address) \
- ((UINTN)(TranslationTable) + ((((UINTN)(Address) >> TT_ADDRESS_OFFSET_AT_LEVEL(Level)) & (BIT9-1)) * sizeof(UINT64)))
-
-// Return the smallest address granularity from the table level.
-// The first offset starts at 12bit. There are 4 levels of 9-bit address range from level 3 to level 0
-#define TT_ADDRESS_AT_LEVEL(TableLevel) (1ULL << TT_ADDRESS_OFFSET_AT_LEVEL(TableLevel))
-
-#define TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount) \
- ((UINT64*)((EFI_PHYSICAL_ADDRESS)(TranslationTable) + (((EntryCount) - 1) * sizeof(UINT64))))
-
-// There are 512 entries per table when 4K Granularity
-#define TT_ENTRY_COUNT 512
-#define TT_ALIGNMENT_BLOCK_ENTRY BIT12
-#define TT_ALIGNMENT_DESCRIPTION_TABLE BIT12
-
-#define TT_ADDRESS_MASK_BLOCK_ENTRY (0xFFFFFFFFFULL << 12)
-#define TT_ADDRESS_MASK_DESCRIPTION_TABLE (0xFFFFFFFFFULL << 12)
-
-#define TT_TYPE_MASK 0x3
-#define TT_TYPE_TABLE_ENTRY 0x3
-#define TT_TYPE_BLOCK_ENTRY 0x1
-#define TT_TYPE_BLOCK_ENTRY_LEVEL3 0x3
-
-#define TT_ATTR_INDX_MASK (0x7 << 2)
-#define TT_ATTR_INDX_DEVICE_MEMORY (0x0 << 2)
-#define TT_ATTR_INDX_MEMORY_NON_CACHEABLE (0x1 << 2)
-#define TT_ATTR_INDX_MEMORY_WRITE_THROUGH (0x2 << 2)
-#define TT_ATTR_INDX_MEMORY_WRITE_BACK (0x3 << 2)
-
-#define TT_AP_MASK (0x3UL << 6)
-#define TT_AP_NO_RW (0x0UL << 6)
-#define TT_AP_RW_RW (0x1UL << 6)
-#define TT_AP_NO_RO (0x2UL << 6)
-#define TT_AP_RO_RO (0x3UL << 6)
-
-#define TT_NS BIT5
-#define TT_AF BIT10
-
-#define TT_SH_NON_SHAREABLE (0x0 << 8)
-#define TT_SH_OUTER_SHAREABLE (0x2 << 8)
-#define TT_SH_INNER_SHAREABLE (0x3 << 8)
-#define TT_SH_MASK (0x3 << 8)
-
-#define TT_PXN_MASK BIT53
-#define TT_UXN_MASK BIT54 // EL1&0
-#define TT_XN_MASK BIT54 // EL2 / EL3
-
-#define TT_ATTRIBUTES_MASK ((0xFFFULL << 52) | (0x3FFULL << 2))
-
-#define TT_TABLE_PXN BIT59
-#define TT_TABLE_UXN BIT60 // EL1&0
-#define TT_TABLE_XN BIT60 // EL2 / EL3
-#define TT_TABLE_NS BIT63
-
-#define TT_TABLE_AP_MASK (BIT62 | BIT61)
-#define TT_TABLE_AP_NO_PERMISSION (0x0ULL << 61)
-#define TT_TABLE_AP_EL0_NO_ACCESS (0x1ULL << 61)
-#define TT_TABLE_AP_NO_WRITE_ACCESS (0x2ULL << 61)
-
-//
-// Translation Control Register
-//
-#define TCR_T0SZ_MASK 0x3FUL
-
-#define TCR_PS_4GB (0UL << 16)
-#define TCR_PS_64GB (1UL << 16)
-#define TCR_PS_1TB (2UL << 16)
-#define TCR_PS_4TB (3UL << 16)
-#define TCR_PS_16TB (4UL << 16)
-#define TCR_PS_256TB (5UL << 16)
-
-#define TCR_TG0_4KB (0UL << 14)
-#define TCR_TG1_4KB (2UL << 30)
-
-#define TCR_IPS_4GB (0ULL << 32)
-#define TCR_IPS_64GB (1ULL << 32)
-#define TCR_IPS_1TB (2ULL << 32)
-#define TCR_IPS_4TB (3ULL << 32)
-#define TCR_IPS_16TB (4ULL << 32)
-#define TCR_IPS_256TB (5ULL << 32)
-
-#define TCR_EPD1 (1UL << 23)
-
-#define TTBR_ASID_FIELD (48)
-#define TTBR_ASID_MASK (0xFF << TTBR_ASID_FIELD)
-#define TTBR_BADDR_MASK (0xFFFFFFFFFFFF ) // The width of this field depends on the values in TxSZ. Addr occupies bottom 48bits
-
-#define TCR_EL1_T0SZ_FIELD (0)
-#define TCR_EL1_EPD0_FIELD (7)
-#define TCR_EL1_IRGN0_FIELD (8)
-#define TCR_EL1_ORGN0_FIELD (10)
-#define TCR_EL1_SH0_FIELD (12)
-#define TCR_EL1_TG0_FIELD (14)
-#define TCR_EL1_T1SZ_FIELD (16)
-#define TCR_EL1_A1_FIELD (22)
-#define TCR_EL1_EPD1_FIELD (23)
-#define TCR_EL1_IRGN1_FIELD (24)
-#define TCR_EL1_ORGN1_FIELD (26)
-#define TCR_EL1_SH1_FIELD (28)
-#define TCR_EL1_TG1_FIELD (30)
-#define TCR_EL1_IPS_FIELD (32)
-#define TCR_EL1_AS_FIELD (36)
-#define TCR_EL1_TBI0_FIELD (37)
-#define TCR_EL1_TBI1_FIELD (38)
-#define TCR_EL1_T0SZ_MASK (0x1FUL << TCR_EL1_T0SZ_FIELD)
-#define TCR_EL1_EPD0_MASK (0x01UL << TCR_EL1_EPD0_FIELD)
-#define TCR_EL1_IRGN0_MASK (0x03UL << TCR_EL1_IRGN0_FIELD)
-#define TCR_EL1_ORGN0_MASK (0x03UL << TCR_EL1_ORGN0_FIELD)
-#define TCR_EL1_SH0_MASK (0x03UL << TCR_EL1_SH0_FIELD)
-#define TCR_EL1_TG0_MASK (0x01UL << TCR_EL1_TG0_FIELD)
-#define TCR_EL1_T1SZ_MASK (0x1FUL << TCR_EL1_T1SZ_FIELD)
-#define TCR_EL1_A1_MASK (0x01UL << TCR_EL1_A1_FIELD)
-#define TCR_EL1_EPD1_MASK (0x01UL << TCR_EL1_EPD1_FIELD)
-#define TCR_EL1_IRGN1_MASK (0x03UL << TCR_EL1_IRGN1_FIELD)
-#define TCR_EL1_ORGN1_MASK (0x03UL << TCR_EL1_ORGN1_FIELD)
-#define TCR_EL1_SH1_MASK (0x03UL << TCR_EL1_SH1_FIELD)
-#define TCR_EL1_TG1_MASK (0x01UL << TCR_EL1_TG1_FIELD)
-#define TCR_EL1_IPS_MASK (0x07UL << TCR_EL1_IPS_FIELD)
-#define TCR_EL1_AS_MASK (0x01UL << TCR_EL1_AS_FIELD)
-#define TCR_EL1_TBI0_MASK (0x01UL << TCR_EL1_TBI0_FIELD)
-#define TCR_EL1_TBI1_MASK (0x01UL << TCR_EL1_TBI1_FIELD)
-
-
-#define TCR_EL23_T0SZ_FIELD (0)
-#define TCR_EL23_IRGN0_FIELD (8)
-#define TCR_EL23_ORGN0_FIELD (10)
-#define TCR_EL23_SH0_FIELD (12)
-#define TCR_EL23_TG0_FIELD (14)
-#define TCR_EL23_PS_FIELD (16)
-#define TCR_EL23_T0SZ_MASK (0x1FUL << TCR_EL23_T0SZ_FIELD)
-#define TCR_EL23_IRGN0_MASK (0x03UL << TCR_EL23_IRGN0_FIELD)
-#define TCR_EL23_ORGN0_MASK (0x03UL << TCR_EL23_ORGN0_FIELD)
-#define TCR_EL23_SH0_MASK (0x03UL << TCR_EL23_SH0_FIELD)
-#define TCR_EL23_TG0_MASK (0x01UL << TCR_EL23_TG0_FIELD)
-#define TCR_EL23_PS_MASK (0x07UL << TCR_EL23_PS_FIELD)
-
-
-#define TCR_RGN_OUTER_NON_CACHEABLE (0x0UL << 10)
-#define TCR_RGN_OUTER_WRITE_BACK_ALLOC (0x1UL << 10)
-#define TCR_RGN_OUTER_WRITE_THROUGH (0x2UL << 10)
-#define TCR_RGN_OUTER_WRITE_BACK_NO_ALLOC (0x3UL << 10)
-
-#define TCR_RGN_INNER_NON_CACHEABLE (0x0UL << 8)
-#define TCR_RGN_INNER_WRITE_BACK_ALLOC (0x1UL << 8)
-#define TCR_RGN_INNER_WRITE_THROUGH (0x2UL << 8)
-#define TCR_RGN_INNER_WRITE_BACK_NO_ALLOC (0x3UL << 8)
-
-#define TCR_SH_NON_SHAREABLE (0x0UL << 12)
-#define TCR_SH_OUTER_SHAREABLE (0x2UL << 12)
-#define TCR_SH_INNER_SHAREABLE (0x3UL << 12)
-
-#define TCR_PASZ_32BITS_4GB (0x0UL)
-#define TCR_PASZ_36BITS_64GB (0x1UL)
-#define TCR_PASZ_40BITS_1TB (0x2UL)
-#define TCR_PASZ_42BITS_4TB (0x3UL)
-#define TCR_PASZ_44BITS_16TB (0x4UL)
-#define TCR_PASZ_48BITS_256TB (0x5UL)
-
-// The value written to the T*SZ fields are defined as 2^(64-T*SZ). So a 39Bit
-// Virtual address range for 512GB of virtual space sets T*SZ to 25
-#define INPUT_ADDRESS_SIZE_TO_TxSZ(a) (64 - a)
-
-// Uses LPAE Page Table format
-
-#endif // __AARCH64_MMU_H_
-
diff --git a/ArmPkg/Include/Chipset/ArmCortexA5x.h b/ArmPkg/Include/Chipset/ArmCortexA5x.h deleted file mode 100644 index ba3d5197e9..0000000000 --- a/ArmPkg/Include/Chipset/ArmCortexA5x.h +++ /dev/null @@ -1,50 +0,0 @@ -/** @file
-
- Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __ARM_CORTEX_A5x_H__
-#define __ARM_CORTEX_A5x_H__
-
-//
-// Cortex A5x feature bit definitions
-//
-#define A5X_FEATURE_SMP (1 << 6)
-
-//
-// Helper functions to access CPU Extended Control Register
-//
-UINT64
-EFIAPI
-ArmReadCpuExCr (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteCpuExCr (
- IN UINT64 Val
- );
-
-VOID
-EFIAPI
-ArmSetCpuExCrBit (
- IN UINT64 Bits
- );
-
-VOID
-EFIAPI
-ArmUnsetCpuExCrBit (
- IN UINT64 Bits
- );
-
-#endif
diff --git a/ArmPkg/Include/Chipset/ArmCortexA9.h b/ArmPkg/Include/Chipset/ArmCortexA9.h deleted file mode 100644 index af9a300714..0000000000 --- a/ArmPkg/Include/Chipset/ArmCortexA9.h +++ /dev/null @@ -1,65 +0,0 @@ -/** @file
-
- Copyright (c) 2011, ARM Limited. All rights reserved.
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __ARM_CORTEX_A9_H__
-#define __ARM_CORTEX_A9_H__
-
-#include <Chipset/ArmV7.h>
-
-//
-// Cortex A9 feature bit definitions
-//
-#define A9_FEATURE_PARITY (1<<9)
-#define A9_FEATURE_AOW (1<<8)
-#define A9_FEATURE_EXCL (1<<7)
-#define A9_FEATURE_SMP (1<<6)
-#define A9_FEATURE_FOZ (1<<3)
-#define A9_FEATURE_DPREF (1<<2)
-#define A9_FEATURE_HINT (1<<1)
-#define A9_FEATURE_FWD (1<<0)
-
-//
-// Cortex A9 Watchdog
-//
-#define ARM_A9_WATCHDOG_REGION 0x600
-
-#define ARM_A9_WATCHDOG_LOAD_REGISTER 0x20
-#define ARM_A9_WATCHDOG_CONTROL_REGISTER 0x28
-
-#define ARM_A9_WATCHDOG_WATCHDOG_MODE (1 << 3)
-#define ARM_A9_WATCHDOG_TIMER_MODE (0 << 3)
-#define ARM_A9_WATCHDOG_SINGLE_SHOT (0 << 1)
-#define ARM_A9_WATCHDOG_AUTORELOAD (1 << 1)
-#define ARM_A9_WATCHDOG_ENABLE 1
-
-//
-// SCU register offsets & masks
-//
-#define A9_SCU_CONTROL_OFFSET 0x0
-#define A9_SCU_CONFIG_OFFSET 0x4
-#define A9_SCU_INVALL_OFFSET 0xC
-#define A9_SCU_FILT_START_OFFSET 0x40
-#define A9_SCU_FILT_END_OFFSET 0x44
-#define A9_SCU_SACR_OFFSET 0x50
-#define A9_SCU_SSACR_OFFSET 0x54
-
-
-UINTN
-EFIAPI
-ArmGetScuBaseAddress (
- VOID
- );
-
-#endif
-
diff --git a/ArmPkg/Include/Chipset/ArmV7.h b/ArmPkg/Include/Chipset/ArmV7.h deleted file mode 100644 index ee4ac4374b..0000000000 --- a/ArmPkg/Include/Chipset/ArmV7.h +++ /dev/null @@ -1,129 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011-2015, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __ARM_V7_H__
-#define __ARM_V7_H__
-
-#include <Chipset/ArmV7Mmu.h>
-
-// ARM Interrupt ID in Exception Table
-#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_ARM_IRQ
-
-// ID_PFR1 - ARM Processor Feature Register 1 definitions
-#define ARM_PFR1_SEC (0xFUL << 4)
-#define ARM_PFR1_TIMER (0xFUL << 16)
-#define ARM_PFR1_GIC (0xFUL << 28)
-
-// Domain Access Control Register
-#define DOMAIN_ACCESS_CONTROL_MASK(a) (3UL << (2 * (a)))
-#define DOMAIN_ACCESS_CONTROL_NONE(a) (0UL << (2 * (a)))
-#define DOMAIN_ACCESS_CONTROL_CLIENT(a) (1UL << (2 * (a)))
-#define DOMAIN_ACCESS_CONTROL_RESERVED(a) (2UL << (2 * (a)))
-#define DOMAIN_ACCESS_CONTROL_MANAGER(a) (3UL << (2 * (a)))
-
-// CPSR - Coprocessor Status Register definitions
-#define CPSR_MODE_USER 0x10
-#define CPSR_MODE_FIQ 0x11
-#define CPSR_MODE_IRQ 0x12
-#define CPSR_MODE_SVC 0x13
-#define CPSR_MODE_ABORT 0x17
-#define CPSR_MODE_HYP 0x1A
-#define CPSR_MODE_UNDEFINED 0x1B
-#define CPSR_MODE_SYSTEM 0x1F
-#define CPSR_MODE_MASK 0x1F
-#define CPSR_ASYNC_ABORT (1 << 8)
-#define CPSR_IRQ (1 << 7)
-#define CPSR_FIQ (1 << 6)
-
-
-// CPACR - Coprocessor Access Control Register definitions
-#define CPACR_CP_DENIED(cp) 0x00
-#define CPACR_CP_PRIV(cp) ((0x1 << ((cp) << 1)) & 0x0FFFFFFF)
-#define CPACR_CP_FULL(cp) ((0x3 << ((cp) << 1)) & 0x0FFFFFFF)
-#define CPACR_ASEDIS (1 << 31)
-#define CPACR_D32DIS (1 << 30)
-#define CPACR_CP_FULL_ACCESS 0x0FFFFFFF
-
-// NSACR - Non-Secure Access Control Register definitions
-#define NSACR_CP(cp) ((1 << (cp)) & 0x3FFF)
-#define NSACR_NSD32DIS (1 << 14)
-#define NSACR_NSASEDIS (1 << 15)
-#define NSACR_PLE (1 << 16)
-#define NSACR_TL (1 << 17)
-#define NSACR_NS_SMP (1 << 18)
-#define NSACR_RFR (1 << 19)
-
-// SCR - Secure Configuration Register definitions
-#define SCR_NS (1 << 0)
-#define SCR_IRQ (1 << 1)
-#define SCR_FIQ (1 << 2)
-#define SCR_EA (1 << 3)
-#define SCR_FW (1 << 4)
-#define SCR_AW (1 << 5)
-
-// MIDR - Main ID Register definitions
-#define ARM_CPU_TYPE_SHIFT 4
-#define ARM_CPU_TYPE_MASK 0xFFF
-#define ARM_CPU_TYPE_AEMv8 0xD0F
-#define ARM_CPU_TYPE_A53 0xD03
-#define ARM_CPU_TYPE_A57 0xD07
-#define ARM_CPU_TYPE_A15 0xC0F
-#define ARM_CPU_TYPE_A12 0xC0D
-#define ARM_CPU_TYPE_A9 0xC09
-#define ARM_CPU_TYPE_A7 0xC07
-#define ARM_CPU_TYPE_A5 0xC05
-
-#define ARM_CPU_REV_MASK ((0xF << 20) | (0xF) )
-#define ARM_CPU_REV(rn, pn) ((((rn) & 0xF) << 20) | ((pn) & 0xF))
-
-#define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 5)-1)
-
-VOID
-EFIAPI
-ArmEnableSWPInstruction (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmReadCbar (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmReadTpidrurw (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteTpidrurw (
- UINTN Value
- );
-
-UINT32
-EFIAPI
-ArmReadNsacr (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteNsacr (
- IN UINT32 Nsacr
- );
-
-#endif // __ARM_V7_H__
diff --git a/ArmPkg/Include/Chipset/ArmV7Mmu.h b/ArmPkg/Include/Chipset/ArmV7Mmu.h deleted file mode 100644 index 4d913824b4..0000000000 --- a/ArmPkg/Include/Chipset/ArmV7Mmu.h +++ /dev/null @@ -1,244 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __ARMV7_MMU_H_
-#define __ARMV7_MMU_H_
-
-#define TTBR_NOT_OUTER_SHAREABLE BIT5
-#define TTBR_RGN_OUTER_NON_CACHEABLE 0
-#define TTBR_RGN_OUTER_WRITE_BACK_ALLOC BIT3
-#define TTBR_RGN_OUTER_WRITE_THROUGH BIT4
-#define TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC (BIT3|BIT4)
-#define TTBR_SHAREABLE BIT1
-#define TTBR_NON_SHAREABLE 0
-#define TTBR_INNER_CACHEABLE BIT0
-#define TTBR_INNER_NON_CACHEABLE 0
-#define TTBR_RGN_INNER_NON_CACHEABLE 0
-#define TTBR_RGN_INNER_WRITE_BACK_ALLOC BIT6
-#define TTBR_RGN_INNER_WRITE_THROUGH BIT0
-#define TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC (BIT0|BIT6)
-
-#define TTBR_WRITE_THROUGH ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
-#define TTBR_WRITE_BACK_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
-#define TTBR_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_INNER_NON_CACHEABLE )
-#define TTBR_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
-
-#define TTBR_MP_WRITE_THROUGH ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_RGN_INNER_WRITE_THROUGH | TTBR_SHAREABLE)
-#define TTBR_MP_WRITE_BACK_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC | TTBR_SHAREABLE)
-#define TTBR_MP_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_RGN_INNER_NON_CACHEABLE )
-#define TTBR_MP_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC | TTBR_SHAREABLE)
-
-
-#define TRANSLATION_TABLE_SECTION_COUNT 4096
-#define TRANSLATION_TABLE_SECTION_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
-#define TRANSLATION_TABLE_SECTION_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
-#define TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK (TRANSLATION_TABLE_SECTION_ALIGNMENT - 1)
-
-#define TRANSLATION_TABLE_PAGE_COUNT 256
-#define TRANSLATION_TABLE_PAGE_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)
-#define TRANSLATION_TABLE_PAGE_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)
-#define TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK (TRANSLATION_TABLE_PAGE_ALIGNMENT - 1)
-
-#define TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(table, address) ((UINT32 *)(table) + (((UINTN)(address)) >> 20))
-
-// Translation table descriptor types
-#define TT_DESCRIPTOR_SECTION_TYPE_MASK ((1UL << 18) | (3UL << 0))
-#define TT_DESCRIPTOR_SECTION_TYPE_FAULT (0UL << 0)
-#define TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE (1UL << 0)
-#define TT_DESCRIPTOR_SECTION_TYPE_SECTION ((0UL << 18) | (2UL << 0))
-#define TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION ((1UL << 18) | (2UL << 0))
-#define TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Desc) (((Desc) & 3UL) == TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE)
-
-// Translation table descriptor types
-#define TT_DESCRIPTOR_PAGE_TYPE_MASK (3UL << 0)
-#define TT_DESCRIPTOR_PAGE_TYPE_FAULT (0UL << 0)
-#define TT_DESCRIPTOR_PAGE_TYPE_PAGE (2UL << 0)
-#define TT_DESCRIPTOR_PAGE_TYPE_PAGE_XN (3UL << 0)
-#define TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE (1UL << 0)
-
-// Section descriptor definitions
-#define TT_DESCRIPTOR_SECTION_SIZE (0x00100000)
-
-#define TT_DESCRIPTOR_SECTION_NS_MASK (1UL << 19)
-#define TT_DESCRIPTOR_SECTION_NS (1UL << 19)
-
-#define TT_DESCRIPTOR_SECTION_NG_MASK (1UL << 17)
-#define TT_DESCRIPTOR_SECTION_NG_GLOBAL (0UL << 17)
-#define TT_DESCRIPTOR_SECTION_NG_LOCAL (1UL << 17)
-
-#define TT_DESCRIPTOR_PAGE_NG_MASK (1UL << 11)
-#define TT_DESCRIPTOR_PAGE_NG_GLOBAL (0UL << 11)
-#define TT_DESCRIPTOR_PAGE_NG_LOCAL (1UL << 11)
-
-#define TT_DESCRIPTOR_SECTION_S_MASK (1UL << 16)
-#define TT_DESCRIPTOR_SECTION_S_NOT_SHARED (0UL << 16)
-#define TT_DESCRIPTOR_SECTION_S_SHARED (1UL << 16)
-
-#define TT_DESCRIPTOR_PAGE_S_MASK (1UL << 10)
-#define TT_DESCRIPTOR_PAGE_S_NOT_SHARED (0UL << 10)
-#define TT_DESCRIPTOR_PAGE_S_SHARED (1UL << 10)
-
-#define TT_DESCRIPTOR_SECTION_AP_MASK ((1UL << 15) | (3UL << 10))
-#define TT_DESCRIPTOR_SECTION_AP_NO_NO ((0UL << 15) | (0UL << 10))
-#define TT_DESCRIPTOR_SECTION_AP_RW_NO ((0UL << 15) | (1UL << 10))
-#define TT_DESCRIPTOR_SECTION_AP_RW_RO ((0UL << 15) | (2UL << 10))
-#define TT_DESCRIPTOR_SECTION_AP_RW_RW ((0UL << 15) | (3UL << 10))
-#define TT_DESCRIPTOR_SECTION_AP_RO_NO ((1UL << 15) | (1UL << 10))
-#define TT_DESCRIPTOR_SECTION_AP_RO_RO ((1UL << 15) | (3UL << 10))
-
-#define TT_DESCRIPTOR_PAGE_AP_MASK ((1UL << 9) | (3UL << 4))
-#define TT_DESCRIPTOR_PAGE_AP_NO_NO ((0UL << 9) | (0UL << 4))
-#define TT_DESCRIPTOR_PAGE_AP_RW_NO ((0UL << 9) | (1UL << 4))
-#define TT_DESCRIPTOR_PAGE_AP_RW_RO ((0UL << 9) | (2UL << 4))
-#define TT_DESCRIPTOR_PAGE_AP_RW_RW ((0UL << 9) | (3UL << 4))
-#define TT_DESCRIPTOR_PAGE_AP_RO_NO ((1UL << 9) | (1UL << 4))
-#define TT_DESCRIPTOR_PAGE_AP_RO_RO ((1UL << 9) | (3UL << 4))
-
-#define TT_DESCRIPTOR_SECTION_XN_MASK (0x1UL << 4)
-#define TT_DESCRIPTOR_PAGE_XN_MASK (0x1UL << 0)
-#define TT_DESCRIPTOR_LARGEPAGE_XN_MASK (0x1UL << 15)
-
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK ((3UL << 12) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_SECTION_CACHEABLE_MASK (1UL << 3)
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 12) | (0UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 12) | (0UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 12) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE ((1UL << 12) | (0UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 12) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 12) | (0UL << 3) | (0UL << 2))
-
-#define TT_DESCRIPTOR_PAGE_SIZE (0x00001000)
-
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK ((3UL << 6) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_PAGE_CACHEABLE_MASK (1UL << 3)
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 6) | (0UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 6) | (0UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 6) | (1UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 6) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE ((1UL << 6) | (0UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 6) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 6) | (0UL << 3) | (0UL << 2))
-
-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK ((3UL << 12) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 12) | (0UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 12) | (0UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 12) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_NON_CACHEABLE ((1UL << 12) | (0UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 12) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 12) | (0UL << 3) | (0UL << 2))
-
-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_AP_MASK) >> 6) & TT_DESCRIPTOR_PAGE_AP_MASK)
-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_NG(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_NG_MASK) >> 6) & TT_DESCRIPTOR_PAGE_NG_MASK)
-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_S(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_S_MASK) >> 6) & TT_DESCRIPTOR_PAGE_S_MASK)
-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_XN(Desc,IsLargePage) ((IsLargePage)? \
- ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) << 11) & TT_DESCRIPTOR_LARGEPAGE_XN_MASK): \
- ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) >> 4) & TT_DESCRIPTOR_PAGE_XN_MASK))
-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(Desc,IsLargePage) (IsLargePage? \
- (((Desc) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK): \
- (((((Desc) & (0x3 << 12)) >> 6) | (Desc & (0x3 << 2)))))
-
-#define TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(Desc) ((((Desc) & TT_DESCRIPTOR_PAGE_AP_MASK) << 6) & TT_DESCRIPTOR_SECTION_AP_MASK)
-
-#define TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(Desc,IsLargePage) (IsLargePage? \
- (((Desc) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK): \
- (((((Desc) & (0x3 << 6)) << 6) | (Desc & (0x3 << 2)))))
-
-#define TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK (TT_DESCRIPTOR_SECTION_NS_MASK | TT_DESCRIPTOR_SECTION_NG_MASK | \
- TT_DESCRIPTOR_SECTION_S_MASK | TT_DESCRIPTOR_SECTION_AP_MASK | \
- TT_DESCRIPTOR_SECTION_XN_MASK | TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK)
-
-#define TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK (TT_DESCRIPTOR_PAGE_NG_MASK | TT_DESCRIPTOR_PAGE_S_MASK | \
- TT_DESCRIPTOR_PAGE_AP_MASK | TT_DESCRIPTOR_PAGE_XN_MASK | \
- TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK)
-
-#define TT_DESCRIPTOR_SECTION_DOMAIN_MASK (0x0FUL << 5)
-#define TT_DESCRIPTOR_SECTION_DOMAIN(a) (((a) & 0x0FUL) << 5)
-
-#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK (0xFFF00000)
-#define TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK (0xFFFFFC00)
-#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK)
-#define TT_DESCRIPTOR_SECTION_BASE_SHIFT 20
-
-#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK (0xFFFFF000)
-#define TT_DESCRIPTOR_PAGE_INDEX_MASK (0x000FF000)
-#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK)
-#define TT_DESCRIPTOR_PAGE_BASE_SHIFT 12
-
-#define TT_DESCRIPTOR_SECTION_WRITE_BACK(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
- ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \
- TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
- TT_DESCRIPTOR_SECTION_S_SHARED | \
- TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
- TT_DESCRIPTOR_SECTION_AP_RW_RW | \
- TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC)
-#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
- ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \
- TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
- TT_DESCRIPTOR_SECTION_S_SHARED | \
- TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
- TT_DESCRIPTOR_SECTION_AP_RW_RW | \
- TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)
-#define TT_DESCRIPTOR_SECTION_DEVICE(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
- ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \
- TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
- TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \
- TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
- TT_DESCRIPTOR_SECTION_AP_RW_RW | \
- TT_DESCRIPTOR_SECTION_XN_MASK | \
- TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE)
-#define TT_DESCRIPTOR_SECTION_UNCACHED(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
- ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \
- TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
- TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \
- TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
- TT_DESCRIPTOR_SECTION_AP_RW_RW | \
- TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE)
-
-#define TT_DESCRIPTOR_PAGE_WRITE_BACK (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
- TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
- TT_DESCRIPTOR_PAGE_S_SHARED | \
- TT_DESCRIPTOR_PAGE_AP_RW_RW | \
- TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC)
-#define TT_DESCRIPTOR_PAGE_WRITE_THROUGH (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
- TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
- TT_DESCRIPTOR_PAGE_S_SHARED | \
- TT_DESCRIPTOR_PAGE_AP_RW_RW | \
- TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)
-#define TT_DESCRIPTOR_PAGE_DEVICE (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
- TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
- TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
- TT_DESCRIPTOR_PAGE_AP_RW_RW | \
- TT_DESCRIPTOR_PAGE_XN_MASK | \
- TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE)
-#define TT_DESCRIPTOR_PAGE_UNCACHED (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
- TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
- TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
- TT_DESCRIPTOR_PAGE_AP_RW_RW | \
- TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE)
-
-// First Level Descriptors
-typedef UINT32 ARM_FIRST_LEVEL_DESCRIPTOR;
-
-// Second Level Descriptors
-typedef UINT32 ARM_PAGE_TABLE_ENTRY;
-
-UINT32
-ConvertSectionAttributesToPageAttributes (
- IN UINT32 SectionAttributes,
- IN BOOLEAN IsLargePage
- );
-
-#endif
diff --git a/ArmPkg/Include/Guid/ArmMpCoreInfo.h b/ArmPkg/Include/Guid/ArmMpCoreInfo.h deleted file mode 100644 index 07dec5dc48..0000000000 --- a/ArmPkg/Include/Guid/ArmMpCoreInfo.h +++ /dev/null @@ -1,66 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __ARM_MP_CORE_INFO_GUID_H_
-#define __ARM_MP_CORE_INFO_GUID_H_
-
-#define MAX_CPUS_PER_MPCORE_SYSTEM 0x04
-#define SCU_CONFIG_REG_OFFSET 0x04
-#define MPIDR_U_BIT_MASK 0x40000000
-
-typedef struct {
- UINT32 ClusterId;
- UINT32 CoreId;
-
- // MP Core Mailbox
- EFI_PHYSICAL_ADDRESS MailboxSetAddress;
- EFI_PHYSICAL_ADDRESS MailboxGetAddress;
- EFI_PHYSICAL_ADDRESS MailboxClearAddress;
- UINT64 MailboxClearValue;
-} ARM_CORE_INFO;
-
-typedef struct{
- UINT64 Signature;
- UINT32 Length;
- UINT32 Revision;
- UINT64 OemId;
- UINT64 OemTableId;
- UINTN OemRevision;
- UINTN CreatorId;
- UINTN CreatorRevision;
- EFI_GUID Identifier;
- UINTN DataLen;
-} ARM_PROCESSOR_TABLE_HEADER;
-
-typedef struct {
- ARM_PROCESSOR_TABLE_HEADER Header;
- UINTN NumberOfEntries;
- ARM_CORE_INFO *ArmCpus;
-} ARM_PROCESSOR_TABLE;
-
-
-#define ARM_MP_CORE_INFO_GUID \
- { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }
-
-#define EFI_ARM_PROCESSOR_TABLE_SIGNATURE SIGNATURE_64 ('C', 'P', 'U', 'T', 'A', 'B', 'L', 'E')
-#define EFI_ARM_PROCESSOR_TABLE_REVISION 0x00010000 //1.0
-#define EFI_ARM_PROCESSOR_TABLE_OEM_ID SIGNATURE_64('A','R','M',' ', 'L', 't', 'd', ' ')
-#define EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID SIGNATURE_64('V', 'E', 'R', 'S', 'A', 'T', 'I', 'L')
-#define EFI_ARM_PROCESSOR_TABLE_OEM_REVISION 0x00000001
-#define EFI_ARM_PROCESSOR_TABLE_CREATOR_ID 0xA5A5A5A5
-#define EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION 0x01000001
-
-extern EFI_GUID gArmMpCoreInfoGuid;
-
-#endif /* MPCOREINFO_H_ */
diff --git a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h deleted file mode 100644 index 593a3ce729..0000000000 --- a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h +++ /dev/null @@ -1,96 +0,0 @@ -/** @file
-*
-* Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __ARM_STD_SMC_H__
-#define __ARM_STD_SMC_H__
-
-/*
- * SMC function IDs for Standard Service queries
- */
-
-#define ARM_SMC_ID_STD_CALL_COUNT 0x8400ff00
-#define ARM_SMC_ID_STD_UID 0x8400ff01
-/* 0x8400ff02 is reserved */
-#define ARM_SMC_ID_STD_REVISION 0x8400ff03
-
-/*
- * The 'Standard Service Call UID' is supposed to return the Standard
- * Service UUID. This is a 128-bit value.
- */
-#define ARM_SMC_STD_UUID0 0x108d905b
-#define ARM_SMC_STD_UUID1 0x47e8f863
-#define ARM_SMC_STD_UUID2 0xfbc02dae
-#define ARM_SMC_STD_UUID3 0xe2f64156
-
-/*
- * ARM Standard Service Calls revision numbers
- * The current revision is: 0.1
- */
-#define ARM_SMC_STD_REVISION_MAJOR 0x0
-#define ARM_SMC_STD_REVISION_MINOR 0x1
-
-/*
- * Power State Coordination Interface (PSCI) calls cover a subset of the
- * Standard Service Call range.
- * The list below is not exhaustive.
- */
-#define ARM_SMC_ID_PSCI_VERSION 0x84000000
-#define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH64 0xc4000001
-#define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH32 0x84000001
-#define ARM_SMC_ID_PSCI_CPU_OFF 0x84000002
-#define ARM_SMC_ID_PSCI_CPU_ON_AARCH64 0xc4000003
-#define ARM_SMC_ID_PSCI_CPU_ON_AARCH32 0x84000003
-#define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH64 0xc4000004
-#define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH32 0x84000004
-#define ARM_SMC_ID_PSCI_MIGRATE_AARCH64 0xc4000005
-#define ARM_SMC_ID_PSCI_MIGRATE_AARCH32 0x84000005
-#define ARM_SMC_ID_PSCI_SYSTEM_OFF 0x84000008
-#define ARM_SMC_ID_PSCI_SYSTEM_RESET 0x84000009
-
-/* The current PSCI version is: 0.2 */
-#define ARM_SMC_PSCI_VERSION_MAJOR 0
-#define ARM_SMC_PSCI_VERSION_MINOR 2
-#define ARM_SMC_PSCI_VERSION \
- ((ARM_SMC_PSCI_VERSION_MAJOR << 16) | ARM_SMC_PSCI_VERSION_MINOR)
-
-/* PSCI return error codes */
-#define ARM_SMC_PSCI_RET_SUCCESS 0
-#define ARM_SMC_PSCI_RET_NOT_SUPPORTED -1
-#define ARM_SMC_PSCI_RET_INVALID_PARAMS -2
-#define ARM_SMC_PSCI_RET_DENIED -3
-#define ARM_SMC_PSCI_RET_ALREADY_ON -4
-#define ARM_SMC_PSCI_RET_ON_PENDING -5
-#define ARM_SMC_PSCI_RET_INTERN_FAIL -6
-#define ARM_SMC_PSCI_RET_NOT_PRESENT -7
-#define ARM_SMC_PSCI_RET_DISABLED -8
-
-#define ARM_SMC_PSCI_TARGET_CPU32(Aff2, Aff1, Aff0) \
- ((((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))
-
-#define ARM_SMC_PSCI_TARGET_CPU64(Aff3, Aff2, Aff1, Aff0) \
- ((((Aff3) & 0xFFULL) << 32) | (((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))
-
-#define ARM_SMC_PSCI_TARGET_GET_AFF0(TargetId) ((TargetId) & 0xFF)
-#define ARM_SMC_PSCI_TARGET_GET_AFF1(TargetId) (((TargetId) >> 8) & 0xFF)
-
-#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0 0
-#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1 1
-#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2 2
-#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3 3
-
-#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON 0
-#define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF 1
-#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING 2
-
-#endif
diff --git a/ArmPkg/Include/IndustryStandard/ArmTrustZoneSmc.h b/ArmPkg/Include/IndustryStandard/ArmTrustZoneSmc.h deleted file mode 100644 index 71b4327ebf..0000000000 --- a/ArmPkg/Include/IndustryStandard/ArmTrustZoneSmc.h +++ /dev/null @@ -1,161 +0,0 @@ -/** @file
-*
-* Copyright (c) 2012-2013, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __ARM_TRUSTZONE_SMC_H__
-#define __ARM_TRUSTZONE_SMC_H__
-
-#define ARM_TRUSTZONE_UID_4LETTERID 0x1
-#define ARM_TRUSTZONE_UID_MD5 0x2
-
-#define ARM_TRUSTZONE_ARM_UID 0x40524d48 // "ARMH"
-
-#define IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,Region) (((UINTN)(Rx) >= (UINTN)ARM_TRUSTZONE_##Region##_SMC_ID_START) && ((UINTN)(Rx) <= (UINTN)ARM_TRUSTZONE_##Region##_SMC_ID_END))
-
-#define IS_ARM_TRUSTZONE_DEPRECIATED_SMC(Rx) ((UINTN)(Rx) <= (UINTN)ARM_TRUSTZONE_DEPRECIATED_SMC_ID_END)
-#define IS_ARM_TRUSTZONE_TRUSTED_OS_SMC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,TRUSTED_OS)
-#define IS_ARM_TRUSTZONE_ARM_FAST_SMC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,ARM_FAST)
-#define IS_ARM_TRUSTZONE_SIP_FAST_SMC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,SIP_FAST)
-#define IS_ARM_TRUSTZONE_ODM_FAST_SMC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,ODM_FAST)
-#define IS_ARM_TRUSTZONE_OEM_FAST_SMC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,OEM_FAST)
-#define IS_ARM_TRUSTZONE_TRUSTED_USER_FAST_SMC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,TRUSTED_USER_FAST)
-#define IS_ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,TRUSTED_OS_FAST)
-
-#define IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_PRESENCE(Rx,Region) ((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_PRESENCE)
-#define IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID(Rx,Region) (((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_UID) || \
- ((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_UID+1) || \
- ((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_UID+2) || \
- ((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_UID+3) || \
- ((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_UID+4))
-#define IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION(Rx,Region) (((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_REVISION) || \
- ((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_REVISION+1))
-#define IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC(Rx,Region) (((Rx) >= ARM_TRUSTZONE_##Region##_SMC_ID_RPC_START) && \
- ((Rx) <= ARM_TRUSTZONE_##Region##_SMC_ID_RPC_END))
-
-#define ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID_INDEX(Rx,Region) ((Rx) - ARM_TRUSTZONE_##Region##_SMC_ID_UID)
-#define ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION_INDEX(Rx,Region) ((Rx) - ARM_TRUSTZONE_##Region##_SMC_ID_REVISION)
-#define ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,Region) ((Rx) - ARM_TRUSTZONE_##Region##_SMC_ID_RPC_START)
-
-#define ARM_TRUSTZONE_TRUSTED_OS_SMC_ID_RPC_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,TRUSTED_OS)
-
-#define IS_ARM_TRUSTZONE_ARM_FAST_SMC_ID_PRESENCE(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_PRESENCE(Rx,ARM_FAST)
-#define IS_ARM_TRUSTZONE_ARM_FAST_SMC_ID_UID(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID(Rx,ARM_FAST)
-#define IS_ARM_TRUSTZONE_ARM_FAST_SMC_ID_REVISION(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION(Rx,ARM_FAST)
-#define IS_ARM_TRUSTZONE_ARM_FAST_SMC_ID_RPC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC(Rx,ARM_FAST)
-#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_UID_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID_INDEX(Rx,ARM_FAST)
-#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_REVISION_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION_INDEX(Rx,ARM_FAST)
-#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_RPC_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,ARM_FAST)
-
-#define IS_ARM_TRUSTZONE_ODM_FAST_SMC_ID_PRESENCE(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_PRESENCE(Rx,ODM_FAST)
-#define IS_ARM_TRUSTZONE_ODM_FAST_SMC_ID_UID(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID(Rx,ODM_FAST)
-#define IS_ARM_TRUSTZONE_ODM_FAST_SMC_ID_REVISION(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION(Rx,ODM_FAST)
-#define IS_ARM_TRUSTZONE_ODM_FAST_SMC_ID_RPC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC(Rx,ODM_FAST)
-#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_UID_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID_INDEX(Rx,ODM_FAST)
-#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_REVISION_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION_INDEX(Rx,ODM_FAST)
-#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_RPC_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,ODM_FAST)
-
-#define IS_ARM_TRUSTZONE_OEM_FAST_SMC_ID_PRESENCE(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_PRESENCE(Rx,OEM_FAST)
-#define IS_ARM_TRUSTZONE_OEM_FAST_SMC_ID_UID(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID(Rx,OEM_FAST)
-#define IS_ARM_TRUSTZONE_OEM_FAST_SMC_ID_REVISION(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION(Rx,OEM_FAST)
-#define IS_ARM_TRUSTZONE_OEM_FAST_SMC_ID_RPC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC(Rx,OEM_FAST)
-#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_UID_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID_INDEX(Rx,OEM_FAST)
-#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_REVISION_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION_INDEX(Rx,OEM_FAST)
-#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_RPC_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,OEM_FAST)
-
-#define IS_ARM_TRUSTZONE_SIP_FAST_SMC_ID_PRESENCE(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_PRESENCE(Rx,SIP_FAST)
-#define IS_ARM_TRUSTZONE_SIP_FAST_SMC_ID_UID(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID(Rx,SIP_FAST)
-#define IS_ARM_TRUSTZONE_SIP_FAST_SMC_ID_REVISION(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION(Rx,SIP_FAST)
-#define IS_ARM_TRUSTZONE_SIP_FAST_SMC_ID_RPC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC(Rx,SIP_FAST)
-#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_UID_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID_INDEX(Rx,SIP_FAST)
-#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_REVISION_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION_INDEX(Rx,SIP_FAST)
-#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_RPC_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,SIP_FAST)
-
-#define ARM_TRUSTZONE_TRUSTED_USER_FAST_SMC_ID_RPC_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,TRUSTED_USER_FAST)
-
-#define IS_ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_PRESENCE(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_PRESENCE(Rx,TRUSTED_OS_FAST)
-#define IS_ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_UID(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID(Rx,TRUSTED_OS_FAST)
-#define IS_ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_REVISION(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION(Rx,TRUSTED_OS_FAST)
-#define IS_ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_RPC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC(Rx,TRUSTED_OS_FAST)
-#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_UID_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID_INDEX(Rx,TRUSTED_OS_FAST)
-#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_REVISION_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION_INDEX(Rx,TRUSTED_OS_FAST)
-#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_RPC_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,TRUSTED_OS_FAST)
-
-
-#define ARM_TRUSTZONE_DEPRECIATED_SMC_ID_START 0x00000000
-#define ARM_TRUSTZONE_DEPRECIATED_SMC_ID_END 0x01FFFFFF
-
-
-#define ARM_TRUSTZONE_TRUSTED_OS_SMC_ID_START 0x02000000
-#define ARM_TRUSTZONE_TRUSTED_OS_SMC_ID_END 0x1FFFFFFF
-
-#define ARM_TRUSTZONE_TRUSTED_OS_SMC_ID_RPC_START 0x02000000
-#define ARM_TRUSTZONE_TRUSTED_OS_SMC_ID_RPC_END 0x1FFFFFFF
-
-
-#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_START 0x80000000
-#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_END 0x80FFFFFF
-
-#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_RPC_START 0x80000000
-#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_RPC_END 0x80FFFEFF
-#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_PRESENCE 0x80FFFF00
-#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_UID 0x80FFFF10
-#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_REVISION 0x80FFFF20
-
-
-#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_START 0x81000000
-#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_END 0x81FFFFFF
-
-#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_RPC_START 0x81000000
-#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_RPC_END 0x81FFFEFF
-#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_PRESENCE 0x81FFFF00
-#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_UID 0x81FFFF10
-#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_REVISION 0x81FFFF20
-
-
-#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_START 0x82000000
-#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_END 0x82FFFFFF
-
-#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_RPC_START 0x82000000
-#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_RPC_END 0x82FFFEFF
-#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_PRESENCE 0x82FFFF00
-#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_UID 0x82FFFF10
-#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_REVISION 0x82FFFF20
-
-
-#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_START 0x83000000
-#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_END 0x83FFFFFF
-
-#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_RPC_START 0x83000000
-#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_RPC_END 0x83FFFEFF
-#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_PRESENCE 0x83FFFF00
-#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_UID 0x83FFFF10
-#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_REVISION 0x83FFFF20
-
-
-#define ARM_TRUSTZONE_TRUSTED_USER_FAST_SMC_ID_START 0xF0000000
-#define ARM_TRUSTZONE_TRUSTED_USER_FAST_SMC_ID_END 0xF1FFFFFF
-
-#define ARM_TRUSTZONE_TRUSTED_USER_FAST_SMC_ID_RPC_START 0xF0000000
-#define ARM_TRUSTZONE_TRUSTED_USER_FAST_SMC_ID_RPC_END 0xF1FFFEFF
-
-
-#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_START 0xF2000000
-#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_END 0xFFFFFFFF
-
-#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_RPC_START 0xF2000000
-#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_RPC_END 0xFFFFFEFF
-#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_PRESENCE 0xF2FFFF00
-#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_UID 0xF2FFFF10
-#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_REVISION 0xF2FFFF20
-
-#endif
diff --git a/ArmPkg/Include/Library/ArmDisassemblerLib.h b/ArmPkg/Include/Library/ArmDisassemblerLib.h deleted file mode 100644 index d6a493f2cb..0000000000 --- a/ArmPkg/Include/Library/ArmDisassemblerLib.h +++ /dev/null @@ -1,43 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __ARM_DISASSEBLER_LIB_H__
-#define __ARM_DISASSEBLER_LIB_H__
-
-/**
- Place a dissasembly of of **OpCodePtr into buffer, and update OpCodePtr to
- point to next instructin.
-
- We cheat and only decode instructions that access
- memory. If the instruction is not found we dump the instruction in hex.
-
- @param OpCodePtrPtr Pointer to pointer of ARM Thumb instruction to disassemble.
- @param Thumb TRUE for Thumb(2), FALSE for ARM instruction stream
- @param Extended TRUE dump hex for instruction too.
- @param ItBlock Size of IT Block
- @param Buf Buffer to sprintf disassembly into.
- @param Size Size of Buf in bytes.
-
-**/
-VOID
-DisassembleInstruction (
- IN UINT8 **OpCodePtr,
- IN BOOLEAN Thumb,
- IN BOOLEAN Extended,
- IN OUT UINT32 *ItBlock,
- OUT CHAR8 *Buf,
- OUT UINTN Size
- );
-
-#endif
diff --git a/ArmPkg/Include/Library/ArmGenericTimerCounterLib.h b/ArmPkg/Include/Library/ArmGenericTimerCounterLib.h deleted file mode 100644 index 805025baa1..0000000000 --- a/ArmPkg/Include/Library/ArmGenericTimerCounterLib.h +++ /dev/null @@ -1,85 +0,0 @@ -/** @file
-
- Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
- Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __ARM_GENERIC_TIMER_COUNTER_LIB_H__
-#define __ARM_GENERIC_TIMER_COUNTER_LIB_H__
-
-VOID
-EFIAPI
-ArmGenericTimerEnableTimer (
- VOID
- );
-
-VOID
-EFIAPI
-ArmGenericTimerDisableTimer (
- VOID
- );
-
-VOID
-EFIAPI
-ArmGenericTimerSetTimerFreq (
- IN UINTN FreqInHz
- );
-
-UINTN
-EFIAPI
-ArmGenericTimerGetTimerFreq (
- VOID
- );
-
-VOID
-EFIAPI
-ArmGenericTimerSetTimerVal (
- IN UINTN Value
- );
-
-UINTN
-EFIAPI
-ArmGenericTimerGetTimerVal (
- VOID
- );
-
-UINT64
-EFIAPI
-ArmGenericTimerGetSystemCount (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmGenericTimerGetTimerCtrlReg (
- VOID
- );
-
-VOID
-EFIAPI
-ArmGenericTimerSetTimerCtrlReg (
- UINTN Value
- );
-
-UINT64
-EFIAPI
-ArmGenericTimerGetCompareVal (
- VOID
- );
-
-VOID
-EFIAPI
-ArmGenericTimerSetCompareVal (
- IN UINT64 Value
- );
-
-#endif
diff --git a/ArmPkg/Include/Library/ArmGicArchLib.h b/ArmPkg/Include/Library/ArmGicArchLib.h deleted file mode 100644 index e6964a2d57..0000000000 --- a/ArmPkg/Include/Library/ArmGicArchLib.h +++ /dev/null @@ -1,33 +0,0 @@ -/** @file
-*
-* Copyright (c) 2015, Linaro Ltd. All rights reserved.
-*
-* This program and the accompanying materials are licensed and made available
-* under the terms and conditions of the BSD License which accompanies this
-* distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __ARM_GIC_ARCH_LIB_H__
-#define __ARM_GIC_ARCH_LIB_H__
-
-//
-// GIC definitions
-//
-typedef enum {
- ARM_GIC_ARCH_REVISION_2,
- ARM_GIC_ARCH_REVISION_3
-} ARM_GIC_ARCH_REVISION;
-
-
-ARM_GIC_ARCH_REVISION
-EFIAPI
-ArmGicGetSupportedArchRevision (
- VOID
- );
-
-#endif
diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h deleted file mode 100644 index 4364f3ffef..0000000000 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ /dev/null @@ -1,317 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2015, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __ARMGIC_H
-#define __ARMGIC_H
-
-#include <Library/ArmGicArchLib.h>
-
-//
-// GIC Distributor
-//
-#define ARM_GIC_ICDDCR 0x000 // Distributor Control Register
-#define ARM_GIC_ICDICTR 0x004 // Interrupt Controller Type Register
-#define ARM_GIC_ICDIIDR 0x008 // Implementer Identification Register
-
-// Each reg base below repeats for Number of interrupts / 4 (see GIC spec)
-#define ARM_GIC_ICDISR 0x080 // Interrupt Security Registers
-#define ARM_GIC_ICDISER 0x100 // Interrupt Set-Enable Registers
-#define ARM_GIC_ICDICER 0x180 // Interrupt Clear-Enable Registers
-#define ARM_GIC_ICDSPR 0x200 // Interrupt Set-Pending Registers
-#define ARM_GIC_ICDICPR 0x280 // Interrupt Clear-Pending Registers
-#define ARM_GIC_ICDABR 0x300 // Active Bit Registers
-
-// Each reg base below repeats for Number of interrupts / 4
-#define ARM_GIC_ICDIPR 0x400 // Interrupt Priority Registers
-
-// Each reg base below repeats for Number of interrupts
-#define ARM_GIC_ICDIPTR 0x800 // Interrupt Processor Target Registers
-#define ARM_GIC_ICDICFR 0xC00 // Interrupt Configuration Registers
-
-#define ARM_GIC_ICDPPISR 0xD00 // PPI Status register
-
-// just one of these
-#define ARM_GIC_ICDSGIR 0xF00 // Software Generated Interrupt Register
-
-// GICv3 specific registers
-#define ARM_GICD_IROUTER 0x6100 // Interrupt Routing Registers
-
-// GICD_CTLR bits
-#define ARM_GIC_ICDDCR_ARE (1 << 4) // Affinity Routing Enable (ARE)
-#define ARM_GIC_ICDDCR_DS (1 << 6) // Disable Security (DS)
-
-//
-// GIC Redistributor
-//
-
-#define ARM_GICR_CTLR_FRAME_SIZE SIZE_64KB
-#define ARM_GICR_SGI_PPI_FRAME_SIZE SIZE_64KB
-
-// GIC Redistributor Control frame
-#define ARM_GICR_TYPER 0x0008 // Redistributor Type Register
-
-// GIC SGI & PPI Redistributor frame
-#define ARM_GICR_ISENABLER 0x0100 // Interrupt Set-Enable Registers
-#define ARM_GICR_ICENABLER 0x0180 // Interrupt Clear-Enable Registers
-
-//
-// GIC Cpu interface
-//
-#define ARM_GIC_ICCICR 0x00 // CPU Interface Control Register
-#define ARM_GIC_ICCPMR 0x04 // Interrupt Priority Mask Register
-#define ARM_GIC_ICCBPR 0x08 // Binary Point Register
-#define ARM_GIC_ICCIAR 0x0C // Interrupt Acknowledge Register
-#define ARM_GIC_ICCEIOR 0x10 // End Of Interrupt Register
-#define ARM_GIC_ICCRPR 0x14 // Running Priority Register
-#define ARM_GIC_ICCPIR 0x18 // Highest Pending Interrupt Register
-#define ARM_GIC_ICCABPR 0x1C // Aliased Binary Point Register
-#define ARM_GIC_ICCIIDR 0xFC // Identification Register
-
-#define ARM_GIC_ICDSGIR_FILTER_TARGETLIST 0x0
-#define ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE 0x1
-#define ARM_GIC_ICDSGIR_FILTER_ITSELF 0x2
-
-// Bit-masks to configure the CPU Interface Control register
-#define ARM_GIC_ICCICR_ENABLE_SECURE 0x01
-#define ARM_GIC_ICCICR_ENABLE_NS 0x02
-#define ARM_GIC_ICCICR_ACK_CTL 0x04
-#define ARM_GIC_ICCICR_SIGNAL_SECURE_TO_FIQ 0x08
-#define ARM_GIC_ICCICR_USE_SBPR 0x10
-
-// Bit Mask for GICC_IIDR
-#define ARM_GIC_ICCIIDR_GET_PRODUCT_ID(IccIidr) (((IccIidr) >> 20) & 0xFFF)
-#define ARM_GIC_ICCIIDR_GET_ARCH_VERSION(IccIidr) (((IccIidr) >> 16) & 0xF)
-#define ARM_GIC_ICCIIDR_GET_REVISION(IccIidr) (((IccIidr) >> 12) & 0xF)
-#define ARM_GIC_ICCIIDR_GET_IMPLEMENTER(IccIidr) ((IccIidr) & 0xFFF)
-
-// Bit Mask for
-#define ARM_GIC_ICCIAR_ACKINTID 0x3FF
-
-UINTN
-EFIAPI
-ArmGicGetInterfaceIdentification (
- IN INTN GicInterruptInterfaceBase
- );
-
-//
-// GIC Secure interfaces
-//
-VOID
-EFIAPI
-ArmGicSetupNonSecure (
- IN UINTN MpId,
- IN INTN GicDistributorBase,
- IN INTN GicInterruptInterfaceBase
- );
-
-VOID
-EFIAPI
-ArmGicSetSecureInterrupts (
- IN UINTN GicDistributorBase,
- IN UINTN* GicSecureInterruptMask,
- IN UINTN GicSecureInterruptMaskSize
- );
-
-VOID
-EFIAPI
-ArmGicEnableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
- );
-
-VOID
-EFIAPI
-ArmGicDisableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
- );
-
-VOID
-EFIAPI
-ArmGicEnableDistributor (
- IN INTN GicDistributorBase
- );
-
-VOID
-EFIAPI
-ArmGicDisableDistributor (
- IN INTN GicDistributorBase
- );
-
-UINTN
-EFIAPI
-ArmGicGetMaxNumInterrupts (
- IN INTN GicDistributorBase
- );
-
-VOID
-EFIAPI
-ArmGicSendSgiTo (
- IN INTN GicDistributorBase,
- IN INTN TargetListFilter,
- IN INTN CPUTargetList,
- IN INTN SgiId
- );
-
-/*
- * Acknowledge and return the value of the Interrupt Acknowledge Register
- *
- * InterruptId is returned separately from the register value because in
- * the GICv2 the register value contains the CpuId and InterruptId while
- * in the GICv3 the register value is only the InterruptId.
- *
- * @param GicInterruptInterfaceBase Base Address of the GIC CPU Interface
- * @param InterruptId InterruptId read from the Interrupt Acknowledge Register
- *
- * @retval value returned by the Interrupt Acknowledge Register
- *
- */
-UINTN
-EFIAPI
-ArmGicAcknowledgeInterrupt (
- IN UINTN GicInterruptInterfaceBase,
- OUT UINTN *InterruptId
- );
-
-VOID
-EFIAPI
-ArmGicEndOfInterrupt (
- IN UINTN GicInterruptInterfaceBase,
- IN UINTN Source
- );
-
-UINTN
-EFIAPI
-ArmGicSetPriorityMask (
- IN INTN GicInterruptInterfaceBase,
- IN INTN PriorityMask
- );
-
-VOID
-EFIAPI
-ArmGicEnableInterrupt (
- IN UINTN GicDistributorBase,
- IN UINTN GicRedistributorBase,
- IN UINTN Source
- );
-
-VOID
-EFIAPI
-ArmGicDisableInterrupt (
- IN UINTN GicDistributorBase,
- IN UINTN GicRedistributorBase,
- IN UINTN Source
- );
-
-BOOLEAN
-EFIAPI
-ArmGicIsInterruptEnabled (
- IN UINTN GicDistributorBase,
- IN UINTN GicRedistributorBase,
- IN UINTN Source
- );
-
-//
-// GIC revision 2 specific declarations
-//
-
-// Interrupts from 1020 to 1023 are considered as special interrupts (eg: spurious interrupts)
-#define ARM_GIC_IS_SPECIAL_INTERRUPTS(Interrupt) (((Interrupt) >= 1020) && ((Interrupt) <= 1023))
-
-VOID
-EFIAPI
-ArmGicV2SetupNonSecure (
- IN UINTN MpId,
- IN INTN GicDistributorBase,
- IN INTN GicInterruptInterfaceBase
- );
-
-VOID
-EFIAPI
-ArmGicV2EnableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
- );
-
-VOID
-EFIAPI
-ArmGicV2DisableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
- );
-
-UINTN
-EFIAPI
-ArmGicV2AcknowledgeInterrupt (
- IN UINTN GicInterruptInterfaceBase
- );
-
-VOID
-EFIAPI
-ArmGicV2EndOfInterrupt (
- IN UINTN GicInterruptInterfaceBase,
- IN UINTN Source
- );
-
-//
-// GIC revision 3 specific declarations
-//
-
-#define ICC_SRE_EL2_SRE (1 << 0)
-
-#define ARM_GICD_IROUTER_IRM BIT31
-
-UINT32
-EFIAPI
-ArmGicV3GetControlSystemRegisterEnable (
- VOID
- );
-
-VOID
-EFIAPI
-ArmGicV3SetControlSystemRegisterEnable (
- IN UINT32 ControlSystemRegisterEnable
- );
-
-VOID
-EFIAPI
-ArmGicV3EnableInterruptInterface (
- VOID
- );
-
-VOID
-EFIAPI
-ArmGicV3DisableInterruptInterface (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmGicV3AcknowledgeInterrupt (
- VOID
- );
-
-VOID
-EFIAPI
-ArmGicV3EndOfInterrupt (
- IN UINTN Source
- );
-
-VOID
-ArmGicV3SetBinaryPointer (
- IN UINTN BinaryPoint
- );
-
-VOID
-ArmGicV3SetPriorityMask (
- IN UINTN Priority
- );
-
-#endif
diff --git a/ArmPkg/Include/Library/ArmHvcLib.h b/ArmPkg/Include/Library/ArmHvcLib.h deleted file mode 100644 index 4e9d1c4011..0000000000 --- a/ArmPkg/Include/Library/ArmHvcLib.h +++ /dev/null @@ -1,46 +0,0 @@ -/** @file
-*
-* Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __ARM_HVC_LIB__
-#define __ARM_HVC_LIB__
-
-/**
- * The size of the HVC arguments are different between AArch64 and AArch32.
- * The native size is used for the arguments.
- */
-typedef struct {
- UINTN Arg0;
- UINTN Arg1;
- UINTN Arg2;
- UINTN Arg3;
- UINTN Arg4;
- UINTN Arg5;
- UINTN Arg6;
- UINTN Arg7;
-} ARM_HVC_ARGS;
-
-/**
- Trigger an HVC call
-
- HVC calls can take up to 8 arguments and return up to 4 return values.
- Therefore, the 4 first fields in the ARM_HVC_ARGS structure are used
- for both input and output values.
-
-**/
-VOID
-ArmCallHvc (
- IN OUT ARM_HVC_ARGS *Args
- );
-
-#endif
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h deleted file mode 100644 index 24ffe9f1aa..0000000000 --- a/ArmPkg/Include/Library/ArmLib.h +++ /dev/null @@ -1,722 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __ARM_LIB__
-#define __ARM_LIB__
-
-#include <Uefi/UefiBaseType.h>
-
-#ifdef MDE_CPU_ARM
- #include <Chipset/ArmV7.h>
-#elif defined(MDE_CPU_AARCH64)
- #include <Chipset/AArch64.h>
-#else
- #error "Unknown chipset."
-#endif
-
-#define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | EFI_MEMORY_WC | \
- EFI_MEMORY_WT | EFI_MEMORY_WB | \
- EFI_MEMORY_UCE)
-
-/**
- * The UEFI firmware must not use the ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_* attributes.
- *
- * The Non Secure memory attribute (ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_*) should only
- * be used in Secure World to distinguished Secure to Non-Secure memory.
- */
-typedef enum {
- ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED = 0,
- ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED,
- ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
- ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK,
- ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH,
- ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH,
- ARM_MEMORY_REGION_ATTRIBUTE_DEVICE,
- ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE
-} ARM_MEMORY_REGION_ATTRIBUTES;
-
-#define IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(attr) ((UINT32)(attr) & 1)
-
-typedef struct {
- EFI_PHYSICAL_ADDRESS PhysicalBase;
- EFI_VIRTUAL_ADDRESS VirtualBase;
- UINT64 Length;
- ARM_MEMORY_REGION_ATTRIBUTES Attributes;
-} ARM_MEMORY_REGION_DESCRIPTOR;
-
-typedef VOID (*CACHE_OPERATION)(VOID);
-typedef VOID (*LINE_OPERATION)(UINTN);
-
-//
-// ARM Processor Mode
-//
-typedef enum {
- ARM_PROCESSOR_MODE_USER = 0x10,
- ARM_PROCESSOR_MODE_FIQ = 0x11,
- ARM_PROCESSOR_MODE_IRQ = 0x12,
- ARM_PROCESSOR_MODE_SUPERVISOR = 0x13,
- ARM_PROCESSOR_MODE_ABORT = 0x17,
- ARM_PROCESSOR_MODE_HYP = 0x1A,
- ARM_PROCESSOR_MODE_UNDEFINED = 0x1B,
- ARM_PROCESSOR_MODE_SYSTEM = 0x1F,
- ARM_PROCESSOR_MODE_MASK = 0x1F
-} ARM_PROCESSOR_MODE;
-
-//
-// ARM Cpu IDs
-//
-#define ARM_CPU_IMPLEMENTER_MASK (0xFFU << 24)
-#define ARM_CPU_IMPLEMENTER_ARMLTD (0x41U << 24)
-#define ARM_CPU_IMPLEMENTER_DEC (0x44U << 24)
-#define ARM_CPU_IMPLEMENTER_MOT (0x4DU << 24)
-#define ARM_CPU_IMPLEMENTER_QUALCOMM (0x51U << 24)
-#define ARM_CPU_IMPLEMENTER_MARVELL (0x56U << 24)
-
-#define ARM_CPU_PRIMARY_PART_MASK (0xFFF << 4)
-#define ARM_CPU_PRIMARY_PART_CORTEXA5 (0xC05 << 4)
-#define ARM_CPU_PRIMARY_PART_CORTEXA7 (0xC07 << 4)
-#define ARM_CPU_PRIMARY_PART_CORTEXA8 (0xC08 << 4)
-#define ARM_CPU_PRIMARY_PART_CORTEXA9 (0xC09 << 4)
-#define ARM_CPU_PRIMARY_PART_CORTEXA15 (0xC0F << 4)
-
-//
-// ARM MP Core IDs
-//
-#define ARM_CORE_AFF0 0xFF
-#define ARM_CORE_AFF1 (0xFF << 8)
-#define ARM_CORE_AFF2 (0xFF << 16)
-#define ARM_CORE_AFF3 (0xFFULL << 32)
-
-#define ARM_CORE_MASK ARM_CORE_AFF0
-#define ARM_CLUSTER_MASK ARM_CORE_AFF1
-#define GET_CORE_ID(MpId) ((MpId) & ARM_CORE_MASK)
-#define GET_CLUSTER_ID(MpId) (((MpId) & ARM_CLUSTER_MASK) >> 8)
-#define GET_MPID(ClusterId, CoreId) (((ClusterId) << 8) | (CoreId))
-#define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)
-
-UINTN
-EFIAPI
-ArmDataCacheLineLength (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmInstructionCacheLineLength (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmCacheWritebackGranule (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmIsArchTimerImplemented (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmReadIdPfr0 (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmReadIdPfr1 (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmCacheInfo (
- VOID
- );
-
-BOOLEAN
-EFIAPI
-ArmIsMpCore (
- VOID
- );
-
-VOID
-EFIAPI
-ArmInvalidateDataCache (
- VOID
- );
-
-
-VOID
-EFIAPI
-ArmCleanInvalidateDataCache (
- VOID
- );
-
-VOID
-EFIAPI
-ArmCleanDataCache (
- VOID
- );
-
-VOID
-EFIAPI
-ArmInvalidateInstructionCache (
- VOID
- );
-
-VOID
-EFIAPI
-ArmInvalidateDataCacheEntryByMVA (
- IN UINTN Address
- );
-
-VOID
-EFIAPI
-ArmCleanDataCacheEntryToPoUByMVA (
- IN UINTN Address
- );
-
-VOID
-EFIAPI
-ArmInvalidateInstructionCacheEntryToPoUByMVA (
- IN UINTN Address
- );
-
-VOID
-EFIAPI
-ArmCleanDataCacheEntryByMVA (
-IN UINTN Address
-);
-
-VOID
-EFIAPI
-ArmCleanInvalidateDataCacheEntryByMVA (
- IN UINTN Address
- );
-
-VOID
-EFIAPI
-ArmInvalidateDataCacheEntryBySetWay (
- IN UINTN SetWayFormat
- );
-
-VOID
-EFIAPI
-ArmCleanDataCacheEntryBySetWay (
- IN UINTN SetWayFormat
- );
-
-VOID
-EFIAPI
-ArmCleanInvalidateDataCacheEntryBySetWay (
- IN UINTN SetWayFormat
- );
-
-VOID
-EFIAPI
-ArmEnableDataCache (
- VOID
- );
-
-VOID
-EFIAPI
-ArmDisableDataCache (
- VOID
- );
-
-VOID
-EFIAPI
-ArmEnableInstructionCache (
- VOID
- );
-
-VOID
-EFIAPI
-ArmDisableInstructionCache (
- VOID
- );
-
-VOID
-EFIAPI
-ArmEnableMmu (
- VOID
- );
-
-VOID
-EFIAPI
-ArmDisableMmu (
- VOID
- );
-
-VOID
-EFIAPI
-ArmEnableCachesAndMmu (
- VOID
- );
-
-VOID
-EFIAPI
-ArmDisableCachesAndMmu (
- VOID
- );
-
-VOID
-EFIAPI
-ArmEnableInterrupts (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmDisableInterrupts (
- VOID
- );
-
-BOOLEAN
-EFIAPI
-ArmGetInterruptState (
- VOID
- );
-
-VOID
-EFIAPI
-ArmEnableAsynchronousAbort (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmDisableAsynchronousAbort (
- VOID
- );
-
-VOID
-EFIAPI
-ArmEnableIrq (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmDisableIrq (
- VOID
- );
-
-VOID
-EFIAPI
-ArmEnableFiq (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmDisableFiq (
- VOID
- );
-
-BOOLEAN
-EFIAPI
-ArmGetFiqState (
- VOID
- );
-
-/**
- * Invalidate Data and Instruction TLBs
- */
-VOID
-EFIAPI
-ArmInvalidateTlb (
- VOID
- );
-
-VOID
-EFIAPI
-ArmUpdateTranslationTableEntry (
- IN VOID *TranslationTableEntry,
- IN VOID *Mva
- );
-
-VOID
-EFIAPI
-ArmSetDomainAccessControl (
- IN UINT32 Domain
- );
-
-VOID
-EFIAPI
-ArmSetTTBR0 (
- IN VOID *TranslationTableBase
- );
-
-VOID
-EFIAPI
-ArmSetTTBCR (
- IN UINT32 Bits
- );
-
-VOID *
-EFIAPI
-ArmGetTTBR0BaseAddress (
- VOID
- );
-
-BOOLEAN
-EFIAPI
-ArmMmuEnabled (
- VOID
- );
-
-VOID
-EFIAPI
-ArmEnableBranchPrediction (
- VOID
- );
-
-VOID
-EFIAPI
-ArmDisableBranchPrediction (
- VOID
- );
-
-VOID
-EFIAPI
-ArmSetLowVectors (
- VOID
- );
-
-VOID
-EFIAPI
-ArmSetHighVectors (
- VOID
- );
-
-VOID
-EFIAPI
-ArmDataMemoryBarrier (
- VOID
- );
-
-VOID
-EFIAPI
-ArmDataSynchronizationBarrier (
- VOID
- );
-
-VOID
-EFIAPI
-ArmInstructionSynchronizationBarrier (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteVBar (
- IN UINTN VectorBase
- );
-
-UINTN
-EFIAPI
-ArmReadVBar (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteAuxCr (
- IN UINT32 Bit
- );
-
-UINT32
-EFIAPI
-ArmReadAuxCr (
- VOID
- );
-
-VOID
-EFIAPI
-ArmSetAuxCrBit (
- IN UINT32 Bits
- );
-
-VOID
-EFIAPI
-ArmUnsetAuxCrBit (
- IN UINT32 Bits
- );
-
-VOID
-EFIAPI
-ArmCallSEV (
- VOID
- );
-
-VOID
-EFIAPI
-ArmCallWFE (
- VOID
- );
-
-VOID
-EFIAPI
-ArmCallWFI (
-
- VOID
- );
-
-UINTN
-EFIAPI
-ArmReadMpidr (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmReadMidr (
- VOID
- );
-
-UINT32
-EFIAPI
-ArmReadCpacr (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteCpacr (
- IN UINT32 Access
- );
-
-VOID
-EFIAPI
-ArmEnableVFP (
- VOID
- );
-
-/**
- Get the Secure Configuration Register value
-
- @return Value read from the Secure Configuration Register
-
-**/
-UINT32
-EFIAPI
-ArmReadScr (
- VOID
- );
-
-/**
- Set the Secure Configuration Register
-
- @param Value Value to write to the Secure Configuration Register
-
-**/
-VOID
-EFIAPI
-ArmWriteScr (
- IN UINT32 Value
- );
-
-UINT32
-EFIAPI
-ArmReadMVBar (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteMVBar (
- IN UINT32 VectorMonitorBase
- );
-
-UINT32
-EFIAPI
-ArmReadSctlr (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmReadHVBar (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteHVBar (
- IN UINTN HypModeVectorBase
- );
-
-
-//
-// Helper functions for accessing CPU ACTLR
-//
-
-UINTN
-EFIAPI
-ArmReadCpuActlr (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteCpuActlr (
- IN UINTN Val
- );
-
-VOID
-EFIAPI
-ArmSetCpuActlrBit (
- IN UINTN Bits
- );
-
-VOID
-EFIAPI
-ArmUnsetCpuActlrBit (
- IN UINTN Bits
- );
-
-//
-// Accessors for the architected generic timer registers
-//
-
-#define ARM_ARCH_TIMER_ENABLE (1 << 0)
-#define ARM_ARCH_TIMER_IMASK (1 << 1)
-#define ARM_ARCH_TIMER_ISTATUS (1 << 2)
-
-UINTN
-EFIAPI
-ArmReadCntFrq (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteCntFrq (
- UINTN FreqInHz
- );
-
-UINT64
-EFIAPI
-ArmReadCntPct (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmReadCntkCtl (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteCntkCtl (
- UINTN Val
- );
-
-UINTN
-EFIAPI
-ArmReadCntpTval (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteCntpTval (
- UINTN Val
- );
-
-UINTN
-EFIAPI
-ArmReadCntpCtl (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteCntpCtl (
- UINTN Val
- );
-
-UINTN
-EFIAPI
-ArmReadCntvTval (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteCntvTval (
- UINTN Val
- );
-
-UINTN
-EFIAPI
-ArmReadCntvCtl (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteCntvCtl (
- UINTN Val
- );
-
-UINT64
-EFIAPI
-ArmReadCntvCt (
- VOID
- );
-
-UINT64
-EFIAPI
-ArmReadCntpCval (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteCntpCval (
- UINT64 Val
- );
-
-UINT64
-EFIAPI
-ArmReadCntvCval (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteCntvCval (
- UINT64 Val
- );
-
-UINT64
-EFIAPI
-ArmReadCntvOff (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteCntvOff (
- UINT64 Val
- );
-
-#endif // __ARM_LIB__
diff --git a/ArmPkg/Include/Library/ArmMmuLib.h b/ArmPkg/Include/Library/ArmMmuLib.h deleted file mode 100644 index fb7fd00641..0000000000 --- a/ArmPkg/Include/Library/ArmMmuLib.h +++ /dev/null @@ -1,72 +0,0 @@ -/** @file
-
- Copyright (c) 2015 - 2016, Linaro Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __ARM_MMU_LIB__
-#define __ARM_MMU_LIB__
-
-#include <Uefi/UefiBaseType.h>
-
-#include <Library/ArmLib.h>
-
-EFI_STATUS
-EFIAPI
-ArmConfigureMmu (
- IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
- OUT VOID **TranslationTableBase OPTIONAL,
- OUT UINTN *TranslationTableSize OPTIONAL
- );
-
-EFI_STATUS
-EFIAPI
-ArmSetMemoryRegionNoExec (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length
- );
-
-EFI_STATUS
-EFIAPI
-ArmClearMemoryRegionNoExec (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length
- );
-
-EFI_STATUS
-EFIAPI
-ArmSetMemoryRegionReadOnly (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length
- );
-
-EFI_STATUS
-EFIAPI
-ArmClearMemoryRegionReadOnly (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length
- );
-
-VOID
-EFIAPI
-ArmReplaceLiveTranslationEntry (
- IN UINT64 *Entry,
- IN UINT64 Value
- );
-
-EFI_STATUS
-ArmSetMemoryAttributes (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN UINT64 Attributes
- );
-
-#endif
diff --git a/ArmPkg/Include/Library/ArmSmcLib.h b/ArmPkg/Include/Library/ArmSmcLib.h deleted file mode 100644 index 168e3bb426..0000000000 --- a/ArmPkg/Include/Library/ArmSmcLib.h +++ /dev/null @@ -1,46 +0,0 @@ -/** @file
-*
-* Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __ARM_SMC_LIB__
-#define __ARM_SMC_LIB__
-
-/**
- * The size of the SMC arguments are different between AArch64 and AArch32.
- * The native size is used for the arguments.
- */
-typedef struct {
- UINTN Arg0;
- UINTN Arg1;
- UINTN Arg2;
- UINTN Arg3;
- UINTN Arg4;
- UINTN Arg5;
- UINTN Arg6;
- UINTN Arg7;
-} ARM_SMC_ARGS;
-
-/**
- Trigger an SMC call
-
- SMC calls can take up to 7 arguments and return up to 4 return values.
- Therefore, the 4 first fields in the ARM_SMC_ARGS structure are used
- for both input and output values.
-
-**/
-VOID
-ArmCallSmc (
- IN OUT ARM_SMC_ARGS *Args
- );
-
-#endif
diff --git a/ArmPkg/Include/Library/BdsLib.h b/ArmPkg/Include/Library/BdsLib.h deleted file mode 100644 index c58f47eb2a..0000000000 --- a/ArmPkg/Include/Library/BdsLib.h +++ /dev/null @@ -1,209 +0,0 @@ -/** @file
-*
-* Copyright (c) 2013-2015, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __BDS_ENTRY_H__
-#define __BDS_ENTRY_H__
-
-/**
- This is defined by the UEFI specs, don't change it
-**/
-typedef struct {
- UINT16 LoadOptionIndex;
- EFI_LOAD_OPTION *LoadOption;
- UINTN LoadOptionSize;
-
- UINT32 Attributes;
- UINT16 FilePathListLength;
- CHAR16 *Description;
- EFI_DEVICE_PATH_PROTOCOL *FilePathList;
-
- VOID* OptionalData;
- UINTN OptionalDataSize;
-} BDS_LOAD_OPTION;
-
-/**
- Connect a Device Path and return the handle of the driver that support this DevicePath
-
- @param DevicePath Device Path of the File to connect
- @param Handle Handle of the driver that support this DevicePath
- @param RemainingDevicePath Remaining DevicePath nodes that do not match the driver DevicePath
-
- @retval EFI_SUCCESS A driver that matches the Device Path has been found
- @retval EFI_NOT_FOUND No handles match the search.
- @retval EFI_INVALID_PARAMETER DevicePath or Handle is NULL
-
-**/
-EFI_STATUS
-BdsConnectDevicePath (
- IN EFI_DEVICE_PATH_PROTOCOL* DevicePath,
- OUT EFI_HANDLE *Handle,
- OUT EFI_DEVICE_PATH_PROTOCOL **RemainingDevicePath
- );
-
-/**
- Connect all DXE drivers
-
- @retval EFI_SUCCESS All drivers have been connected
- @retval EFI_NOT_FOUND No handles match the search.
- @retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results.
-
-**/
-EFI_STATUS
-BdsConnectAllDrivers (
- VOID
- );
-
-/**
- Return the value of a global variable defined by its VariableName.
- The variable must be defined with the VendorGuid gEfiGlobalVariableGuid.
-
- @param VariableName A Null-terminated string that is the name of the vendor's
- variable.
- @param DefaultValue Value returned by the function if the variable does not exist
- @param DataSize On input, the size in bytes of the return Data buffer.
- On output the size of data returned in Data.
- @param Value Value read from the UEFI Variable or copy of the default value
- if the UEFI Variable does not exist
-
- @retval EFI_SUCCESS All drivers have been connected
- @retval EFI_NOT_FOUND No handles match the search.
- @retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results.
-
-**/
-EFI_STATUS
-GetGlobalEnvironmentVariable (
- IN CONST CHAR16* VariableName,
- IN VOID* DefaultValue,
- IN OUT UINTN* Size,
- OUT VOID** Value
- );
-
-/**
- Return the value of the variable defined by its VariableName and VendorGuid
-
- @param VariableName A Null-terminated string that is the name of the vendor's
- variable.
- @param VendorGuid A unique identifier for the vendor.
- @param DefaultValue Value returned by the function if the variable does not exist
- @param DataSize On input, the size in bytes of the return Data buffer.
- On output the size of data returned in Data.
- @param Value Value read from the UEFI Variable or copy of the default value
- if the UEFI Variable does not exist
-
- @retval EFI_SUCCESS All drivers have been connected
- @retval EFI_NOT_FOUND No handles match the search.
- @retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results.
-
-**/
-EFI_STATUS
-GetEnvironmentVariable (
- IN CONST CHAR16* VariableName,
- IN EFI_GUID* VendorGuid,
- IN VOID* DefaultValue,
- IN OUT UINTN* Size,
- OUT VOID** Value
- );
-
-EFI_STATUS
-BootOptionFromLoadOptionIndex (
- IN UINT16 LoadOptionIndex,
- OUT BDS_LOAD_OPTION** BdsLoadOption
- );
-
-EFI_STATUS
-BootOptionFromLoadOptionVariable (
- IN CHAR16* BootVariableName,
- OUT BDS_LOAD_OPTION** BdsLoadOption
- );
-
-EFI_STATUS
-BootOptionToLoadOptionVariable (
- IN BDS_LOAD_OPTION* BdsLoadOption
- );
-
-UINT16
-BootOptionAllocateBootIndex (
- VOID
- );
-
-/**
- Start an EFI Application from a Device Path
-
- @param ParentImageHandle Handle of the calling image
- @param DevicePath Location of the EFI Application
-
- @retval EFI_SUCCESS All drivers have been connected
- @retval EFI_NOT_FOUND The Linux kernel Device Path has not been found
- @retval EFI_OUT_OF_RESOURCES There is not enough resource memory to store the matching results.
-
-**/
-EFI_STATUS
-BdsStartEfiApplication (
- IN EFI_HANDLE ParentImageHandle,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- IN UINTN LoadOptionsSize,
- IN VOID* LoadOptions
- );
-
-EFI_STATUS
-BdsLoadImage (
- IN EFI_DEVICE_PATH *DevicePath,
- IN EFI_ALLOCATE_TYPE Type,
- IN OUT EFI_PHYSICAL_ADDRESS* Image,
- OUT UINTN *FileSize
- );
-
-/**
- * Call BS.ExitBootServices with the appropriate Memory Map information
- */
-EFI_STATUS
-ShutdownUefiBootServices (
- VOID
- );
-
-/**
- Locate an EFI application in a the Firmware Volumes by its name
-
- @param EfiAppGuid Guid of the EFI Application into the Firmware Volume
- @param DevicePath EFI Device Path of the EFI application
-
- @return EFI_SUCCESS The function completed successfully.
- @return EFI_NOT_FOUND The protocol could not be located.
- @return EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
-
-**/
-EFI_STATUS
-LocateEfiApplicationInFvByName (
- IN CONST CHAR16* EfiAppName,
- OUT EFI_DEVICE_PATH **DevicePath
- );
-
-/**
- Locate an EFI application in a the Firmware Volumes by its GUID
-
- @param EfiAppGuid Guid of the EFI Application into the Firmware Volume
- @param DevicePath EFI Device Path of the EFI application
-
- @return EFI_SUCCESS The function completed successfully.
- @return EFI_NOT_FOUND The protocol could not be located.
- @return EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
-
-**/
-EFI_STATUS
-LocateEfiApplicationInFvByGuid (
- IN CONST EFI_GUID *EfiAppGuid,
- OUT EFI_DEVICE_PATH **DevicePath
- );
-
-#endif
diff --git a/ArmPkg/Include/Library/DefaultExceptionHandlerLib.h b/ArmPkg/Include/Library/DefaultExceptionHandlerLib.h deleted file mode 100644 index 5c7d7e2600..0000000000 --- a/ArmPkg/Include/Library/DefaultExceptionHandlerLib.h +++ /dev/null @@ -1,31 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __DEFAULT_EXCEPTION_HANDLER_LIB_H__
-#define __DEFAULT_EXCEPTION_HANDLER_LIB_H__
-
-/**
- This is the default action to take on an unexpected exception
-
- @param ExceptionType Type of the exception
- @param SystemContext Register state at the time of the Exception
-
-**/
-VOID
-DefaultExceptionHandler (
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN OUT EFI_SYSTEM_CONTEXT SystemContext
- );
-
-#endif
diff --git a/ArmPkg/Include/Library/SemihostLib.h b/ArmPkg/Include/Library/SemihostLib.h deleted file mode 100644 index 4a91593e31..0000000000 --- a/ArmPkg/Include/Library/SemihostLib.h +++ /dev/null @@ -1,138 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Portions copyright (c) 2011, 2012, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __SEMIHOSTING_H__
-#define __SEMIHOSTING_H__
-
-/*
- *
- * Please refer to ARM RVDS 3.0 Compiler and Libraries Guide for more information
- * about the semihosting interface.
- *
- */
-
-#define SEMIHOST_FILE_MODE_READ (0 << 2)
-#define SEMIHOST_FILE_MODE_WRITE (1 << 2)
-#define SEMIHOST_FILE_MODE_APPEND (2 << 2)
-#define SEMIHOST_FILE_MODE_UPDATE (1 << 1)
-#define SEMIHOST_FILE_MODE_BINARY (1 << 0)
-#define SEMIHOST_FILE_MODE_ASCII (0 << 0)
-
-BOOLEAN
-SemihostConnectionSupported (
- VOID
- );
-
-RETURN_STATUS
-SemihostFileOpen (
- IN CHAR8 *FileName,
- IN UINT32 Mode,
- OUT UINTN *FileHandle
- );
-
-RETURN_STATUS
-SemihostFileSeek (
- IN UINTN FileHandle,
- IN UINTN Offset
- );
-
-RETURN_STATUS
-SemihostFileRead (
- IN UINTN FileHandle,
- IN OUT UINTN *Length,
- OUT VOID *Buffer
- );
-
-RETURN_STATUS
-SemihostFileWrite (
- IN UINTN FileHandle,
- IN OUT UINTN *Length,
- IN VOID *Buffer
- );
-
-RETURN_STATUS
-SemihostFileClose (
- IN UINTN FileHandle
- );
-
-RETURN_STATUS
-SemihostFileLength (
- IN UINTN FileHandle,
- OUT UINTN *Length
- );
-
-/**
- Get a temporary name for a file from the host running the debug agent.
-
- @param[out] Buffer Pointer to the buffer where the temporary name has to
- be stored
- @param[in] Identifier File name identifier (integer in the range 0 to 255)
- @param[in] Length Length of the buffer to store the temporary name
-
- @retval RETURN_SUCCESS Temporary name returned
- @retval RETURN_INVALID_PARAMETER Invalid buffer address
- @retval RETURN_ABORTED Temporary name not returned
-
-**/
-RETURN_STATUS
-SemihostFileTmpName(
- OUT VOID *Buffer,
- IN UINT8 Identifier,
- IN UINTN Length
- );
-
-RETURN_STATUS
-SemihostFileRemove (
- IN CHAR8 *FileName
- );
-
-/**
- Rename a specified file.
-
- @param[in] FileName Name of the file to rename.
- @param[in] NewFileName The new name of the file.
-
- @retval RETURN_SUCCESS File Renamed
- @retval RETURN_INVALID_PARAMETER Either the current or the new name is not specified
- @retval RETURN_ABORTED Rename failed
-
-**/
-RETURN_STATUS
-SemihostFileRename(
- IN CHAR8 *FileName,
- IN CHAR8 *NewFileName
- );
-
-CHAR8
-SemihostReadCharacter (
- VOID
- );
-
-VOID
-SemihostWriteCharacter (
- IN CHAR8 Character
- );
-
-VOID
-SemihostWriteString (
- IN CHAR8 *String
- );
-
-UINT32
-SemihostSystem (
- IN CHAR8 *CommandLine
- );
-
-#endif // __SEMIHOSTING_H__
diff --git a/ArmPkg/Include/Library/UncachedMemoryAllocationLib.h b/ArmPkg/Include/Library/UncachedMemoryAllocationLib.h deleted file mode 100644 index a49d8d3ac9..0000000000 --- a/ArmPkg/Include/Library/UncachedMemoryAllocationLib.h +++ /dev/null @@ -1,665 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __UNCACHED_MEMORY_ALLOCATION_LIB_H__
-#define __UNCACHED_MEMORY_ALLOCATION_LIB_H__
-
-/**
- Converts a cached or uncached address to a physical address suitable for use in SoC registers.
-
- @param VirtualAddress The pointer to convert.
-
- @return The physical address of the supplied virtual pointer.
-
-**/
-EFI_PHYSICAL_ADDRESS
-ConvertToPhysicalAddress (
- IN VOID *VirtualAddress
- );
-
-/**
- Converts a cached or uncached address to a cached address.
-
- @param Address The pointer to convert.
-
- @return The address of the cached memory location corresponding to the input address.
-
-**/
-VOID *
-ConvertToCachedAddress (
- IN VOID *Address
- );
-
-/**
- Converts a cached or uncached address to an uncached address.
-
- @param Address The pointer to convert.
-
- @return The address of the uncached memory location corresponding to the input address.
-
-**/
-VOID *
-ConvertToUncachedAddress (
- IN VOID *Address
- );
-
-/**
- Allocates one or more 4KB pages of type EfiBootServicesData.
-
- Allocates the number of 4KB pages of type EfiBootServicesData and returns a pointer to the
- allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
- is returned. If there is not enough memory remaining to satisfy the request, then NULL is
- returned.
-
- @param Pages The number of 4 KB pages to allocate.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocatePages (
- IN UINTN Pages
- );
-
-/**
- Allocates one or more 4KB pages of type EfiRuntimeServicesData.
-
- Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
- allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
- is returned. If there is not enough memory remaining to satisfy the request, then NULL is
- returned.
-
- @param Pages The number of 4 KB pages to allocate.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateRuntimePages (
- IN UINTN Pages
- );
-
-/**
- Allocates one or more 4KB pages of type EfiReservedMemoryType.
-
- Allocates the number of 4KB pages of type EfiReservedMemoryType and returns a pointer to the
- allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
- is returned. If there is not enough memory remaining to satisfy the request, then NULL is
- returned.
-
- @param Pages The number of 4 KB pages to allocate.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateReservedPages (
- IN UINTN Pages
- );
-
-/**
- Frees one or more 4KB pages that were previously allocated with one of the page allocation
- functions in the Memory Allocation Library.
-
- Frees the number of 4KB pages specified by Pages from the buffer specified by Buffer. Buffer
- must have been allocated on a previous call to the page allocation services of the Memory
- Allocation Library.
- If Buffer was not allocated with a page allocation function in the Memory Allocation Library,
- then ASSERT().
- If Pages is zero, then ASSERT().
-
- @param Buffer Pointer to the buffer of pages to free.
- @param Pages The number of 4 KB pages to free.
-
-**/
-VOID
-EFIAPI
-UncachedFreePages (
- IN VOID *Buffer,
- IN UINTN Pages
- );
-
-/**
- Allocates one or more 4KB pages of type EfiBootServicesData at a specified alignment.
-
- Allocates the number of 4KB pages specified by Pages of type EfiBootServicesData with an
- alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is
- returned. If there is not enough memory at the specified alignment remaining to satisfy the
- request, then NULL is returned.
- If Alignment is not a power of two and Alignment is not zero, then ASSERT().
-
- @param Pages The number of 4 KB pages to allocate.
- @param Alignment The requested alignment of the allocation. Must be a power of two.
- If Alignment is zero, then byte alignment is used.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateAlignedPages (
- IN UINTN Pages,
- IN UINTN Alignment
- );
-
-/**
- Allocates one or more 4KB pages of type EfiRuntimeServicesData at a specified alignment.
-
- Allocates the number of 4KB pages specified by Pages of type EfiRuntimeServicesData with an
- alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is
- returned. If there is not enough memory at the specified alignment remaining to satisfy the
- request, then NULL is returned.
- If Alignment is not a power of two and Alignment is not zero, then ASSERT().
-
- @param Pages The number of 4 KB pages to allocate.
- @param Alignment The requested alignment of the allocation. Must be a power of two.
- If Alignment is zero, then byte alignment is used.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateAlignedRuntimePages (
- IN UINTN Pages,
- IN UINTN Alignment
- );
-
-/**
- Allocates one or more 4KB pages of type EfiReservedMemoryType at a specified alignment.
-
- Allocates the number of 4KB pages specified by Pages of type EfiReservedMemoryType with an
- alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is
- returned. If there is not enough memory at the specified alignment remaining to satisfy the
- request, then NULL is returned.
- If Alignment is not a power of two and Alignment is not zero, then ASSERT().
-
- @param Pages The number of 4 KB pages to allocate.
- @param Alignment The requested alignment of the allocation. Must be a power of two.
- If Alignment is zero, then byte alignment is used.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateAlignedReservedPages (
- IN UINTN Pages,
- IN UINTN Alignment
- );
-
-/**
- Frees one or more 4KB pages that were previously allocated with one of the aligned page
- allocation functions in the Memory Allocation Library.
-
- Frees the number of 4KB pages specified by Pages from the buffer specified by Buffer. Buffer
- must have been allocated on a previous call to the aligned page allocation services of the Memory
- Allocation Library.
- If Buffer was not allocated with an aligned page allocation function in the Memory Allocation
- Library, then ASSERT().
- If Pages is zero, then ASSERT().
-
- @param Buffer Pointer to the buffer of pages to free.
- @param Pages The number of 4 KB pages to free.
-
-**/
-VOID
-EFIAPI
-UncachedFreeAlignedPages (
- IN VOID *Buffer,
- IN UINTN Pages
- );
-
-/**
- Allocates a buffer of type EfiBootServicesData.
-
- Allocates the number bytes specified by AllocationSize of type EfiBootServicesData and returns a
- pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is
- returned. If there is not enough memory remaining to satisfy the request, then NULL is returned.
-
- @param AllocationSize The number of bytes to allocate.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocatePool (
- IN UINTN AllocationSize
- );
-
-/**
- Allocates a buffer of type EfiRuntimeServicesData.
-
- Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData and returns
- a pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is
- returned. If there is not enough memory remaining to satisfy the request, then NULL is returned.
-
- @param AllocationSize The number of bytes to allocate.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateRuntimePool (
- IN UINTN AllocationSize
- );
-
-/**
- Allocates a buffer of type EfieservedMemoryType.
-
- Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType and returns
- a pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is
- returned. If there is not enough memory remaining to satisfy the request, then NULL is returned.
-
- @param AllocationSize The number of bytes to allocate.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateReservedPool (
- IN UINTN AllocationSize
- );
-
-/**
- Allocates and zeros a buffer of type EfiBootServicesData.
-
- Allocates the number bytes specified by AllocationSize of type EfiBootServicesData, clears the
- buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a
- valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the
- request, then NULL is returned.
-
- @param AllocationSize The number of bytes to allocate and zero.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateZeroPool (
- IN UINTN AllocationSize
- );
-
-/**
- Allocates and zeros a buffer of type EfiRuntimeServicesData.
-
- Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData, clears the
- buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a
- valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the
- request, then NULL is returned.
-
- @param AllocationSize The number of bytes to allocate and zero.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateRuntimeZeroPool (
- IN UINTN AllocationSize
- );
-
-/**
- Allocates and zeros a buffer of type EfiReservedMemoryType.
-
- Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType, clears the
- buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a
- valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the
- request, then NULL is returned.
-
- @param AllocationSize The number of bytes to allocate and zero.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateReservedZeroPool (
- IN UINTN AllocationSize
- );
-
-/**
- Copies a buffer to an allocated buffer of type EfiBootServicesData.
-
- Allocates the number bytes specified by AllocationSize of type EfiBootServicesData, copies
- AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the
- allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there
- is not enough memory remaining to satisfy the request, then NULL is returned.
- If Buffer is NULL, then ASSERT().
- If AllocationSize is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
-
- @param AllocationSize The number of bytes to allocate and zero.
- @param Buffer The buffer to copy to the allocated buffer.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateCopyPool (
- IN UINTN AllocationSize,
- IN CONST VOID *Buffer
- );
-
-/**
- Copies a buffer to an allocated buffer of type EfiRuntimeServicesData.
-
- Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData, copies
- AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the
- allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there
- is not enough memory remaining to satisfy the request, then NULL is returned.
- If Buffer is NULL, then ASSERT().
- If AllocationSize is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
-
- @param AllocationSize The number of bytes to allocate and zero.
- @param Buffer The buffer to copy to the allocated buffer.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateRuntimeCopyPool (
- IN UINTN AllocationSize,
- IN CONST VOID *Buffer
- );
-
-/**
- Copies a buffer to an allocated buffer of type EfiReservedMemoryType.
-
- Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType, copies
- AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the
- allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there
- is not enough memory remaining to satisfy the request, then NULL is returned.
- If Buffer is NULL, then ASSERT().
- If AllocationSize is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
-
- @param AllocationSize The number of bytes to allocate and zero.
- @param Buffer The buffer to copy to the allocated buffer.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateReservedCopyPool (
- IN UINTN AllocationSize,
- IN CONST VOID *Buffer
- );
-
-/**
- Frees a buffer that was previously allocated with one of the pool allocation functions in the
- Memory Allocation Library.
-
- Frees the buffer specified by Buffer. Buffer must have been allocated on a previous call to the
- pool allocation services of the Memory Allocation Library.
- If Buffer was not allocated with a pool allocation function in the Memory Allocation Library,
- then ASSERT().
-
- @param Buffer Pointer to the buffer to free.
-
-**/
-VOID
-EFIAPI
-UncachedFreePool (
- IN VOID *Buffer
- );
-
-/**
- Allocates a buffer of type EfiBootServicesData at a specified alignment.
-
- Allocates the number bytes specified by AllocationSize of type EfiBootServicesData with an
- alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,
- then a valid buffer of 0 size is returned. If there is not enough memory at the specified
- alignment remaining to satisfy the request, then NULL is returned.
- If Alignment is not a power of two and Alignment is not zero, then ASSERT().
-
- @param AllocationSize The number of bytes to allocate.
- @param Alignment The requested alignment of the allocation. Must be a power of two.
- If Alignment is zero, then byte alignment is used.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateAlignedPool (
- IN UINTN AllocationSize,
- IN UINTN Alignment
- );
-
-/**
- Allocates a buffer of type EfiRuntimeServicesData at a specified alignment.
-
- Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData with an
- alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,
- then a valid buffer of 0 size is returned. If there is not enough memory at the specified
- alignment remaining to satisfy the request, then NULL is returned.
- If Alignment is not a power of two and Alignment is not zero, then ASSERT().
-
- @param AllocationSize The number of bytes to allocate.
- @param Alignment The requested alignment of the allocation. Must be a power of two.
- If Alignment is zero, then byte alignment is used.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateAlignedRuntimePool (
- IN UINTN AllocationSize,
- IN UINTN Alignment
- );
-
-/**
- Allocates a buffer of type EfieservedMemoryType at a specified alignment.
-
- Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType with an
- alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,
- then a valid buffer of 0 size is returned. If there is not enough memory at the specified
- alignment remaining to satisfy the request, then NULL is returned.
- If Alignment is not a power of two and Alignment is not zero, then ASSERT().
-
- @param AllocationSize The number of bytes to allocate.
- @param Alignment The requested alignment of the allocation. Must be a power of two.
- If Alignment is zero, then byte alignment is used.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateAlignedReservedPool (
- IN UINTN AllocationSize,
- IN UINTN Alignment
- );
-
-/**
- Allocates and zeros a buffer of type EfiBootServicesData at a specified alignment.
-
- Allocates the number bytes specified by AllocationSize of type EfiBootServicesData with an
- alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the
- allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there
- is not enough memory at the specified alignment remaining to satisfy the request, then NULL is
- returned.
- If Alignment is not a power of two and Alignment is not zero, then ASSERT().
-
- @param AllocationSize The number of bytes to allocate.
- @param Alignment The requested alignment of the allocation. Must be a power of two.
- If Alignment is zero, then byte alignment is used.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateAlignedZeroPool (
- IN UINTN AllocationSize,
- IN UINTN Alignment
- );
-
-/**
- Allocates and zeros a buffer of type EfiRuntimeServicesData at a specified alignment.
-
- Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData with an
- alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the
- allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there
- is not enough memory at the specified alignment remaining to satisfy the request, then NULL is
- returned.
- If Alignment is not a power of two and Alignment is not zero, then ASSERT().
-
- @param AllocationSize The number of bytes to allocate.
- @param Alignment The requested alignment of the allocation. Must be a power of two.
- If Alignment is zero, then byte alignment is used.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateAlignedRuntimeZeroPool (
- IN UINTN AllocationSize,
- IN UINTN Alignment
- );
-
-/**
- Allocates and zeros a buffer of type EfieservedMemoryType at a specified alignment.
-
- Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType with an
- alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the
- allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there
- is not enough memory at the specified alignment remaining to satisfy the request, then NULL is
- returned.
- If Alignment is not a power of two and Alignment is not zero, then ASSERT().
-
- @param AllocationSize The number of bytes to allocate.
- @param Alignment The requested alignment of the allocation. Must be a power of two.
- If Alignment is zero, then byte alignment is used.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateAlignedReservedZeroPool (
- IN UINTN AllocationSize,
- IN UINTN Alignment
- );
-
-/**
- Copies a buffer to an allocated buffer of type EfiBootServicesData at a specified alignment.
-
- Allocates the number bytes specified by AllocationSize of type EfiBootServicesData type with an
- alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,
- then a valid buffer of 0 size is returned. If there is not enough memory at the specified
- alignment remaining to satisfy the request, then NULL is returned.
- If Alignment is not a power of two and Alignment is not zero, then ASSERT().
-
- @param AllocationSize The number of bytes to allocate.
- @param Buffer The buffer to copy to the allocated buffer.
- @param Alignment The requested alignment of the allocation. Must be a power of two.
- If Alignment is zero, then byte alignment is used.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateAlignedCopyPool (
- IN UINTN AllocationSize,
- IN CONST VOID *Buffer,
- IN UINTN Alignment
- );
-
-/**
- Copies a buffer to an allocated buffer of type EfiRuntimeServicesData at a specified alignment.
-
- Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData type with an
- alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,
- then a valid buffer of 0 size is returned. If there is not enough memory at the specified
- alignment remaining to satisfy the request, then NULL is returned.
- If Alignment is not a power of two and Alignment is not zero, then ASSERT().
-
- @param AllocationSize The number of bytes to allocate.
- @param Buffer The buffer to copy to the allocated buffer.
- @param Alignment The requested alignment of the allocation. Must be a power of two.
- If Alignment is zero, then byte alignment is used.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateAlignedRuntimeCopyPool (
- IN UINTN AllocationSize,
- IN CONST VOID *Buffer,
- IN UINTN Alignment
- );
-
-/**
- Copies a buffer to an allocated buffer of type EfiReservedMemoryType at a specified alignment.
-
- Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType type with an
- alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,
- then a valid buffer of 0 size is returned. If there is not enough memory at the specified
- alignment remaining to satisfy the request, then NULL is returned.
- If Alignment is not a power of two and Alignment is not zero, then ASSERT().
-
- @param AllocationSize The number of bytes to allocate.
- @param Buffer The buffer to copy to the allocated buffer.
- @param Alignment The requested alignment of the allocation. Must be a power of two.
- If Alignment is zero, then byte alignment is used.
-
- @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-EFIAPI
-UncachedAllocateAlignedReservedCopyPool (
- IN UINTN AllocationSize,
- IN CONST VOID *Buffer,
- IN UINTN Alignment
- );
-
-/**
- Frees a buffer that was previously allocated with one of the aligned pool allocation functions
- in the Memory Allocation Library.
-
- Frees the buffer specified by Buffer. Buffer must have been allocated on a previous call to the
- aligned pool allocation services of the Memory Allocation Library.
- If Buffer was not allocated with an aligned pool allocation function in the Memory Allocation
- Library, then ASSERT().
-
- @param Buffer Pointer to the buffer to free.
-
-**/
-VOID
-EFIAPI
-UncachedFreeAlignedPool (
- IN VOID *Buffer
- );
-
-VOID
-EFIAPI
-UncachedSafeFreePool (
- IN VOID *Buffer
- );
-
-#endif // __UNCACHED_MEMORY_ALLOCATION_LIB_H__
diff --git a/ArmPkg/Include/Ppi/ArmMpCoreInfo.h b/ArmPkg/Include/Ppi/ArmMpCoreInfo.h deleted file mode 100644 index fdacd811b8..0000000000 --- a/ArmPkg/Include/Ppi/ArmMpCoreInfo.h +++ /dev/null @@ -1,58 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __ARM_MP_CORE_INFO_PPI_H__
-#define __ARM_MP_CORE_INFO_PPI_H__
-
-#include <Guid/ArmMpCoreInfo.h>
-
-#define ARM_MP_CORE_INFO_PPI_GUID \
- { 0x6847cc74, 0xe9ec, 0x4f8f, {0xa2, 0x9d, 0xab, 0x44, 0xe7, 0x54, 0xa8, 0xfc} }
-
-/**
- This service of the EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into
- permanent memory.
-
- @param PeiServices Pointer to the PEI Services Table.
- @param TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the
- Temporary RAM contents.
- @param PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the
- Temporary RAM contents.
- @param CopySize Amount of memory to migrate from temporary to permanent memory.
-
- @retval EFI_SUCCESS The data was successfully returned.
- @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when
- TemporaryMemoryBase > PermanentMemoryBase.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI * ARM_MP_CORE_INFO_GET) (
- OUT UINTN *ArmCoreCount,
- OUT ARM_CORE_INFO **ArmCoreTable
-);
-
-///
-/// This service abstracts the ability to migrate contents of the platform early memory store.
-/// Note: The name EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI is different from the current PI 1.2 spec.
-/// This PPI was optional.
-///
-typedef struct {
- ARM_MP_CORE_INFO_GET GetMpCoreInfo;
-} ARM_MP_CORE_INFO_PPI;
-
-extern EFI_GUID gArmMpCoreInfoPpiGuid;
-extern EFI_GUID gArmMpCoreInfoGuid;
-
-#endif
diff --git a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c b/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c deleted file mode 100644 index b81293c5cf..0000000000 --- a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c +++ /dev/null @@ -1,292 +0,0 @@ -/** @file
- Generic ARM implementation of TimerLib.h
-
- Copyright (c) 2011-2016, ARM Limited. All rights reserved.
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-
-#include <Base.h>
-#include <Library/ArmLib.h>
-#include <Library/BaseLib.h>
-#include <Library/TimerLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-#include <Library/ArmGenericTimerCounterLib.h>
-
-#define TICKS_PER_MICRO_SEC (PcdGet32 (PcdArmArchTimerFreqInHz)/1000000U)
-
-// Select appropriate multiply function for platform architecture.
-#ifdef MDE_CPU_ARM
-#define MultU64xN MultU64x32
-#else
-#define MultU64xN MultU64x64
-#endif
-
-
-RETURN_STATUS
-EFIAPI
-TimerConstructor (
- VOID
- )
-{
- //
- // Check if the ARM Generic Timer Extension is implemented.
- //
- if (ArmIsArchTimerImplemented ()) {
-
- //
- // Check if Architectural Timer frequency is pre-determined by the platform
- // (ie. nonzero).
- //
- if (PcdGet32 (PcdArmArchTimerFreqInHz) != 0) {
- //
- // Check if ticks/uS is not 0. The Architectural timer runs at constant
- // frequency, irrespective of CPU frequency. According to Generic Timer
- // Ref manual, lower bound of the frequency is in the range of 1-10MHz.
- //
- ASSERT (TICKS_PER_MICRO_SEC);
-
-#ifdef MDE_CPU_ARM
- //
- // Only set the frequency for ARMv7. We expect the secure firmware to
- // have already done it.
- // If the security extension is not implemented, set Timer Frequency
- // here.
- //
- if ((ArmReadIdPfr1 () & ARM_PFR1_SEC) == 0x0) {
- ArmGenericTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));
- }
-#endif
- }
-
- //
- // Architectural Timer Frequency must be set in Secure privileged
- // mode (if secure extension is supported).
- // If the reset value (0) is returned, just ASSERT.
- //
- ASSERT (ArmGenericTimerGetTimerFreq () != 0);
-
- } else {
- DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, hence this library cannot be used.\n"));
- ASSERT (0);
- }
-
- return RETURN_SUCCESS;
-}
-
-/**
- A local utility function that returns the PCD value, if specified.
- Otherwise it defaults to ArmGenericTimerGetTimerFreq.
-
- @return The timer frequency.
-
-**/
-STATIC
-UINTN
-EFIAPI
-GetPlatformTimerFreq (
- )
-{
- UINTN TimerFreq;
-
- TimerFreq = PcdGet32 (PcdArmArchTimerFreqInHz);
- if (TimerFreq == 0) {
- TimerFreq = ArmGenericTimerGetTimerFreq ();
- }
- return TimerFreq;
-}
-
-
-/**
- Stalls the CPU for the number of microseconds specified by MicroSeconds.
-
- @param MicroSeconds The minimum number of microseconds to delay.
-
- @return The value of MicroSeconds input.
-
-**/
-UINTN
-EFIAPI
-MicroSecondDelay (
- IN UINTN MicroSeconds
- )
-{
- UINT64 TimerTicks64;
- UINT64 SystemCounterVal;
-
- // Calculate counter ticks that represent requested delay:
- // = MicroSeconds x TICKS_PER_MICRO_SEC
- // = MicroSeconds x Frequency.10^-6
- TimerTicks64 = DivU64x32 (
- MultU64xN (
- MicroSeconds,
- GetPlatformTimerFreq ()
- ),
- 1000000U
- );
-
- // Read System Counter value
- SystemCounterVal = ArmGenericTimerGetSystemCount ();
-
- TimerTicks64 += SystemCounterVal;
-
- // Wait until delay count expires.
- while (SystemCounterVal < TimerTicks64) {
- SystemCounterVal = ArmGenericTimerGetSystemCount ();
- }
-
- return MicroSeconds;
-}
-
-
-/**
- Stalls the CPU for at least the given number of nanoseconds.
-
- Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
-
- When the timer frequency is 1MHz, each tick corresponds to 1 microsecond.
- Therefore, the nanosecond delay will be rounded up to the nearest 1 microsecond.
-
- @param NanoSeconds The minimum number of nanoseconds to delay.
-
- @return The value of NanoSeconds inputed.
-
-**/
-UINTN
-EFIAPI
-NanoSecondDelay (
- IN UINTN NanoSeconds
- )
-{
- UINTN MicroSeconds;
-
- // Round up to 1us Tick Number
- MicroSeconds = NanoSeconds / 1000;
- MicroSeconds += ((NanoSeconds % 1000) == 0) ? 0 : 1;
-
- MicroSecondDelay (MicroSeconds);
-
- return NanoSeconds;
-}
-
-/**
- Retrieves the current value of a 64-bit free running performance counter.
-
- The counter can either count up by 1 or count down by 1. If the physical
- performance counter counts by a larger increment, then the counter values
- must be translated. The properties of the counter can be retrieved from
- GetPerformanceCounterProperties().
-
- @return The current value of the free running performance counter.
-
-**/
-UINT64
-EFIAPI
-GetPerformanceCounter (
- VOID
- )
-{
- // Just return the value of system count
- return ArmGenericTimerGetSystemCount ();
-}
-
-/**
- Retrieves the 64-bit frequency in Hz and the range of performance counter
- values.
-
- If StartValue is not NULL, then the value that the performance counter starts
- with immediately after is it rolls over is returned in StartValue. If
- EndValue is not NULL, then the value that the performance counter end with
- immediately before it rolls over is returned in EndValue. The 64-bit
- frequency of the performance counter in Hz is always returned. If StartValue
- is less than EndValue, then the performance counter counts up. If StartValue
- is greater than EndValue, then the performance counter counts down. For
- example, a 64-bit free running counter that counts up would have a StartValue
- of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
- that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
-
- @param StartValue The value the performance counter starts with when it
- rolls over.
- @param EndValue The value that the performance counter ends with before
- it rolls over.
-
- @return The frequency in Hz.
-
-**/
-UINT64
-EFIAPI
-GetPerformanceCounterProperties (
- OUT UINT64 *StartValue, OPTIONAL
- OUT UINT64 *EndValue OPTIONAL
- )
-{
- if (StartValue != NULL) {
- // Timer starts at 0
- *StartValue = (UINT64)0ULL ;
- }
-
- if (EndValue != NULL) {
- // Timer counts up.
- *EndValue = 0xFFFFFFFFFFFFFFFFUL;
- }
-
- return (UINT64)ArmGenericTimerGetTimerFreq ();
-}
-
-/**
- Converts elapsed ticks of performance counter to time in nanoseconds.
-
- This function converts the elapsed ticks of running performance counter to
- time value in unit of nanoseconds.
-
- @param Ticks The number of elapsed ticks of running performance counter.
-
- @return The elapsed time in nanoseconds.
-
-**/
-UINT64
-EFIAPI
-GetTimeInNanoSecond (
- IN UINT64 Ticks
- )
-{
- UINT64 NanoSeconds;
- UINT32 Remainder;
- UINT32 TimerFreq;
-
- TimerFreq = GetPlatformTimerFreq ();
- //
- // Ticks
- // Time = --------- x 1,000,000,000
- // Frequency
- //
- NanoSeconds = MultU64xN (
- DivU64x32Remainder (
- Ticks,
- TimerFreq,
- &Remainder),
- 1000000000U
- );
-
- //
- // Frequency < 0x100000000, so Remainder < 0x100000000, then (Remainder * 1,000,000,000)
- // will not overflow 64-bit.
- //
- NanoSeconds += DivU64x32 (
- MultU64xN (
- (UINT64) Remainder,
- 1000000000U),
- TimerFreq
- );
-
- return NanoSeconds;
-}
diff --git a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf b/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf deleted file mode 100644 index 03a4b1efa6..0000000000 --- a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf +++ /dev/null @@ -1,38 +0,0 @@ -#/** @file
-#
-# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmArchTimerLib
- FILE_GUID = 82da1b44-d2d6-4a7d-bbf0-a0cb67964034
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = TimerLib
- CONSTRUCTOR = TimerConstructor
-
-[Sources.common]
- ArmArchTimerLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- DebugLib
- ArmLib
- BaseLib
- ArmGenericTimerCounterLib
-
-[Pcd]
- gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz
diff --git a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c deleted file mode 100644 index 0759e38cd4..0000000000 --- a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c +++ /dev/null @@ -1,131 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-#include <Base.h>
-#include <Library/ArmLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-STATIC
-VOID
-CacheRangeOperation (
- IN VOID *Start,
- IN UINTN Length,
- IN LINE_OPERATION LineOperation,
- IN UINTN LineLength
- )
-{
- UINTN ArmCacheLineAlignmentMask = LineLength - 1;
-
- // Align address (rounding down)
- UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
- UINTN EndAddress = (UINTN)Start + Length;
-
- // Perform the line operation on an address in each cache line
- while (AlignedAddress < EndAddress) {
- LineOperation(AlignedAddress);
- AlignedAddress += LineLength;
- }
- ArmDataSynchronizationBarrier ();
-}
-
-VOID
-EFIAPI
-InvalidateInstructionCache (
- VOID
- )
-{
- ASSERT (FALSE);
-}
-
-VOID
-EFIAPI
-InvalidateDataCache (
- VOID
- )
-{
- ASSERT (FALSE);
-}
-
-VOID *
-EFIAPI
-InvalidateInstructionCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryToPoUByMVA,
- ArmDataCacheLineLength ());
- CacheRangeOperation (Address, Length,
- ArmInvalidateInstructionCacheEntryToPoUByMVA,
- ArmInstructionCacheLineLength ());
-
- ArmInstructionSynchronizationBarrier ();
-
- return Address;
-}
-
-VOID
-EFIAPI
-WriteBackInvalidateDataCache (
- VOID
- )
-{
- ASSERT (FALSE);
-}
-
-VOID *
-EFIAPI
-WriteBackInvalidateDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA,
- ArmDataCacheLineLength ());
- return Address;
-}
-
-VOID
-EFIAPI
-WriteBackDataCache (
- VOID
- )
-{
- ASSERT (FALSE);
-}
-
-VOID *
-EFIAPI
-WriteBackDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA,
- ArmDataCacheLineLength ());
- return Address;
-}
-
-VOID *
-EFIAPI
-InvalidateDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA,
- ArmDataCacheLineLength ());
- return Address;
-}
diff --git a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf deleted file mode 100644 index d519972942..0000000000 --- a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf +++ /dev/null @@ -1,33 +0,0 @@ -#/** @file
-# Implement CacheMaintenanceLib for ARM architectures
-#
-# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmCacheMaintenanceLib
- FILE_GUID = 1A20BE1F-33AD-450C-B49A-7123FCA8B7F9
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = CacheMaintenanceLib
-
-[Sources.common]
- ArmCacheMaintenanceLib.c
-
-[Packages]
- ArmPkg/ArmPkg.dec
- MdePkg/MdePkg.dec
-
-[LibraryClasses]
- ArmLib
- BaseLib
diff --git a/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c b/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c deleted file mode 100644 index 3ecae77d33..0000000000 --- a/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c +++ /dev/null @@ -1,48 +0,0 @@ -/** @file
- Default exception handler
-
- Copyright (c) 2014, ARM Limited. All rights reserved.
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD
- License which accompanies this distribution. The full text of the license may
- be found at http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-#include <Library/BaseLib.h>
-#include <Library/PrintLib.h>
-#include <Library/ArmDisassemblerLib.h>
-
-/**
- Place a disassembly of of **OpCodePtr into buffer, and update OpCodePtr to
- point to next instruction.
-
- @param OpCodePtrPtr Pointer to pointer of instruction to disassemble.
- @param Thumb TRUE for Thumb(2), FALSE for ARM instruction stream
- @param Extended TRUE dump hex for instruction too.
- @param ItBlock Size of IT Block
- @param Buf Buffer to sprintf disassembly into.
- @param Size Size of Buf in bytes.
-
-**/
-VOID
-DisassembleInstruction (
- IN UINT8 **OpCodePtr,
- IN BOOLEAN Thumb,
- IN BOOLEAN Extended,
- IN OUT UINT32 *ItBlock,
- OUT CHAR8 *Buf,
- OUT UINTN Size
- )
-{
- // Not yet supported for AArch64.
- // Put error in the buffer as we have no return code and the buffer may be
- // printed directly so needs a '\0'.
- AsciiSPrint (Buf, Size, "AArch64 not supported");
- return;
-}
diff --git a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c deleted file mode 100644 index 29d9414a78..0000000000 --- a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c +++ /dev/null @@ -1,455 +0,0 @@ -/** @file
- Default exception handler
-
- Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-#include <Library/BaseLib.h>
-#include <Library/PrintLib.h>
-#include <Library/ArmDisassemblerLib.h>
-
-CHAR8 *gCondition[] = {
- "EQ",
- "NE",
- "CS",
- "CC",
- "MI",
- "PL",
- "VS",
- "VC",
- "HI",
- "LS",
- "GE",
- "LT",
- "GT",
- "LE",
- "",
- "2"
-};
-
-#define COND(_a) gCondition[((_a) >> 28)]
-
-CHAR8 *gReg[] = {
- "r0",
- "r1",
- "r2",
- "r3",
- "r4",
- "r5",
- "r6",
- "r7",
- "r8",
- "r9",
- "r10",
- "r11",
- "r12",
- "sp",
- "lr",
- "pc"
-};
-
-CHAR8 *gLdmAdr[] = {
- "DA",
- "IA",
- "DB",
- "IB"
-};
-
-CHAR8 *gLdmStack[] = {
- "FA",
- "FD",
- "EA",
- "ED"
-};
-
-#define LDM_EXT(_reg, _off) ((_reg == 13) ? gLdmStack[(_off)] : gLdmAdr[(_off)])
-
-
-#define SIGN(_U) ((_U) ? "" : "-")
-#define WRITE(_W) ((_W) ? "!" : "")
-#define BYTE(_B) ((_B) ? "B":"")
-#define USER(_B) ((_B) ? "^" : "")
-
-CHAR8 mMregListStr[4*15 + 1];
-
-CHAR8 *
-MRegList (
- UINT32 OpCode
- )
-{
- UINTN Index, Start, End;
- BOOLEAN First;
-
- mMregListStr[0] = '\0';
- AsciiStrCatS (mMregListStr, sizeof mMregListStr, "{");
- for (Index = 0, First = TRUE; Index <= 15; Index++) {
- if ((OpCode & (1 << Index)) != 0) {
- Start = End = Index;
- for (Index++; ((OpCode & (1 << Index)) != 0) && Index <= 15; Index++) {
- End = Index;
- }
-
- if (!First) {
- AsciiStrCatS (mMregListStr, sizeof mMregListStr, ",");
- } else {
- First = FALSE;
- }
-
- if (Start == End) {
- AsciiStrCatS (mMregListStr, sizeof mMregListStr, gReg[Start]);
- AsciiStrCatS (mMregListStr, sizeof mMregListStr, ", ");
- } else {
- AsciiStrCatS (mMregListStr, sizeof mMregListStr, gReg[Start]);
- AsciiStrCatS (mMregListStr, sizeof mMregListStr, "-");
- AsciiStrCatS (mMregListStr, sizeof mMregListStr, gReg[End]);
- }
- }
- }
- if (First) {
- AsciiStrCatS (mMregListStr, sizeof mMregListStr, "ERROR");
- }
- AsciiStrCatS (mMregListStr, sizeof mMregListStr, "}");
-
- // BugBug: Make caller pass in buffer it is cleaner
- return mMregListStr;
-}
-
-CHAR8 *
-FieldMask (
- IN UINT32 Mask
- )
-{
- return "";
-}
-
-UINT32
-RotateRight (
- IN UINT32 Op,
- IN UINT32 Shift
- )
-{
- return (Op >> Shift) | (Op << (32 - Shift));
-}
-
-
-/**
- Place a dissasembly of of **OpCodePtr into buffer, and update OpCodePtr to
- point to next instructin.
-
- We cheat and only decode instructions that access
- memory. If the instruction is not found we dump the instruction in hex.
-
- @param OpCodePtr Pointer to pointer of ARM instruction to disassemble.
- @param Buf Buffer to sprintf disassembly into.
- @param Size Size of Buf in bytes.
- @param Extended TRUE dump hex for instruction too.
-
-**/
-VOID
-DisassembleArmInstruction (
- IN UINT32 **OpCodePtr,
- OUT CHAR8 *Buf,
- OUT UINTN Size,
- IN BOOLEAN Extended
- )
-{
- UINT32 OpCode = **OpCodePtr;
- CHAR8 *Type, *Root;
- BOOLEAN I, P, U, B, W, L, S, H;
- UINT32 Rn, Rd, Rm;
- UINT32 imode, offset_8, offset_12;
- UINT32 Index;
- UINT32 shift_imm, shift;
-
- I = (OpCode & BIT25) == BIT25;
- P = (OpCode & BIT24) == BIT24;
- U = (OpCode & BIT23) == BIT23;
- B = (OpCode & BIT22) == BIT22; // Also called S
- W = (OpCode & BIT21) == BIT21;
- L = (OpCode & BIT20) == BIT20;
- S = (OpCode & BIT6) == BIT6;
- H = (OpCode & BIT5) == BIT5;
- Rn = (OpCode >> 16) & 0xf;
- Rd = (OpCode >> 12) & 0xf;
- Rm = (OpCode & 0xf);
-
-
- if (Extended) {
- Index = AsciiSPrint (Buf, Size, "0x%08x ", OpCode);
- Buf += Index;
- Size -= Index;
- }
-
- // LDREX, STREX
- if ((OpCode & 0x0fe000f0) == 0x01800090) {
- if (L) {
- // A4.1.27 LDREX{<cond>} <Rd>, [<Rn>]
- AsciiSPrint (Buf, Size, "LDREX%a %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn]);
- } else {
- // A4.1.103 STREX{<cond>} <Rd>, <Rm>, [<Rn>]
- AsciiSPrint (Buf, Size, "STREX%a %a, %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn], gReg[Rn]);
- }
- return;
- }
-
- // LDM/STM
- if ((OpCode & 0x0e000000) == 0x08000000) {
- if (L) {
- // A4.1.20 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers>
- // A4.1.21 LDM{<cond>}<addressing_mode> <Rn>, <registers_without_pc>^
- // A4.1.22 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers_and_pc>^
- AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W), MRegList (OpCode), USER (B));
- } else {
- // A4.1.97 STM{<cond>}<addressing_mode> <Rn>{!}, <registers>
- // A4.1.98 STM{<cond>}<addressing_mode> <Rn>, <registers>^
- AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W), MRegList (OpCode), USER (B));
- }
- return;
- }
-
- // LDR/STR Address Mode 2
- if ( ((OpCode & 0x0c000000) == 0x04000000) || ((OpCode & 0xfd70f000 ) == 0xf550f000) ) {
- offset_12 = OpCode & 0xfff;
- if ((OpCode & 0xfd70f000 ) == 0xf550f000) {
- Index = AsciiSPrint (Buf, Size, "PLD");
- } else {
- Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", L ? "LDR" : "STR", COND (OpCode), BYTE (B), (!(P) && W) ? "T":"", gReg[Rd]);
- }
- if (P) {
- if (!I) {
- // A5.2.2 [<Rn>, #+/-<offset_12>]
- // A5.2.5 [<Rn>, #+/-<offset_12>]
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x]%a", gReg[Rn], SIGN (U), offset_12, WRITE (W));
- } else if ((OpCode & 0x03000ff0) == 0x03000000) {
- // A5.2.3 [<Rn>, +/-<Rm>]
- // A5.2.6 [<Rn>, +/-<Rm>]!
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a]%a", gReg[Rn], SIGN (U), WRITE (W));
- } else {
- // A5.2.4 [<Rn>, +/-<Rm>, LSL #<shift_imm>]
- // A5.2.7 [<Rn>, +/-<Rm>, LSL #<shift_imm>]!
- shift_imm = (OpCode >> 7) & 0x1f;
- shift = (OpCode >> 5) & 0x3;
- if (shift == 0x0) {
- Type = "LSL";
- } else if (shift == 0x1) {
- Type = "LSR";
- if (shift_imm == 0) {
- shift_imm = 32;
- }
- } else if (shift == 0x12) {
- Type = "ASR";
- } else if (shift_imm == 0) {
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, RRX]%a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W));
- return;
- } else {
- Type = "ROR";
- }
-
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, #%d]%a", gReg[Rn], SIGN (U), gReg[Rm], Type, shift_imm, WRITE (W));
- }
- } else { // !P
- if (!I) {
- // A5.2.8 [<Rn>], #+/-<offset_12>
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x", gReg[Rn], SIGN (U), offset_12);
- } else if ((OpCode & 0x03000ff0) == 0x03000000) {
- // A5.2.9 [<Rn>], +/-<Rm>
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (U), gReg[Rm]);
- } else {
- // A5.2.10 [<Rn>], +/-<Rm>, LSL #<shift_imm>
- shift_imm = (OpCode >> 7) & 0x1f;
- shift = (OpCode >> 5) & 0x3;
-
- if (shift == 0x0) {
- Type = "LSL";
- } else if (shift == 0x1) {
- Type = "LSR";
- if (shift_imm == 0) {
- shift_imm = 32;
- }
- } else if (shift == 0x12) {
- Type = "ASR";
- } else if (shift_imm == 0) {
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, RRX", gReg[Rn], SIGN (U), gReg[Rm]);
- // FIx me
- return;
- } else {
- Type = "ROR";
- }
-
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, #%d", gReg[Rn], SIGN (U), gReg[Rm], Type, shift_imm);
- }
- }
- return;
- }
-
- if ((OpCode & 0x0e000000) == 0x00000000) {
- // LDR/STR address mode 3
- // LDR|STR{<cond>}H|SH|SB|D <Rd>, <addressing_mode>
- if (L) {
- if (!S) {
- Root = "LDR%aH %a, ";
- } else if (!H) {
- Root = "LDR%aSB %a, ";
- } else {
- Root = "LDR%aSH %a, ";
- }
- } else {
- if (!S) {
- Root = "STR%aH %a ";
- } else if (!H) {
- Root = "LDR%aD %a ";
- } else {
- Root = "STR%aD %a ";
- }
- }
-
- Index = AsciiSPrint (Buf, Size, Root, COND (OpCode), gReg[Rd]);
-
- S = (OpCode & BIT6) == BIT6;
- H = (OpCode & BIT5) == BIT5;
- offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff;
- if (P & !W) {
- // Immediate offset/index
- if (B) {
- // A5.3.2 [<Rn>, #+/-<offset_8>]
- // A5.3.4 [<Rn>, #+/-<offset_8>]!
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%d]%a", gReg[Rn], SIGN (U), offset_8, WRITE (W));
- } else {
- // A5.3.3 [<Rn>, +/-<Rm>]
- // A5.3.5 [<Rn>, +/-<Rm>]!
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%]a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W));
- }
- } else {
- // Register offset/index
- if (B) {
- // A5.3.6 [<Rn>], #+/-<offset_8>
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%d", gReg[Rn], SIGN (U), offset_8);
- } else {
- // A5.3.7 [<Rn>], +/-<Rm>
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (U), gReg[Rm]);
- }
- }
- return;
- }
-
- if ((OpCode & 0x0fb000f0) == 0x01000050) {
- // A4.1.108 SWP SWP{<cond>}B <Rd>, <Rm>, [<Rn>]
- // A4.1.109 SWPB SWP{<cond>}B <Rd>, <Rm>, [<Rn>]
- AsciiSPrint (Buf, Size, "SWP%a%a %a, %a, [%a]", COND (OpCode), BYTE (B), gReg[Rd], gReg[Rm], gReg[Rn]);
- return;
- }
-
- if ((OpCode & 0xfe5f0f00) == 0xf84d0500) {
- // A4.1.90 SRS SRS<addressing_mode> #<mode>{!}
- AsciiSPrint (Buf, Size, "SRS%a #0x%x%a", gLdmStack[(OpCode >> 23) & 3], OpCode & 0x1f, WRITE (W));
- return;
- }
-
- if ((OpCode & 0xfe500f00) == 0xf8100500) {
- // A4.1.59 RFE<addressing_mode> <Rn>{!}
- AsciiSPrint (Buf, Size, "RFE%a %a", gLdmStack[(OpCode >> 23) & 3], gReg[Rn], WRITE (W));
- return;
- }
-
- if ((OpCode & 0xfff000f0) == 0xe1200070) {
- // A4.1.7 BKPT <immed_16>
- AsciiSPrint (Buf, Size, "BKPT %x", ((OpCode >> 8) | (OpCode & 0xf)) & 0xffff);
- return;
- }
-
- if ((OpCode & 0xfff10020) == 0xf1000000) {
- // A4.1.16 CPS<effect> <iflags> {, #<mode>}
- if (((OpCode >> 6) & 0x7) == 0) {
- AsciiSPrint (Buf, Size, "CPS #0x%x", (OpCode & 0x2f));
- } else {
- imode = (OpCode >> 18) & 0x3;
- Index = AsciiSPrint (Buf, Size, "CPS%a %a%a%a", (imode == 3) ? "ID":"IE", (OpCode & BIT8) ? "A":"", (OpCode & BIT7) ? "I":"", (OpCode & BIT6) ? "F":"");
- if ((OpCode & BIT17) != 0) {
- AsciiSPrint (&Buf[Index], Size - Index, ", #0x%x", OpCode & 0x1f);
- }
- }
- return;
- }
-
- if ((OpCode & 0x0f000000) == 0x0f000000) {
- // A4.1.107 SWI{<cond>} <immed_24>
- AsciiSPrint (Buf, Size, "SWI%a %x", COND (OpCode), OpCode & 0x00ffffff);
- return;
- }
-
- if ((OpCode & 0x0fb00000) == 0x01000000) {
- // A4.1.38 MRS{<cond>} <Rd>, CPSR MRS{<cond>} <Rd>, SPSR
- AsciiSPrint (Buf, Size, "MRS%a %a, %a", COND (OpCode), gReg[Rd], B ? "SPSR" : "CPSR");
- return;
- }
-
-
- if ((OpCode & 0x0db00000) == 0x03200000) {
- // A4.1.38 MSR{<cond>} CPSR_<fields>, #<immediate> MSR{<cond>} CPSR_<fields>, <Rm>
- if (I) {
- // MSR{<cond>} CPSR_<fields>, #<immediate>
- AsciiSPrint (Buf, Size, "MRS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateRight (OpCode & 0xf, ((OpCode >> 8) & 0xf) *2));
- } else {
- // MSR{<cond>} CPSR_<fields>, <Rm>
- AsciiSPrint (Buf, Size, "MRS%a %a_%a, %a", COND (OpCode), B ? "SPSR" : "CPSR", gReg[Rd]);
- }
- return;
- }
-
- if ((OpCode & 0xff000010) == 0xfe000000) {
- // A4.1.13 CDP{<cond>} <coproc>, <opcode_1>, <CRd>, <CRn>, <CRm>, <opcode_2>
- AsciiSPrint (Buf, Size, "CDP%a 0x%x, 0x%x, CR%d, CR%d, CR%d, 0x%x", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, Rn, Rd, Rm, (OpCode >> 5) &0x7);
- return;
- }
-
- if ((OpCode & 0x0e000000) == 0x0c000000) {
- // A4.1.19 LDC and A4.1.96 SDC
- if ((OpCode & 0xf0000000) == 0xf0000000) {
- Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", L ? "LDC":"SDC", (OpCode >> 8) & 0xf, Rd);
- } else {
- Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ", L ? "LDC":"SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd);
- }
-
- if (!P) {
- if (!W) {
- // A5.5.5.5 [<Rn>], <option>
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], {0x%x}", gReg[Rn], OpCode & 0xff);
- } else {
- // A.5.5.4 [<Rn>], #+/-<offset_8>*4
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x*4", gReg[Rn], SIGN (U), OpCode & 0xff);
- }
- } else {
- // A5.5.5.2 [<Rn>, #+/-<offset_8>*4 ]!
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x*4]%a", gReg[Rn], SIGN (U), OpCode & 0xff, WRITE (W));
- }
-
- }
-
- if ((OpCode & 0x0f000010) == 0x0e000010) {
- // A4.1.32 MRC2, MCR2
- AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, CR%d, CR%d, 0x%x", L ? "MRC":"MCR", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], Rn, Rm, (OpCode >> 5) &0x7);
- return;
- }
-
- if ((OpCode & 0x0ff00000) == 0x0c400000) {
- // A4.1.33 MRRC2, MCRR2
- AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, %a, CR%d", L ? "MRRC":"MCRR", COND (OpCode), (OpCode >> 4) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], gReg[Rn], Rm);
- return;
- }
-
- AsciiSPrint (Buf, Size, "Faulting OpCode 0x%08x", OpCode);
-
- *OpCodePtr += 1;
- return;
-}
-
diff --git a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf deleted file mode 100644 index bb51e30804..0000000000 --- a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf +++ /dev/null @@ -1,40 +0,0 @@ -#/** @file
-# ARM Disassembler library
-#
-# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmDisassemblerLib
- FILE_GUID = 7ACEC173-F15D-426C-8F2F-BD86B4183EF1
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmDisassemblerLib
-
-
-[Sources.ARM]
- ArmDisassembler.c
- ThumbDisassembler.c
-
-[Sources.AARCH64]
- Aarch64Disassembler.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- BaseLib
- PrintLib
- DebugLib
- PeCoffGetEntryPointLib
diff --git a/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c deleted file mode 100644 index 8c7285bcae..0000000000 --- a/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c +++ /dev/null @@ -1,1062 +0,0 @@ -/** @file
- Thumb Dissassembler. Still a work in progress.
-
- Wrong output is a bug, so please fix it.
- Hex output means there is not yet an entry or a decode bug.
- gOpThumb[] are Thumb 16-bit, and gOpThumb2[] work on the 32-bit
- 16-bit stream of Thumb2 instruction. Then there are big case
- statements to print everything out. If you are adding instructions
- try to reuse existing case entries if possible.
-
- Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PrintLib.h>
-
-extern CHAR8 *gCondition[];
-
-extern CHAR8 *gReg[];
-
-// Thumb address modes
-#define LOAD_STORE_FORMAT1 1
-#define LOAD_STORE_FORMAT1_H 101
-#define LOAD_STORE_FORMAT1_B 111
-#define LOAD_STORE_FORMAT2 2
-#define LOAD_STORE_FORMAT3 3
-#define LOAD_STORE_FORMAT4 4
-#define LOAD_STORE_MULTIPLE_FORMAT1 5
-#define PUSH_FORMAT 6
-#define POP_FORMAT 106
-#define IMMED_8 7
-#define CONDITIONAL_BRANCH 8
-#define UNCONDITIONAL_BRANCH 9
-#define UNCONDITIONAL_BRANCH_SHORT 109
-#define BRANCH_EXCHANGE 10
-#define DATA_FORMAT1 11
-#define DATA_FORMAT2 12
-#define DATA_FORMAT3 13
-#define DATA_FORMAT4 14
-#define DATA_FORMAT5 15
-#define DATA_FORMAT6_SP 16
-#define DATA_FORMAT6_PC 116
-#define DATA_FORMAT7 17
-#define DATA_FORMAT8 19
-#define CPS_FORMAT 20
-#define ENDIAN_FORMAT 21
-#define DATA_CBZ 22
-#define ADR_FORMAT 23
-#define IT_BLOCK 24
-
-// Thumb2 address modes
-#define B_T3 200
-#define B_T4 201
-#define BL_T2 202
-#define POP_T2 203
-#define POP_T3 204
-#define STM_FORMAT 205
-#define LDM_REG_IMM12_SIGNED 206
-#define LDM_REG_IMM12_LSL 207
-#define LDM_REG_IMM8 208
-#define LDM_REG_IMM12 209
-#define LDM_REG_INDIRECT_LSL 210
-#define LDM_REG_IMM8_SIGNED 211
-#define LDRD_REG_IMM8 212
-#define LDREXB 213
-#define LDREXD 214
-#define SRS_FORMAT 215
-#define RFE_FORMAT 216
-#define LDRD_REG_IMM8_SIGNED 217
-#define ADD_IMM12 218
-#define ADD_IMM5 219
-#define ADR_THUMB2 220
-#define CMN_THUMB2 221
-#define ASR_IMM5 222
-#define ASR_3REG 223
-#define BFC_THUMB2 224
-#define CDP_THUMB2 225
-#define THUMB2_NO_ARGS 226
-#define THUMB2_2REGS 227
-#define ADD_IMM5_2REG 228
-#define CPD_THUMB2 229
-#define THUMB2_4REGS 230
-#define ADD_IMM12_1REG 231
-#define THUMB2_IMM16 232
-#define MRC_THUMB2 233
-#define MRRC_THUMB2 234
-#define THUMB2_MRS 235
-#define THUMB2_MSR 236
-
-
-
-
-typedef struct {
- CHAR8 *Start;
- UINT32 OpCode;
- UINT32 Mask;
- UINT32 AddressMode;
-} THUMB_INSTRUCTIONS;
-
-THUMB_INSTRUCTIONS gOpThumb[] = {
-// Thumb 16-bit instrucitons
-// Op Mask Format
- { "ADC" , 0x4140, 0xffc0, DATA_FORMAT5 }, // ADC <Rndn>, <Rm>
- { "ADR", 0xa000, 0xf800, ADR_FORMAT }, // ADR <Rd>, <label>
- { "ADD" , 0x1c00, 0xfe00, DATA_FORMAT2 },
- { "ADD" , 0x3000, 0xf800, DATA_FORMAT3 },
- { "ADD" , 0x1800, 0xfe00, DATA_FORMAT1 },
- { "ADD" , 0x4400, 0xff00, DATA_FORMAT8 }, // A8.6.9
- { "ADD" , 0xa000, 0xf100, DATA_FORMAT6_PC },
- { "ADD" , 0xa800, 0xf800, DATA_FORMAT6_SP },
- { "ADD" , 0xb000, 0xff80, DATA_FORMAT7 },
-
- { "AND" , 0x4000, 0xffc0, DATA_FORMAT5 },
-
- { "ASR" , 0x1000, 0xf800, DATA_FORMAT4 },
- { "ASR" , 0x4100, 0xffc0, DATA_FORMAT5 },
-
- { "B" , 0xd000, 0xf000, CONDITIONAL_BRANCH },
- { "B" , 0xe000, 0xf800, UNCONDITIONAL_BRANCH_SHORT },
- { "BLX" , 0x4780, 0xff80, BRANCH_EXCHANGE },
- { "BX" , 0x4700, 0xff87, BRANCH_EXCHANGE },
-
- { "BIC" , 0x4380, 0xffc0, DATA_FORMAT5 },
- { "BKPT", 0xdf00, 0xff00, IMMED_8 },
- { "CBZ", 0xb100, 0xfd00, DATA_CBZ },
- { "CBNZ", 0xb900, 0xfd00, DATA_CBZ },
- { "CMN" , 0x42c0, 0xffc0, DATA_FORMAT5 },
-
- { "CMP" , 0x2800, 0xf800, DATA_FORMAT3 },
- { "CMP" , 0x4280, 0xffc0, DATA_FORMAT5 },
- { "CMP" , 0x4500, 0xff00, DATA_FORMAT8 },
-
- { "CPS" , 0xb660, 0xffe8, CPS_FORMAT },
- { "MOV" , 0x4600, 0xff00, DATA_FORMAT8 },
- { "EOR" , 0x4040, 0xffc0, DATA_FORMAT5 },
-
- { "LDMIA" , 0xc800, 0xf800, LOAD_STORE_MULTIPLE_FORMAT1 },
- { "LDR" , 0x6800, 0xf800, LOAD_STORE_FORMAT1 }, // LDR <Rt>, [<Rn> {,#<imm>}]
- { "LDR" , 0x5800, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
- { "LDR" , 0x4800, 0xf800, LOAD_STORE_FORMAT3 },
- { "LDR" , 0x9800, 0xf800, LOAD_STORE_FORMAT4 }, // LDR <Rt>, [SP, #<imm>]
- { "LDRB" , 0x7800, 0xf800, LOAD_STORE_FORMAT1_B },
- { "LDRB" , 0x5c00, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
- { "LDRH" , 0x8800, 0xf800, LOAD_STORE_FORMAT1_H },
- { "LDRH" , 0x7a00, 0xfe00, LOAD_STORE_FORMAT2 },
- { "LDRSB" , 0x5600, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
- { "LDRSH" , 0x5e00, 0xfe00, LOAD_STORE_FORMAT2 },
-
- { "MOVS", 0x0000, 0xffc0, DATA_FORMAT5 }, // LSL with imm5 == 0 is a MOVS, so this must go before LSL
- { "LSL" , 0x0000, 0xf800, DATA_FORMAT4 },
- { "LSL" , 0x4080, 0xffc0, DATA_FORMAT5 },
- { "LSR" , 0x0001, 0xf800, DATA_FORMAT4 },
- { "LSR" , 0x40c0, 0xffc0, DATA_FORMAT5 },
- { "LSRS", 0x0800, 0xf800, DATA_FORMAT4 }, // LSRS <Rd>, <Rm>, #<imm5>
-
- { "MOVS", 0x2000, 0xf800, DATA_FORMAT3 },
- { "MOV" , 0x1c00, 0xffc0, DATA_FORMAT3 },
- { "MOV" , 0x4600, 0xff00, DATA_FORMAT8 },
-
- { "MUL" , 0x4340, 0xffc0, DATA_FORMAT5 },
- { "MVN" , 0x41c0, 0xffc0, DATA_FORMAT5 },
- { "NEG" , 0x4240, 0xffc0, DATA_FORMAT5 },
- { "ORR" , 0x4300, 0xffc0, DATA_FORMAT5 },
- { "POP" , 0xbc00, 0xfe00, POP_FORMAT },
- { "PUSH", 0xb400, 0xfe00, PUSH_FORMAT },
-
- { "REV" , 0xba00, 0xffc0, DATA_FORMAT5 },
- { "REV16" , 0xba40, 0xffc0, DATA_FORMAT5 },
- { "REVSH" , 0xbac0, 0xffc0, DATA_FORMAT5 },
-
- { "ROR" , 0x41c0, 0xffc0, DATA_FORMAT5 },
- { "SBC" , 0x4180, 0xffc0, DATA_FORMAT5 },
- { "SETEND" , 0xb650, 0xfff0, ENDIAN_FORMAT },
-
- { "STMIA" , 0xc000, 0xf800, LOAD_STORE_MULTIPLE_FORMAT1 },
- { "STR" , 0x6000, 0xf800, LOAD_STORE_FORMAT1 }, // STR <Rt>, [<Rn> {,#<imm>}]
- { "STR" , 0x5000, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
- { "STR" , 0x9000, 0xf800, LOAD_STORE_FORMAT4 }, // STR <Rt>, [SP, #<imm>]
- { "STRB" , 0x7000, 0xf800, LOAD_STORE_FORMAT1_B }, // STRB <Rt>, [<Rn>, #<imm5>]
- { "STRB" , 0x5400, 0xfe00, LOAD_STORE_FORMAT2 }, // STRB <Rt>, [<Rn>, <Rm>]
- { "STRH" , 0x8000, 0xf800, LOAD_STORE_FORMAT1_H }, // STRH <Rt>, [<Rn>{,#<imm>}]
- { "STRH" , 0x5200, 0xfe00, LOAD_STORE_FORMAT2 }, // STRH <Rt>, [<Rn>, <Rm>]
-
- { "SUB" , 0x1e00, 0xfe00, DATA_FORMAT2 },
- { "SUB" , 0x3800, 0xf800, DATA_FORMAT3 },
- { "SUB" , 0x1a00, 0xfe00, DATA_FORMAT1 },
- { "SUB" , 0xb080, 0xff80, DATA_FORMAT7 },
-
- { "SBC" , 0x4180, 0xffc0, DATA_FORMAT5 },
-
- { "SWI" , 0xdf00, 0xff00, IMMED_8 },
- { "SXTB", 0xb240, 0xffc0, DATA_FORMAT5 },
- { "SXTH", 0xb200, 0xffc0, DATA_FORMAT5 },
- { "TST" , 0x4200, 0xffc0, DATA_FORMAT5 },
- { "UXTB", 0xb2c0, 0xffc0, DATA_FORMAT5 },
- { "UXTH", 0xb280, 0xffc0, DATA_FORMAT5 },
-
- { "IT", 0xbf00, 0xff00, IT_BLOCK }
-
-};
-
-THUMB_INSTRUCTIONS gOpThumb2[] = {
-//Instruct OpCode OpCode Mask Addressig Mode
-
- { "ADR", 0xf2af0000, 0xfbff8000, ADR_THUMB2 }, // ADDR <Rd>, <label> ;Needs to go before ADDW
- { "CMN", 0xf1100f00, 0xfff08f00, CMN_THUMB2 }, // CMN <Rn>, #<const> ;Needs to go before ADD
- { "CMN", 0xeb100f00, 0xfff08f00, ADD_IMM5_2REG }, // CMN <Rn>, <Rm> {,<shift> #<const>}
- { "CMP", 0xf1a00f00, 0xfff08f00, CMN_THUMB2 }, // CMP <Rn>, #<const>
- { "TEQ", 0xf0900f00, 0xfff08f00, CMN_THUMB2 }, // CMP <Rn>, #<const>
- { "TEQ", 0xea900f00, 0xfff08f00, ADD_IMM5_2REG }, // CMN <Rn>, <Rm> {,<shift> #<const>}
- { "TST", 0xf0100f00, 0xfff08f00, CMN_THUMB2 }, // CMP <Rn>, #<const>
- { "TST", 0xea100f00, 0xfff08f00, ADD_IMM5_2REG }, // TST <Rn>, <Rm> {,<shift> #<const>}
-
- { "MOV", 0xf04f0000, 0xfbef8000, ADD_IMM12_1REG }, // MOV <Rd>, #<const>
- { "MOVW", 0xf2400000, 0xfbe08000, THUMB2_IMM16 }, // MOVW <Rd>, #<const>
- { "MOVT", 0xf2c00000, 0xfbe08000, THUMB2_IMM16 }, // MOVT <Rd>, #<const>
-
- { "ADC", 0xf1400000, 0xfbe08000, ADD_IMM12 }, // ADC{S} <Rd>, <Rn>, #<const>
- { "ADC", 0xeb400000, 0xffe08000, ADD_IMM5 }, // ADC{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
- { "ADD", 0xf1000000, 0xfbe08000, ADD_IMM12 }, // ADD{S} <Rd>, <Rn>, #<const>
- { "ADD", 0xeb000000, 0xffe08000, ADD_IMM5 }, // ADD{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
- { "ADDW", 0xf2000000, 0xfbe08000, ADD_IMM12 }, // ADDW{S} <Rd>, <Rn>, #<const>
- { "AND", 0xf0000000, 0xfbe08000, ADD_IMM12 }, // AND{S} <Rd>, <Rn>, #<const>
- { "AND", 0xea000000, 0xffe08000, ADD_IMM5 }, // AND{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
- { "BIC", 0xf0200000, 0xfbe08000, ADD_IMM12 }, // BIC{S} <Rd>, <Rn>, #<const>
- { "BIC", 0xea200000, 0xffe08000, ADD_IMM5 }, // BIC{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
- { "EOR", 0xf0800000, 0xfbe08000, ADD_IMM12 }, // EOR{S} <Rd>, <Rn>, #<const>
- { "EOR", 0xea800000, 0xffe08000, ADD_IMM5 }, // EOR{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
- { "ORN", 0xf0600000, 0xfbe08000, ADD_IMM12 }, // ORN{S} <Rd>, <Rn>, #<const>
- { "ORN", 0xea600000, 0xffe08000, ADD_IMM5 }, // ORN{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
- { "ORR", 0xf0400000, 0xfbe08000, ADD_IMM12 }, // ORR{S} <Rd>, <Rn>, #<const>
- { "ORR", 0xea400000, 0xffe08000, ADD_IMM5 }, // ORR{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
- { "RSB", 0xf1c00000, 0xfbe08000, ADD_IMM12 }, // RSB{S} <Rd>, <Rn>, #<const>
- { "RSB", 0xebc00000, 0xffe08000, ADD_IMM5 }, // RSB{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
- { "SBC", 0xf1600000, 0xfbe08000, ADD_IMM12 }, // SBC{S} <Rd>, <Rn>, #<const>
- { "SBC", 0xeb600000, 0xffe08000, ADD_IMM5 }, // SBC{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
- { "SUB", 0xf1a00000, 0xfbe08000, ADD_IMM12 }, // SUB{S} <Rd>, <Rn>, #<const>
- { "SUB", 0xeba00000, 0xffe08000, ADD_IMM5 }, // SUB{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
-
- { "ASR", 0xea4f0020, 0xffef8030, ASR_IMM5 }, // ARS <Rd>, <Rm> #<const>} imm3:imm2
- { "ASR", 0xfa40f000, 0xffe0f0f0, ASR_3REG }, // ARS <Rd>, <Rn>, <Rm>
- { "LSR", 0xea4f0010, 0xffef8030, ASR_IMM5 }, // LSR <Rd>, <Rm> #<const>} imm3:imm2
- { "LSR", 0xfa20f000, 0xffe0f0f0, ASR_3REG }, // LSR <Rd>, <Rn>, <Rm>
- { "ROR", 0xea4f0030, 0xffef8030, ASR_IMM5 }, // ROR <Rd>, <Rm> #<const>} imm3:imm2
- { "ROR", 0xfa60f000, 0xffe0f0f0, ASR_3REG }, // ROR <Rd>, <Rn>, <Rm>
-
- { "BFC", 0xf36f0000, 0xffff8010, BFC_THUMB2 }, // BFC <Rd>, #<lsb>, #<width>
- { "BIC", 0xf3600000, 0xfff08010, BFC_THUMB2 }, // BIC <Rn>, <Rd>, #<lsb>, #<width>
- { "SBFX", 0xf3400000, 0xfff08010, BFC_THUMB2 }, // SBFX <Rn>, <Rd>, #<lsb>, #<width>
- { "UBFX", 0xf3c00000, 0xfff08010, BFC_THUMB2 }, // UBFX <Rn>, <Rd>, #<lsb>, #<width>
-
- { "CPD", 0xee000000, 0xff000010, CPD_THUMB2 }, // CPD <coproc>,<opc1>,<CRd>,<CRn>,<CRm>,<opc2>
- { "CPD2", 0xfe000000, 0xff000010, CPD_THUMB2 }, // CPD <coproc>,<opc1>,<CRd>,<CRn>,<CRm>,<opc2>
-
- { "MRC", 0xee100000, 0xff100000, MRC_THUMB2 }, // MRC <coproc>,<opc1>,<Rt>,<CRn>,<CRm>,<opc2>
- { "MRC2", 0xfe100000, 0xff100000, MRC_THUMB2 }, // MRC2 <coproc>,<opc1>,<Rt>,<CRn>,<CRm>,<opc2>
- { "MRRC", 0xec500000, 0xfff00000, MRRC_THUMB2 }, // MRRC <coproc>,<opc1>,<Rt>,<Rt2>,<CRm>
- { "MRRC2", 0xfc500000, 0xfff00000, MRRC_THUMB2 }, // MRR2 <coproc>,<opc1>,<Rt>,<Rt2>,<CRm>
-
- { "MRS", 0xf3ef8000, 0xfffff0ff, THUMB2_MRS }, // MRS <Rd>, CPSR
- { "MSR", 0xf3808000, 0xfff0fcff, THUMB2_MSR }, // MSR CPSR_fs, <Rn>
-
- { "CLREX", 0xf3bf8f2f, 0xfffffff, THUMB2_NO_ARGS }, // CLREX
-
- { "CLZ", 0xfab0f080, 0xfff0f0f0, THUMB2_2REGS }, // CLZ <Rd>,<Rm>
- { "MOV", 0xec4f0000, 0xfff0f0f0, THUMB2_2REGS }, // MOV <Rd>,<Rm>
- { "MOVS", 0xec5f0000, 0xfff0f0f0, THUMB2_2REGS }, // MOVS <Rd>,<Rm>
- { "RBIT", 0xfb90f0a0, 0xfff0f0f0, THUMB2_2REGS }, // RBIT <Rd>,<Rm>
- { "REV", 0xfb90f080, 0xfff0f0f0, THUMB2_2REGS }, // REV <Rd>,<Rm>
- { "REV16", 0xfa90f090, 0xfff0f0f0, THUMB2_2REGS }, // REV16 <Rd>,<Rm>
- { "REVSH", 0xfa90f0b0, 0xfff0f0f0, THUMB2_2REGS }, // REVSH <Rd>,<Rm>
- { "RRX", 0xea4f0030, 0xfffff0f0, THUMB2_2REGS }, // RRX <Rd>,<Rm>
- { "RRXS", 0xea5f0030, 0xfffff0f0, THUMB2_2REGS }, // RRXS <Rd>,<Rm>
-
- { "MLA", 0xfb000000, 0xfff000f0, THUMB2_4REGS }, // MLA <Rd>, <Rn>, <Rm>, <Ra>
- { "MLS", 0xfb000010, 0xfff000f0, THUMB2_4REGS }, // MLA <Rd>, <Rn>, <Rm>, <Ra>
-
-
- { "SMLABB", 0xfb100000, 0xfff000f0, THUMB2_4REGS }, // SMLABB <Rd>, <Rn>, <Rm>, <Ra>
- { "SMLABT", 0xfb100010, 0xfff000f0, THUMB2_4REGS }, // SMLABT <Rd>, <Rn>, <Rm>, <Ra>
- { "SMLABB", 0xfb100020, 0xfff000f0, THUMB2_4REGS }, // SMLATB <Rd>, <Rn>, <Rm>, <Ra>
- { "SMLATT", 0xfb100030, 0xfff000f0, THUMB2_4REGS }, // SMLATT <Rd>, <Rn>, <Rm>, <Ra>
- { "SMLAWB", 0xfb300000, 0xfff000f0, THUMB2_4REGS }, // SMLAWB <Rd>, <Rn>, <Rm>, <Ra>
- { "SMLAWT", 0xfb300010, 0xfff000f0, THUMB2_4REGS }, // SMLAWT <Rd>, <Rn>, <Rm>, <Ra>
- { "SMLSD", 0xfb400000, 0xfff000f0, THUMB2_4REGS }, // SMLSD <Rd>, <Rn>, <Rm>, <Ra>
- { "SMLSDX", 0xfb400010, 0xfff000f0, THUMB2_4REGS }, // SMLSDX <Rd>, <Rn>, <Rm>, <Ra>
- { "SMMLA", 0xfb500000, 0xfff000f0, THUMB2_4REGS }, // SMMLA <Rd>, <Rn>, <Rm>, <Ra>
- { "SMMLAR", 0xfb500010, 0xfff000f0, THUMB2_4REGS }, // SMMLAR <Rd>, <Rn>, <Rm>, <Ra>
- { "SMMLS", 0xfb600000, 0xfff000f0, THUMB2_4REGS }, // SMMLS <Rd>, <Rn>, <Rm>, <Ra>
- { "SMMLSR", 0xfb600010, 0xfff000f0, THUMB2_4REGS }, // SMMLSR <Rd>, <Rn>, <Rm>, <Ra>
- { "USADA8", 0xfb700000, 0xfff000f0, THUMB2_4REGS }, // USADA8 <Rd>, <Rn>, <Rm>, <Ra>
- { "SMLAD", 0xfb200000, 0xfff000f0, THUMB2_4REGS }, // SMLAD <Rd>, <Rn>, <Rm>, <Ra>
- { "SMLADX", 0xfb200010, 0xfff000f0, THUMB2_4REGS }, // SMLADX <Rd>, <Rn>, <Rm>, <Ra>
-
-
- { "B", 0xf0008000, 0xf800d000, B_T3 }, // B<c> <label>
- { "B", 0xf0009000, 0xf800d000, B_T4 }, // B<c> <label>
- { "BL", 0xf000d000, 0xf800d000, B_T4 }, // BL<c> <label>
- { "BLX", 0xf000c000, 0xf800d000, BL_T2 }, // BLX<c> <label>
-
- { "POP", 0xe8bd0000, 0xffff2000, POP_T2 }, // POP <registers>
- { "POP", 0xf85d0b04, 0xffff0fff, POP_T3 }, // POP <register>
- { "PUSH", 0xe8ad0000, 0xffffa000, POP_T2 }, // PUSH <registers>
- { "PUSH", 0xf84d0d04, 0xffff0fff, POP_T3 }, // PUSH <register>
- { "STM" , 0xe8800000, 0xffd0a000, STM_FORMAT }, // STM <Rn>{!},<registers>
- { "STMDB", 0xe9800000, 0xffd0a000, STM_FORMAT }, // STMDB <Rn>{!},<registers>
- { "LDM" , 0xe8900000, 0xffd02000, STM_FORMAT }, // LDM <Rn>{!},<registers>
- { "LDMDB", 0xe9100000, 0xffd02000, STM_FORMAT }, // LDMDB <Rn>{!},<registers>
-
- { "LDR", 0xf8d00000, 0xfff00000, LDM_REG_IMM12 }, // LDR <rt>, [<rn>, {, #<imm12>]}
- { "LDRB", 0xf8900000, 0xfff00000, LDM_REG_IMM12 }, // LDRB <rt>, [<rn>, {, #<imm12>]}
- { "LDRH", 0xf8b00000, 0xfff00000, LDM_REG_IMM12 }, // LDRH <rt>, [<rn>, {, #<imm12>]}
- { "LDRSB", 0xf9900000, 0xfff00000, LDM_REG_IMM12 }, // LDRSB <rt>, [<rn>, {, #<imm12>]}
- { "LDRSH", 0xf9b00000, 0xfff00000, LDM_REG_IMM12 }, // LDRSH <rt>, [<rn>, {, #<imm12>]}
-
- { "LDR", 0xf85f0000, 0xff7f0000, LDM_REG_IMM12_SIGNED }, // LDR <Rt>, <label>
- { "LDRB", 0xf81f0000, 0xff7f0000, LDM_REG_IMM12_SIGNED }, // LDRB <Rt>, <label>
- { "LDRH", 0xf83f0000, 0xff7f0000, LDM_REG_IMM12_SIGNED }, // LDRH <Rt>, <label>
- { "LDRSB", 0xf91f0000, 0xff7f0000, LDM_REG_IMM12_SIGNED }, // LDRSB <Rt>, <label>
- { "LDRSH", 0xf93f0000, 0xff7f0000, LDM_REG_IMM12_SIGNED }, // LDRSB <Rt>, <label>
-
- { "LDR", 0xf8500000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // LDR <rt>, [<rn>, <rm> {, LSL #<imm2>]}
- { "LDRB", 0xf8100000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // LDRB <rt>, [<rn>, <rm> {, LSL #<imm2>]}
- { "LDRH", 0xf8300000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // LDRH <rt>, [<rn>, <rm> {, LSL #<imm2>]}
- { "LDRSB", 0xf9100000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // LDRSB <rt>, [<rn>, <rm> {, LSL #<imm2>]}
- { "LDRSH", 0xf9300000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // LDRSH <rt>, [<rn>, <rm> {, LSL #<imm2>]}
-
- { "LDR", 0xf8500800, 0xfff00800, LDM_REG_IMM8 }, // LDR <rt>, [<rn>, {, #<imm8>]}
- { "LDRBT", 0xf8100e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRBT <rt>, [<rn>, {, #<imm8>]}
- { "LDRHT", 0xf8300e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRHT <rt>, [<rn>, {, #<imm8>]}
- { "LDRSB", 0xf9100800, 0xfff00800, LDM_REG_IMM8 }, // LDRHT <rt>, [<rn>, {, #<imm8>]} {!} form?
- { "LDRSBT",0xf9100e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRHBT <rt>, [<rn>, {, #<imm8>]} {!} form?
- { "LDRSH" ,0xf9300800, 0xfff00800, LDM_REG_IMM8 }, // LDRSH <rt>, [<rn>, {, #<imm8>]}
- { "LDRSHT",0xf9300e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRSHT <rt>, [<rn>, {, #<imm8>]}
- { "LDRT", 0xf8500e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRT <rt>, [<rn>, {, #<imm8>]}
-
- { "LDRD", 0xe8500000, 0xfe500000, LDRD_REG_IMM8_SIGNED }, // LDRD <rt>, <rt2>, [<rn>, {, #<imm8>]}{!}
- { "LDRD", 0xe8500000, 0xfe500000, LDRD_REG_IMM8 }, // LDRD <rt>, <rt2>, <label>
-
- { "LDREX", 0xe8500f00, 0xfff00f00, LDM_REG_IMM8 }, // LDREX <Rt>, [Rn, {#imm8}]]
- { "LDREXB", 0xe8d00f4f, 0xfff00fff, LDREXB }, // LDREXB <Rt>, [<Rn>]
- { "LDREXH", 0xe8d00f5f, 0xfff00fff, LDREXB }, // LDREXH <Rt>, [<Rn>]
-
- { "LDREXD", 0xe8d00f4f, 0xfff00fff, LDREXD }, // LDREXD <Rt>, <Rt2>, [<Rn>]
-
- { "STR", 0xf8c00000, 0xfff00000, LDM_REG_IMM12 }, // STR <rt>, [<rn>, {, #<imm12>]}
- { "STRB", 0xf8800000, 0xfff00000, LDM_REG_IMM12 }, // STRB <rt>, [<rn>, {, #<imm12>]}
- { "STRH", 0xf8a00000, 0xfff00000, LDM_REG_IMM12 }, // STRH <rt>, [<rn>, {, #<imm12>]}
-
- { "STR", 0xf8400000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // STR <rt>, [<rn>, <rm> {, LSL #<imm2>]}
- { "STRB", 0xf8000000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // STRB <rt>, [<rn>, <rm> {, LSL #<imm2>]}
- { "STRH", 0xf8200000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // STRH <rt>, [<rn>, <rm> {, LSL #<imm2>]}
-
- { "STR", 0xf8400800, 0xfff00800, LDM_REG_IMM8 }, // STR <rt>, [<rn>, {, #<imm8>]}
- { "STRH", 0xf8200800, 0xfff00800, LDM_REG_IMM8 }, // STRH <rt>, [<rn>, {, #<imm8>]}
- { "STRBT", 0xf8000e00, 0xfff00f00, LDM_REG_IMM8 }, // STRBT <rt>, [<rn>, {, #<imm8>]}
- { "STRHT", 0xf8200e00, 0xfff00f00, LDM_REG_IMM8 }, // STRHT <rt>, [<rn>, {, #<imm8>]}
- { "STRT", 0xf8400e00, 0xfff00f00, LDM_REG_IMM8 }, // STRT <rt>, [<rn>, {, #<imm8>]}
-
- { "STRD", 0xe8400000, 0xfe500000, LDRD_REG_IMM8_SIGNED }, // STRD <rt>, <rt2>, [<rn>, {, #<imm8>]}{!}
-
- { "STREX", 0xe8400f00, 0xfff00f00, LDM_REG_IMM8 }, // STREX <Rt>, [Rn, {#imm8}]]
- { "STREXB", 0xe8c00f4f, 0xfff00fff, LDREXB }, // STREXB <Rd>, <Rt>, [<Rn>]
- { "STREXH", 0xe8c00f5f, 0xfff00fff, LDREXB }, // STREXH <Rd>, <Rt>, [<Rn>]
-
- { "STREXD", 0xe8d00f4f, 0xfff00fff, LDREXD }, // STREXD <Rd>, <Rt>, <Rt2>, [<Rn>]
-
- { "SRSDB", 0xe80dc000, 0xffdffff0, SRS_FORMAT }, // SRSDB<c> SP{!},#<mode>
- { "SRS" , 0xe98dc000, 0xffdffff0, SRS_FORMAT }, // SRS{IA}<c> SP{!},#<mode>
- { "RFEDB", 0xe810c000, 0xffd0ffff, RFE_FORMAT }, // RFEDB<c> <Rn>{!}
- { "RFE" , 0xe990c000, 0xffd0ffff, RFE_FORMAT } // RFE{IA}<c> <Rn>{!}
-};
-
-CHAR8 *gShiftType[] = {
- "LSL",
- "LSR",
- "ASR",
- "ROR"
-};
-
-CHAR8 mThumbMregListStr[4*15 + 1];
-
-CHAR8 *
-ThumbMRegList (
- UINT32 RegBitMask
- )
-{
- UINTN Index, Start, End;
- BOOLEAN First;
-
- mThumbMregListStr[0] = '\0';
- AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, "{");
-
- for (Index = 0, First = TRUE; Index <= 15; Index++) {
- if ((RegBitMask & (1 << Index)) != 0) {
- Start = End = Index;
- for (Index++; ((RegBitMask & (1 << Index)) != 0) && (Index <= 9); Index++) {
- End = Index;
- }
-
- if (!First) {
- AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, ",");
- } else {
- First = FALSE;
- }
-
- if (Start == End) {
- AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, gReg[Start]);
- } else {
- AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, gReg[Start]);
- AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, "-");
- AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, gReg[End]);
- }
- }
- }
- if (First) {
- AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, "ERROR");
- }
- AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, "}");
-
- // BugBug: Make caller pass in buffer it is cleaner
- return mThumbMregListStr;
-}
-
-UINT32
-SignExtend32 (
- IN UINT32 Data,
- IN UINT32 TopBit
- )
-{
- if (((Data & TopBit) == 0) || (TopBit == BIT31)) {
- return Data;
- }
-
- do {
- TopBit <<= 1;
- Data |= TopBit;
- } while ((TopBit & BIT31) != BIT31);
-
- return Data;
-}
-
-//
-// Some instructions specify the PC is always considered aligned
-// The PC is after the instruction that is excuting. So you pass
-// in the instruction address and you get back the aligned answer
-//
-UINT32
-PCAlign4 (
- IN UINT32 Data
- )
-{
- return (Data + 4) & 0xfffffffc;
-}
-
-/**
- Place a dissasembly of of **OpCodePtr into buffer, and update OpCodePtr to
- point to next instructin.
-
- We cheat and only decode instructions that access
- memory. If the instruction is not found we dump the instruction in hex.
-
- @param OpCodePtrPtr Pointer to pointer of ARM Thumb instruction to disassemble.
- @param Buf Buffer to sprintf disassembly into.
- @param Size Size of Buf in bytes.
- @param Extended TRUE dump hex for instruction too.
-
-**/
-VOID
-DisassembleThumbInstruction (
- IN UINT16 **OpCodePtrPtr,
- OUT CHAR8 *Buf,
- OUT UINTN Size,
- OUT UINT32 *ItBlock,
- IN BOOLEAN Extended
- )
-{
- UINT16 *OpCodePtr;
- UINT16 OpCode;
- UINT32 OpCode32;
- UINT32 Index;
- UINT32 Offset;
- UINT16 Rd, Rn, Rm, Rt, Rt2;
- BOOLEAN H1, H2, imod;
- //BOOLEAN ItFlag;
- UINT32 PC, Target, msbit, lsbit;
- CHAR8 *Cond;
- BOOLEAN S, J1, J2, P, U, W;
- UINT32 coproc, opc1, opc2, CRd, CRn, CRm;
- UINT32 Mask;
-
- OpCodePtr = *OpCodePtrPtr;
- OpCode = **OpCodePtrPtr;
-
- // Thumb2 is a stream of 16-bit instructions not a 32-bit instruction.
- OpCode32 = (((UINT32)OpCode) << 16) | *(OpCodePtr + 1);
-
- // These register names match branch form, but not others
- Rd = OpCode & 0x7;
- Rn = (OpCode >> 3) & 0x7;
- Rm = (OpCode >> 6) & 0x7;
- H1 = (OpCode & BIT7) != 0;
- H2 = (OpCode & BIT6) != 0;
- imod = (OpCode & BIT4) != 0;
- PC = (UINT32)(UINTN)OpCodePtr;
-
- // Increment by the minimum instruction size, Thumb2 could be bigger
- *OpCodePtrPtr += 1;
-
- // Manage IT Block ItFlag TRUE means we are in an IT block
- /*if (*ItBlock != 0) {
- ItFlag = TRUE;
- *ItBlock -= 1;
- } else {
- ItFlag = FALSE;
- }*/
-
- for (Index = 0; Index < sizeof (gOpThumb)/sizeof (THUMB_INSTRUCTIONS); Index++) {
- if ((OpCode & gOpThumb[Index].Mask) == gOpThumb[Index].OpCode) {
- if (Extended) {
- Offset = AsciiSPrint (Buf, Size, "0x%04x %-6a", OpCode, gOpThumb[Index].Start);
- } else {
- Offset = AsciiSPrint (Buf, Size, "%-6a", gOpThumb[Index].Start);
- }
- switch (gOpThumb[Index].AddressMode) {
- case LOAD_STORE_FORMAT1:
- // A6.5.1 <Rd>, [<Rn>, #<5_bit_offset>]
- AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, [r%d #0x%x]", Rd, Rn, (OpCode >> 4) & 0x7c);
- return;
- case LOAD_STORE_FORMAT1_H:
- // A6.5.1 <Rd>, [<Rn>, #<5_bit_offset>]
- AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, [r%d #0x%x]", Rd, Rn, (OpCode >> 5) & 0x3e);
- return;
- case LOAD_STORE_FORMAT1_B:
- // A6.5.1 <Rd>, [<Rn>, #<5_bit_offset>]
- AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, [r%d #0x%x]", Rd, Rn, (OpCode >> 6) & 0x1f);
- return;
-
- case LOAD_STORE_FORMAT2:
- // A6.5.1 <Rd>, [<Rn>, <Rm>]
- AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, [r%d, r%d]", Rd, Rn, Rm);
- return;
- case LOAD_STORE_FORMAT3:
- // A6.5.1 <Rd>, [PC, #<8_bit_offset>]
- Target = (OpCode & 0xff) << 2;
- AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, [pc, #0x%x] ;0x%08x", (OpCode >> 8) & 7, Target, PCAlign4 (PC) + Target);
- return;
- case LOAD_STORE_FORMAT4:
- // Rt, [SP, #imm8]
- Target = (OpCode & 0xff) << 2;
- AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, [sp, #0x%x]", (OpCode >> 8) & 7, Target);
- return;
-
- case LOAD_STORE_MULTIPLE_FORMAT1:
- // <Rn>!, {r0-r7}
- AsciiSPrint (&Buf[Offset], Size - Offset, " r%d!, %a", (OpCode >> 8) & 7, ThumbMRegList (OpCode & 0xff));
- return;
-
- case POP_FORMAT:
- // POP {r0-r7,pc}
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a", ThumbMRegList ((OpCode & 0xff) | ((OpCode & BIT8) == BIT8 ? BIT15 : 0)));
- return;
-
- case PUSH_FORMAT:
- // PUSH {r0-r7,lr}
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a", ThumbMRegList ((OpCode & 0xff) | ((OpCode & BIT8) == BIT8 ? BIT14 : 0)));
- return;
-
-
- case IMMED_8:
- // A6.7 <immed_8>
- AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%x", OpCode & 0xff);
- return;
-
- case CONDITIONAL_BRANCH:
- // A6.3.1 B<cond> <target_address>
- // Patch in the condition code. A little hack but based on "%-6a"
- Cond = gCondition[(OpCode >> 8) & 0xf];
- Buf[Offset-5] = *Cond++;
- Buf[Offset-4] = *Cond;
- AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%04x", PC + 4 + SignExtend32 ((OpCode & 0xff) << 1, BIT8));
- return;
- case UNCONDITIONAL_BRANCH_SHORT:
- // A6.3.2 B <target_address>
- AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%04x", PC + 4 + SignExtend32 ((OpCode & 0x3ff) << 1, BIT11));
- return;
-
- case BRANCH_EXCHANGE:
- // A6.3.3 BX|BLX <Rm>
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gReg[Rn | (H2 ? 8:0)]);
- return;
-
- case DATA_FORMAT1:
- // A6.4.3 <Rd>, <Rn>, <Rm>
- AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, r%d, r%d", Rd, Rn, Rm);
- return;
- case DATA_FORMAT2:
- // A6.4.3 <Rd>, <Rn>, #3_bit_immed
- AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, r%d, 0x%x", Rd, Rn, Rm);
- return;
- case DATA_FORMAT3:
- // A6.4.3 <Rd>|<Rn>, #imm8
- AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, #0x%x", (OpCode >> 8) & 7, OpCode & 0xff);
- return;
- case DATA_FORMAT4:
- // A6.4.3 <Rd>|<Rm>, #immed_5
- AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, r%d, 0x%x", Rn, Rd, (OpCode >> 6) & 0x1f);
- return;
- case DATA_FORMAT5:
- // A6.4.3 <Rd>|<Rm>, <Rm>|<Rs>
- AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, r%d", Rd, Rn);
- return;
- case DATA_FORMAT6_SP:
- // A6.4.3 <Rd>, <reg>, #<8_Bit_immed>
- AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, sp, 0x%x", (OpCode >> 8) & 7, (OpCode & 0xff) << 2);
- return;
- case DATA_FORMAT6_PC:
- // A6.4.3 <Rd>, <reg>, #<8_Bit_immed>
- AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, pc, 0x%x", (OpCode >> 8) & 7, (OpCode & 0xff) << 2);
- return;
- case DATA_FORMAT7:
- // A6.4.3 SP, SP, #<7_Bit_immed>
- AsciiSPrint (&Buf[Offset], Size - Offset, " sp, sp, 0x%x", (OpCode & 0x7f)*4);
- return;
- case DATA_FORMAT8:
- // A6.4.3 <Rd>|<Rn>, <Rm>
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[Rd | (H1 ? 8:0)], gReg[Rn | (H2 ? 8:0)]);
- return;
-
- case CPS_FORMAT:
- // A7.1.24
- AsciiSPrint (&Buf[Offset], Size - Offset, "%a %a%a%a", imod ? "ID":"IE", ((OpCode & BIT2) == 0) ? "":"a", ((OpCode & BIT1) == 0) ? "":"i", ((OpCode & BIT0) == 0) ? "":"f");
- return;
-
- case ENDIAN_FORMAT:
- // A7.1.24
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a", (OpCode & BIT3) == 0 ? "LE":"BE");
- return;
-
- case DATA_CBZ:
- // CB{N}Z <Rn>, <Lable>
- Target = ((OpCode >> 2) & 0x3e) | (((OpCode & BIT9) == BIT9) ? BIT6 : 0);
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %08x", gReg[Rd], PC + 4 + Target);
- return;
-
- case ADR_FORMAT:
- // ADR <Rd>, <Label>
- Target = (OpCode & 0xff) << 2;
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %08x", gReg[(OpCode >> 8) & 7], PCAlign4 (PC) + Target);
- return;
-
- case IT_BLOCK:
- // ITSTATE = cond:mask OpCode[7:4]:OpCode[3:0]
- // ITSTATE[7:5] == cond[3:1]
- // ITSTATE[4] == 1st Instruction cond[0]
- // ITSTATE[3] == 2st Instruction cond[0]
- // ITSTATE[2] == 3st Instruction cond[0]
- // ITSTATE[1] == 4st Instruction cond[0]
- // ITSTATE[0] == 1 4 instruction IT block. 0 means 0,1,2 or 3 instructions
- // 1st one in ITSTATE low bits defines the number of instructions
- Mask = (OpCode & 0xf);
- if ((Mask & 0x1) == 0x1) {
- *ItBlock = 4;
- Offset += AsciiSPrint (&Buf[Offset], Size - Offset, "%a%a%a", (Mask & BIT3)?"T":"E", (Mask & BIT2)?"T":"E", (Mask & BIT1)?"T":"E");
- } else if ((OpCode & 0x3) == 0x2) {
- *ItBlock = 3;
- Offset += AsciiSPrint (&Buf[Offset], Size - Offset, "%a%a", (Mask & BIT3)?"T":"E", (Mask & BIT2)?"T":"E");
- } else if ((OpCode & 0x7) == 0x4) {
- *ItBlock = 2;
- Offset += AsciiSPrint (&Buf[Offset], Size - Offset, "%a", (Mask & BIT3)?"T":"E");
- } else if ((OpCode & 0xf) == 0x8) {
- *ItBlock = 1;
- }
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gCondition[(OpCode >> 4) & 0xf]);
- return;
- }
- }
- }
-
-
- // Thumb2 are 32-bit instructions
- *OpCodePtrPtr += 1;
- Rt = (OpCode32 >> 12) & 0xf;
- Rt2 = (OpCode32 >> 8) & 0xf;
- Rd = (OpCode32 >> 8) & 0xf;
- Rm = (OpCode32 & 0xf);
- Rn = (OpCode32 >> 16) & 0xf;
- for (Index = 0; Index < sizeof (gOpThumb2)/sizeof (THUMB_INSTRUCTIONS); Index++) {
- if ((OpCode32 & gOpThumb2[Index].Mask) == gOpThumb2[Index].OpCode) {
- if (Extended) {
- Offset = AsciiSPrint (Buf, Size, "0x%04x %-6a", OpCode32, gOpThumb2[Index].Start);
- } else {
- Offset = AsciiSPrint (Buf, Size, " %-6a", gOpThumb2[Index].Start);
- }
- switch (gOpThumb2[Index].AddressMode) {
- case B_T3:
- Cond = gCondition[(OpCode32 >> 22) & 0xf];
- Buf[Offset-5] = *Cond++;
- Buf[Offset-4] = *Cond;
- // S:J2:J1:imm6:imm11:0
- Target = ((OpCode32 << 1) & 0xffe) + ((OpCode32 >> 4) & 0x3f000);
- Target |= ((OpCode32 & BIT11) == BIT11)? BIT19 : 0; // J2
- Target |= ((OpCode32 & BIT13) == BIT13)? BIT18 : 0; // J1
- Target |= ((OpCode32 & BIT26) == BIT26)? BIT20 : 0; // S
- Target = SignExtend32 (Target, BIT20);
- AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", PC + 4 + Target);
- return;
- case B_T4:
- // S:I1:I2:imm10:imm11:0
- Target = ((OpCode32 << 1) & 0xffe) + ((OpCode32 >> 4) & 0x3ff000);
- S = (OpCode32 & BIT26) == BIT26;
- J1 = (OpCode32 & BIT13) == BIT13;
- J2 = (OpCode32 & BIT11) == BIT11;
- Target |= (!(J2 ^ S) ? BIT22 : 0); // I2
- Target |= (!(J1 ^ S) ? BIT23 : 0); // I1
- Target |= (S ? BIT24 : 0); // S
- Target = SignExtend32 (Target, BIT24);
- AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", PC + 4 + Target);
- return;
-
- case BL_T2:
- // BLX S:I1:I2:imm10:imm11:0
- Target = ((OpCode32 << 1) & 0xffc) + ((OpCode32 >> 4) & 0x3ff000);
- S = (OpCode32 & BIT26) == BIT26;
- J1 = (OpCode32 & BIT13) == BIT13;
- J2 = (OpCode32 & BIT11) == BIT11;
- Target |= (!(J2 ^ S) ? BIT23 : 0); // I2
- Target |= (!(J1 ^ S) ? BIT24 : 0); // I1
- Target |= (S ? BIT25 : 0); // S
- Target = SignExtend32 (Target, BIT25);
- AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", PCAlign4 (PC) + Target);
- return;
-
- case POP_T2:
- // <reglist> some must be zero, handled in table
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a", ThumbMRegList (OpCode32 & 0xffff));
- return;
-
- case POP_T3:
- // <register>
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gReg[(OpCode32 >> 12) & 0xf]);
- return;
-
- case STM_FORMAT:
- // <Rn>{!}, <registers>
- W = (OpCode32 & BIT21) == BIT21;
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, %a", gReg[(OpCode32 >> 16) & 0xf], W ? "!":"", ThumbMRegList (OpCode32 & 0xffff));
- return;
-
- case LDM_REG_IMM12_SIGNED:
- // <rt>, <label>
- Target = OpCode32 & 0xfff;
- if ((OpCode32 & BIT23) == 0) {
- // U == 0 means subtrack, U == 1 means add
- Target = -Target;
- }
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[(OpCode32 >> 12) & 0xf], PCAlign4 (PC) + Target);
- return;
-
- case LDM_REG_INDIRECT_LSL:
- // <rt>, [<rn>, <rm> {, LSL #<imm2>]}
- Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, [%a, %a", gReg[Rt], gReg[Rn], gReg[Rm]);
- if (((OpCode32 >> 4) & 3) == 0) {
- AsciiSPrint (&Buf[Offset], Size - Offset, "]");
- } else {
- AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL #%d]", (OpCode32 >> 4) & 3);
- }
- return;
-
- case LDM_REG_IMM12:
- // <rt>, [<rn>, {, #<imm12>]}
- Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, [%a", gReg[Rt], gReg[Rn]);
- if ((OpCode32 & 0xfff) == 0) {
- AsciiSPrint (&Buf[Offset], Size - Offset, "]");
- } else {
- AsciiSPrint (&Buf[Offset], Size - Offset, ", #0x%x]", OpCode32 & 0xfff);
- }
- return;
-
- case LDM_REG_IMM8:
- // <rt>, [<rn>, {, #<imm8>}]{!}
- W = (OpCode32 & BIT8) == BIT8;
- U = (OpCode32 & BIT9) == BIT9;
- P = (OpCode32 & BIT10) == BIT10;
- Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, [%a", gReg[Rt], gReg[Rn]);
- if (P) {
- if ((OpCode32 & 0xff) == 0) {
- AsciiSPrint (&Buf[Offset], Size - Offset, "]%a", W?"!":"");
- } else {
- AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", U?"":"-" , OpCode32 & 0xff, W?"!":"");
- }
- } else {
- AsciiSPrint (&Buf[Offset], Size - Offset, "], #%a0x%x", U?"":"-", OpCode32 & 0xff);
- }
- return;
-
- case LDRD_REG_IMM8_SIGNED:
- // LDRD <rt>, <rt2>, [<rn>, {, #<imm8>]}{!}
- P = (OpCode32 & BIT24) == BIT24; // index = P
- U = (OpCode32 & BIT23) == BIT23;
- W = (OpCode32 & BIT21) == BIT21;
- Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, [%a", gReg[Rt], gReg[Rt2], gReg[Rn]);
- if (P) {
- if ((OpCode32 & 0xff) == 0) {
- AsciiSPrint (&Buf[Offset], Size - Offset, "]");
- } else {
- AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", U?"":"-", (OpCode32 & 0xff) << 2, W?"!":"");
- }
- } else {
- if ((OpCode32 & 0xff) != 0) {
- AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x", U?"":"-", (OpCode32 & 0xff) << 2);
- }
- }
- return;
-
- case LDRD_REG_IMM8:
- // LDRD <rt>, <rt2>, <label>
- Target = (OpCode32 & 0xff) << 2;
- if ((OpCode32 & BIT23) == 0) {
- // U == 0 means subtrack, U == 1 means add
- Target = -Target;
- }
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, %a", gReg[Rt], gReg[Rt2], PC + 4 + Target);
- return;
-
- case LDREXB:
- // LDREXB <Rt>, [Rn]
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, [%a]", gReg[Rt], gReg[Rn]);
- return;
-
- case LDREXD:
- // LDREXD <Rt>, <Rt2>, [<Rn>]
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, ,%a, [%a]", gReg[Rt], gReg[Rt2], gReg[Rn]);
- return;
-
- case SRS_FORMAT:
- // SP{!}, #<mode>
- W = (OpCode32 & BIT21) == BIT21;
- AsciiSPrint (&Buf[Offset], Size - Offset, " SP%a, #0x%x", W?"!":"", OpCode32 & 0x1f);
- return;
-
- case RFE_FORMAT:
- // <Rn>{!}
- W = (OpCode32 & BIT21) == BIT21;
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, #0x%x", gReg[Rn], W?"!":"");
- return;
-
- case ADD_IMM12:
- // ADD{S} <Rd>, <Rn>, #<const> i:imm3:imm8
- if ((OpCode32 & BIT20) == BIT20) {
- Buf[Offset - 3] = 'S'; // assume %-6a
- }
- Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #0x%x", gReg[Rd], gReg[Rn], Target);
- return;
-
- case ADD_IMM12_1REG:
- // MOV{S} <Rd>, #<const> i:imm3:imm8
- if ((OpCode32 & BIT20) == BIT20) {
- Buf[Offset - 3] = 'S'; // assume %-6a
- }
- Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #0x%x", gReg[Rd], Target);
- return;
-
- case THUMB2_IMM16:
- // MOVW <Rd>, #<const> i:imm3:imm8
- Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
- Target |= ((OpCode32 >> 4) & 0xf0000);
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #0x%x", gReg[Rd], Target);
- return;
-
- case ADD_IMM5:
- // ADC{S} <Rd>, <Rn>, <Rm> {,LSL #<const>} imm3:imm2
- if ((OpCode32 & BIT20) == BIT20) {
- Buf[Offset - 3] = 'S'; // assume %-6a
- }
- Target = ((OpCode32 >> 6) & 3) | ((OpCode32 >> 10) & 0x1c0);
- Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, %a", gReg[Rd], gReg[Rn], gReg[Rm]);
- if (Target != 0) {
- AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL %d", gShiftType[(OpCode >> 5) & 3], Target);
- }
- return;
-
- case ADD_IMM5_2REG:
- // CMP <Rn>, <Rm> {,LSL #<const>} imm3:imm2
- Target = ((OpCode32 >> 6) & 3) | ((OpCode32 >> 10) & 0x1c0);
- Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[Rn], gReg[Rm]);
- if (Target != 0) {
- AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL %d", gShiftType[(OpCode >> 5) & 3], Target);
- }
-
-
- case ASR_IMM5:
- // ARS <Rd>, <Rm> #<const>} imm3:imm2
- if ((OpCode32 & BIT20) == BIT20) {
- Buf[Offset - 3] = 'S'; // assume %-6a
- }
- Target = ((OpCode32 >> 6) & 3) | ((OpCode32 >> 10) & 0x1c0);
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a #%d", gReg[Rd], gReg[Rm], Target);
- return;
-
- case ASR_3REG:
- // ARS <Rd>, <Rn>, <Rm>
- if ((OpCode32 & BIT20) == BIT20) {
- Buf[Offset - 3] = 'S'; // assume %-6a
- }
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a %a", gReg[Rd], gReg[Rn], gReg[Rm]);
- return;
-
- case ADR_THUMB2:
- // ADDR <Rd>, <label>
- Target = (OpCode32 & 0xff) | ((OpCode32 >> 8) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
- if ((OpCode & (BIT23 | BIT21)) == (BIT23 | BIT21)) {
- Target = PCAlign4 (PC) - Target;
- } else {
- Target = PCAlign4 (PC) + Target;
- }
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, 0x%08x", gReg[Rd], Target);
- return;
-
- case CMN_THUMB2:
- // CMN <Rn>, #<const>}
- Target = (OpCode32 & 0xff) | ((OpCode >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #0x%x", gReg[Rn], Target);
- return;
-
- case BFC_THUMB2:
- // BFI <Rd>, <Rn>, #<lsb>, #<width>
- msbit = OpCode32 & 0x1f;
- lsbit = ((OpCode32 >> 6) & 3) | ((OpCode >> 10) & 0x1c);
- if ((Rn == 0xf) & (AsciiStrCmp (gOpThumb2[Index].Start, "BFC") == 0)){
- // BFC <Rd>, #<lsb>, #<width>
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #%d, #%d", gReg[Rd], lsbit, msbit - lsbit + 1);
- } else if (AsciiStrCmp (gOpThumb2[Index].Start, "BFI") == 0) {
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #%d, #%d", gReg[Rd], gReg[Rn], lsbit, msbit - lsbit + 1);
- } else {
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #%d, #%d", gReg[Rd], gReg[Rn], lsbit, msbit + 1);
- }
- return;
-
- case CPD_THUMB2:
- // <coproc>,<opc1>,<CRd>,<CRn>,<CRm>,<opc2>
- coproc = (OpCode32 >> 8) & 0xf;
- opc1 = (OpCode32 >> 20) & 0xf;
- opc2 = (OpCode32 >> 5) & 0x7;
- CRd = (OpCode32 >> 12) & 0xf;
- CRn = (OpCode32 >> 16) & 0xf;
- CRm = OpCode32 & 0xf;
- Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " p%d,#%d,c%d,c%d,c%d", coproc, opc1, CRd, CRn, CRm);
- if (opc2 != 0) {
- AsciiSPrint (&Buf[Offset], Size - Offset, ",#%d,", opc2);
- }
- return;
-
- case MRC_THUMB2:
- // MRC <coproc>,<opc1>,<Rt>,<CRn>,<CRm>,<opc2>
- coproc = (OpCode32 >> 8) & 0xf;
- opc1 = (OpCode32 >> 20) & 0xf;
- opc2 = (OpCode32 >> 5) & 0x7;
- CRn = (OpCode32 >> 16) & 0xf;
- CRm = OpCode32 & 0xf;
- Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " p%d,#%d,%a,c%d,c%d", coproc, opc1, gReg[Rt], CRn, CRm);
- if (opc2 != 0) {
- AsciiSPrint (&Buf[Offset], Size - Offset, ",#%d,", opc2);
- }
- return;
-
- case MRRC_THUMB2:
- // MRC <coproc>,<opc1>,<Rt>,<Rt2>,<CRm>,<opc2>
- coproc = (OpCode32 >> 8) & 0xf;
- opc1 = (OpCode32 >> 20) & 0xf;
- CRn = (OpCode32 >> 16) & 0xf;
- CRm = OpCode32 & 0xf;
- Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " p%d,#%d,%a,%a,c%d", coproc, opc1, gReg[Rt], gReg[Rt2], CRm);
- return;
-
- case THUMB2_2REGS:
- // <Rd>, <Rm>
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[Rd], gReg[Rm]);
- return;
-
- case THUMB2_4REGS:
- // <Rd>, <Rn>, <Rm>, <Ra>
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, %a, %a", gReg[Rd], gReg[Rn], gReg[Rm], gReg[Rt]);
- return;
-
- case THUMB2_MRS:
- // MRS <Rd>, CPSR
- AsciiSPrint (&Buf[Offset], Size - Offset, " %a, CPSR", gReg[Rd]);
- return;
-
- case THUMB2_MSR:
- // MRS CPSR_<fields>, <Rd>
- Target = (OpCode32 >> 10) & 3;
- AsciiSPrint (&Buf[Offset], Size - Offset, " CPSR_%a%a, %a", (Target & 2) == 0 ? "":"f", (Target & 1) == 0 ? "":"s", gReg[Rd]);
- return;
-
- case THUMB2_NO_ARGS:
- default:
- break;
- }
- }
- }
-
- AsciiSPrint (Buf, Size, "0x%08x", OpCode32);
-}
-
-
-
-VOID
-DisassembleArmInstruction (
- IN UINT32 **OpCodePtr,
- OUT CHAR8 *Buf,
- OUT UINTN Size,
- IN BOOLEAN Extended
- );
-
-
-/**
- Place a dissasembly of of **OpCodePtr into buffer, and update OpCodePtr to
- point to next instructin.
-
- We cheat and only decode instructions that access
- memory. If the instruction is not found we dump the instruction in hex.
-
- @param OpCodePtrPtr Pointer to pointer of ARM Thumb instruction to disassemble.
- @param Thumb TRUE for Thumb(2), FALSE for ARM instruction stream
- @param Extended TRUE dump hex for instruction too.
- @param ItBlock Size of IT Block
- @param Buf Buffer to sprintf disassembly into.
- @param Size Size of Buf in bytes.
-
-**/
-VOID
-DisassembleInstruction (
- IN UINT8 **OpCodePtr,
- IN BOOLEAN Thumb,
- IN BOOLEAN Extended,
- IN OUT UINT32 *ItBlock,
- OUT CHAR8 *Buf,
- OUT UINTN Size
- )
-{
- if (Thumb) {
- DisassembleThumbInstruction ((UINT16 **)OpCodePtr, Buf, Size, ItBlock, Extended);
- } else {
- DisassembleArmInstruction ((UINT32 **)OpCodePtr, Buf, Size, Extended);
- }
-}
-
diff --git a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c deleted file mode 100644 index f4ee9e4c5e..0000000000 --- a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c +++ /dev/null @@ -1,342 +0,0 @@ -/** @file
- Generic ARM implementation of DmaLib.h
-
- Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiDxe.h>
-#include <Library/DebugLib.h>
-#include <Library/DmaLib.h>
-#include <Library/DxeServicesTableLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UncachedMemoryAllocationLib.h>
-#include <Library/IoLib.h>
-#include <Library/BaseMemoryLib.h>
-
-#include <Protocol/Cpu.h>
-
-typedef struct {
- EFI_PHYSICAL_ADDRESS HostAddress;
- VOID *BufferAddress;
- UINTN NumberOfBytes;
- DMA_MAP_OPERATION Operation;
- BOOLEAN DoubleBuffer;
-} MAP_INFO_INSTANCE;
-
-
-
-STATIC EFI_CPU_ARCH_PROTOCOL *mCpu;
-
-STATIC
-PHYSICAL_ADDRESS
-HostToDeviceAddress (
- IN PHYSICAL_ADDRESS HostAddress
- )
-{
- return HostAddress + PcdGet64 (PcdArmDmaDeviceOffset);
-}
-
-/**
- Provides the DMA controller-specific addresses needed to access system memory.
-
- Operation is relative to the DMA bus master.
-
- @param Operation Indicates if the bus master is going to read or write to system memory.
- @param HostAddress The system memory address to map to the DMA controller.
- @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
- that were mapped.
- @param DeviceAddress The resulting map address for the bus master controller to use to
- access the hosts HostAddress.
- @param Mapping A resulting value to pass to Unmap().
-
- @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
- @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
- @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
- @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
-
-**/
-EFI_STATUS
-EFIAPI
-DmaMap (
- IN DMA_MAP_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
- )
-{
- EFI_STATUS Status;
- MAP_INFO_INSTANCE *Map;
- VOID *Buffer;
- EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdDescriptor;
-
- if (HostAddress == NULL || NumberOfBytes == NULL || DeviceAddress == NULL || Mapping == NULL ) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (Operation >= MapOperationMaximum) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // The debug implementation of UncachedMemoryAllocationLib in ArmPkg returns
- // a virtual uncached alias, and unmaps the cached ID mapping of the buffer,
- // in order to catch inadvertent references to the cached mapping.
- // Since HostToDeviceAddress () expects ID mapped input addresses, convert
- // the host address to an ID mapped address first.
- //
- *DeviceAddress = HostToDeviceAddress (ConvertToPhysicalAddress (HostAddress));
-
- // Remember range so we can flush on the other side
- Map = AllocatePool (sizeof (MAP_INFO_INSTANCE));
- if (Map == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
-
- if ((((UINTN)HostAddress & (mCpu->DmaBufferAlignment - 1)) != 0) ||
- ((*NumberOfBytes & (mCpu->DmaBufferAlignment - 1)) != 0)) {
-
- // Get the cacheability of the region
- Status = gDS->GetMemorySpaceDescriptor ((UINTN)HostAddress, &GcdDescriptor);
- if (EFI_ERROR(Status)) {
- goto FreeMapInfo;
- }
-
- // If the mapped buffer is not an uncached buffer
- if ((GcdDescriptor.Attributes & (EFI_MEMORY_WB | EFI_MEMORY_WT)) != 0) {
- //
- // Operations of type MapOperationBusMasterCommonBuffer are only allowed
- // on uncached buffers.
- //
- if (Operation == MapOperationBusMasterCommonBuffer) {
- DEBUG ((EFI_D_ERROR,
- "%a: Operation type 'MapOperationBusMasterCommonBuffer' is only supported\n"
- "on memory regions that were allocated using DmaAllocateBuffer ()\n",
- __FUNCTION__));
- Status = EFI_UNSUPPORTED;
- goto FreeMapInfo;
- }
-
- //
- // If the buffer does not fill entire cache lines we must double buffer into
- // uncached memory. Device (PCI) address becomes uncached page.
- //
- Map->DoubleBuffer = TRUE;
- Status = DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (*NumberOfBytes), &Buffer);
- if (EFI_ERROR (Status)) {
- goto FreeMapInfo;
- }
-
- if (Operation == MapOperationBusMasterRead) {
- CopyMem (Buffer, HostAddress, *NumberOfBytes);
- }
-
- *DeviceAddress = HostToDeviceAddress (ConvertToPhysicalAddress (Buffer));
- Map->BufferAddress = Buffer;
- } else {
- Map->DoubleBuffer = FALSE;
- }
- } else {
- Map->DoubleBuffer = FALSE;
-
- DEBUG_CODE_BEGIN ();
-
- //
- // The operation type check above only executes if the buffer happens to be
- // misaligned with respect to CWG, but even if it is aligned, we should not
- // allow arbitrary buffers to be used for creating consistent mappings.
- // So duplicate the check here when running in DEBUG mode, just to assert
- // that we are not trying to create a consistent mapping for cached memory.
- //
- Status = gDS->GetMemorySpaceDescriptor ((UINTN)HostAddress, &GcdDescriptor);
- ASSERT_EFI_ERROR(Status);
-
- ASSERT (Operation != MapOperationBusMasterCommonBuffer ||
- (GcdDescriptor.Attributes & (EFI_MEMORY_WB | EFI_MEMORY_WT)) == 0);
-
- DEBUG_CODE_END ();
-
- // Flush the Data Cache (should not have any effect if the memory region is uncached)
- mCpu->FlushDataCache (mCpu, (UINTN)HostAddress, *NumberOfBytes,
- EfiCpuFlushTypeWriteBackInvalidate);
- }
-
- Map->HostAddress = (UINTN)HostAddress;
- Map->NumberOfBytes = *NumberOfBytes;
- Map->Operation = Operation;
-
- *Mapping = Map;
-
- return EFI_SUCCESS;
-
-FreeMapInfo:
- FreePool (Map);
-
- return Status;
-}
-
-
-/**
- Completes the DmaMapBusMasterRead(), DmaMapBusMasterWrite(), or DmaMapBusMasterCommonBuffer()
- operation and releases any corresponding resources.
-
- @param Mapping The mapping value returned from DmaMap*().
-
- @retval EFI_SUCCESS The range was unmapped.
- @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
- @retval EFI_INVALID_PARAMETER An inconsistency was detected between the mapping type
- and the DoubleBuffer field
-
-**/
-EFI_STATUS
-EFIAPI
-DmaUnmap (
- IN VOID *Mapping
- )
-{
- MAP_INFO_INSTANCE *Map;
- EFI_STATUS Status;
-
- if (Mapping == NULL) {
- ASSERT (FALSE);
- return EFI_INVALID_PARAMETER;
- }
-
- Map = (MAP_INFO_INSTANCE *)Mapping;
-
- Status = EFI_SUCCESS;
- if (Map->DoubleBuffer) {
- ASSERT (Map->Operation != MapOperationBusMasterCommonBuffer);
-
- if (Map->Operation == MapOperationBusMasterCommonBuffer) {
- Status = EFI_INVALID_PARAMETER;
- } else if (Map->Operation == MapOperationBusMasterWrite) {
- CopyMem ((VOID *)(UINTN)Map->HostAddress, Map->BufferAddress,
- Map->NumberOfBytes);
- }
-
- DmaFreeBuffer (EFI_SIZE_TO_PAGES (Map->NumberOfBytes), Map->BufferAddress);
-
- } else {
- if (Map->Operation == MapOperationBusMasterWrite) {
- //
- // Make sure we read buffer from uncached memory and not the cache
- //
- mCpu->FlushDataCache (mCpu, Map->HostAddress, Map->NumberOfBytes,
- EfiCpuFlushTypeInvalidate);
- }
- }
-
- FreePool (Map);
-
- return Status;
-}
-
-/**
- Allocates pages that are suitable for an DmaMap() of type MapOperationBusMasterCommonBuffer.
- mapping.
-
- @param MemoryType The type of memory to allocate, EfiBootServicesData or
- EfiRuntimeServicesData.
- @param Pages The number of pages to allocate.
- @param HostAddress A pointer to store the base system memory address of the
- allocated range.
-
- @retval EFI_SUCCESS The requested memory pages were allocated.
- @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
- MEMORY_WRITE_COMBINE and MEMORY_CACHED.
- @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
- @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
-
-**/
-EFI_STATUS
-EFIAPI
-DmaAllocateBuffer (
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages,
- OUT VOID **HostAddress
- )
-{
- VOID *Allocation;
-
- if (HostAddress == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // The only valid memory types are EfiBootServicesData and EfiRuntimeServicesData
- //
- // We used uncached memory to keep coherency
- //
- if (MemoryType == EfiBootServicesData) {
- Allocation = UncachedAllocatePages (Pages);
- } else if (MemoryType == EfiRuntimeServicesData) {
- Allocation = UncachedAllocateRuntimePages (Pages);
- } else {
- return EFI_INVALID_PARAMETER;
- }
-
- if (Allocation == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
-
- *HostAddress = Allocation;
-
- return EFI_SUCCESS;
-}
-
-
-/**
- Frees memory that was allocated with DmaAllocateBuffer().
-
- @param Pages The number of pages to free.
- @param HostAddress The base system memory address of the allocated range.
-
- @retval EFI_SUCCESS The requested memory pages were freed.
- @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
- was not allocated with DmaAllocateBuffer().
-
-**/
-EFI_STATUS
-EFIAPI
-DmaFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress
- )
-{
- if (HostAddress == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- UncachedFreePages (HostAddress, Pages);
- return EFI_SUCCESS;
-}
-
-
-EFI_STATUS
-EFIAPI
-ArmDmaLibConstructor (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
-
- // Get the Cpu protocol for later use
- Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu);
- ASSERT_EFI_ERROR(Status);
-
- return Status;
-}
-
diff --git a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf deleted file mode 100644 index 9b7dad114b..0000000000 --- a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf +++ /dev/null @@ -1,50 +0,0 @@ -#/** @file
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmDmaLib
- FILE_GUID = F1BD6B36-B705-43aa-8A28-33F58ED85EFB
- MODULE_TYPE = UEFI_DRIVER
- VERSION_STRING = 1.0
- LIBRARY_CLASS = DmaLib
- CONSTRUCTOR = ArmDmaLibConstructor
-
-[Sources.common]
- ArmDmaLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
-
-
-[LibraryClasses]
- DebugLib
- DxeServicesTableLib
- UefiBootServicesTableLib
- MemoryAllocationLib
- UncachedMemoryAllocationLib
- IoLib
- BaseMemoryLib
-
-[Protocols]
- gEfiCpuArchProtocolGuid
-
-[Guids]
-
-[Pcd]
- gArmTokenSpaceGuid.PcdArmDmaDeviceOffset
-
-[Depex]
- gEfiCpuArchProtocolGuid
diff --git a/ArmPkg/Library/ArmExceptionLib/AArch64/AArch64Exception.c b/ArmPkg/Library/ArmExceptionLib/AArch64/AArch64Exception.c deleted file mode 100644 index bd307628af..0000000000 --- a/ArmPkg/Library/ArmExceptionLib/AArch64/AArch64Exception.c +++ /dev/null @@ -1,59 +0,0 @@ -/** @file
-* Exception Handling support specific for AArch64
-*
-* Copyright (c) 2016 HP Development Company, L.P.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Uefi.h>
-
-#include <Chipset/AArch64.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Protocol/DebugSupport.h> // for MAX_AARCH64_EXCEPTION
-
-UINTN gMaxExceptionNumber = MAX_AARCH64_EXCEPTION;
-EFI_EXCEPTION_CALLBACK gExceptionHandlers[MAX_AARCH64_EXCEPTION + 1] = { 0 };
-EFI_EXCEPTION_CALLBACK gDebuggerExceptionHandlers[MAX_AARCH64_EXCEPTION + 1] = { 0 };
-PHYSICAL_ADDRESS gExceptionVectorAlignmentMask = ARM_VECTOR_TABLE_ALIGNMENT;
-UINTN gDebuggerNoHandlerValue = 0; // todo: define for AArch64
-
-#define EL0_STACK_PAGES 2
-
-VOID
-RegisterEl0Stack (
- IN VOID *Stack
- );
-
-RETURN_STATUS ArchVectorConfig(
- IN UINTN VectorBaseAddress
- )
-{
- UINTN HcrReg;
- UINT8 *Stack;
-
- Stack = AllocatePages (EL0_STACK_PAGES);
- if (Stack == NULL) {
- return RETURN_OUT_OF_RESOURCES;
- }
-
- RegisterEl0Stack ((UINT8 *)Stack + EFI_PAGES_TO_SIZE (EL0_STACK_PAGES));
-
- if (ArmReadCurrentEL() == AARCH64_EL2) {
- HcrReg = ArmReadHcr();
-
- // Trap General Exceptions. All exceptions that would be routed to EL1 are routed to EL2
- HcrReg |= ARM_HCR_TGE;
-
- ArmWriteHcr(HcrReg);
- }
-
- return RETURN_SUCCESS;
-}
diff --git a/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S b/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S deleted file mode 100644 index 1879e9871a..0000000000 --- a/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S +++ /dev/null @@ -1,398 +0,0 @@ -//
-// Copyright (c) 2011 - 2014 ARM LTD. All rights reserved.<BR>
-// Portion of Copyright (c) 2014 NVIDIA Corporation. All rights reserved.<BR>
-// Copyright (c) 2016 HP Development Company, L.P.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-#include <Chipset/AArch64.h>
-#include <Library/PcdLib.h>
-#include <AsmMacroIoLibV8.h>
-#include <Protocol/DebugSupport.h> // for exception type definitions
-
-/*
- This is the stack constructed by the exception handler (low address to high address).
- X0 to FAR makes up the EFI_SYSTEM_CONTEXT for AArch64.
-
- UINT64 X0; 0x000
- UINT64 X1; 0x008
- UINT64 X2; 0x010
- UINT64 X3; 0x018
- UINT64 X4; 0x020
- UINT64 X5; 0x028
- UINT64 X6; 0x030
- UINT64 X7; 0x038
- UINT64 X8; 0x040
- UINT64 X9; 0x048
- UINT64 X10; 0x050
- UINT64 X11; 0x058
- UINT64 X12; 0x060
- UINT64 X13; 0x068
- UINT64 X14; 0x070
- UINT64 X15; 0x078
- UINT64 X16; 0x080
- UINT64 X17; 0x088
- UINT64 X18; 0x090
- UINT64 X19; 0x098
- UINT64 X20; 0x0a0
- UINT64 X21; 0x0a8
- UINT64 X22; 0x0b0
- UINT64 X23; 0x0b8
- UINT64 X24; 0x0c0
- UINT64 X25; 0x0c8
- UINT64 X26; 0x0d0
- UINT64 X27; 0x0d8
- UINT64 X28; 0x0e0
- UINT64 FP; 0x0e8 // x29 - Frame Pointer
- UINT64 LR; 0x0f0 // x30 - Link Register
- UINT64 SP; 0x0f8 // x31 - Stack Pointer
-
- // FP/SIMD Registers. 128bit if used as Q-regs.
- UINT64 V0[2]; 0x100
- UINT64 V1[2]; 0x110
- UINT64 V2[2]; 0x120
- UINT64 V3[2]; 0x130
- UINT64 V4[2]; 0x140
- UINT64 V5[2]; 0x150
- UINT64 V6[2]; 0x160
- UINT64 V7[2]; 0x170
- UINT64 V8[2]; 0x180
- UINT64 V9[2]; 0x190
- UINT64 V10[2]; 0x1a0
- UINT64 V11[2]; 0x1b0
- UINT64 V12[2]; 0x1c0
- UINT64 V13[2]; 0x1d0
- UINT64 V14[2]; 0x1e0
- UINT64 V15[2]; 0x1f0
- UINT64 V16[2]; 0x200
- UINT64 V17[2]; 0x210
- UINT64 V18[2]; 0x220
- UINT64 V19[2]; 0x230
- UINT64 V20[2]; 0x240
- UINT64 V21[2]; 0x250
- UINT64 V22[2]; 0x260
- UINT64 V23[2]; 0x270
- UINT64 V24[2]; 0x280
- UINT64 V25[2]; 0x290
- UINT64 V26[2]; 0x2a0
- UINT64 V27[2]; 0x2b0
- UINT64 V28[2]; 0x2c0
- UINT64 V29[2]; 0x2d0
- UINT64 V30[2]; 0x2e0
- UINT64 V31[2]; 0x2f0
-
- // System Context
- UINT64 ELR; 0x300 // Exception Link Register
- UINT64 SPSR; 0x308 // Saved Processor Status Register
- UINT64 FPSR; 0x310 // Floating Point Status Register
- UINT64 ESR; 0x318 // Exception syndrome register
- UINT64 FAR; 0x320 // Fault Address Register
- UINT64 Padding;0x328 // Required for stack alignment
-*/
-
-GCC_ASM_EXPORT(ExceptionHandlersEnd)
-GCC_ASM_EXPORT(CommonCExceptionHandler)
-GCC_ASM_EXPORT(RegisterEl0Stack)
-
-.text
-
-#define GP_CONTEXT_SIZE (32 * 8)
-#define FP_CONTEXT_SIZE (32 * 16)
-#define SYS_CONTEXT_SIZE ( 6 * 8) // 5 SYS regs + Alignment requirement (ie: the stack must be aligned on 0x10)
-
-//
-// There are two methods for installing AArch64 exception vectors:
-// 1. Install a copy of the vectors to a location specified by a PCD
-// 2. Write VBAR directly, requiring that vectors have proper alignment (2K)
-// The conditional below adjusts the alignment requirement based on which
-// exception vector initialization method is used.
-//
-
-#if defined(ARM_RELOCATE_VECTORS)
-GCC_ASM_EXPORT(ExceptionHandlersStart)
-ASM_PFX(ExceptionHandlersStart):
-#else
-VECTOR_BASE(ExceptionHandlersStart)
-#endif
-
- .macro ExceptionEntry, val, sp=SPx
- //
- // Our backtrace and register dump code is written in C and so it requires
- // a stack. This makes it difficult to produce meaningful diagnostics when
- // the stack pointer has been corrupted. So in such cases (i.e., when taking
- // synchronous exceptions), this macro is expanded with \sp set to SP0, in
- // which case we switch to the SP_EL0 stack pointer, which has been
- // initialized to point to a buffer that has been set aside for this purpose.
- //
- // Since 'sp' may no longer refer to the stack frame that was active when
- // the exception was taken, we may have to switch back and forth between
- // SP_EL0 and SP_ELx to record the correct value for SP in the context struct.
- //
- .ifnc \sp, SPx
- msr SPsel, xzr
- .endif
-
- // Move the stackpointer so we can reach our structure with the str instruction.
- sub sp, sp, #(FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE)
-
- // Push the GP registers so we can record the exception context
- stp x0, x1, [sp, #-GP_CONTEXT_SIZE]!
- stp x2, x3, [sp, #0x10]
- stp x4, x5, [sp, #0x20]
- stp x6, x7, [sp, #0x30]
- stp x8, x9, [sp, #0x40]
- stp x10, x11, [sp, #0x50]
- stp x12, x13, [sp, #0x60]
- stp x14, x15, [sp, #0x70]
- stp x16, x17, [sp, #0x80]
- stp x18, x19, [sp, #0x90]
- stp x20, x21, [sp, #0xa0]
- stp x22, x23, [sp, #0xb0]
- stp x24, x25, [sp, #0xc0]
- stp x26, x27, [sp, #0xd0]
- stp x28, x29, [sp, #0xe0]
- add x28, sp, #(GP_CONTEXT_SIZE + FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE)
-
- .ifnc \sp, SPx
- msr SPsel, #1
- mov x7, sp
- msr SPsel, xzr
- .else
- mov x7, x28
- .endif
-
- stp x30, x7, [sp, #0xf0]
-
- // Record the type of exception that occurred.
- mov x0, #\val
-
- // Jump to our general handler to deal with all the common parts and process the exception.
-#if defined(ARM_RELOCATE_VECTORS)
- ldr x1, =ASM_PFX(CommonExceptionEntry)
- br x1
- .ltorg
-#else
- b ASM_PFX(CommonExceptionEntry)
-#endif
- .endm
-
-//
-// Current EL with SP0 : 0x0 - 0x180
-//
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SP0_SYNC)
-ASM_PFX(SynchronousExceptionSP0):
- ExceptionEntry EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
-
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SP0_IRQ)
-ASM_PFX(IrqSP0):
- ExceptionEntry EXCEPT_AARCH64_IRQ
-
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SP0_FIQ)
-ASM_PFX(FiqSP0):
- ExceptionEntry EXCEPT_AARCH64_FIQ
-
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SP0_SERR)
-ASM_PFX(SErrorSP0):
- ExceptionEntry EXCEPT_AARCH64_SERROR
-
-//
-// Current EL with SPx: 0x200 - 0x380
-//
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_SYNC)
-ASM_PFX(SynchronousExceptionSPx):
- ExceptionEntry EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS, SP0
-
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_IRQ)
-ASM_PFX(IrqSPx):
- ExceptionEntry EXCEPT_AARCH64_IRQ
-
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_FIQ)
-ASM_PFX(FiqSPx):
- ExceptionEntry EXCEPT_AARCH64_FIQ
-
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_SERR)
-ASM_PFX(SErrorSPx):
- ExceptionEntry EXCEPT_AARCH64_SERROR
-
-//
-// Lower EL using AArch64 : 0x400 - 0x580
-//
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A64_SYNC)
-ASM_PFX(SynchronousExceptionA64):
- ExceptionEntry EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
-
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A64_IRQ)
-ASM_PFX(IrqA64):
- ExceptionEntry EXCEPT_AARCH64_IRQ
-
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A64_FIQ)
-ASM_PFX(FiqA64):
- ExceptionEntry EXCEPT_AARCH64_FIQ
-
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A64_SERR)
-ASM_PFX(SErrorA64):
- ExceptionEntry EXCEPT_AARCH64_SERROR
-
-//
-// Lower EL using AArch32 : 0x600 - 0x780
-//
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A32_SYNC)
-ASM_PFX(SynchronousExceptionA32):
- ExceptionEntry EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
-
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A32_IRQ)
-ASM_PFX(IrqA32):
- ExceptionEntry EXCEPT_AARCH64_IRQ
-
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A32_FIQ)
-ASM_PFX(FiqA32):
- ExceptionEntry EXCEPT_AARCH64_FIQ
-
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A32_SERR)
-ASM_PFX(SErrorA32):
- ExceptionEntry EXCEPT_AARCH64_SERROR
-
-VECTOR_END(ExceptionHandlersStart)
-
-ASM_PFX(ExceptionHandlersEnd):
-
-
-ASM_PFX(CommonExceptionEntry):
-
- EL1_OR_EL2_OR_EL3(x1)
-1:mrs x2, elr_el1 // Exception Link Register
- mrs x3, spsr_el1 // Saved Processor Status Register 32bit
- mrs x5, esr_el1 // EL1 Exception syndrome register 32bit
- mrs x6, far_el1 // EL1 Fault Address Register
- b 4f
-
-2:mrs x2, elr_el2 // Exception Link Register
- mrs x3, spsr_el2 // Saved Processor Status Register 32bit
- mrs x5, esr_el2 // EL2 Exception syndrome register 32bit
- mrs x6, far_el2 // EL2 Fault Address Register
- b 4f
-
-3:mrs x2, elr_el3 // Exception Link Register
- mrs x3, spsr_el3 // Saved Processor Status Register 32bit
- mrs x5, esr_el3 // EL3 Exception syndrome register 32bit
- mrs x6, far_el3 // EL3 Fault Address Register
-
-4:mrs x4, fpsr // Floating point Status Register 32bit
-
- // Save the SYS regs
- stp x2, x3, [x28, #-SYS_CONTEXT_SIZE]!
- stp x4, x5, [x28, #0x10]
- str x6, [x28, #0x20]
-
- // Push FP regs to Stack.
- stp q0, q1, [x28, #-FP_CONTEXT_SIZE]!
- stp q2, q3, [x28, #0x20]
- stp q4, q5, [x28, #0x40]
- stp q6, q7, [x28, #0x60]
- stp q8, q9, [x28, #0x80]
- stp q10, q11, [x28, #0xa0]
- stp q12, q13, [x28, #0xc0]
- stp q14, q15, [x28, #0xe0]
- stp q16, q17, [x28, #0x100]
- stp q18, q19, [x28, #0x120]
- stp q20, q21, [x28, #0x140]
- stp q22, q23, [x28, #0x160]
- stp q24, q25, [x28, #0x180]
- stp q26, q27, [x28, #0x1a0]
- stp q28, q29, [x28, #0x1c0]
- stp q30, q31, [x28, #0x1e0]
-
- // x0 still holds the exception type.
- // Set x1 to point to the top of our struct on the Stack
- mov x1, sp
-
-// CommonCExceptionHandler (
-// IN EFI_EXCEPTION_TYPE ExceptionType, R0
-// IN OUT EFI_SYSTEM_CONTEXT SystemContext R1
-// )
-
- // Call the handler as defined above
-
- // For now we spin in the handler if we received an abort of some kind.
- // We do not try to recover.
- bl ASM_PFX(CommonCExceptionHandler) // Call exception handler
-
- // Pop as many GP regs as we can before entering the critical section below
- ldp x2, x3, [sp, #0x10]
- ldp x4, x5, [sp, #0x20]
- ldp x6, x7, [sp, #0x30]
- ldp x8, x9, [sp, #0x40]
- ldp x10, x11, [sp, #0x50]
- ldp x12, x13, [sp, #0x60]
- ldp x14, x15, [sp, #0x70]
- ldp x16, x17, [sp, #0x80]
- ldp x18, x19, [sp, #0x90]
- ldp x20, x21, [sp, #0xa0]
- ldp x22, x23, [sp, #0xb0]
- ldp x24, x25, [sp, #0xc0]
- ldp x26, x27, [sp, #0xd0]
- ldp x0, x1, [sp], #0xe0
-
- // Pop FP regs from Stack.
- ldp q2, q3, [x28, #0x20]
- ldp q4, q5, [x28, #0x40]
- ldp q6, q7, [x28, #0x60]
- ldp q8, q9, [x28, #0x80]
- ldp q10, q11, [x28, #0xa0]
- ldp q12, q13, [x28, #0xc0]
- ldp q14, q15, [x28, #0xe0]
- ldp q16, q17, [x28, #0x100]
- ldp q18, q19, [x28, #0x120]
- ldp q20, q21, [x28, #0x140]
- ldp q22, q23, [x28, #0x160]
- ldp q24, q25, [x28, #0x180]
- ldp q26, q27, [x28, #0x1a0]
- ldp q28, q29, [x28, #0x1c0]
- ldp q30, q31, [x28, #0x1e0]
- ldp q0, q1, [x28], #FP_CONTEXT_SIZE
-
- // Pop the SYS regs we need
- ldp x29, x30, [x28]
- ldr x28, [x28, #0x10]
- msr fpsr, x28
-
- //
- // Disable interrupt(IRQ and FIQ) before restoring context,
- // or else the context will be corrupted by interrupt reentrance.
- // Interrupt mask will be restored from spsr by hardware when we call eret
- //
- msr daifset, #3
- isb
-
- EL1_OR_EL2_OR_EL3(x28)
-1:msr elr_el1, x29 // Exception Link Register
- msr spsr_el1, x30 // Saved Processor Status Register 32bit
- b 4f
-2:msr elr_el2, x29 // Exception Link Register
- msr spsr_el2, x30 // Saved Processor Status Register 32bit
- b 4f
-3:msr elr_el3, x29 // Exception Link Register
- msr spsr_el3, x30 // Saved Processor Status Register 32bit
-4:
-
- // pop remaining GP regs and return from exception.
- ldr x30, [sp, #0xf0 - 0xe0]
- ldp x28, x29, [sp], #GP_CONTEXT_SIZE - 0xe0
-
- // Adjust SP to be where we started from when we came into the handler.
- // The handler can not change the SP.
- add sp, sp, #FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE
-
- eret
-
-ASM_PFX(RegisterEl0Stack):
- msr sp_el0, x0
- ret
diff --git a/ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c b/ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c deleted file mode 100644 index 0a0c2a22d2..0000000000 --- a/ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c +++ /dev/null @@ -1,50 +0,0 @@ -/** @file
-* Exception handling support specific for ARM
-*
-* Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-* Copyright (c) 2014, ARM Limited. All rights reserved.<BR>
-* Copyright (c) 2016 HP Development Company, L.P.<BR>
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Uefi.h>
-
-#include <Chipset/ArmV7.h>
-
-#include <Library/ArmLib.h>
-
-#include <Protocol/DebugSupport.h> // for MAX_ARM_EXCEPTION
-
-UINTN gMaxExceptionNumber = MAX_ARM_EXCEPTION;
-EFI_EXCEPTION_CALLBACK gExceptionHandlers[MAX_ARM_EXCEPTION + 1] = { 0 };
-EFI_EXCEPTION_CALLBACK gDebuggerExceptionHandlers[MAX_ARM_EXCEPTION + 1] = { 0 };
-PHYSICAL_ADDRESS gExceptionVectorAlignmentMask = ARM_VECTOR_TABLE_ALIGNMENT;
-
-// Exception handler contains branch to vector location (jmp $) so no handler
-// NOTE: This code assumes vectors are ARM and not Thumb code
-UINTN gDebuggerNoHandlerValue = 0xEAFFFFFE;
-
-RETURN_STATUS ArchVectorConfig(
- IN UINTN VectorBaseAddress
- )
-{
- // if the vector address corresponds to high vectors
- if (VectorBaseAddress == 0xFFFF0000) {
- // set SCTLR.V to enable high vectors
- ArmSetHighVectors();
- }
- else {
- // Set SCTLR.V to 0 to enable VBAR to be used
- ArmSetLowVectors();
- }
-
- return RETURN_SUCCESS;
-}
diff --git a/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.S b/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.S deleted file mode 100644 index fa4087cfab..0000000000 --- a/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.S +++ /dev/null @@ -1,305 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Use ARMv6 instruction to operate on a single stack
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2014, ARM Limited. All rights reserved.<BR>
-# Copyright (c) 2016 HP Development Company, L.P.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <Library/PcdLib.h>
-
-/*
-
-This is the stack constructed by the exception handler (low address to high address)
- # R0 - IFAR is EFI_SYSTEM_CONTEXT for ARM
- Reg Offset
- === ======
- R0 0x00 # stmfd SP!,{R0-R12}
- R1 0x04
- R2 0x08
- R3 0x0c
- R4 0x10
- R5 0x14
- R6 0x18
- R7 0x1c
- R8 0x20
- R9 0x24
- R10 0x28
- R11 0x2c
- R12 0x30
- SP 0x34 # reserved via subtraction 0x20 (32) from SP
- LR 0x38
- PC 0x3c
- CPSR 0x40
- DFSR 0x44
- DFAR 0x48
- IFSR 0x4c
- IFAR 0x50
-
- LR 0x54 # SVC Link register (we need to restore it)
-
- LR 0x58 # pushed by srsfd
- CPSR 0x5c
-
- */
-
-
-GCC_ASM_EXPORT(ExceptionHandlersStart)
-GCC_ASM_EXPORT(ExceptionHandlersEnd)
-GCC_ASM_EXPORT(CommonExceptionEntry)
-GCC_ASM_EXPORT(AsmCommonExceptionEntry)
-GCC_ASM_EXPORT(CommonCExceptionHandler)
-
-.text
-.syntax unified
-#if !defined(__APPLE__)
-.fpu neon @ makes vpush/vpop assemble
-#endif
-.align 5
-
-
-//
-// This code gets copied to the ARM vector table
-// ExceptionHandlersStart - ExceptionHandlersEnd gets copied
-//
-ASM_PFX(ExceptionHandlersStart):
-
-ASM_PFX(Reset):
- b ASM_PFX(ResetEntry)
-
-ASM_PFX(UndefinedInstruction):
- b ASM_PFX(UndefinedInstructionEntry)
-
-ASM_PFX(SoftwareInterrupt):
- b ASM_PFX(SoftwareInterruptEntry)
-
-ASM_PFX(PrefetchAbort):
- b ASM_PFX(PrefetchAbortEntry)
-
-ASM_PFX(DataAbort):
- b ASM_PFX(DataAbortEntry)
-
-ASM_PFX(ReservedException):
- b ASM_PFX(ReservedExceptionEntry)
-
-ASM_PFX(Irq):
- b ASM_PFX(IrqEntry)
-
-ASM_PFX(Fiq):
- b ASM_PFX(FiqEntry)
-
-ASM_PFX(ResetEntry):
- srsdb #0x13! @ Store return state on SVC stack
- @ We are already in SVC mode
-
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
-
- mov R0,#0 @ ExceptionType
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-ASM_PFX(UndefinedInstructionEntry):
- sub LR, LR, #4 @ Only -2 for Thumb, adjust in CommonExceptionEntry
- srsdb #0x13! @ Store return state on SVC stack
- cps #0x13 @ Switch to SVC for common stack
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
-
- mov R0,#1 @ ExceptionType
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-ASM_PFX(SoftwareInterruptEntry):
- srsdb #0x13! @ Store return state on SVC stack
- @ We are already in SVC mode
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
-
- mov R0,#2 @ ExceptionType
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-ASM_PFX(PrefetchAbortEntry):
- sub LR,LR,#4
- srsdb #0x13! @ Store return state on SVC stack
- cps #0x13 @ Switch to SVC for common stack
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
-
- mov R0,#3 @ ExceptionType
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-ASM_PFX(DataAbortEntry):
- sub LR,LR,#8
- srsdb #0x13! @ Store return state on SVC stack
- cps #0x13 @ Switch to SVC for common stack
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
-
- mov R0,#4
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-ASM_PFX(ReservedExceptionEntry):
- srsdb #0x13! @ Store return state on SVC stack
- cps #0x13 @ Switch to SVC for common stack
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
-
- mov R0,#5
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-ASM_PFX(IrqEntry):
- sub LR,LR,#4
- srsdb #0x13! @ Store return state on SVC stack
- cps #0x13 @ Switch to SVC for common stack
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
-
- mov R0,#6 @ ExceptionType
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-ASM_PFX(FiqEntry):
- sub LR,LR,#4
- srsdb #0x13! @ Store return state on SVC stack
- cps #0x13 @ Switch to SVC for common stack
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
- @ Since we have already switch to SVC R8_fiq - R12_fiq
- @ never get used or saved
- mov R0,#7 @ ExceptionType
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-//
-// This gets patched by the C code that patches in the vector table
-//
-ASM_PFX(CommonExceptionEntry):
- .word ASM_PFX(AsmCommonExceptionEntry)
-
-ASM_PFX(ExceptionHandlersEnd):
-
-//
-// This code runs from CpuDxe driver loaded address. It is patched into
-// CommonExceptionEntry.
-//
-ASM_PFX(AsmCommonExceptionEntry):
- mrc p15, 0, R1, c6, c0, 2 @ Read IFAR
- str R1, [SP, #0x50] @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR
-
- mrc p15, 0, R1, c5, c0, 1 @ Read IFSR
- str R1, [SP, #0x4c] @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFSR
-
- mrc p15, 0, R1, c6, c0, 0 @ Read DFAR
- str R1, [SP, #0x48] @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFAR
-
- mrc p15, 0, R1, c5, c0, 0 @ Read DFSR
- str R1, [SP, #0x44] @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFSR
-
- ldr R1, [SP, #0x5c] @ srsdb saved pre-exception CPSR on the stack
- str R1, [SP, #0x40] @ Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR
-
- add R2, SP, #0x38 @ Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
- and R3, R1, #0x1f @ Check CPSR to see if User or System Mode
- cmp R3, #0x1f @ if ((CPSR == 0x10) || (CPSR == 0x1f))
- cmpne R3, #0x10 @
- stmdaeq R2, {lr}^ @ save unbanked lr
- @ else
- stmdane R2, {lr} @ save SVC lr
-
-
- ldr R5, [SP, #0x58] @ PC is the LR pushed by srsfd
- @ Check to see if we have to adjust for Thumb entry
- sub r4, r0, #1 @ if (ExceptionType == 1 || ExceptionType == 2)) {
- cmp r4, #1 @ // UND & SVC have differnt LR adjust for Thumb
- bhi NoAdjustNeeded
-
- tst r1, #0x20 @ if ((CPSR & T)) == T) { // Thumb Mode on entry
- addne R5, R5, #2 @ PC += 2;
- strne R5,[SP,#0x58] @ Update LR value pushed by srsfd
-
-NoAdjustNeeded:
-
- str R5, [SP, #0x3c] @ Store it in EFI_SYSTEM_CONTEXT_ARM.PC
-
- add R1, SP, #0x60 @ We pushed 0x60 bytes on the stack
- str R1, [SP, #0x34] @ Store it in EFI_SYSTEM_CONTEXT_ARM.SP
-
- @ R0 is ExceptionType
- mov R1,SP @ R1 is SystemContext
-
-#if (FixedPcdGet32(PcdVFPEnabled))
- vpush {d0-d15} @ save vstm registers in case they are used in optimizations
-#endif
-
- mov R4, SP @ Save current SP
- tst R4, #4
- subne SP, SP, #4 @ Adjust SP if not 8-byte aligned
-
-/*
-VOID
-EFIAPI
-CommonCExceptionHandler (
- IN EFI_EXCEPTION_TYPE ExceptionType, R0
- IN OUT EFI_SYSTEM_CONTEXT SystemContext R1
- )
-
-*/
- blx ASM_PFX(CommonCExceptionHandler) @ Call exception handler
-
- mov SP, R4 @ Restore SP
-
-#if (FixedPcdGet32(PcdVFPEnabled))
- vpop {d0-d15}
-#endif
-
- ldr R1, [SP, #0x4c] @ Restore EFI_SYSTEM_CONTEXT_ARM.IFSR
- mcr p15, 0, R1, c5, c0, 1 @ Write IFSR
-
- ldr R1, [SP, #0x44] @ Restore EFI_SYSTEM_CONTEXT_ARM.DFSR
- mcr p15, 0, R1, c5, c0, 0 @ Write DFSR
-
- ldr R1,[SP,#0x3c] @ EFI_SYSTEM_CONTEXT_ARM.PC
- str R1,[SP,#0x58] @ Store it back to srsfd stack slot so it can be restored
-
- ldr R1,[SP,#0x40] @ EFI_SYSTEM_CONTEXT_ARM.CPSR
- str R1,[SP,#0x5c] @ Store it back to srsfd stack slot so it can be restored
-
- add R3, SP, #0x54 @ Make R3 point to SVC LR saved on entry
- add R2, SP, #0x38 @ Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
- and R1, R1, #0x1f @ Check to see if User or System Mode
- cmp R1, #0x1f @ if ((CPSR == 0x10) || (CPSR == 0x1f))
- cmpne R1, #0x10 @
- ldmibeq R2, {lr}^ @ restore unbanked lr
- @ else
- ldmibne R3, {lr} @ restore SVC lr, via ldmfd SP!, {LR}
-
- ldmfd SP!,{R0-R12} @ Restore general purpose registers
- @ Exception handler can not change SP
-
- add SP,SP,#0x20 @ Clear out the remaining stack space
- ldmfd SP!,{LR} @ restore the link register for this context
- rfefd SP! @ return from exception via srsfd stack slot
-
diff --git a/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.asm b/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.asm deleted file mode 100644 index 848a54babf..0000000000 --- a/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.asm +++ /dev/null @@ -1,302 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Use ARMv6 instruction to operate on a single stack
-//
-// Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-// Copyright (c) 2014, ARM Limited. All rights reserved.<BR>
-// Copyright (c) 2016 HP Development Company, L.P.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-#include <Library/PcdLib.h>
-
-/*
-
-This is the stack constructed by the exception handler (low address to high address)
- # R0 - IFAR is EFI_SYSTEM_CONTEXT for ARM
- Reg Offset
- === ======
- R0 0x00 # stmfd SP!,{R0-R12}
- R1 0x04
- R2 0x08
- R3 0x0c
- R4 0x10
- R5 0x14
- R6 0x18
- R7 0x1c
- R8 0x20
- R9 0x24
- R10 0x28
- R11 0x2c
- R12 0x30
- SP 0x34 # reserved via subtraction 0x20 (32) from SP
- LR 0x38
- PC 0x3c
- CPSR 0x40
- DFSR 0x44
- DFAR 0x48
- IFSR 0x4c
- IFAR 0x50
-
- LR 0x54 # SVC Link register (we need to restore it)
-
- LR 0x58 # pushed by srsfd
- CPSR 0x5c
-
- */
-
-
- EXPORT ExceptionHandlersStart
- EXPORT ExceptionHandlersEnd
- EXPORT CommonExceptionEntry
- EXPORT AsmCommonExceptionEntry
- IMPORT CommonCExceptionHandler
-
- PRESERVE8
- AREA DxeExceptionHandlers, CODE, READONLY, CODEALIGN, ALIGN=5
-
-//
-// This code gets copied to the ARM vector table
-// ExceptionHandlersStart - ExceptionHandlersEnd gets copied
-//
-ExceptionHandlersStart
-
-Reset
- b ResetEntry
-
-UndefinedInstruction
- b UndefinedInstructionEntry
-
-SoftwareInterrupt
- b SoftwareInterruptEntry
-
-PrefetchAbort
- b PrefetchAbortEntry
-
-DataAbort
- b DataAbortEntry
-
-ReservedException
- b ReservedExceptionEntry
-
-Irq
- b IrqEntry
-
-Fiq
- b FiqEntry
-
-ResetEntry
- srsfd #0x13! ; Store return state on SVC stack
- ; We are already in SVC mode
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
-
- mov R0,#0 ; ExceptionType
- ldr R1,CommonExceptionEntry
- bx R1
-
-UndefinedInstructionEntry
- sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry
- srsfd #0x13! ; Store return state on SVC stack
- cps #0x13 ; Switch to SVC for common stack
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
-
- mov R0,#1 ; ExceptionType
- ldr R1,CommonExceptionEntry;
- bx R1
-
-SoftwareInterruptEntry
- srsfd #0x13! ; Store return state on SVC stack
- ; We are already in SVC mode
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
-
- mov R0,#2 ; ExceptionType
- ldr R1,CommonExceptionEntry
- bx R1
-
-PrefetchAbortEntry
- sub LR,LR,#4
- srsfd #0x13! ; Store return state on SVC stack
- cps #0x13 ; Switch to SVC for common stack
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
-
- mov R0,#3 ; ExceptionType
- ldr R1,CommonExceptionEntry
- bx R1
-
-DataAbortEntry
- sub LR,LR,#8
- srsfd #0x13! ; Store return state on SVC stack
- cps #0x13 ; Switch to SVC for common stack
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
-
- mov R0,#4 ; ExceptionType
- ldr R1,CommonExceptionEntry
- bx R1
-
-ReservedExceptionEntry
- srsfd #0x13! ; Store return state on SVC stack
- cps #0x13 ; Switch to SVC for common stack
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
-
- mov R0,#5 ; ExceptionType
- ldr R1,CommonExceptionEntry
- bx R1
-
-IrqEntry
- sub LR,LR,#4
- srsfd #0x13! ; Store return state on SVC stack
- cps #0x13 ; Switch to SVC for common stack
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
-
- mov R0,#6 ; ExceptionType
- ldr R1,CommonExceptionEntry
- bx R1
-
-FiqEntry
- sub LR,LR,#4
- srsfd #0x13! ; Store return state on SVC stack
- cps #0x13 ; Switch to SVC for common stack
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
- ; Since we have already switch to SVC R8_fiq - R12_fiq
- ; never get used or saved
- mov R0,#7 ; ExceptionType
- ldr R1,CommonExceptionEntry
- bx R1
-
-//
-// This gets patched by the C code that patches in the vector table
-//
-CommonExceptionEntry
- dcd AsmCommonExceptionEntry
-
-ExceptionHandlersEnd
-
-//
-// This code runs from CpuDxe driver loaded address. It is patched into
-// CommonExceptionEntry.
-//
-AsmCommonExceptionEntry
- mrc p15, 0, R1, c6, c0, 2 ; Read IFAR
- str R1, [SP, #0x50] ; Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR
-
- mrc p15, 0, R1, c5, c0, 1 ; Read IFSR
- str R1, [SP, #0x4c] ; Store it in EFI_SYSTEM_CONTEXT_ARM.IFSR
-
- mrc p15, 0, R1, c6, c0, 0 ; Read DFAR
- str R1, [SP, #0x48] ; Store it in EFI_SYSTEM_CONTEXT_ARM.DFAR
-
- mrc p15, 0, R1, c5, c0, 0 ; Read DFSR
- str R1, [SP, #0x44] ; Store it in EFI_SYSTEM_CONTEXT_ARM.DFSR
-
- ldr R1, [SP, #0x5c] ; srsfd saved pre-exception CPSR on the stack
- str R1, [SP, #0x40] ; Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR
-
- add R2, SP, #0x38 ; Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
- and R3, R1, #0x1f ; Check CPSR to see if User or System Mode
- cmp R3, #0x1f ; if ((CPSR == 0x10) || (CPSR == 0x1f))
- cmpne R3, #0x10 ;
- stmeqed R2, {lr}^ ; save unbanked lr
- ; else
- stmneed R2, {lr} ; save SVC lr
-
-
- ldr R5, [SP, #0x58] ; PC is the LR pushed by srsfd
- ; Check to see if we have to adjust for Thumb entry
- sub r4, r0, #1 ; if (ExceptionType == 1 || ExceptionType == 2)) {
- cmp r4, #1 ; // UND & SVC have differnt LR adjust for Thumb
- bhi NoAdjustNeeded
-
- tst r1, #0x20 ; if ((CPSR & T)) == T) { // Thumb Mode on entry
- addne R5, R5, #2 ; PC += 2;
- strne R5,[SP,#0x58] ; Update LR value pushed by srsfd
-
-NoAdjustNeeded
-
- str R5, [SP, #0x3c] ; Store it in EFI_SYSTEM_CONTEXT_ARM.PC
-
- add R1, SP, #0x60 ; We pushed 0x60 bytes on the stack
- str R1, [SP, #0x34] ; Store it in EFI_SYSTEM_CONTEXT_ARM.SP
-
- ; R0 is ExceptionType
- mov R1,SP ; R1 is SystemContext
-
-#if (FixedPcdGet32(PcdVFPEnabled))
- vpush {d0-d15} ; save vstm registers in case they are used in optimizations
-#endif
-
- mov R4, SP ; Save current SP
- tst R4, #4
- subne SP, SP, #4 ; Adjust SP if not 8-byte aligned
-
-/*
-VOID
-EFIAPI
-CommonCExceptionHandler (
- IN EFI_EXCEPTION_TYPE ExceptionType, R0
- IN OUT EFI_SYSTEM_CONTEXT SystemContext R1
- )
-
-*/
- blx CommonCExceptionHandler ; Call exception handler
-
- mov SP, R4 ; Restore SP
-
-#if (FixedPcdGet32(PcdVFPEnabled))
- vpop {d0-d15}
-#endif
-
- ldr R1, [SP, #0x4c] ; Restore EFI_SYSTEM_CONTEXT_ARM.IFSR
- mcr p15, 0, R1, c5, c0, 1 ; Write IFSR
-
- ldr R1, [SP, #0x44] ; Restore EFI_SYSTEM_CONTEXT_ARM.DFSR
- mcr p15, 0, R1, c5, c0, 0 ; Write DFSR
-
- ldr R1,[SP,#0x3c] ; EFI_SYSTEM_CONTEXT_ARM.PC
- str R1,[SP,#0x58] ; Store it back to srsfd stack slot so it can be restored
-
- ldr R1,[SP,#0x40] ; EFI_SYSTEM_CONTEXT_ARM.CPSR
- str R1,[SP,#0x5c] ; Store it back to srsfd stack slot so it can be restored
-
- add R3, SP, #0x54 ; Make R3 point to SVC LR saved on entry
- add R2, SP, #0x38 ; Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
- and R1, R1, #0x1f ; Check to see if User or System Mode
- cmp R1, #0x1f ; if ((CPSR == 0x10) || (CPSR == 0x1f))
- cmpne R1, #0x10 ;
- ldmeqed R2, {lr}^ ; restore unbanked lr
- ; else
- ldmneed R3, {lr} ; restore SVC lr, via ldmfd SP!, {LR}
-
- ldmfd SP!,{R0-R12} ; Restore general purpose registers
- ; Exception handler can not change SP
-
- add SP,SP,#0x20 ; Clear out the remaining stack space
- ldmfd SP!,{LR} ; restore the link register for this context
- rfefd SP! ; return from exception via srsfd stack slot
-
- END
-
-
diff --git a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c deleted file mode 100644 index e8ea1f159d..0000000000 --- a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c +++ /dev/null @@ -1,322 +0,0 @@ -/* @file
-* Main file supporting the SEC Phase for Versatile Express
-*
-* Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-* Copyright (c) 2016 HP Development Company, L.P.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Uefi.h>
-#include <Library/CpuExceptionHandlerLib.h>
-
-#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-#include <Library/CacheMaintenanceLib.h>
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/DefaultExceptionHandlerLib.h>
-
-STATIC
-RETURN_STATUS
-CopyExceptionHandlers(
- IN PHYSICAL_ADDRESS BaseAddress
- );
-
-EFI_STATUS
-EFIAPI
-RegisterExceptionHandler(
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
- );
-
-VOID
-ExceptionHandlersStart(
- VOID
- );
-
-VOID
-ExceptionHandlersEnd(
- VOID
- );
-
-RETURN_STATUS ArchVectorConfig(
- IN UINTN VectorBaseAddress
- );
-
-// these globals are provided by the architecture specific source (Arm or AArch64)
-extern UINTN gMaxExceptionNumber;
-extern EFI_EXCEPTION_CALLBACK gExceptionHandlers[];
-extern EFI_EXCEPTION_CALLBACK gDebuggerExceptionHandlers[];
-extern PHYSICAL_ADDRESS gExceptionVectorAlignmentMask;
-extern UINTN gDebuggerNoHandlerValue;
-
-// A compiler flag adjusts the compilation of this library to a variant where
-// the vectors are relocated (copied) to another location versus using the
-// vectors in-place. Since this effects an assembly .align directive we must
-// address this at library build time. Since this affects the build of the
-// library we cannot represent this in a PCD since PCDs are evaluated on
-// a per-module basis.
-#if defined(ARM_RELOCATE_VECTORS)
-STATIC CONST BOOLEAN gArmRelocateVectorTable = TRUE;
-#else
-STATIC CONST BOOLEAN gArmRelocateVectorTable = FALSE;
-#endif
-
-
-/**
-Initializes all CPU exceptions entries and provides the default exception handlers.
-
-Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
-persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
-If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
-If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-
-@param[in] VectorInfo Pointer to reserved vector list.
-
-@retval EFI_SUCCESS CPU Exception Entries have been successfully initialized
-with default exception handlers.
-@retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-@retval EFI_UNSUPPORTED This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuExceptionHandlers(
- IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
- )
-{
- RETURN_STATUS Status;
- UINTN VectorBase;
-
- Status = EFI_SUCCESS;
-
- // if we are requested to copy exceptin handlers to another location
- if (gArmRelocateVectorTable) {
-
- VectorBase = PcdGet64(PcdCpuVectorBaseAddress);
- Status = CopyExceptionHandlers(VectorBase);
-
- }
- else { // use VBAR to point to where our exception handlers are
-
- // The vector table must be aligned for the architecture. If this
- // assertion fails ensure the appropriate FFS alignment is in effect,
- // which can be accomplished by ensuring the proper Align=X statement
- // in the platform packaging rules. For ARM Align=32 is required and
- // for AArch64 Align=4K is required. Align=Auto can be used but this
- // is known to cause an issue with populating the reset vector area
- // for encapsulated FVs.
- ASSERT(((UINTN)ExceptionHandlersStart & gExceptionVectorAlignmentMask) == 0);
-
- // We do not copy the Exception Table at PcdGet64(PcdCpuVectorBaseAddress). We just set Vector
- // Base Address to point into CpuDxe code.
- VectorBase = (UINTN)ExceptionHandlersStart;
-
- Status = RETURN_SUCCESS;
- }
-
- if (!RETURN_ERROR(Status)) {
- // call the architecture-specific routine to prepare for the new vector
- // configuration to take effect
- ArchVectorConfig(VectorBase);
-
- ArmWriteVBar(VectorBase);
- }
-
- return RETURN_SUCCESS;
-}
-
-/**
-Copies exception handlers to the speciifed address.
-
-Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
-persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
-If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
-If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-
-@param[in] VectorInfo Pointer to reserved vector list.
-
-@retval EFI_SUCCESS CPU Exception Entries have been successfully initialized
-with default exception handlers.
-@retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-@retval EFI_UNSUPPORTED This function is not supported.
-
-**/
-STATIC
-RETURN_STATUS
-CopyExceptionHandlers(
- IN PHYSICAL_ADDRESS BaseAddress
- )
-{
- RETURN_STATUS Status;
- UINTN Length;
- UINTN Index;
- UINT32 *VectorBase;
-
- // ensure that the destination value specifies an address meeting the vector alignment requirements
- ASSERT ((BaseAddress & gExceptionVectorAlignmentMask) == 0);
-
- //
- // Copy an implementation of the exception vectors to PcdCpuVectorBaseAddress.
- //
- Length = (UINTN)ExceptionHandlersEnd - (UINTN)ExceptionHandlersStart;
-
- VectorBase = (UINT32 *)(UINTN)BaseAddress;
-
- if (FeaturePcdGet(PcdDebuggerExceptionSupport) == TRUE) {
- // Save existing vector table, in case debugger is already hooked in
- CopyMem((VOID *)gDebuggerExceptionHandlers, (VOID *)VectorBase, sizeof (EFI_EXCEPTION_CALLBACK)* (gMaxExceptionNumber+1));
- }
-
- // Copy our assembly code into the page that contains the exception vectors.
- CopyMem((VOID *)VectorBase, (VOID *)ExceptionHandlersStart, Length);
-
- //
- // Initialize the C entry points for interrupts
- //
- for (Index = 0; Index <= gMaxExceptionNumber; Index++) {
- if (!FeaturePcdGet(PcdDebuggerExceptionSupport) ||
- (gDebuggerExceptionHandlers[Index] == 0) || (gDebuggerExceptionHandlers[Index] == (VOID *)gDebuggerNoHandlerValue)) {
-
- Status = RegisterExceptionHandler(Index, NULL);
- ASSERT_EFI_ERROR(Status);
- }
- else {
- // If the debugger has already hooked put its vector back
- VectorBase[Index] = (UINT32)(UINTN)gDebuggerExceptionHandlers[Index];
- }
- }
-
- // Flush Caches since we updated executable stuff
- InvalidateInstructionCacheRange((VOID *)(UINTN)BaseAddress, Length);
-
- return RETURN_SUCCESS;
-}
-
-
-/**
-Initializes all CPU interrupt/exceptions entries and provides the default interrupt/exception handlers.
-
-Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
-persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
-If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
-If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-
-@param[in] VectorInfo Pointer to reserved vector list.
-
-@retval EFI_SUCCESS All CPU interrupt/exception entries have been successfully initialized
-with default interrupt/exception handlers.
-@retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-@retval EFI_UNSUPPORTED This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuInterruptHandlers(
-IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
-)
-{
- // not needed, this is what the CPU driver is for
- return EFI_UNSUPPORTED;
-}
-
-/**
-Registers a function to be called from the processor exception handler. (On ARM/AArch64 this only
-provides exception handlers, not interrupt handling which is provided through the Hardware Interrupt
-Protocol.)
-
-This function registers and enables the handler specified by ExceptionHandler for a processor
-interrupt or exception type specified by ExceptionType. If ExceptionHandler is NULL, then the
-handler for the processor interrupt or exception type specified by ExceptionType is uninstalled.
-The installed handler is called once for each processor interrupt or exception.
-NOTE: This function should be invoked after InitializeCpuExceptionHandlers() or
-InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED returned.
-
-@param[in] ExceptionType Defines which interrupt or exception to hook.
-@param[in] ExceptionHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
-when a processor interrupt occurs. If this parameter is NULL, then the handler
-will be uninstalled.
-
-@retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
-@retval EFI_ALREADY_STARTED ExceptionHandler is not NULL, and a handler for ExceptionType was
-previously installed.
-@retval EFI_INVALID_PARAMETER ExceptionHandler is NULL, and a handler for ExceptionType was not
-previously installed.
-@retval EFI_UNSUPPORTED The interrupt specified by ExceptionType is not supported,
-or this function is not supported.
-**/
-RETURN_STATUS
-RegisterCpuInterruptHandler(
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN EFI_CPU_INTERRUPT_HANDLER ExceptionHandler
- ) {
- if (ExceptionType > gMaxExceptionNumber) {
- return RETURN_UNSUPPORTED;
- }
-
- if ((ExceptionHandler != NULL) && (gExceptionHandlers[ExceptionType] != NULL)) {
- return RETURN_ALREADY_STARTED;
- }
-
- gExceptionHandlers[ExceptionType] = ExceptionHandler;
-
- return RETURN_SUCCESS;
-}
-
-/**
-Register exception handler.
-
-@param This A pointer to the SMM_CPU_SERVICE_PROTOCOL instance.
-@param ExceptionType Defines which interrupt or exception to hook. Type EFI_EXCEPTION_TYPE and
-the valid values for this parameter are defined in EFI_DEBUG_SUPPORT_PROTOCOL
-of the UEFI 2.0 specification.
-@param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER
-that is called when a processor interrupt occurs.
-If this parameter is NULL, then the handler will be uninstalled.
-
-@retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
-@retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was previously installed.
-@retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not previously installed.
-@retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-RegisterExceptionHandler(
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
- )
-{
- return RegisterCpuInterruptHandler(ExceptionType, InterruptHandler);
-}
-
-VOID
-EFIAPI
-CommonCExceptionHandler(
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN OUT EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- if (ExceptionType <= gMaxExceptionNumber) {
- if (gExceptionHandlers[ExceptionType]) {
- gExceptionHandlers[ExceptionType](ExceptionType, SystemContext);
- return;
- }
- }
- else {
- DEBUG((EFI_D_ERROR, "Unknown exception type %d\n", ExceptionType));
- ASSERT(FALSE);
- }
-
- DefaultExceptionHandler(ExceptionType, SystemContext);
-}
diff --git a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf deleted file mode 100644 index cd9149cf76..0000000000 --- a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf +++ /dev/null @@ -1,64 +0,0 @@ -## @file
-# Instance of CpuExceptionHandlerLib Library for ARM/AArch64 architectures
-#
-# This library instance is used for modules that will implement exception
-# handlers in-place (by programming VBAR). The exception handlers will be
-# generated with alignment as required by the processor architecture. The
-# alignment must be propagated into the parent FFS/FV through FDF build rules
-# for the relevant module types (i.e. Align=Auto).
-#
-# Note that using this library instance can cause growth to the size of the FV
-# due to the padding added by the build tools to meet the vector alignment
-# requirements and may not be desirable for space-sensitive FVs (uncompressed /
-# XIP components). The alternative library instance, ArmRelocateExceptionLib
-# should be considered for these applications.
-#
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-# Copyright (c) 2016 HP Development Company, L.P.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmExceptionLib
- FILE_GUID = A9796991-4E88-47F0-87C5-D96A1D270539
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = CpuExceptionHandlerLib
-
-[Sources.common]
- ArmExceptionLib.c
-
-[Sources.Arm]
- Arm/ArmException.c
- Arm/ExceptionSupport.asm | RVCT
- Arm/ExceptionSupport.S | GCC
-
-[Sources.AARCH64]
- AArch64/AArch64Exception.c
- AArch64/ExceptionSupport.S
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- ArmLib
- BaseMemoryLib
- CacheMaintenanceLib
- DebugLib
- DefaultExceptionHandlerLib
- MemoryAllocationLib
-
-[Pcd]
- gArmTokenSpaceGuid.PcdDebuggerExceptionSupport
- gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
diff --git a/ArmPkg/Library/ArmExceptionLib/ArmRelocateExceptionLib.inf b/ArmPkg/Library/ArmExceptionLib/ArmRelocateExceptionLib.inf deleted file mode 100644 index 340812be25..0000000000 --- a/ArmPkg/Library/ArmExceptionLib/ArmRelocateExceptionLib.inf +++ /dev/null @@ -1,65 +0,0 @@ -## @file
-# Instance of CpuExceptionHandlerLib Library for ARM/AArch64 architectures
-#
-# This library instance is used when exception vectors must be relocated to
-# a specific address. The address is specified by PcdCpuVectorBaseAddress.
-# Since the alignment requirement for in-place exception handlers causes
-# image size to increase, this instance is useful for modules that need to
-# minimize space used in their FV (like XIP modules). See ArmExceptionLib.inf
-# for the in-place exception handler alternative.
-#
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-# Copyright (c) 2016 HP Development Company, L.P.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmRelocateExceptionLib
- FILE_GUID = 62AA447A-1FBA-429E-9E0D-CE0D2D8DCF58
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = CpuExceptionHandlerLib
-
-[Sources.common]
- ArmExceptionLib.c
-
-[Sources.Arm]
- Arm/ArmException.c
- Arm/ExceptionSupport.asm | RVCT
- Arm/ExceptionSupport.S | GCC
-
-[Sources.AARCH64]
- AArch64/AArch64Exception.c
- AArch64/ExceptionSupport.S
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- ArmLib
- DebugLib
- DefaultExceptionHandlerLib
- BaseMemoryLib
- CacheMaintenanceLib
-
-[Pcd]
- gArmTokenSpaceGuid.PcdDebuggerExceptionSupport
- gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
-
-[BuildOptions]
- # We must pass a define to specify that we are relocating vectors so the
- # vector alignment is relaxed (space savings); note that this must be done
- # as a define and not a PCD since it affects assembly directives.
- *_*_*_PP_FLAGS = -DARM_RELOCATE_VECTORS
- *_*_*_CC_FLAGS = -DARM_RELOCATE_VECTORS
diff --git a/ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.c b/ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.c deleted file mode 100644 index d04e04fb33..0000000000 --- a/ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.c +++ /dev/null @@ -1,125 +0,0 @@ -/** @file
-
- Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
- Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Library/ArmGenericTimerCounterLib.h>
-#include <Library/ArmLib.h>
-
-VOID
-EFIAPI
-ArmGenericTimerEnableTimer (
- VOID
- )
-{
- UINTN TimerCtrlReg;
-
- TimerCtrlReg = ArmReadCntpCtl ();
- TimerCtrlReg |= ARM_ARCH_TIMER_ENABLE;
- ArmWriteCntpCtl (TimerCtrlReg);
-}
-
-VOID
-EFIAPI
-ArmGenericTimerDisableTimer (
- VOID
- )
-{
- UINTN TimerCtrlReg;
-
- TimerCtrlReg = ArmReadCntpCtl ();
- TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;
- ArmWriteCntpCtl (TimerCtrlReg);
-}
-
-VOID
-EFIAPI
-ArmGenericTimerSetTimerFreq (
- IN UINTN FreqInHz
- )
-{
- ArmWriteCntFrq (FreqInHz);
-}
-
-UINTN
-EFIAPI
-ArmGenericTimerGetTimerFreq (
- VOID
- )
-{
- return ArmReadCntFrq ();
-}
-
-UINTN
-EFIAPI
-ArmGenericTimerGetTimerVal (
- VOID
- )
-{
- return ArmReadCntpTval ();
-}
-
-
-VOID
-EFIAPI
-ArmGenericTimerSetTimerVal (
- IN UINTN Value
- )
-{
- ArmWriteCntpTval (Value);
-}
-
-UINT64
-EFIAPI
-ArmGenericTimerGetSystemCount (
- VOID
- )
-{
- return ArmReadCntPct ();
-}
-
-UINTN
-EFIAPI
-ArmGenericTimerGetTimerCtrlReg (
- VOID
- )
-{
- return ArmReadCntpCtl ();
-}
-
-VOID
-EFIAPI
-ArmGenericTimerSetTimerCtrlReg (
- UINTN Value
- )
-{
- ArmWriteCntpCtl (Value);
-}
-
-UINT64
-EFIAPI
-ArmGenericTimerGetCompareVal (
- VOID
- )
-{
- return ArmReadCntpCval ();
-}
-
-VOID
-EFIAPI
-ArmGenericTimerSetCompareVal (
- IN UINT64 Value
- )
-{
- ArmWriteCntpCval (Value);
-}
diff --git a/ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf b/ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf deleted file mode 100644 index 5420608536..0000000000 --- a/ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf +++ /dev/null @@ -1,33 +0,0 @@ -#/** @file
-# Implement ArmGenericTimerCounterLib using the physical timer
-#
-# Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmGenericTimerPhyCounterLib
- FILE_GUID = 7A07E61D-9967-407F-AE85-2EB0B50BEF2C
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmGenericTimerCounterLib
-
-[Sources]
- ArmGenericTimerPhyCounterLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- ArmLib
- BaseLib
diff --git a/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c b/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c deleted file mode 100644 index 69a4ceb62d..0000000000 --- a/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c +++ /dev/null @@ -1,135 +0,0 @@ -/** @file
-
- Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
- Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Library/ArmGenericTimerCounterLib.h>
-#include <Library/ArmLib.h>
-
-VOID
-EFIAPI
-ArmGenericTimerEnableTimer (
- VOID
- )
-{
- UINTN TimerCtrlReg;
-
- TimerCtrlReg = ArmReadCntvCtl ();
- TimerCtrlReg |= ARM_ARCH_TIMER_ENABLE;
-
- //
- // When running under KVM, we need to unmask the interrupt on the timer side
- // as KVM will mask it when servicing the interrupt at the hypervisor level
- // and delivering the virtual timer interrupt to the guest. Otherwise, the
- // interrupt will fire again, trapping into the hypervisor again, etc. etc.
- // This is scheduled to be fixed on the KVM side, but there is no harm in
- // leaving this in once KVM gets fixed.
- //
- TimerCtrlReg &= ~ARM_ARCH_TIMER_IMASK;
- ArmWriteCntvCtl (TimerCtrlReg);
-}
-
-VOID
-EFIAPI
-ArmGenericTimerDisableTimer (
- VOID
- )
-{
- UINTN TimerCtrlReg;
-
- TimerCtrlReg = ArmReadCntvCtl ();
- TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;
- ArmWriteCntvCtl (TimerCtrlReg);
-}
-
-VOID
-EFIAPI
-ArmGenericTimerSetTimerFreq (
- IN UINTN FreqInHz
- )
-{
- ArmWriteCntFrq (FreqInHz);
-}
-
-UINTN
-EFIAPI
-ArmGenericTimerGetTimerFreq (
- VOID
- )
-{
- return ArmReadCntFrq ();
-}
-
-UINTN
-EFIAPI
-ArmGenericTimerGetTimerVal (
- VOID
- )
-{
- return ArmReadCntvTval ();
-}
-
-
-VOID
-EFIAPI
-ArmGenericTimerSetTimerVal (
- IN UINTN Value
- )
-{
- ArmWriteCntvTval (Value);
-}
-
-UINT64
-EFIAPI
-ArmGenericTimerGetSystemCount (
- VOID
- )
-{
- return ArmReadCntvCt ();
-}
-
-UINTN
-EFIAPI
-ArmGenericTimerGetTimerCtrlReg (
- VOID
- )
-{
- return ArmReadCntvCtl ();
-}
-
-VOID
-EFIAPI
-ArmGenericTimerSetTimerCtrlReg (
- UINTN Value
- )
-{
- ArmWriteCntvCtl (Value);
-}
-
-UINT64
-EFIAPI
-ArmGenericTimerGetCompareVal (
- VOID
- )
-{
- return ArmReadCntvCval ();
-}
-
-VOID
-EFIAPI
-ArmGenericTimerSetCompareVal (
- IN UINT64 Value
- )
-{
- ArmWriteCntvCval (Value);
-}
diff --git a/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.inf b/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.inf deleted file mode 100644 index 9267dc3434..0000000000 --- a/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.inf +++ /dev/null @@ -1,33 +0,0 @@ -#/** @file
-# Implement ArmGenericTimerCounterLib using the virtual timer
-#
-# Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmGenericTimerVirtCounterLib
- FILE_GUID = 3C0D77CC-4F27-49C8-B25C-2D01D81ED4D8
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmGenericTimerCounterLib
-
-[Sources]
- ArmGenericTimerVirtCounterLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- ArmLib
- BaseLib
diff --git a/ArmPkg/Library/ArmGicArchLib/AArch64/ArmGicArchLib.c b/ArmPkg/Library/ArmGicArchLib/AArch64/ArmGicArchLib.c deleted file mode 100644 index 9853c7ba85..0000000000 --- a/ArmPkg/Library/ArmGicArchLib/AArch64/ArmGicArchLib.c +++ /dev/null @@ -1,66 +0,0 @@ -/** @file
-*
-* Copyright (c) 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials are licensed and made available
-* under the terms and conditions of the BSD License which accompanies this
-* distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmLib.h>
-#include <Library/ArmGicLib.h>
-
-STATIC ARM_GIC_ARCH_REVISION mGicArchRevision;
-
-RETURN_STATUS
-EFIAPI
-ArmGicArchLibInitialize (
- VOID
- )
-{
- UINT32 IccSre;
-
- // Ideally we would like to use the GICC IIDR Architecture version here, but
- // this does not seem to be very reliable as the implementation could easily
- // get it wrong. It is more reliable to check if the GICv3 System Register
- // feature is implemented on the CPU. This is also convenient as our GICv3
- // driver requires SRE. If only Memory mapped access is available we try to
- // drive the GIC as a v2.
- if (ArmReadIdPfr0 () & AARCH64_PFR0_GIC) {
- // Make sure System Register access is enabled (SRE). This depends on the
- // higher privilege level giving us permission, otherwise we will either
- // cause an exception here, or the write doesn't stick in which case we need
- // to fall back to the GICv2 MMIO interface.
- // Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started
- // at the same exception level.
- // It is the OS responsibility to set this bit.
- IccSre = ArmGicV3GetControlSystemRegisterEnable ();
- if (!(IccSre & ICC_SRE_EL2_SRE)) {
- ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE);
- IccSre = ArmGicV3GetControlSystemRegisterEnable ();
- }
- if (IccSre & ICC_SRE_EL2_SRE) {
- mGicArchRevision = ARM_GIC_ARCH_REVISION_3;
- goto Done;
- }
- }
-
- mGicArchRevision = ARM_GIC_ARCH_REVISION_2;
-
-Done:
- return RETURN_SUCCESS;
-}
-
-ARM_GIC_ARCH_REVISION
-EFIAPI
-ArmGicGetSupportedArchRevision (
- VOID
- )
-{
- return mGicArchRevision;
-}
diff --git a/ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c b/ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c deleted file mode 100644 index f8822a2245..0000000000 --- a/ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c +++ /dev/null @@ -1,66 +0,0 @@ -/** @file
-*
-* Copyright (c) 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials are licensed and made available
-* under the terms and conditions of the BSD License which accompanies this
-* distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmLib.h>
-#include <Library/ArmGicLib.h>
-
-STATIC ARM_GIC_ARCH_REVISION mGicArchRevision;
-
-RETURN_STATUS
-EFIAPI
-ArmGicArchLibInitialize (
- VOID
- )
-{
- UINT32 IccSre;
-
- // Ideally we would like to use the GICC IIDR Architecture version here, but
- // this does not seem to be very reliable as the implementation could easily
- // get it wrong. It is more reliable to check if the GICv3 System Register
- // feature is implemented on the CPU. This is also convenient as our GICv3
- // driver requires SRE. If only Memory mapped access is available we try to
- // drive the GIC as a v2.
- if (ArmReadIdPfr1 () & ARM_PFR1_GIC) {
- // Make sure System Register access is enabled (SRE). This depends on the
- // higher privilege level giving us permission, otherwise we will either
- // cause an exception here, or the write doesn't stick in which case we need
- // to fall back to the GICv2 MMIO interface.
- // Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started
- // at the same exception level.
- // It is the OS responsibility to set this bit.
- IccSre = ArmGicV3GetControlSystemRegisterEnable ();
- if (!(IccSre & ICC_SRE_EL2_SRE)) {
- ArmGicV3SetControlSystemRegisterEnable (IccSre| ICC_SRE_EL2_SRE);
- IccSre = ArmGicV3GetControlSystemRegisterEnable ();
- }
- if (IccSre & ICC_SRE_EL2_SRE) {
- mGicArchRevision = ARM_GIC_ARCH_REVISION_3;
- goto Done;
- }
- }
-
- mGicArchRevision = ARM_GIC_ARCH_REVISION_2;
-
-Done:
- return RETURN_SUCCESS;
-}
-
-ARM_GIC_ARCH_REVISION
-EFIAPI
-ArmGicGetSupportedArchRevision (
- VOID
- )
-{
- return mGicArchRevision;
-}
diff --git a/ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf b/ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf deleted file mode 100644 index 7dbcb08f50..0000000000 --- a/ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf +++ /dev/null @@ -1,34 +0,0 @@ -#/* @file
-# Copyright (c) 2015, Linaro Ltd. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmGicArchLib
- FILE_GUID = cd67f41a-26e9-4482-90c9-a9aff803382a
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmGicArchLib|DXE_DRIVER UEFI_DRIVER UEFI_APPLICATION
- CONSTRUCTOR = ArmGicArchLibInitialize
-
-[Sources.ARM]
- Arm/ArmGicArchLib.c
-
-[Sources.AARCH64]
- AArch64/ArmGicArchLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- ArmGicLib
diff --git a/ArmPkg/Library/ArmGicArchSecLib/AArch64/ArmGicArchLib.c b/ArmPkg/Library/ArmGicArchSecLib/AArch64/ArmGicArchLib.c deleted file mode 100644 index 0e0fa3b9f3..0000000000 --- a/ArmPkg/Library/ArmGicArchSecLib/AArch64/ArmGicArchLib.c +++ /dev/null @@ -1,51 +0,0 @@ -/** @file
-*
-* Copyright (c) 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials are licensed and made available
-* under the terms and conditions of the BSD License which accompanies this
-* distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmLib.h>
-#include <Library/ArmGicLib.h>
-
-ARM_GIC_ARCH_REVISION
-EFIAPI
-ArmGicGetSupportedArchRevision (
- VOID
- )
-{
- UINT32 IccSre;
-
- // Ideally we would like to use the GICC IIDR Architecture version here, but
- // this does not seem to be very reliable as the implementation could easily
- // get it wrong. It is more reliable to check if the GICv3 System Register
- // feature is implemented on the CPU. This is also convenient as our GICv3
- // driver requires SRE. If only Memory mapped access is available we try to
- // drive the GIC as a v2.
- if (ArmReadIdPfr0 () & AARCH64_PFR0_GIC) {
- // Make sure System Register access is enabled (SRE). This depends on the
- // higher privilege level giving us permission, otherwise we will either
- // cause an exception here, or the write doesn't stick in which case we need
- // to fall back to the GICv2 MMIO interface.
- // Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started
- // at the same exception level.
- // It is the OS responsibility to set this bit.
- IccSre = ArmGicV3GetControlSystemRegisterEnable ();
- if (!(IccSre & ICC_SRE_EL2_SRE)) {
- ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE);
- IccSre = ArmGicV3GetControlSystemRegisterEnable ();
- }
- if (IccSre & ICC_SRE_EL2_SRE) {
- return ARM_GIC_ARCH_REVISION_3;
- }
- }
-
- return ARM_GIC_ARCH_REVISION_2;
-}
diff --git a/ArmPkg/Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c b/ArmPkg/Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c deleted file mode 100644 index f256de7046..0000000000 --- a/ArmPkg/Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c +++ /dev/null @@ -1,51 +0,0 @@ -/** @file
-*
-* Copyright (c) 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials are licensed and made available
-* under the terms and conditions of the BSD License which accompanies this
-* distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmLib.h>
-#include <Library/ArmGicLib.h>
-
-ARM_GIC_ARCH_REVISION
-EFIAPI
-ArmGicGetSupportedArchRevision (
- VOID
- )
-{
- UINT32 IccSre;
-
- // Ideally we would like to use the GICC IIDR Architecture version here, but
- // this does not seem to be very reliable as the implementation could easily
- // get it wrong. It is more reliable to check if the GICv3 System Register
- // feature is implemented on the CPU. This is also convenient as our GICv3
- // driver requires SRE. If only Memory mapped access is available we try to
- // drive the GIC as a v2.
- if (ArmReadIdPfr1 () & ARM_PFR1_GIC) {
- // Make sure System Register access is enabled (SRE). This depends on the
- // higher privilege level giving us permission, otherwise we will either
- // cause an exception here, or the write doesn't stick in which case we need
- // to fall back to the GICv2 MMIO interface.
- // Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started
- // at the same exception level.
- // It is the OS responsibility to set this bit.
- IccSre = ArmGicV3GetControlSystemRegisterEnable ();
- if (!(IccSre & ICC_SRE_EL2_SRE)) {
- ArmGicV3SetControlSystemRegisterEnable (IccSre| ICC_SRE_EL2_SRE);
- IccSre = ArmGicV3GetControlSystemRegisterEnable ();
- }
- if (IccSre & ICC_SRE_EL2_SRE) {
- return ARM_GIC_ARCH_REVISION_3;
- }
- }
-
- return ARM_GIC_ARCH_REVISION_2;
-}
diff --git a/ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf b/ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf deleted file mode 100644 index a2fb623a85..0000000000 --- a/ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf +++ /dev/null @@ -1,33 +0,0 @@ -#/* @file
-# Copyright (c) 2015, Linaro Ltd. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmGicArchSecLib
- FILE_GUID = c1dd9745-9459-4e9a-9f5b-99cbd233c27d
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmGicArchLib|SEC
-
-[Sources.ARM]
- Arm/ArmGicArchLib.c
-
-[Sources.AARCH64]
- AArch64/ArmGicArchLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- ArmGicLib
diff --git a/ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S b/ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S deleted file mode 100644 index e9140a0a9b..0000000000 --- a/ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S +++ /dev/null @@ -1,39 +0,0 @@ -//
-// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-// Copyright (c) 2014-2016, Linaro Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLibV8.h>
-
-ASM_FUNC(ArmCallHvc)
- // Push x0 on the stack - The stack must always be quad-word aligned
- str x0, [sp, #-16]!
-
- // Load the HVC arguments values into the appropriate registers
- ldp x6, x7, [x0, #48]
- ldp x4, x5, [x0, #32]
- ldp x2, x3, [x0, #16]
- ldp x0, x1, [x0, #0]
-
- hvc #0
-
- // Pop the ARM_HVC_ARGS structure address from the stack into x9
- ldr x9, [sp], #16
-
- // Store the HVC returned values into the ARM_HVC_ARGS structure.
- // A HVC call can return up to 4 values
- stp x2, x3, [x9, #16]
- stp x0, x1, [x9, #0]
-
- mov x0, x9
-
- ret
diff --git a/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S b/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S deleted file mode 100644 index be4693796f..0000000000 --- a/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S +++ /dev/null @@ -1,51 +0,0 @@ -//
-// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-// Copyright (c) 2014-2016, Linaro Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLibV8.h>
-
-.arch_extension virt
-
-ASM_FUNC(ArmCallHvc)
- push {r4-r8}
- // r0 will be popped just after the HVC call
- push {r0}
-
- // Load the HVC arguments values into the appropriate registers
- ldr r7, [r0, #28]
- ldr r6, [r0, #24]
- ldr r5, [r0, #20]
- ldr r4, [r0, #16]
- ldr r3, [r0, #12]
- ldr r2, [r0, #8]
- ldr r1, [r0, #4]
- ldr r0, [r0, #0]
-
- hvc #0
-
- // Pop the ARM_HVC_ARGS structure address from the stack into r8
- pop {r8}
-
- // Load the HVC returned values into the appropriate registers
- // A HVC call can return up to 4 values - we do not need to store back r4-r7.
- str r3, [r8, #12]
- str r2, [r8, #8]
- str r1, [r8, #4]
- str r0, [r8, #0]
-
- mov r0, r8
-
- // Restore the registers r4-r8
- pop {r4-r8}
-
- bx lr
diff --git a/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.asm b/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.asm deleted file mode 100644 index fe4b174c75..0000000000 --- a/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.asm +++ /dev/null @@ -1,52 +0,0 @@ -//
-// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-// Copyright (c) 2014, Linaro Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-
- INCLUDE AsmMacroExport.inc
-
- RVCT_ASM_EXPORT ArmCallHvc
- push {r4-r8}
- // r0 will be popped just after the HVC call
- push {r0}
-
- // Load the HVC arguments values into the appropriate registers
- ldr r7, [r0, #28]
- ldr r6, [r0, #24]
- ldr r5, [r0, #20]
- ldr r4, [r0, #16]
- ldr r3, [r0, #12]
- ldr r2, [r0, #8]
- ldr r1, [r0, #4]
- ldr r0, [r0, #0]
-
- hvc #0
-
- // Pop the ARM_HVC_ARGS structure address from the stack into r8
- pop {r8}
-
- // Load the HVC returned values into the appropriate registers
- // A HVC call can return up to 4 values - we do not need to store back r4-r7.
- str r3, [r8, #12]
- str r2, [r8, #8]
- str r1, [r8, #4]
- str r0, [r8, #0]
-
- mov r0, r8
-
- // Restore the registers r4-r8
- pop {r4-r8}
-
- bx lr
-
- END
diff --git a/ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf b/ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf deleted file mode 100644 index 92efac5741..0000000000 --- a/ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf +++ /dev/null @@ -1,32 +0,0 @@ -#/** @file
-#
-# Copyright (c) 2012-2013, ARM Ltd. All rights reserved.<BR>
-# Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmHvcLib
- FILE_GUID = E594959A-D150-44D3-963B-BA90329D3D9A
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmHvcLib
-
-[Sources.ARM]
- Arm/ArmHvc.asm | RVCT
- Arm/ArmHvc.S | GCC
-
-[Sources.AARCH64]
- AArch64/ArmHvc.S
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S b/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S deleted file mode 100644 index 59e0bc9a07..0000000000 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S +++ /dev/null @@ -1,119 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
-# Copyright (c) 2016, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLibV8.h>
-
-ASM_FUNC(ArmReadCntFrq)
- mrs x0, cntfrq_el0 // Read CNTFRQ
- ret
-
-
-# NOTE - Can only write while at highest implemented EL level (EL3 on model). Else ReadOnly (EL2, EL1, EL0)
-ASM_FUNC(ArmWriteCntFrq)
- msr cntfrq_el0, x0 // Write to CNTFRQ
- ret
-
-
-ASM_FUNC(ArmReadCntPct)
- mrs x0, cntpct_el0 // Read CNTPCT (Physical counter register)
- ret
-
-
-ASM_FUNC(ArmReadCntkCtl)
- mrs x0, cntkctl_el1 // Read CNTK_CTL (Timer PL1 Control Register)
- ret
-
-
-ASM_FUNC(ArmWriteCntkCtl)
- msr cntkctl_el1, x0 // Write to CNTK_CTL (Timer PL1 Control Register)
- ret
-
-
-ASM_FUNC(ArmReadCntpTval)
- mrs x0, cntp_tval_el0 // Read CNTP_TVAL (PL1 physical timer value register)
- ret
-
-
-ASM_FUNC(ArmWriteCntpTval)
- msr cntp_tval_el0, x0 // Write to CNTP_TVAL (PL1 physical timer value register)
- ret
-
-
-ASM_FUNC(ArmReadCntpCtl)
- mrs x0, cntp_ctl_el0 // Read CNTP_CTL (PL1 Physical Timer Control Register)
- ret
-
-
-ASM_FUNC(ArmWriteCntpCtl)
- msr cntp_ctl_el0, x0 // Write to CNTP_CTL (PL1 Physical Timer Control Register)
- ret
-
-
-ASM_FUNC(ArmReadCntvTval)
- mrs x0, cntv_tval_el0 // Read CNTV_TVAL (Virtual Timer Value register)
- ret
-
-
-ASM_FUNC(ArmWriteCntvTval)
- msr cntv_tval_el0, x0 // Write to CNTV_TVAL (Virtual Timer Value register)
- ret
-
-
-ASM_FUNC(ArmReadCntvCtl)
- mrs x0, cntv_ctl_el0 // Read CNTV_CTL (Virtual Timer Control Register)
- ret
-
-
-ASM_FUNC(ArmWriteCntvCtl)
- msr cntv_ctl_el0, x0 // Write to CNTV_CTL (Virtual Timer Control Register)
- ret
-
-
-ASM_FUNC(ArmReadCntvCt)
- mrs x0, cntvct_el0 // Read CNTVCT (Virtual Count Register)
- ret
-
-
-ASM_FUNC(ArmReadCntpCval)
- mrs x0, cntp_cval_el0 // Read CNTP_CTVAL (Physical Timer Compare Value Register)
- ret
-
-
-ASM_FUNC(ArmWriteCntpCval)
- msr cntp_cval_el0, x0 // Write to CNTP_CTVAL (Physical Timer Compare Value Register)
- ret
-
-
-ASM_FUNC(ArmReadCntvCval)
- mrs x0, cntv_cval_el0 // Read CNTV_CTVAL (Virtual Timer Compare Value Register)
- ret
-
-
-ASM_FUNC(ArmWriteCntvCval)
- msr cntv_cval_el0, x0 // write to CNTV_CTVAL (Virtual Timer Compare Value Register)
- ret
-
-
-ASM_FUNC(ArmReadCntvOff)
- mrs x0, cntvoff_el2 // Read CNTVOFF (virtual Offset register)
- ret
-
-
-ASM_FUNC(ArmWriteCntvOff)
- msr cntvoff_el2, x0 // Write to CNTVOFF (Virtual Offset register)
- ret
-
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c deleted file mode 100644 index ec35097b40..0000000000 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c +++ /dev/null @@ -1,71 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Uefi.h>
-#include <Chipset/AArch64.h>
-#include <Library/ArmLib.h>
-#include <Library/BaseLib.h>
-#include <Library/IoLib.h>
-#include "AArch64Lib.h"
-#include "ArmLibPrivate.h"
-
-VOID
-AArch64DataCacheOperation (
- IN AARCH64_CACHE_OPERATION DataCacheOperation
- )
-{
- UINTN SavedInterruptState;
-
- SavedInterruptState = ArmGetInterruptState ();
- ArmDisableInterrupts();
-
- AArch64AllDataCachesOperation (DataCacheOperation);
-
- ArmDataSynchronizationBarrier ();
-
- if (SavedInterruptState) {
- ArmEnableInterrupts ();
- }
-}
-
-VOID
-EFIAPI
-ArmInvalidateDataCache (
- VOID
- )
-{
- ArmDataSynchronizationBarrier ();
- AArch64DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);
-}
-
-VOID
-EFIAPI
-ArmCleanInvalidateDataCache (
- VOID
- )
-{
- ArmDataSynchronizationBarrier ();
- AArch64DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);
-}
-
-VOID
-EFIAPI
-ArmCleanDataCache (
- VOID
- )
-{
- ArmDataSynchronizationBarrier ();
- AArch64DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
-}
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h deleted file mode 100644 index 7b9b9c3715..0000000000 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h +++ /dev/null @@ -1,27 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __AARCH64_LIB_H__
-#define __AARCH64_LIB_H__
-
-typedef VOID (*AARCH64_CACHE_OPERATION)(UINTN);
-
-VOID
-AArch64AllDataCachesOperation (
- IN AARCH64_CACHE_OPERATION DataCacheOperation
- );
-
-#endif // __AARCH64_LIB_H__
-
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S deleted file mode 100644 index 6e8074a486..0000000000 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S +++ /dev/null @@ -1,483 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
-# Copyright (c) 2016, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <Chipset/AArch64.h>
-#include <AsmMacroIoLibV8.h>
-
-.set CTRL_M_BIT, (1 << 0)
-.set CTRL_A_BIT, (1 << 1)
-.set CTRL_C_BIT, (1 << 2)
-.set CTRL_SA_BIT, (1 << 3)
-.set CTRL_I_BIT, (1 << 12)
-.set CTRL_V_BIT, (1 << 12)
-.set CPACR_VFP_BITS, (3 << 20)
-
-ASM_FUNC(ArmInvalidateDataCacheEntryByMVA)
- dc ivac, x0 // Invalidate single data cache line
- ret
-
-
-ASM_FUNC(ArmCleanDataCacheEntryByMVA)
- dc cvac, x0 // Clean single data cache line
- ret
-
-
-ASM_FUNC(ArmCleanDataCacheEntryToPoUByMVA)
- dc cvau, x0 // Clean single data cache line to PoU
- ret
-
-ASM_FUNC(ArmInvalidateInstructionCacheEntryToPoUByMVA)
- ic ivau, x0 // Invalidate single instruction cache line to PoU
- ret
-
-
-ASM_FUNC(ArmCleanInvalidateDataCacheEntryByMVA)
- dc civac, x0 // Clean and invalidate single data cache line
- ret
-
-
-ASM_FUNC(ArmInvalidateDataCacheEntryBySetWay)
- dc isw, x0 // Invalidate this line
- ret
-
-
-ASM_FUNC(ArmCleanInvalidateDataCacheEntryBySetWay)
- dc cisw, x0 // Clean and Invalidate this line
- ret
-
-
-ASM_FUNC(ArmCleanDataCacheEntryBySetWay)
- dc csw, x0 // Clean this line
- ret
-
-
-ASM_FUNC(ArmInvalidateInstructionCache)
- ic iallu // Invalidate entire instruction cache
- dsb sy
- isb
- ret
-
-
-ASM_FUNC(ArmEnableMmu)
- EL1_OR_EL2_OR_EL3(x1)
-1: mrs x0, sctlr_el1 // Read System control register EL1
- b 4f
-2: mrs x0, sctlr_el2 // Read System control register EL2
- b 4f
-3: mrs x0, sctlr_el3 // Read System control register EL3
-4: orr x0, x0, #CTRL_M_BIT // Set MMU enable bit
- EL1_OR_EL2_OR_EL3(x1)
-1: tlbi vmalle1
- dsb nsh
- isb
- msr sctlr_el1, x0 // Write back
- b 4f
-2: tlbi alle2
- dsb nsh
- isb
- msr sctlr_el2, x0 // Write back
- b 4f
-3: tlbi alle3
- dsb nsh
- isb
- msr sctlr_el3, x0 // Write back
-4: isb
- ret
-
-
-ASM_FUNC(ArmDisableMmu)
- EL1_OR_EL2_OR_EL3(x1)
-1: mrs x0, sctlr_el1 // Read System Control Register EL1
- b 4f
-2: mrs x0, sctlr_el2 // Read System Control Register EL2
- b 4f
-3: mrs x0, sctlr_el3 // Read System Control Register EL3
-4: and x0, x0, #~CTRL_M_BIT // Clear MMU enable bit
- EL1_OR_EL2_OR_EL3(x1)
-1: msr sctlr_el1, x0 // Write back
- tlbi vmalle1
- b 4f
-2: msr sctlr_el2, x0 // Write back
- tlbi alle2
- b 4f
-3: msr sctlr_el3, x0 // Write back
- tlbi alle3
-4: dsb sy
- isb
- ret
-
-
-ASM_FUNC(ArmDisableCachesAndMmu)
- EL1_OR_EL2_OR_EL3(x1)
-1: mrs x0, sctlr_el1 // Get control register EL1
- b 4f
-2: mrs x0, sctlr_el2 // Get control register EL2
- b 4f
-3: mrs x0, sctlr_el3 // Get control register EL3
-4: mov x1, #~(CTRL_M_BIT | CTRL_C_BIT | CTRL_I_BIT) // Disable MMU, D & I caches
- and x0, x0, x1
- EL1_OR_EL2_OR_EL3(x1)
-1: msr sctlr_el1, x0 // Write back control register
- b 4f
-2: msr sctlr_el2, x0 // Write back control register
- b 4f
-3: msr sctlr_el3, x0 // Write back control register
-4: dsb sy
- isb
- ret
-
-
-ASM_FUNC(ArmMmuEnabled)
- EL1_OR_EL2_OR_EL3(x1)
-1: mrs x0, sctlr_el1 // Get control register EL1
- b 4f
-2: mrs x0, sctlr_el2 // Get control register EL2
- b 4f
-3: mrs x0, sctlr_el3 // Get control register EL3
-4: and x0, x0, #CTRL_M_BIT
- ret
-
-
-ASM_FUNC(ArmEnableDataCache)
- EL1_OR_EL2_OR_EL3(x1)
-1: mrs x0, sctlr_el1 // Get control register EL1
- b 4f
-2: mrs x0, sctlr_el2 // Get control register EL2
- b 4f
-3: mrs x0, sctlr_el3 // Get control register EL3
-4: orr x0, x0, #CTRL_C_BIT // Set C bit
- EL1_OR_EL2_OR_EL3(x1)
-1: msr sctlr_el1, x0 // Write back control register
- b 4f
-2: msr sctlr_el2, x0 // Write back control register
- b 4f
-3: msr sctlr_el3, x0 // Write back control register
-4: dsb sy
- isb
- ret
-
-
-ASM_FUNC(ArmDisableDataCache)
- EL1_OR_EL2_OR_EL3(x1)
-1: mrs x0, sctlr_el1 // Get control register EL1
- b 4f
-2: mrs x0, sctlr_el2 // Get control register EL2
- b 4f
-3: mrs x0, sctlr_el3 // Get control register EL3
-4: and x0, x0, #~CTRL_C_BIT // Clear C bit
- EL1_OR_EL2_OR_EL3(x1)
-1: msr sctlr_el1, x0 // Write back control register
- b 4f
-2: msr sctlr_el2, x0 // Write back control register
- b 4f
-3: msr sctlr_el3, x0 // Write back control register
-4: dsb sy
- isb
- ret
-
-
-ASM_FUNC(ArmEnableInstructionCache)
- EL1_OR_EL2_OR_EL3(x1)
-1: mrs x0, sctlr_el1 // Get control register EL1
- b 4f
-2: mrs x0, sctlr_el2 // Get control register EL2
- b 4f
-3: mrs x0, sctlr_el3 // Get control register EL3
-4: orr x0, x0, #CTRL_I_BIT // Set I bit
- EL1_OR_EL2_OR_EL3(x1)
-1: msr sctlr_el1, x0 // Write back control register
- b 4f
-2: msr sctlr_el2, x0 // Write back control register
- b 4f
-3: msr sctlr_el3, x0 // Write back control register
-4: dsb sy
- isb
- ret
-
-
-ASM_FUNC(ArmDisableInstructionCache)
- EL1_OR_EL2_OR_EL3(x1)
-1: mrs x0, sctlr_el1 // Get control register EL1
- b 4f
-2: mrs x0, sctlr_el2 // Get control register EL2
- b 4f
-3: mrs x0, sctlr_el3 // Get control register EL3
-4: and x0, x0, #~CTRL_I_BIT // Clear I bit
- EL1_OR_EL2_OR_EL3(x1)
-1: msr sctlr_el1, x0 // Write back control register
- b 4f
-2: msr sctlr_el2, x0 // Write back control register
- b 4f
-3: msr sctlr_el3, x0 // Write back control register
-4: dsb sy
- isb
- ret
-
-
-ASM_FUNC(ArmEnableAlignmentCheck)
- EL1_OR_EL2(x1)
-1: mrs x0, sctlr_el1 // Get control register EL1
- b 3f
-2: mrs x0, sctlr_el2 // Get control register EL2
-3: orr x0, x0, #CTRL_A_BIT // Set A (alignment check) bit
- EL1_OR_EL2(x1)
-1: msr sctlr_el1, x0 // Write back control register
- b 3f
-2: msr sctlr_el2, x0 // Write back control register
-3: dsb sy
- isb
- ret
-
-
-ASM_FUNC(ArmDisableAlignmentCheck)
- EL1_OR_EL2_OR_EL3(x1)
-1: mrs x0, sctlr_el1 // Get control register EL1
- b 4f
-2: mrs x0, sctlr_el2 // Get control register EL2
- b 4f
-3: mrs x0, sctlr_el3 // Get control register EL3
-4: and x0, x0, #~CTRL_A_BIT // Clear A (alignment check) bit
- EL1_OR_EL2_OR_EL3(x1)
-1: msr sctlr_el1, x0 // Write back control register
- b 4f
-2: msr sctlr_el2, x0 // Write back control register
- b 4f
-3: msr sctlr_el3, x0 // Write back control register
-4: dsb sy
- isb
- ret
-
-ASM_FUNC(ArmEnableStackAlignmentCheck)
- EL1_OR_EL2(x1)
-1: mrs x0, sctlr_el1 // Get control register EL1
- b 3f
-2: mrs x0, sctlr_el2 // Get control register EL2
-3: orr x0, x0, #CTRL_SA_BIT // Set SA (stack alignment check) bit
- EL1_OR_EL2(x1)
-1: msr sctlr_el1, x0 // Write back control register
- b 3f
-2: msr sctlr_el2, x0 // Write back control register
-3: dsb sy
- isb
- ret
-
-
-ASM_FUNC(ArmDisableStackAlignmentCheck)
- EL1_OR_EL2_OR_EL3(x1)
-1: mrs x0, sctlr_el1 // Get control register EL1
- b 4f
-2: mrs x0, sctlr_el2 // Get control register EL2
- b 4f
-3: mrs x0, sctlr_el3 // Get control register EL3
-4: bic x0, x0, #CTRL_SA_BIT // Clear SA (stack alignment check) bit
- EL1_OR_EL2_OR_EL3(x1)
-1: msr sctlr_el1, x0 // Write back control register
- b 4f
-2: msr sctlr_el2, x0 // Write back control register
- b 4f
-3: msr sctlr_el3, x0 // Write back control register
-4: dsb sy
- isb
- ret
-
-
-// Always turned on in AArch64. Else implementation specific. Leave in for C compatibility for now
-ASM_FUNC(ArmEnableBranchPrediction)
- ret
-
-
-// Always turned on in AArch64. Else implementation specific. Leave in for C compatibility for now.
-ASM_FUNC(ArmDisableBranchPrediction)
- ret
-
-
-ASM_FUNC(AArch64AllDataCachesOperation)
-// We can use regs 0-7 and 9-15 without having to save/restore.
-// Save our link register on the stack. - The stack must always be quad-word aligned
- stp x29, x30, [sp, #-16]!
- mov x29, sp
- mov x1, x0 // Save Function call in x1
- mrs x6, clidr_el1 // Read EL1 CLIDR
- and x3, x6, #0x7000000 // Mask out all but Level of Coherency (LoC)
- lsr x3, x3, #23 // Left align cache level value - the level is shifted by 1 to the
- // right to ease the access to CSSELR and the Set/Way operation.
- cbz x3, L_Finished // No need to clean if LoC is 0
- mov x10, #0 // Start clean at cache level 0
-
-Loop1:
- add x2, x10, x10, lsr #1 // Work out 3x cachelevel for cache info
- lsr x12, x6, x2 // bottom 3 bits are the Cache type for this level
- and x12, x12, #7 // get those 3 bits alone
- cmp x12, #2 // what cache at this level?
- b.lt L_Skip // no cache or only instruction cache at this level
- msr csselr_el1, x10 // write the Cache Size selection register with current level (CSSELR)
- isb // isb to sync the change to the CacheSizeID reg
- mrs x12, ccsidr_el1 // reads current Cache Size ID register (CCSIDR)
- and x2, x12, #0x7 // extract the line length field
- add x2, x2, #4 // add 4 for the line length offset (log2 16 bytes)
- mov x4, #0x400
- sub x4, x4, #1
- and x4, x4, x12, lsr #3 // x4 is the max number on the way size (right aligned)
- clz w5, w4 // w5 is the bit position of the way size increment
- mov x7, #0x00008000
- sub x7, x7, #1
- and x7, x7, x12, lsr #13 // x7 is the max number of the index size (right aligned)
-
-Loop2:
- mov x9, x4 // x9 working copy of the max way size (right aligned)
-
-Loop3:
- lsl x11, x9, x5
- orr x0, x10, x11 // factor in the way number and cache number
- lsl x11, x7, x2
- orr x0, x0, x11 // factor in the index number
-
- blr x1 // Goto requested cache operation
-
- subs x9, x9, #1 // decrement the way number
- b.ge Loop3
- subs x7, x7, #1 // decrement the index
- b.ge Loop2
-L_Skip:
- add x10, x10, #2 // increment the cache number
- cmp x3, x10
- b.gt Loop1
-
-L_Finished:
- dsb sy
- isb
- ldp x29, x30, [sp], #0x10
- ret
-
-
-ASM_FUNC(ArmDataMemoryBarrier)
- dmb sy
- ret
-
-
-ASM_FUNC(ArmDataSynchronizationBarrier)
- dsb sy
- ret
-
-
-ASM_FUNC(ArmInstructionSynchronizationBarrier)
- isb
- ret
-
-
-ASM_FUNC(ArmWriteVBar)
- EL1_OR_EL2_OR_EL3(x1)
-1: msr vbar_el1, x0 // Set the Address of the EL1 Vector Table in the VBAR register
- b 4f
-2: msr vbar_el2, x0 // Set the Address of the EL2 Vector Table in the VBAR register
- b 4f
-3: msr vbar_el3, x0 // Set the Address of the EL3 Vector Table in the VBAR register
-4: isb
- ret
-
-ASM_FUNC(ArmReadVBar)
- EL1_OR_EL2_OR_EL3(x1)
-1: mrs x0, vbar_el1 // Set the Address of the EL1 Vector Table in the VBAR register
- ret
-2: mrs x0, vbar_el2 // Set the Address of the EL2 Vector Table in the VBAR register
- ret
-3: mrs x0, vbar_el3 // Set the Address of the EL3 Vector Table in the VBAR register
- ret
-
-
-ASM_FUNC(ArmEnableVFP)
- // Check whether floating-point is implemented in the processor.
- mov x1, x30 // Save LR
- bl ArmReadIdPfr0 // Read EL1 Processor Feature Register (PFR0)
- mov x30, x1 // Restore LR
- ands x0, x0, #AARCH64_PFR0_FP// Extract bits indicating VFP implementation
- cmp x0, #0 // VFP is implemented if '0'.
- b.ne 4f // Exit if VFP not implemented.
- // FVP is implemented.
- // Make sure VFP exceptions are not trapped (to any exception level).
- mrs x0, cpacr_el1 // Read EL1 Coprocessor Access Control Register (CPACR)
- orr x0, x0, #CPACR_VFP_BITS // Disable FVP traps to EL1
- msr cpacr_el1, x0 // Write back EL1 Coprocessor Access Control Register (CPACR)
- mov x1, #AARCH64_CPTR_TFP // TFP Bit for trapping VFP Exceptions
- EL1_OR_EL2_OR_EL3(x2)
-1:ret // Not configurable in EL1
-2:mrs x0, cptr_el2 // Disable VFP traps to EL2
- bic x0, x0, x1
- msr cptr_el2, x0
- ret
-3:mrs x0, cptr_el3 // Disable VFP traps to EL3
- bic x0, x0, x1
- msr cptr_el3, x0
-4:ret
-
-
-ASM_FUNC(ArmCallWFI)
- wfi
- ret
-
-
-ASM_FUNC(ArmReadMpidr)
- mrs x0, mpidr_el1 // read EL1 MPIDR
- ret
-
-
-// Keep old function names for C compatibilty for now. Change later?
-ASM_FUNC(ArmReadTpidrurw)
- mrs x0, tpidr_el0 // read tpidr_el0 (v7 TPIDRURW) -> (v8 TPIDR_EL0)
- ret
-
-
-// Keep old function names for C compatibilty for now. Change later?
-ASM_FUNC(ArmWriteTpidrurw)
- msr tpidr_el0, x0 // write tpidr_el0 (v7 TPIDRURW) -> (v8 TPIDR_EL0)
- ret
-
-
-// Arch timers are mandatory on AArch64
-ASM_FUNC(ArmIsArchTimerImplemented)
- mov x0, #1
- ret
-
-
-ASM_FUNC(ArmReadIdPfr0)
- mrs x0, id_aa64pfr0_el1 // Read ID_AA64PFR0 Register
- ret
-
-
-// Q: id_aa64pfr1_el1 not defined yet. What does this funtion want to access?
-// A: used to setup arch timer. Check if we have security extensions, permissions to set stuff.
-// See: ArmPkg/Library/ArmArchTimerLib/AArch64/ArmArchTimerLib.c
-// Not defined yet, but stick in here for now, should read all zeros.
-ASM_FUNC(ArmReadIdPfr1)
- mrs x0, id_aa64pfr1_el1 // Read ID_PFR1 Register
- ret
-
-// VOID ArmWriteHcr(UINTN Hcr)
-ASM_FUNC(ArmWriteHcr)
- msr hcr_el2, x0 // Write the passed HCR value
- ret
-
-// UINTN ArmReadHcr(VOID)
-ASM_FUNC(ArmReadHcr)
- mrs x0, hcr_el2
- ret
-
-// UINTN ArmReadCurrentEL(VOID)
-ASM_FUNC(ArmReadCurrentEL)
- mrs x0, CurrentEL
- ret
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S deleted file mode 100644 index 9d3dd66b10..0000000000 --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S +++ /dev/null @@ -1,190 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.
-# Copyright (c) 2016, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLibV8.h>
-
-.set DAIF_RD_FIQ_BIT, (1 << 6)
-.set DAIF_RD_IRQ_BIT, (1 << 7)
-
-ASM_FUNC(ArmReadMidr)
- mrs x0, midr_el1 // Read from Main ID Register (MIDR)
- ret
-
-ASM_FUNC(ArmCacheInfo)
- mrs x0, ctr_el0 // Read from Cache Type Regiter (CTR)
- ret
-
-ASM_FUNC(ArmGetInterruptState)
- mrs x0, daif
- tst w0, #DAIF_RD_IRQ_BIT // Check if IRQ is enabled. Enabled if 0 (Z=1)
- cset w0, eq // if Z=1 return 1, else 0
- ret
-
-ASM_FUNC(ArmGetFiqState)
- mrs x0, daif
- tst w0, #DAIF_RD_FIQ_BIT // Check if FIQ is enabled. Enabled if 0 (Z=1)
- cset w0, eq // if Z=1 return 1, else 0
- ret
-
-ASM_FUNC(ArmWriteCpacr)
- msr cpacr_el1, x0 // Coprocessor Access Control Reg (CPACR)
- ret
-
-ASM_FUNC(ArmWriteAuxCr)
- EL1_OR_EL2(x1)
-1:msr actlr_el1, x0 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
- ret
-2:msr actlr_el2, x0 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
- ret
-
-ASM_FUNC(ArmReadAuxCr)
- EL1_OR_EL2(x1)
-1:mrs x0, actlr_el1 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
- ret
-2:mrs x0, actlr_el2 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
- ret
-
-ASM_FUNC(ArmSetTTBR0)
- EL1_OR_EL2_OR_EL3(x1)
-1:msr ttbr0_el1, x0 // Translation Table Base Reg 0 (TTBR0)
- b 4f
-2:msr ttbr0_el2, x0 // Translation Table Base Reg 0 (TTBR0)
- b 4f
-3:msr ttbr0_el3, x0 // Translation Table Base Reg 0 (TTBR0)
-4:isb
- ret
-
-ASM_FUNC(ArmGetTTBR0BaseAddress)
- EL1_OR_EL2(x1)
-1:mrs x0, ttbr0_el1
- b 3f
-2:mrs x0, ttbr0_el2
-3:and x0, x0, 0xFFFFFFFFFFFF /* Look at bottom 48 bits */
- isb
- ret
-
-ASM_FUNC(ArmGetTCR)
- EL1_OR_EL2_OR_EL3(x1)
-1:mrs x0, tcr_el1
- b 4f
-2:mrs x0, tcr_el2
- b 4f
-3:mrs x0, tcr_el3
-4:isb
- ret
-
-ASM_FUNC(ArmSetTCR)
- EL1_OR_EL2_OR_EL3(x1)
-1:msr tcr_el1, x0
- b 4f
-2:msr tcr_el2, x0
- b 4f
-3:msr tcr_el3, x0
-4:isb
- ret
-
-ASM_FUNC(ArmGetMAIR)
- EL1_OR_EL2_OR_EL3(x1)
-1:mrs x0, mair_el1
- b 4f
-2:mrs x0, mair_el2
- b 4f
-3:mrs x0, mair_el3
-4:isb
- ret
-
-ASM_FUNC(ArmSetMAIR)
- EL1_OR_EL2_OR_EL3(x1)
-1:msr mair_el1, x0
- b 4f
-2:msr mair_el2, x0
- b 4f
-3:msr mair_el3, x0
-4:isb
- ret
-
-
-//
-//VOID
-//ArmUpdateTranslationTableEntry (
-// IN VOID *TranslationTableEntry // X0
-// IN VOID *MVA // X1
-// );
-ASM_FUNC(ArmUpdateTranslationTableEntry)
- dc civac, x0 // Clean and invalidate data line
- dsb sy
- EL1_OR_EL2_OR_EL3(x0)
-1: tlbi vaae1, x1 // TLB Invalidate VA , EL1
- b 4f
-2: tlbi vae2, x1 // TLB Invalidate VA , EL2
- b 4f
-3: tlbi vae3, x1 // TLB Invalidate VA , EL3
-4: dsb sy
- isb
- ret
-
-ASM_FUNC(ArmInvalidateTlb)
- EL1_OR_EL2_OR_EL3(x0)
-1: tlbi vmalle1
- b 4f
-2: tlbi alle2
- b 4f
-3: tlbi alle3
-4: dsb sy
- isb
- ret
-
-ASM_FUNC(ArmWriteCptr)
- msr cptr_el3, x0 // EL3 Coprocessor Trap Reg (CPTR)
- ret
-
-ASM_FUNC(ArmWriteScr)
- msr scr_el3, x0 // Secure configuration register EL3
- isb
- ret
-
-ASM_FUNC(ArmWriteMVBar)
- msr vbar_el3, x0 // Exception Vector Base address for Monitor on EL3
- ret
-
-ASM_FUNC(ArmCallWFE)
- wfe
- ret
-
-ASM_FUNC(ArmCallSEV)
- sev
- ret
-
-ASM_FUNC(ArmReadCpuActlr)
- mrs x0, S3_1_c15_c2_0
- ret
-
-ASM_FUNC(ArmWriteCpuActlr)
- msr S3_1_c15_c2_0, x0
- dsb sy
- isb
- ret
-
-ASM_FUNC(ArmReadSctlr)
- EL1_OR_EL2_OR_EL3(x1)
-1:mrs x0, sctlr_el1
- ret
-2:mrs x0, sctlr_el2
- ret
-3:mrs x0, sctlr_el3
-4:ret
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S deleted file mode 100644 index 221dfc499a..0000000000 --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S +++ /dev/null @@ -1,112 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
-# Copyright (c) 2016, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLibV8.h>
-
-.set MPIDR_U_BIT, (30)
-.set MPIDR_U_MASK, (1 << MPIDR_U_BIT)
-
-// DAIF bit definitions for writing through msr daifclr/sr daifset
-.set DAIF_WR_FIQ_BIT, (1 << 0)
-.set DAIF_WR_IRQ_BIT, (1 << 1)
-.set DAIF_WR_ABORT_BIT, (1 << 2)
-.set DAIF_WR_DEBUG_BIT, (1 << 3)
-.set DAIF_WR_INT_BITS, (DAIF_WR_FIQ_BIT | DAIF_WR_IRQ_BIT)
-.set DAIF_WR_ALL, (DAIF_WR_DEBUG_BIT | DAIF_WR_ABORT_BIT | DAIF_WR_INT_BITS)
-
-
-ASM_FUNC(ArmIsMpCore)
- mrs x0, mpidr_el1 // Read EL1 Mutliprocessor Affinty Reg (MPIDR)
- and x0, x0, #MPIDR_U_MASK // U Bit clear, the processor is part of a multiprocessor system
- lsr x0, x0, #MPIDR_U_BIT
- eor x0, x0, #1
- ret
-
-
-ASM_FUNC(ArmEnableAsynchronousAbort)
- msr daifclr, #DAIF_WR_ABORT_BIT
- isb
- ret
-
-
-ASM_FUNC(ArmDisableAsynchronousAbort)
- msr daifset, #DAIF_WR_ABORT_BIT
- isb
- ret
-
-
-ASM_FUNC(ArmEnableIrq)
- msr daifclr, #DAIF_WR_IRQ_BIT
- isb
- ret
-
-
-ASM_FUNC(ArmDisableIrq)
- msr daifset, #DAIF_WR_IRQ_BIT
- isb
- ret
-
-
-ASM_FUNC(ArmEnableFiq)
- msr daifclr, #DAIF_WR_FIQ_BIT
- isb
- ret
-
-
-ASM_FUNC(ArmDisableFiq)
- msr daifset, #DAIF_WR_FIQ_BIT
- isb
- ret
-
-
-ASM_FUNC(ArmEnableInterrupts)
- msr daifclr, #DAIF_WR_INT_BITS
- isb
- ret
-
-
-ASM_FUNC(ArmDisableInterrupts)
- msr daifset, #DAIF_WR_INT_BITS
- isb
- ret
-
-
-ASM_FUNC(ArmDisableAllExceptions)
- msr daifset, #DAIF_WR_ALL
- isb
- ret
-
-
-// UINT32
-// ReadCCSIDR (
-// IN UINT32 CSSELR
-// )
-ASM_FUNC(ReadCCSIDR)
- msr csselr_el1, x0 // Write Cache Size Selection Register (CSSELR)
- isb
- mrs x0, ccsidr_el1 // Read current Cache Size ID Register (CCSIDR)
- ret
-
-
-// UINT32
-// ReadCLIDR (
-// IN UINT32 CSSELR
-// )
-ASM_FUNC(ReadCLIDR)
- mrs x0, clidr_el1 // Read Cache Level ID Register
- ret
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S deleted file mode 100644 index a0b5ed5002..0000000000 --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S +++ /dev/null @@ -1,166 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.
-# Copyright (c) 2016, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(ArmReadMidr)
- mrc p15,0,R0,c0,c0,0
- bx LR
-
-ASM_FUNC(ArmCacheInfo)
- mrc p15,0,R0,c0,c0,1
- bx LR
-
-ASM_FUNC(ArmGetInterruptState)
- mrs R0,CPSR
- tst R0,#0x80 @Check if IRQ is enabled.
- moveq R0,#1
- movne R0,#0
- bx LR
-
-ASM_FUNC(ArmGetFiqState)
- mrs R0,CPSR
- tst R0,#0x40 @Check if FIQ is enabled.
- moveq R0,#1
- movne R0,#0
- bx LR
-
-ASM_FUNC(ArmSetDomainAccessControl)
- mcr p15,0,r0,c3,c0,0
- bx lr
-
-ASM_FUNC(CPSRMaskInsert) @ on entry, r0 is the mask and r1 is the field to insert
- stmfd sp!, {r4-r12, lr} @ save all the banked registers
- mov r3, sp @ copy the stack pointer into a non-banked register
- mrs r2, cpsr @ read the cpsr
- bic r2, r2, r0 @ clear mask in the cpsr
- and r1, r1, r0 @ clear bits outside the mask in the input
- orr r2, r2, r1 @ set field
- msr cpsr_cxsf, r2 @ write back cpsr (may have caused a mode switch)
- isb
- mov sp, r3 @ restore stack pointer
- ldmfd sp!, {r4-r12, lr} @ restore registers
- bx lr @ return (hopefully thumb-safe!)
-
-ASM_FUNC(CPSRRead)
- mrs r0, cpsr
- bx lr
-
-ASM_FUNC(ArmReadCpacr)
- mrc p15, 0, r0, c1, c0, 2
- bx lr
-
-ASM_FUNC(ArmWriteCpacr)
- mcr p15, 0, r0, c1, c0, 2
- isb
- bx lr
-
-ASM_FUNC(ArmWriteAuxCr)
- mcr p15, 0, r0, c1, c0, 1
- bx lr
-
-ASM_FUNC(ArmReadAuxCr)
- mrc p15, 0, r0, c1, c0, 1
- bx lr
-
-ASM_FUNC(ArmSetTTBR0)
- mcr p15,0,r0,c2,c0,0
- isb
- bx lr
-
-ASM_FUNC(ArmSetTTBCR)
- mcr p15, 0, r0, c2, c0, 2
- isb
- bx lr
-
-ASM_FUNC(ArmGetTTBR0BaseAddress)
- mrc p15,0,r0,c2,c0,0
- MOV32 (r1, 0xFFFFC000)
- and r0, r0, r1
- isb
- bx lr
-
-//
-//VOID
-//ArmUpdateTranslationTableEntry (
-// IN VOID *TranslationTableEntry // R0
-// IN VOID *MVA // R1
-// );
-ASM_FUNC(ArmUpdateTranslationTableEntry)
- mcr p15,0,R0,c7,c14,1 @ DCCIMVAC Clean data cache by MVA
- dsb
- mcr p15,0,R1,c8,c7,1 @ TLBIMVA TLB Invalidate MVA
- mcr p15,0,R9,c7,c5,6 @ BPIALL Invalidate Branch predictor array. R9 == NoOp
- dsb
- isb
- bx lr
-
-ASM_FUNC(ArmInvalidateTlb)
- mov r0,#0
- mcr p15,0,r0,c8,c7,0
- mcr p15,0,R9,c7,c5,6 @ BPIALL Invalidate Branch predictor array. R9 == NoOp
- dsb
- isb
- bx lr
-
-ASM_FUNC(ArmReadScr)
- mrc p15, 0, r0, c1, c1, 0
- bx lr
-
-ASM_FUNC(ArmWriteScr)
- mcr p15, 0, r0, c1, c1, 0
- isb
- bx lr
-
-ASM_FUNC(ArmReadHVBar)
- mrc p15, 4, r0, c12, c0, 0
- bx lr
-
-ASM_FUNC(ArmWriteHVBar)
- mcr p15, 4, r0, c12, c0, 0
- bx lr
-
-ASM_FUNC(ArmReadMVBar)
- mrc p15, 0, r0, c12, c0, 1
- bx lr
-
-ASM_FUNC(ArmWriteMVBar)
- mcr p15, 0, r0, c12, c0, 1
- bx lr
-
-ASM_FUNC(ArmCallWFE)
- wfe
- bx lr
-
-ASM_FUNC(ArmCallSEV)
- sev
- bx lr
-
-ASM_FUNC(ArmReadSctlr)
- mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
- bx lr
-
-ASM_FUNC(ArmReadCpuActlr)
- mrc p15, 0, r0, c1, c0, 1
- bx lr
-
-ASM_FUNC(ArmWriteCpuActlr)
- mcr p15, 0, r0, c1, c0, 1
- dsb
- isb
- bx lr
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm deleted file mode 100644 index 85b0feee20..0000000000 --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm +++ /dev/null @@ -1,169 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-// Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
- INCLUDE AsmMacroIoLib.inc
-
-
- INCLUDE AsmMacroExport.inc
-
- RVCT_ASM_EXPORT ArmReadMidr
- mrc p15,0,R0,c0,c0,0
- bx LR
-
- RVCT_ASM_EXPORT ArmCacheInfo
- mrc p15,0,R0,c0,c0,1
- bx LR
-
- RVCT_ASM_EXPORT ArmGetInterruptState
- mrs R0,CPSR
- tst R0,#0x80 // Check if IRQ is enabled.
- moveq R0,#1
- movne R0,#0
- bx LR
-
- RVCT_ASM_EXPORT ArmGetFiqState
- mrs R0,CPSR
- tst R0,#0x40 // Check if FIQ is enabled.
- moveq R0,#1
- movne R0,#0
- bx LR
-
- RVCT_ASM_EXPORT ArmSetDomainAccessControl
- mcr p15,0,r0,c3,c0,0
- bx lr
-
- RVCT_ASM_EXPORT CPSRMaskInsert
- stmfd sp!, {r4-r12, lr} // save all the banked registers
- mov r3, sp // copy the stack pointer into a non-banked register
- mrs r2, cpsr // read the cpsr
- bic r2, r2, r0 // clear mask in the cpsr
- and r1, r1, r0 // clear bits outside the mask in the input
- orr r2, r2, r1 // set field
- msr cpsr_cxsf, r2 // write back cpsr (may have caused a mode switch)
- isb
- mov sp, r3 // restore stack pointer
- ldmfd sp!, {r4-r12, lr} // restore registers
- bx lr // return (hopefully thumb-safe!) // return (hopefully thumb-safe!)
-
- RVCT_ASM_EXPORT CPSRRead
- mrs r0, cpsr
- bx lr
-
- RVCT_ASM_EXPORT ArmReadCpacr
- mrc p15, 0, r0, c1, c0, 2
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteCpacr
- mcr p15, 0, r0, c1, c0, 2
- isb
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteAuxCr
- mcr p15, 0, r0, c1, c0, 1
- bx lr
-
- RVCT_ASM_EXPORT ArmReadAuxCr
- mrc p15, 0, r0, c1, c0, 1
- bx lr
-
- RVCT_ASM_EXPORT ArmSetTTBR0
- mcr p15,0,r0,c2,c0,0
- isb
- bx lr
-
- RVCT_ASM_EXPORT ArmSetTTBCR
- mcr p15, 0, r0, c2, c0, 2
- isb
- bx lr
-
- RVCT_ASM_EXPORT ArmGetTTBR0BaseAddress
- mrc p15,0,r0,c2,c0,0
- MOV32 r1, 0xFFFFC000
- and r0, r0, r1
- isb
- bx lr
-
-//
-//VOID
-//ArmUpdateTranslationTableEntry (
-// IN VOID *TranslationTableEntry // R0
-// IN VOID *MVA // R1
-// );
- RVCT_ASM_EXPORT ArmUpdateTranslationTableEntry
- mcr p15,0,R0,c7,c14,1 // DCCIMVAC Clean data cache by MVA
- dsb
- mcr p15,0,R1,c8,c7,1 // TLBIMVA TLB Invalidate MVA
- mcr p15,0,R9,c7,c5,6 // BPIALL Invalidate Branch predictor array. R9 == NoOp
- dsb
- isb
- bx lr
-
- RVCT_ASM_EXPORT ArmInvalidateTlb
- mov r0,#0
- mcr p15,0,r0,c8,c7,0
- mcr p15,0,R9,c7,c5,6 // BPIALL Invalidate Branch predictor array. R9 == NoOp
- dsb
- isb
- bx lr
-
- RVCT_ASM_EXPORT ArmReadScr
- mrc p15, 0, r0, c1, c1, 0
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteScr
- mcr p15, 0, r0, c1, c1, 0
- isb
- bx lr
-
- RVCT_ASM_EXPORT ArmReadHVBar
- mrc p15, 4, r0, c12, c0, 0
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteHVBar
- mcr p15, 4, r0, c12, c0, 0
- bx lr
-
- RVCT_ASM_EXPORT ArmReadMVBar
- mrc p15, 0, r0, c12, c0, 1
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteMVBar
- mcr p15, 0, r0, c12, c0, 1
- bx lr
-
- RVCT_ASM_EXPORT ArmCallWFE
- wfe
- bx lr
-
- RVCT_ASM_EXPORT ArmCallSEV
- sev
- bx lr
-
- RVCT_ASM_EXPORT ArmReadSctlr
- mrc p15, 0, r0, c1, c0, 0 // Read SCTLR into R0 (Read control register configuration data)
- bx lr
-
-
- RVCT_ASM_EXPORT ArmReadCpuActlr
- mrc p15, 0, r0, c1, c0, 1
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteCpuActlr
- mcr p15, 0, r0, c1, c0, 1
- dsb
- isb
- bx lr
-
- END
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S deleted file mode 100644 index 3939bbc6b6..0000000000 --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S +++ /dev/null @@ -1,95 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-# Copyright (c) 2016, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(ArmIsMpCore)
- mrc p15,0,R0,c0,c0,5
- // Get Multiprocessing extension (bit31) & U bit (bit30)
- and R0, R0, #0xC0000000
- // if (bit31 == 1) && (bit30 == 0) then the processor is part of a multiprocessor system
- cmp R0, #0x80000000
- moveq R0, #1
- movne R0, #0
- bx LR
-
-ASM_FUNC(ArmEnableAsynchronousAbort)
- cpsie a
- isb
- bx LR
-
-ASM_FUNC(ArmDisableAsynchronousAbort)
- cpsid a
- isb
- bx LR
-
-ASM_FUNC(ArmEnableIrq)
- cpsie i
- isb
- bx LR
-
-ASM_FUNC(ArmDisableIrq)
- cpsid i
- isb
- bx LR
-
-ASM_FUNC(ArmEnableFiq)
- cpsie f
- isb
- bx LR
-
-ASM_FUNC(ArmDisableFiq)
- cpsid f
- isb
- bx LR
-
-ASM_FUNC(ArmEnableInterrupts)
- cpsie if
- isb
- bx LR
-
-ASM_FUNC(ArmDisableInterrupts)
- cpsid if
- isb
- bx LR
-
-// UINT32
-// ReadCCSIDR (
-// IN UINT32 CSSELR
-// )
-ASM_FUNC(ReadCCSIDR)
- mcr p15,2,r0,c0,c0,0 @ Write Cache Size Selection Register (CSSELR)
- isb
- mrc p15,1,r0,c0,c0,0 @ Read current CP15 Cache Size ID Register (CCSIDR)
- bx lr
-
-// UINT32
-// ReadCLIDR (
-// IN UINT32 CSSELR
-// )
-ASM_FUNC(ReadCLIDR)
- mrc p15,1,r0,c0,c0,1 @ Read CP15 Cache Level ID Register
- bx lr
-
-ASM_FUNC(ArmReadNsacr)
- mrc p15, 0, r0, c1, c1, 2
- bx lr
-
-ASM_FUNC(ArmWriteNsacr)
- mcr p15, 0, r0, c1, c1, 2
- bx lr
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm deleted file mode 100644 index cac39e36a5..0000000000 --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm +++ /dev/null @@ -1,99 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
-
- INCLUDE AsmMacroExport.inc
-
-
-//------------------------------------------------------------------------------
-
- RVCT_ASM_EXPORT ArmIsMpCore
- mrc p15,0,R0,c0,c0,5
- // Get Multiprocessing extension (bit31) & U bit (bit30)
- and R0, R0, #0xC0000000
- // if (bit31 == 1) && (bit30 == 0) then the processor is part of a multiprocessor system
- cmp R0, #0x80000000
- moveq R0, #1
- movne R0, #0
- bx LR
-
- RVCT_ASM_EXPORT ArmEnableAsynchronousAbort
- cpsie a
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmDisableAsynchronousAbort
- cpsid a
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmEnableIrq
- cpsie i
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmDisableIrq
- cpsid i
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmEnableFiq
- cpsie f
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmDisableFiq
- cpsid f
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmEnableInterrupts
- cpsie if
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmDisableInterrupts
- cpsid if
- isb
- bx LR
-
-// UINT32
-// ReadCCSIDR (
-// IN UINT32 CSSELR
-// )
- RVCT_ASM_EXPORT ReadCCSIDR
- mcr p15,2,r0,c0,c0,0 ; Write Cache Size Selection Register (CSSELR)
- isb
- mrc p15,1,r0,c0,c0,0 ; Read current CP15 Cache Size ID Register (CCSIDR)
- bx lr
-
-// UINT32
-// ReadCLIDR (
-// IN UINT32 CSSELR
-// )
- RVCT_ASM_EXPORT ReadCLIDR
- mrc p15,1,r0,c0,c0,1 ; Read CP15 Cache Level ID Register
- bx lr
-
- RVCT_ASM_EXPORT ArmReadNsacr
- mrc p15, 0, r0, c1, c1, 2
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteNsacr
- mcr p15, 0, r0, c1, c1, 2
- bx lr
-
- END
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.S b/ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.S deleted file mode 100644 index 9a7794f0ad..0000000000 --- a/ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.S +++ /dev/null @@ -1,98 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2011, ARM Limited. All rights reserved.
-# Copyright (c) 2016, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(ArmReadCntFrq)
- mrc p15, 0, r0, c14, c0, 0 @ Read CNTFRQ
- bx lr
-
-ASM_FUNC(ArmWriteCntFrq)
- mcr p15, 0, r0, c14, c0, 0 @ Write to CNTFRQ
- bx lr
-
-ASM_FUNC(ArmReadCntPct)
- mrrc p15, 0, r0, r1, c14 @ Read CNTPT (Physical counter register)
- bx lr
-
-ASM_FUNC(ArmReadCntkCtl)
- mrc p15, 0, r0, c14, c1, 0 @ Read CNTK_CTL (Timer PL1 Control Register)
- bx lr
-
-ASM_FUNC(ArmWriteCntkCtl)
- mcr p15, 0, r0, c14, c1, 0 @ Write to CNTK_CTL (Timer PL1 Control Register)
- bx lr
-
-ASM_FUNC(ArmReadCntpTval)
- mrc p15, 0, r0, c14, c2, 0 @ Read CNTP_TVAL (PL1 physical timer value register)
- bx lr
-
-ASM_FUNC(ArmWriteCntpTval)
- mcr p15, 0, r0, c14, c2, 0 @ Write to CNTP_TVAL (PL1 physical timer value register)
- bx lr
-
-ASM_FUNC(ArmReadCntpCtl)
- mrc p15, 0, r0, c14, c2, 1 @ Read CNTP_CTL (PL1 Physical Timer Control Register)
- bx lr
-
-ASM_FUNC(ArmWriteCntpCtl)
- mcr p15, 0, r0, c14, c2, 1 @ Write to CNTP_CTL (PL1 Physical Timer Control Register)
- bx lr
-
-ASM_FUNC(ArmReadCntvTval)
- mrc p15, 0, r0, c14, c3, 0 @ Read CNTV_TVAL (Virtual Timer Value register)
- bx lr
-
-ASM_FUNC(ArmWriteCntvTval)
- mcr p15, 0, r0, c14, c3, 0 @ Write to CNTV_TVAL (Virtual Timer Value register)
- bx lr
-
-ASM_FUNC(ArmReadCntvCtl)
- mrc p15, 0, r0, c14, c3, 1 @ Read CNTV_CTL (Virtual Timer Control Register)
- bx lr
-
-ASM_FUNC(ArmWriteCntvCtl)
- mcr p15, 0, r0, c14, c3, 1 @ Write to CNTV_CTL (Virtual Timer Control Register)
- bx lr
-
-ASM_FUNC(ArmReadCntvCt)
- mrrc p15, 1, r0, r1, c14 @ Read CNTVCT (Virtual Count Register)
- bx lr
-
-ASM_FUNC(ArmReadCntpCval)
- mrrc p15, 2, r0, r1, c14 @ Read CNTP_CTVAL (Physical Timer Compare Value Register)
- bx lr
-
-ASM_FUNC(ArmWriteCntpCval)
- mcrr p15, 2, r0, r1, c14 @ Write to CNTP_CTVAL (Physical Timer Compare Value Register)
- bx lr
-
-ASM_FUNC(ArmReadCntvCval)
- mrrc p15, 3, r0, r1, c14 @ Read CNTV_CTVAL (Virtual Timer Compare Value Register)
- bx lr
-
-ASM_FUNC(ArmWriteCntvCval)
- mcrr p15, 3, r0, r1, c14 @ write to CNTV_CTVAL (Virtual Timer Compare Value Register)
- bx lr
-
-ASM_FUNC(ArmReadCntvOff)
- mrrc p15, 4, r0, r1, c14 @ Read CNTVOFF (virtual Offset register)
- bx lr
-
-ASM_FUNC(ArmWriteCntvOff)
- mcrr p15, 4, r0, r1, c14 @ Write to CNTVOFF (Virtual Offset register)
- bx lr
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.asm b/ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.asm deleted file mode 100644 index a53dd60457..0000000000 --- a/ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.asm +++ /dev/null @@ -1,99 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2011, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
- INCLUDE AsmMacroExport.inc
- PRESERVE8
-
- RVCT_ASM_EXPORT ArmReadCntFrq
- mrc p15, 0, r0, c14, c0, 0 ; Read CNTFRQ
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteCntFrq
- mcr p15, 0, r0, c14, c0, 0 ; Write to CNTFRQ
- bx lr
-
- RVCT_ASM_EXPORT ArmReadCntPct
- mrrc p15, 0, r0, r1, c14 ; Read CNTPT (Physical counter register)
- bx lr
-
- RVCT_ASM_EXPORT ArmReadCntkCtl
- mrc p15, 0, r0, c14, c1, 0 ; Read CNTK_CTL (Timer PL1 Control Register)
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteCntkCtl
- mcr p15, 0, r0, c14, c1, 0 ; Write to CNTK_CTL (Timer PL1 Control Register)
- bx lr
-
- RVCT_ASM_EXPORT ArmReadCntpTval
- mrc p15, 0, r0, c14, c2, 0 ; Read CNTP_TVAL (PL1 physical timer value register)
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteCntpTval
- mcr p15, 0, r0, c14, c2, 0 ; Write to CNTP_TVAL (PL1 physical timer value register)
- bx lr
-
- RVCT_ASM_EXPORT ArmReadCntpCtl
- mrc p15, 0, r0, c14, c2, 1 ; Read CNTP_CTL (PL1 Physical Timer Control Register)
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteCntpCtl
- mcr p15, 0, r0, c14, c2, 1 ; Write to CNTP_CTL (PL1 Physical Timer Control Register)
- bx lr
-
- RVCT_ASM_EXPORT ArmReadCntvTval
- mrc p15, 0, r0, c14, c3, 0 ; Read CNTV_TVAL (Virtual Timer Value register)
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteCntvTval
- mcr p15, 0, r0, c14, c3, 0 ; Write to CNTV_TVAL (Virtual Timer Value register)
- bx lr
-
- RVCT_ASM_EXPORT ArmReadCntvCtl
- mrc p15, 0, r0, c14, c3, 1 ; Read CNTV_CTL (Virtual Timer Control Register)
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteCntvCtl
- mcr p15, 0, r0, c14, c3, 1 ; Write to CNTV_CTL (Virtual Timer Control Register)
- bx lr
-
- RVCT_ASM_EXPORT ArmReadCntvCt
- mrrc p15, 1, r0, r1, c14 ; Read CNTVCT (Virtual Count Register)
- bx lr
-
- RVCT_ASM_EXPORT ArmReadCntpCval
- mrrc p15, 2, r0, r1, c14 ; Read CNTP_CTVAL (Physical Timer Compare Value Register)
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteCntpCval
- mcrr p15, 2, r0, r1, c14 ; Write to CNTP_CTVAL (Physical Timer Compare Value Register)
- bx lr
-
- RVCT_ASM_EXPORT ArmReadCntvCval
- mrrc p15, 3, r0, r1, c14 ; Read CNTV_CTVAL (Virtual Timer Compare Value Register)
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteCntvCval
- mcrr p15, 3, r0, r1, c14 ; write to CNTV_CTVAL (Virtual Timer Compare Value Register)
- bx lr
-
- RVCT_ASM_EXPORT ArmReadCntvOff
- mrrc p15, 4, r0, r1, c14 ; Read CNTVOFF (virtual Offset register)
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteCntvOff
- mcrr p15, 4, r0, r1, c14 ; Write to CNTVOFF (Virtual Offset register)
- bx lr
-
- END
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c deleted file mode 100644 index 23a7f2f2bb..0000000000 --- a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c +++ /dev/null @@ -1,70 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-#include <Uefi.h>
-#include <Chipset/ArmV7.h>
-#include <Library/ArmLib.h>
-#include <Library/BaseLib.h>
-#include <Library/IoLib.h>
-#include "ArmV7Lib.h"
-#include "ArmLibPrivate.h"
-
-VOID
-ArmV7DataCacheOperation (
- IN ARM_V7_CACHE_OPERATION DataCacheOperation
- )
-{
- UINTN SavedInterruptState;
-
- SavedInterruptState = ArmGetInterruptState ();
- ArmDisableInterrupts ();
-
- ArmV7AllDataCachesOperation (DataCacheOperation);
-
- ArmDataSynchronizationBarrier ();
-
- if (SavedInterruptState) {
- ArmEnableInterrupts ();
- }
-}
-
-VOID
-EFIAPI
-ArmInvalidateDataCache (
- VOID
- )
-{
- ArmDataSynchronizationBarrier ();
- ArmV7DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);
-}
-
-VOID
-EFIAPI
-ArmCleanInvalidateDataCache (
- VOID
- )
-{
- ArmDataSynchronizationBarrier ();
- ArmV7DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);
-}
-
-VOID
-EFIAPI
-ArmCleanDataCache (
- VOID
- )
-{
- ArmDataSynchronizationBarrier ();
- ArmV7DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
-}
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h deleted file mode 100644 index e4595c44fd..0000000000 --- a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h +++ /dev/null @@ -1,40 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __ARM_V7_LIB_H__
-#define __ARM_V7_LIB_H__
-
-#define ID_MMFR0_SHARELVL_SHIFT 12
-#define ID_MMFR0_SHARELVL_MASK 0xf
-#define ID_MMFR0_SHARELVL_ONE 0
-#define ID_MMFR0_SHARELVL_TWO 1
-
-#define ID_MMFR0_INNERSHR_SHIFT 28
-#define ID_MMFR0_INNERSHR_MASK 0xf
-#define ID_MMFR0_OUTERSHR_SHIFT 8
-#define ID_MMFR0_OUTERSHR_MASK 0xf
-
-#define ID_MMFR0_SHR_IMP_UNCACHED 0
-#define ID_MMFR0_SHR_IMP_HW_COHERENT 1
-#define ID_MMFR0_SHR_IGNORED 0xf
-
-typedef VOID (*ARM_V7_CACHE_OPERATION)(UINT32);
-
-VOID
-ArmV7AllDataCachesOperation (
- IN ARM_V7_CACHE_OPERATION DataCacheOperation
- );
-
-#endif // __ARM_V7_LIB_H__
-
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Support.S b/ArmPkg/Library/ArmLib/Arm/ArmV7Support.S deleted file mode 100644 index 281499b46c..0000000000 --- a/ArmPkg/Library/ArmLib/Arm/ArmV7Support.S +++ /dev/null @@ -1,305 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
-# Copyright (c) 2016, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-.set DC_ON, (0x1<<2)
-.set IC_ON, (0x1<<12)
-.set CTRL_M_BIT, (1 << 0)
-.set CTRL_C_BIT, (1 << 2)
-.set CTRL_B_BIT, (1 << 7)
-.set CTRL_I_BIT, (1 << 12)
-
-
-ASM_FUNC(ArmInvalidateDataCacheEntryByMVA)
- mcr p15, 0, r0, c7, c6, 1 @invalidate single data cache line
- bx lr
-
-ASM_FUNC(ArmCleanDataCacheEntryByMVA)
- mcr p15, 0, r0, c7, c10, 1 @clean single data cache line
- bx lr
-
-
-ASM_FUNC(ArmCleanDataCacheEntryToPoUByMVA)
- mcr p15, 0, r0, c7, c11, 1 @clean single data cache line to PoU
- bx lr
-
-ASM_FUNC(ArmInvalidateInstructionCacheEntryToPoUByMVA)
- mcr p15, 0, r0, c7, c5, 1 @Invalidate single instruction cache line to PoU
- mcr p15, 0, r0, c7, c5, 7 @Invalidate branch predictor
- bx lr
-
-ASM_FUNC(ArmCleanInvalidateDataCacheEntryByMVA)
- mcr p15, 0, r0, c7, c14, 1 @clean and invalidate single data cache line
- bx lr
-
-
-ASM_FUNC(ArmInvalidateDataCacheEntryBySetWay)
- mcr p15, 0, r0, c7, c6, 2 @ Invalidate this line
- bx lr
-
-
-ASM_FUNC(ArmCleanInvalidateDataCacheEntryBySetWay)
- mcr p15, 0, r0, c7, c14, 2 @ Clean and Invalidate this line
- bx lr
-
-
-ASM_FUNC(ArmCleanDataCacheEntryBySetWay)
- mcr p15, 0, r0, c7, c10, 2 @ Clean this line
- bx lr
-
-ASM_FUNC(ArmInvalidateInstructionCache)
- mcr p15,0,R0,c7,c5,0 @Invalidate entire instruction cache
- dsb
- isb
- bx LR
-
-ASM_FUNC(ArmEnableMmu)
- mrc p15,0,R0,c1,c0,0
- orr R0,R0,#1
- mcr p15,0,R0,c1,c0,0
- dsb
- isb
- bx LR
-
-
-ASM_FUNC(ArmDisableMmu)
- mrc p15,0,R0,c1,c0,0
- bic R0,R0,#1
- mcr p15,0,R0,c1,c0,0 @Disable MMU
-
- mcr p15,0,R0,c8,c7,0 @Invalidate TLB
- mcr p15,0,R0,c7,c5,6 @Invalidate Branch predictor array
- dsb
- isb
- bx LR
-
-ASM_FUNC(ArmDisableCachesAndMmu)
- mrc p15, 0, r0, c1, c0, 0 @ Get control register
- bic r0, r0, #CTRL_M_BIT @ Disable MMU
- bic r0, r0, #CTRL_C_BIT @ Disable D Cache
- bic r0, r0, #CTRL_I_BIT @ Disable I Cache
- mcr p15, 0, r0, c1, c0, 0 @ Write control register
- dsb
- isb
- bx LR
-
-ASM_FUNC(ArmMmuEnabled)
- mrc p15,0,R0,c1,c0,0
- and R0,R0,#1
- bx LR
-
-ASM_FUNC(ArmEnableDataCache)
- ldr R1,=DC_ON
- mrc p15,0,R0,c1,c0,0 @Read control register configuration data
- orr R0,R0,R1 @Set C bit
- mcr p15,0,r0,c1,c0,0 @Write control register configuration data
- dsb
- isb
- bx LR
-
-ASM_FUNC(ArmDisableDataCache)
- ldr R1,=DC_ON
- mrc p15,0,R0,c1,c0,0 @Read control register configuration data
- bic R0,R0,R1 @Clear C bit
- mcr p15,0,r0,c1,c0,0 @Write control register configuration data
- dsb
- isb
- bx LR
-
-ASM_FUNC(ArmEnableInstructionCache)
- ldr R1,=IC_ON
- mrc p15,0,R0,c1,c0,0 @Read control register configuration data
- orr R0,R0,R1 @Set I bit
- mcr p15,0,r0,c1,c0,0 @Write control register configuration data
- dsb
- isb
- bx LR
-
-ASM_FUNC(ArmDisableInstructionCache)
- ldr R1,=IC_ON
- mrc p15,0,R0,c1,c0,0 @Read control register configuration data
- bic R0,R0,R1 @Clear I bit.
- mcr p15,0,r0,c1,c0,0 @Write control register configuration data
- dsb
- isb
- bx LR
-
-ASM_FUNC(ArmEnableSWPInstruction)
- mrc p15, 0, r0, c1, c0, 0
- orr r0, r0, #0x00000400
- mcr p15, 0, r0, c1, c0, 0
- isb
- bx LR
-
-ASM_FUNC(ArmEnableBranchPrediction)
- mrc p15, 0, r0, c1, c0, 0
- orr r0, r0, #0x00000800
- mcr p15, 0, r0, c1, c0, 0
- dsb
- isb
- bx LR
-
-ASM_FUNC(ArmDisableBranchPrediction)
- mrc p15, 0, r0, c1, c0, 0
- bic r0, r0, #0x00000800
- mcr p15, 0, r0, c1, c0, 0
- dsb
- isb
- bx LR
-
-ASM_FUNC(ArmSetLowVectors)
- mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
- bic r0, r0, #0x00002000 @ clear V bit
- mcr p15, 0, r0, c1, c0, 0 @ Write R0 into SCTLR (Write control register configuration data)
- isb
- bx LR
-
-ASM_FUNC(ArmSetHighVectors)
- mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
- orr r0, r0, #0x00002000 @ Set V bit
- mcr p15, 0, r0, c1, c0, 0 @ Write R0 into SCTLR (Write control register configuration data)
- isb
- bx LR
-
-ASM_FUNC(ArmV7AllDataCachesOperation)
- stmfd SP!,{r4-r12, LR}
- mov R1, R0 @ Save Function call in R1
- mrc p15, 1, R6, c0, c0, 1 @ Read CLIDR
- ands R3, R6, #0x7000000 @ Mask out all but Level of Coherency (LoC)
- mov R3, R3, LSR #23 @ Cache level value (naturally aligned)
- beq L_Finished
- mov R10, #0
-
-Loop1:
- add R2, R10, R10, LSR #1 @ Work out 3xcachelevel
- mov R12, R6, LSR R2 @ bottom 3 bits are the Cache type for this level
- and R12, R12, #7 @ get those 3 bits alone
- cmp R12, #2
- blt L_Skip @ no cache or only instruction cache at this level
- mcr p15, 2, R10, c0, c0, 0 @ write the Cache Size selection register (CSSELR) // OR in 1 for Instruction
- isb @ isb to sync the change to the CacheSizeID reg
- mrc p15, 1, R12, c0, c0, 0 @ reads current Cache Size ID register (CCSIDR)
- and R2, R12, #0x7 @ extract the line length field
- add R2, R2, #4 @ add 4 for the line length offset (log2 16 bytes)
-@ ldr R4, =0x3FF
- mov R4, #0x400
- sub R4, R4, #1
- ands R4, R4, R12, LSR #3 @ R4 is the max number on the way size (right aligned)
- clz R5, R4 @ R5 is the bit position of the way size increment
-@ ldr R7, =0x00007FFF
- mov R7, #0x00008000
- sub R7, R7, #1
- ands R7, R7, R12, LSR #13 @ R7 is the max number of the index size (right aligned)
-
-Loop2:
- mov R9, R4 @ R9 working copy of the max way size (right aligned)
-
-Loop3:
- orr R0, R10, R9, LSL R5 @ factor in the way number and cache number into R11
- orr R0, R0, R7, LSL R2 @ factor in the index number
-
- blx R1
-
- subs R9, R9, #1 @ decrement the way number
- bge Loop3
- subs R7, R7, #1 @ decrement the index
- bge Loop2
-L_Skip:
- add R10, R10, #2 @ increment the cache number
- cmp R3, R10
- bgt Loop1
-
-L_Finished:
- dsb
- ldmfd SP!, {r4-r12, lr}
- bx LR
-
-ASM_FUNC(ArmDataMemoryBarrier)
- dmb
- bx LR
-
-ASM_FUNC(ArmDataSynchronizationBarrier)
- dsb
- bx LR
-
-ASM_FUNC(ArmInstructionSynchronizationBarrier)
- isb
- bx LR
-
-ASM_FUNC(ArmReadVBar)
- # Set the Address of the Vector Table in the VBAR register
- mrc p15, 0, r0, c12, c0, 0
- bx lr
-
-ASM_FUNC(ArmWriteVBar)
- # Set the Address of the Vector Table in the VBAR register
- mcr p15, 0, r0, c12, c0, 0
- # Ensure the SCTLR.V bit is clear
- mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
- bic r0, r0, #0x00002000 @ clear V bit
- mcr p15, 0, r0, c1, c0, 0 @ Write R0 into SCTLR (Write control register configuration data)
- isb
- bx lr
-
-ASM_FUNC(ArmEnableVFP)
- # Read CPACR (Coprocessor Access Control Register)
- mrc p15, 0, r0, c1, c0, 2
- # Enable VPF access (Full Access to CP10, CP11) (V* instructions)
- orr r0, r0, #0x00f00000
- # Write back CPACR (Coprocessor Access Control Register)
- mcr p15, 0, r0, c1, c0, 2
- isb
- # Set EN bit in FPEXC. The Advanced SIMD and VFP extensions are enabled and operate normally.
- mov r0, #0x40000000
-#ifndef __clang__
- mcr p10,#0x7,r0,c8,c0,#0
-#else
- vmsr fpexc, r0
-#endif
- bx lr
-
-ASM_FUNC(ArmCallWFI)
- wfi
- bx lr
-
-#Note: Return 0 in Uniprocessor implementation
-ASM_FUNC(ArmReadCbar)
- mrc p15, 4, r0, c15, c0, 0 @ Read Configuration Base Address Register
- bx lr
-
-ASM_FUNC(ArmReadMpidr)
- mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
- bx lr
-
-ASM_FUNC(ArmReadTpidrurw)
- mrc p15, 0, r0, c13, c0, 2 @ read TPIDRURW
- bx lr
-
-ASM_FUNC(ArmWriteTpidrurw)
- mcr p15, 0, r0, c13, c0, 2 @ write TPIDRURW
- bx lr
-
-ASM_FUNC(ArmIsArchTimerImplemented)
- mrc p15, 0, r0, c0, c1, 1 @ Read ID_PFR1
- and r0, r0, #0x000F0000
- bx lr
-
-ASM_FUNC(ArmReadIdPfr1)
- mrc p15, 0, r0, c0, c1, 1 @ Read ID_PFR1 Register
- bx lr
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Support.asm b/ArmPkg/Library/ArmLib/Arm/ArmV7Support.asm deleted file mode 100644 index 342d8970dc..0000000000 --- a/ArmPkg/Library/ArmLib/Arm/ArmV7Support.asm +++ /dev/null @@ -1,298 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-// Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
- INCLUDE AsmMacroExport.inc
- PRESERVE8
-
-DC_ON EQU ( 0x1:SHL:2 )
-IC_ON EQU ( 0x1:SHL:12 )
-CTRL_M_BIT EQU (1 << 0)
-CTRL_C_BIT EQU (1 << 2)
-CTRL_B_BIT EQU (1 << 7)
-CTRL_I_BIT EQU (1 << 12)
-
-
- RVCT_ASM_EXPORT ArmInvalidateDataCacheEntryByMVA
- mcr p15, 0, r0, c7, c6, 1 ; invalidate single data cache line
- bx lr
-
- RVCT_ASM_EXPORT ArmCleanDataCacheEntryByMVA
- mcr p15, 0, r0, c7, c10, 1 ; clean single data cache line
- bx lr
-
-
- RVCT_ASM_EXPORT ArmInvalidateInstructionCacheEntryToPoUByMVA
- mcr p15, 0, r0, c7, c5, 1 ; invalidate single instruction cache line to PoU
- mcr p15, 0, r0, c7, c5, 7 ; invalidate branch predictor
- bx lr
-
-
- RVCT_ASM_EXPORT ArmCleanDataCacheEntryToPoUByMVA
- mcr p15, 0, r0, c7, c11, 1 ; clean single data cache line to PoU
- bx lr
-
-
- RVCT_ASM_EXPORT ArmCleanInvalidateDataCacheEntryByMVA
- mcr p15, 0, r0, c7, c14, 1 ; clean and invalidate single data cache line
- bx lr
-
-
- RVCT_ASM_EXPORT ArmInvalidateDataCacheEntryBySetWay
- mcr p15, 0, r0, c7, c6, 2 ; Invalidate this line
- bx lr
-
-
- RVCT_ASM_EXPORT ArmCleanInvalidateDataCacheEntryBySetWay
- mcr p15, 0, r0, c7, c14, 2 ; Clean and Invalidate this line
- bx lr
-
-
- RVCT_ASM_EXPORT ArmCleanDataCacheEntryBySetWay
- mcr p15, 0, r0, c7, c10, 2 ; Clean this line
- bx lr
-
-
- RVCT_ASM_EXPORT ArmInvalidateInstructionCache
- mcr p15,0,R0,c7,c5,0 ;Invalidate entire instruction cache
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmEnableMmu
- mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
- orr R0,R0,#1 ; Set SCTLR.M bit : Enable MMU
- mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
- dsb
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmDisableMmu
- mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
- bic R0,R0,#1 ; Clear SCTLR.M bit : Disable MMU
- mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
-
- mcr p15,0,R0,c8,c7,0 ; TLBIALL : Invalidate unified TLB
- mcr p15,0,R0,c7,c5,6 ; BPIALL : Invalidate entire branch predictor array
- dsb
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmDisableCachesAndMmu
- mrc p15, 0, r0, c1, c0, 0 ; Get control register
- bic r0, r0, #CTRL_M_BIT ; Disable MMU
- bic r0, r0, #CTRL_C_BIT ; Disable D Cache
- bic r0, r0, #CTRL_I_BIT ; Disable I Cache
- mcr p15, 0, r0, c1, c0, 0 ; Write control register
- dsb
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmMmuEnabled
- mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
- and R0,R0,#1
- bx LR
-
- RVCT_ASM_EXPORT ArmEnableDataCache
- ldr R1,=DC_ON ; Specify SCTLR.C bit : (Data) Cache enable bit
- mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
- orr R0,R0,R1 ; Set SCTLR.C bit : Data and unified caches enabled
- mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
- dsb
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmDisableDataCache
- ldr R1,=DC_ON ; Specify SCTLR.C bit : (Data) Cache enable bit
- mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
- bic R0,R0,R1 ; Clear SCTLR.C bit : Data and unified caches disabled
- mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
- dsb
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmEnableInstructionCache
- ldr R1,=IC_ON ; Specify SCTLR.I bit : Instruction cache enable bit
- mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
- orr R0,R0,R1 ; Set SCTLR.I bit : Instruction caches enabled
- mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
- dsb
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmDisableInstructionCache
- ldr R1,=IC_ON ; Specify SCTLR.I bit : Instruction cache enable bit
- mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
- BIC R0,R0,R1 ; Clear SCTLR.I bit : Instruction caches disabled
- mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmEnableSWPInstruction
- mrc p15, 0, r0, c1, c0, 0
- orr r0, r0, #0x00000400
- mcr p15, 0, r0, c1, c0, 0
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmEnableBranchPrediction
- mrc p15, 0, r0, c1, c0, 0 ; Read SCTLR into R0 (Read control register configuration data)
- orr r0, r0, #0x00000800 ;
- mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)
- dsb
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmDisableBranchPrediction
- mrc p15, 0, r0, c1, c0, 0 ; Read SCTLR into R0 (Read control register configuration data)
- bic r0, r0, #0x00000800 ;
- mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)
- dsb
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmSetLowVectors
- mrc p15, 0, r0, c1, c0, 0 ; Read SCTLR into R0 (Read control register configuration data)
- bic r0, r0, #0x00002000 ; clear V bit
- mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmSetHighVectors
- mrc p15, 0, r0, c1, c0, 0 ; Read SCTLR into R0 (Read control register configuration data)
- orr r0, r0, #0x00002000 ; Set V bit
- mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmV7AllDataCachesOperation
- stmfd SP!,{r4-r12, LR}
- mov R1, R0 ; Save Function call in R1
- mrc p15, 1, R6, c0, c0, 1 ; Read CLIDR
- ands R3, R6, #&7000000 ; Mask out all but Level of Coherency (LoC)
- mov R3, R3, LSR #23 ; Cache level value (naturally aligned)
- beq Finished
- mov R10, #0
-
-Loop1
- add R2, R10, R10, LSR #1 ; Work out 3xcachelevel
- mov R12, R6, LSR R2 ; bottom 3 bits are the Cache type for this level
- and R12, R12, #7 ; get those 3 bits alone
- cmp R12, #2
- blt Skip ; no cache or only instruction cache at this level
- mcr p15, 2, R10, c0, c0, 0 ; write the Cache Size selection register (CSSELR) // OR in 1 for Instruction
- isb ; isb to sync the change to the CacheSizeID reg
- mrc p15, 1, R12, c0, c0, 0 ; reads current Cache Size ID register (CCSIDR)
- and R2, R12, #&7 ; extract the line length field
- add R2, R2, #4 ; add 4 for the line length offset (log2 16 bytes)
- ldr R4, =0x3FF
- ands R4, R4, R12, LSR #3 ; R4 is the max number on the way size (right aligned)
- clz R5, R4 ; R5 is the bit position of the way size increment
- ldr R7, =0x00007FFF
- ands R7, R7, R12, LSR #13 ; R7 is the max number of the index size (right aligned)
-
-Loop2
- mov R9, R4 ; R9 working copy of the max way size (right aligned)
-
-Loop3
- orr R0, R10, R9, LSL R5 ; factor in the way number and cache number into R11
- orr R0, R0, R7, LSL R2 ; factor in the index number
-
- blx R1
-
- subs R9, R9, #1 ; decrement the way number
- bge Loop3
- subs R7, R7, #1 ; decrement the index
- bge Loop2
-Skip
- add R10, R10, #2 ; increment the cache number
- cmp R3, R10
- bgt Loop1
-
-Finished
- dsb
- ldmfd SP!, {r4-r12, lr}
- bx LR
-
- RVCT_ASM_EXPORT ArmDataMemoryBarrier
- dmb
- bx LR
-
- RVCT_ASM_EXPORT ArmDataSynchronizationBarrier
- dsb
- bx LR
-
- RVCT_ASM_EXPORT ArmInstructionSynchronizationBarrier
- isb
- bx LR
-
- RVCT_ASM_EXPORT ArmReadVBar
- // Set the Address of the Vector Table in the VBAR register
- mrc p15, 0, r0, c12, c0, 0
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteVBar
- // Set the Address of the Vector Table in the VBAR register
- mcr p15, 0, r0, c12, c0, 0
- // Ensure the SCTLR.V bit is clear
- mrc p15, 0, r0, c1, c0, 0 ; Read SCTLR into R0 (Read control register configuration data)
- bic r0, r0, #0x00002000 ; clear V bit
- mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)
- isb
- bx lr
-
- RVCT_ASM_EXPORT ArmEnableVFP
- // Read CPACR (Coprocessor Access Control Register)
- mrc p15, 0, r0, c1, c0, 2
- // Enable VPF access (Full Access to CP10, CP11) (V* instructions)
- orr r0, r0, #0x00f00000
- // Write back CPACR (Coprocessor Access Control Register)
- mcr p15, 0, r0, c1, c0, 2
- isb
- // Set EN bit in FPEXC. The Advanced SIMD and VFP extensions are enabled and operate normally.
- mov r0, #0x40000000
- mcr p10,#0x7,r0,c8,c0,#0
- bx lr
-
- RVCT_ASM_EXPORT ArmCallWFI
- wfi
- bx lr
-
-//Note: Return 0 in Uniprocessor implementation
- RVCT_ASM_EXPORT ArmReadCbar
- mrc p15, 4, r0, c15, c0, 0 //Read Configuration Base Address Register
- bx lr
-
- RVCT_ASM_EXPORT ArmReadMpidr
- mrc p15, 0, r0, c0, c0, 5 ; read MPIDR
- bx lr
-
- RVCT_ASM_EXPORT ArmReadTpidrurw
- mrc p15, 0, r0, c13, c0, 2 ; read TPIDRURW
- bx lr
-
- RVCT_ASM_EXPORT ArmWriteTpidrurw
- mcr p15, 0, r0, c13, c0, 2 ; write TPIDRURW
- bx lr
-
- RVCT_ASM_EXPORT ArmIsArchTimerImplemented
- mrc p15, 0, r0, c0, c1, 1 ; Read ID_PFR1
- and r0, r0, #0x000F0000
- bx lr
-
- RVCT_ASM_EXPORT ArmReadIdPfr1
- mrc p15, 0, r0, c0, c1, 1 ; Read ID_PFR1 Register
- bx lr
-
- END
diff --git a/ArmPkg/Library/ArmLib/ArmBaseLib.inf b/ArmPkg/Library/ArmLib/ArmBaseLib.inf deleted file mode 100644 index 79e17be6d4..0000000000 --- a/ArmPkg/Library/ArmLib/ArmBaseLib.inf +++ /dev/null @@ -1,57 +0,0 @@ -#/** @file
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-# Portions copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
-# Copyright (c) 2016, Linaro Ltd. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmBaseLib
- FILE_GUID = f1d943b6-99c5-46d5-af5a-66ec67662700
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmLib
-
-[Sources]
- ArmLib.c
-
-[Sources.ARM]
- Arm/ArmV7Lib.c
-
- Arm/ArmLibSupport.S | GCC
- Arm/ArmLibSupportV7.S | GCC
- Arm/ArmV7Support.S | GCC
- Arm/ArmV7ArchTimerSupport.S | GCC
-
- Arm/ArmLibSupport.asm | RVCT
- Arm/ArmLibSupportV7.asm | RVCT
- Arm/ArmV7Support.asm | RVCT
- Arm/ArmV7ArchTimerSupport.asm | RVCT
-
-[Sources.AARCH64]
- AArch64/AArch64Lib.c
-
- AArch64/ArmLibSupport.S
- AArch64/ArmLibSupportV8.S
- AArch64/AArch64Support.S
- AArch64/AArch64ArchTimerSupport.S
-
-[Packages]
- ArmPkg/ArmPkg.dec
- MdePkg/MdePkg.dec
-
-[Protocols]
- gEfiCpuArchProtocolGuid
-
-[FeaturePcd.ARM]
- gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride
diff --git a/ArmPkg/Library/ArmLib/ArmLib.c b/ArmPkg/Library/ArmLib/ArmLib.c deleted file mode 100644 index 7e227936fa..0000000000 --- a/ArmPkg/Library/ArmLib/ArmLib.c +++ /dev/null @@ -1,107 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-
-#include <Library/ArmLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include "ArmLibPrivate.h"
-
-VOID
-EFIAPI
-ArmSetAuxCrBit (
- IN UINT32 Bits
- )
-{
- UINT32 val = ArmReadAuxCr();
- val |= Bits;
- ArmWriteAuxCr(val);
-}
-
-VOID
-EFIAPI
-ArmUnsetAuxCrBit (
- IN UINT32 Bits
- )
-{
- UINT32 val = ArmReadAuxCr();
- val &= ~Bits;
- ArmWriteAuxCr(val);
-}
-
-//
-// Helper functions for accessing CPUACTLR
-//
-
-VOID
-EFIAPI
-ArmSetCpuActlrBit (
- IN UINTN Bits
- )
-{
- UINTN Value;
- Value = ArmReadCpuActlr ();
- Value |= Bits;
- ArmWriteCpuActlr (Value);
-}
-
-VOID
-EFIAPI
-ArmUnsetCpuActlrBit (
- IN UINTN Bits
- )
-{
- UINTN Value;
- Value = ArmReadCpuActlr ();
- Value &= ~Bits;
- ArmWriteCpuActlr (Value);
-}
-
-UINTN
-EFIAPI
-ArmDataCacheLineLength (
- VOID
- )
-{
- return 4 << ((ArmCacheInfo () >> 16) & 0xf); // CTR_EL0.DminLine
-}
-
-UINTN
-EFIAPI
-ArmInstructionCacheLineLength (
- VOID
- )
-{
- return 4 << (ArmCacheInfo () & 0xf); // CTR_EL0.IminLine
-}
-
-UINTN
-EFIAPI
-ArmCacheWritebackGranule (
- VOID
- )
-{
- UINTN CWG;
-
- CWG = (ArmCacheInfo () >> 24) & 0xf; // CTR_EL0.CWG
-
- if (CWG == 0) {
- return SIZE_2KB;
- }
-
- return 4 << CWG;
-}
diff --git a/ArmPkg/Library/ArmLib/ArmLibPrivate.h b/ArmPkg/Library/ArmLib/ArmLibPrivate.h deleted file mode 100644 index fdd5a26ba0..0000000000 --- a/ArmPkg/Library/ArmLib/ArmLibPrivate.h +++ /dev/null @@ -1,80 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __ARM_LIB_PRIVATE_H__
-#define __ARM_LIB_PRIVATE_H__
-
-#define CACHE_SIZE_4_KB (3UL)
-#define CACHE_SIZE_8_KB (4UL)
-#define CACHE_SIZE_16_KB (5UL)
-#define CACHE_SIZE_32_KB (6UL)
-#define CACHE_SIZE_64_KB (7UL)
-#define CACHE_SIZE_128_KB (8UL)
-
-#define CACHE_ASSOCIATIVITY_DIRECT (0UL)
-#define CACHE_ASSOCIATIVITY_4_WAY (2UL)
-#define CACHE_ASSOCIATIVITY_8_WAY (3UL)
-
-#define CACHE_PRESENT (0UL)
-#define CACHE_NOT_PRESENT (1UL)
-
-#define CACHE_LINE_LENGTH_32_BYTES (2UL)
-
-#define SIZE_FIELD_TO_CACHE_SIZE(x) (((x) >> 6) & 0x0F)
-#define SIZE_FIELD_TO_CACHE_ASSOCIATIVITY(x) (((x) >> 3) & 0x07)
-#define SIZE_FIELD_TO_CACHE_PRESENCE(x) (((x) >> 2) & 0x01)
-#define SIZE_FIELD_TO_CACHE_LINE_LENGTH(x) (((x) >> 0) & 0x03)
-
-#define DATA_CACHE_SIZE_FIELD(x) (((x) >> 12) & 0x0FFF)
-#define INSTRUCTION_CACHE_SIZE_FIELD(x) (((x) >> 0) & 0x0FFF)
-
-#define DATA_CACHE_SIZE(x) (SIZE_FIELD_TO_CACHE_SIZE(DATA_CACHE_SIZE_FIELD(x)))
-#define DATA_CACHE_ASSOCIATIVITY(x) (SIZE_FIELD_TO_CACHE_ASSOCIATIVITY(DATA_CACHE_SIZE_FIELD(x)))
-#define DATA_CACHE_PRESENT(x) (SIZE_FIELD_TO_CACHE_PRESENCE(DATA_CACHE_SIZE_FIELD(x)))
-#define DATA_CACHE_LINE_LENGTH(x) (SIZE_FIELD_TO_CACHE_LINE_LENGTH(DATA_CACHE_SIZE_FIELD(x)))
-
-#define INSTRUCTION_CACHE_SIZE(x) (SIZE_FIELD_TO_CACHE_SIZE(INSTRUCTION_CACHE_SIZE_FIELD(x)))
-#define INSTRUCTION_CACHE_ASSOCIATIVITY(x) (SIZE_FIELD_TO_CACHE_ASSOCIATIVITY(INSTRUCTION_CACHE_SIZE_FIELD(x)))
-#define INSTRUCTION_CACHE_PRESENT(x) (SIZE_FIELD_TO_CACHE_PRESENCE(INSTRUCTION_CACHE_SIZE_FIELD(x)))
-#define INSTRUCTION_CACHE_LINE_LENGTH(x) (SIZE_FIELD_TO_CACHE_LINE_LENGTH(INSTRUCTION_CACHE_SIZE_FIELD(x)))
-
-#define CACHE_TYPE(x) (((x) >> 25) & 0x0F)
-#define CACHE_TYPE_WRITE_BACK (0x0EUL)
-
-#define CACHE_ARCHITECTURE(x) (((x) >> 24) & 0x01)
-#define CACHE_ARCHITECTURE_UNIFIED (0UL)
-#define CACHE_ARCHITECTURE_SEPARATE (1UL)
-
-VOID
-CPSRMaskInsert (
- IN UINT32 Mask,
- IN UINT32 Value
- );
-
-UINT32
-CPSRRead (
- VOID
- );
-
-UINT32
-ReadCCSIDR (
- IN UINT32 CSSELR
- );
-
-UINT32
-ReadCLIDR (
- VOID
- );
-
-#endif // __ARM_LIB_PRIVATE_H__
diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c deleted file mode 100644 index 8bd1c6fad9..0000000000 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c +++ /dev/null @@ -1,764 +0,0 @@ -/** @file
-* File managing the MMU for ARMv8 architecture
-*
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-* Copyright (c) 2016, Linaro Limited. All rights reserved.
-* Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Uefi.h>
-#include <Chipset/AArch64.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/CacheMaintenanceLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/ArmLib.h>
-#include <Library/ArmMmuLib.h>
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-
-// We use this index definition to define an invalid block entry
-#define TT_ATTR_INDX_INVALID ((UINT32)~0)
-
-STATIC
-UINT64
-ArmMemoryAttributeToPageAttribute (
- IN ARM_MEMORY_REGION_ATTRIBUTES Attributes
- )
-{
- switch (Attributes) {
- case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK:
- case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:
- return TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;
-
- case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
- case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:
- return TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;
-
- // Uncached and device mappings are treated as outer shareable by default,
- case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED:
- case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED:
- return TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
-
- default:
- ASSERT(0);
- case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:
- case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:
- if (ArmReadCurrentEL () == AARCH64_EL2)
- return TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;
- else
- return TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
- }
-}
-
-UINT64
-PageAttributeToGcdAttribute (
- IN UINT64 PageAttributes
- )
-{
- UINT64 GcdAttributes;
-
- switch (PageAttributes & TT_ATTR_INDX_MASK) {
- case TT_ATTR_INDX_DEVICE_MEMORY:
- GcdAttributes = EFI_MEMORY_UC;
- break;
- case TT_ATTR_INDX_MEMORY_NON_CACHEABLE:
- GcdAttributes = EFI_MEMORY_WC;
- break;
- case TT_ATTR_INDX_MEMORY_WRITE_THROUGH:
- GcdAttributes = EFI_MEMORY_WT;
- break;
- case TT_ATTR_INDX_MEMORY_WRITE_BACK:
- GcdAttributes = EFI_MEMORY_WB;
- break;
- default:
- DEBUG ((EFI_D_ERROR, "PageAttributeToGcdAttribute: PageAttributes:0x%lX not supported.\n", PageAttributes));
- ASSERT (0);
- // The Global Coherency Domain (GCD) value is defined as a bit set.
- // Returning 0 means no attribute has been set.
- GcdAttributes = 0;
- }
-
- // Determine protection attributes
- if (((PageAttributes & TT_AP_MASK) == TT_AP_NO_RO) || ((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO)) {
- // Read only cases map to write-protect
- GcdAttributes |= EFI_MEMORY_RO;
- }
-
- // Process eXecute Never attribute
- if ((PageAttributes & (TT_PXN_MASK | TT_UXN_MASK)) != 0 ) {
- GcdAttributes |= EFI_MEMORY_XP;
- }
-
- return GcdAttributes;
-}
-
-#define MIN_T0SZ 16
-#define BITS_PER_LEVEL 9
-
-VOID
-GetRootTranslationTableInfo (
- IN UINTN T0SZ,
- OUT UINTN *TableLevel,
- OUT UINTN *TableEntryCount
- )
-{
- // Get the level of the root table
- if (TableLevel) {
- *TableLevel = (T0SZ - MIN_T0SZ) / BITS_PER_LEVEL;
- }
-
- if (TableEntryCount) {
- *TableEntryCount = 1UL << (BITS_PER_LEVEL - (T0SZ - MIN_T0SZ) % BITS_PER_LEVEL);
- }
-}
-
-STATIC
-VOID
-ReplaceLiveEntry (
- IN UINT64 *Entry,
- IN UINT64 Value
- )
-{
- if (!ArmMmuEnabled ()) {
- *Entry = Value;
- } else {
- ArmReplaceLiveTranslationEntry (Entry, Value);
- }
-}
-
-STATIC
-VOID
-LookupAddresstoRootTable (
- IN UINT64 MaxAddress,
- OUT UINTN *T0SZ,
- OUT UINTN *TableEntryCount
- )
-{
- UINTN TopBit;
-
- // Check the parameters are not NULL
- ASSERT ((T0SZ != NULL) && (TableEntryCount != NULL));
-
- // Look for the highest bit set in MaxAddress
- for (TopBit = 63; TopBit != 0; TopBit--) {
- if ((1ULL << TopBit) & MaxAddress) {
- // MaxAddress top bit is found
- TopBit = TopBit + 1;
- break;
- }
- }
- ASSERT (TopBit != 0);
-
- // Calculate T0SZ from the top bit of the MaxAddress
- *T0SZ = 64 - TopBit;
-
- // Get the Table info from T0SZ
- GetRootTranslationTableInfo (*T0SZ, NULL, TableEntryCount);
-}
-
-STATIC
-UINT64*
-GetBlockEntryListFromAddress (
- IN UINT64 *RootTable,
- IN UINT64 RegionStart,
- OUT UINTN *TableLevel,
- IN OUT UINT64 *BlockEntrySize,
- OUT UINT64 **LastBlockEntry
- )
-{
- UINTN RootTableLevel;
- UINTN RootTableEntryCount;
- UINT64 *TranslationTable;
- UINT64 *BlockEntry;
- UINT64 *SubTableBlockEntry;
- UINT64 BlockEntryAddress;
- UINTN BaseAddressAlignment;
- UINTN PageLevel;
- UINTN Index;
- UINTN IndexLevel;
- UINTN T0SZ;
- UINT64 Attributes;
- UINT64 TableAttributes;
-
- // Initialize variable
- BlockEntry = NULL;
-
- // Ensure the parameters are valid
- if (!(TableLevel && BlockEntrySize && LastBlockEntry)) {
- ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER);
- return NULL;
- }
-
- // Ensure the Region is aligned on 4KB boundary
- if ((RegionStart & (SIZE_4KB - 1)) != 0) {
- ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER);
- return NULL;
- }
-
- // Ensure the required size is aligned on 4KB boundary and not 0
- if ((*BlockEntrySize & (SIZE_4KB - 1)) != 0 || *BlockEntrySize == 0) {
- ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER);
- return NULL;
- }
-
- T0SZ = ArmGetTCR () & TCR_T0SZ_MASK;
- // Get the Table info from T0SZ
- GetRootTranslationTableInfo (T0SZ, &RootTableLevel, &RootTableEntryCount);
-
- // If the start address is 0x0 then we use the size of the region to identify the alignment
- if (RegionStart == 0) {
- // Identify the highest possible alignment for the Region Size
- BaseAddressAlignment = LowBitSet64 (*BlockEntrySize);
- } else {
- // Identify the highest possible alignment for the Base Address
- BaseAddressAlignment = LowBitSet64 (RegionStart);
- }
-
- // Identify the Page Level the RegionStart must belong to. Note that PageLevel
- // should be at least 1 since block translations are not supported at level 0
- PageLevel = MAX (3 - ((BaseAddressAlignment - 12) / 9), 1);
-
- // If the required size is smaller than the current block size then we need to go to the page below.
- // The PageLevel was calculated on the Base Address alignment but did not take in account the alignment
- // of the allocation size
- while (*BlockEntrySize < TT_BLOCK_ENTRY_SIZE_AT_LEVEL (PageLevel)) {
- // It does not fit so we need to go a page level above
- PageLevel++;
- }
-
- //
- // Get the Table Descriptor for the corresponding PageLevel. We need to decompose RegionStart to get appropriate entries
- //
-
- TranslationTable = RootTable;
- for (IndexLevel = RootTableLevel; IndexLevel <= PageLevel; IndexLevel++) {
- BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, IndexLevel, RegionStart);
-
- if ((IndexLevel != 3) && ((*BlockEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY)) {
- // Go to the next table
- TranslationTable = (UINT64*)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);
-
- // If we are at the last level then update the last level to next level
- if (IndexLevel == PageLevel) {
- // Enter the next level
- PageLevel++;
- }
- } else if ((*BlockEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) {
- // If we are not at the last level then we need to split this BlockEntry
- if (IndexLevel != PageLevel) {
- // Retrieve the attributes from the block entry
- Attributes = *BlockEntry & TT_ATTRIBUTES_MASK;
-
- // Convert the block entry attributes into Table descriptor attributes
- TableAttributes = TT_TABLE_AP_NO_PERMISSION;
- if (Attributes & TT_NS) {
- TableAttributes = TT_TABLE_NS;
- }
-
- // Get the address corresponding at this entry
- BlockEntryAddress = RegionStart;
- BlockEntryAddress = BlockEntryAddress >> TT_ADDRESS_OFFSET_AT_LEVEL(IndexLevel);
- // Shift back to right to set zero before the effective address
- BlockEntryAddress = BlockEntryAddress << TT_ADDRESS_OFFSET_AT_LEVEL(IndexLevel);
-
- // Set the correct entry type for the next page level
- if ((IndexLevel + 1) == 3) {
- Attributes |= TT_TYPE_BLOCK_ENTRY_LEVEL3;
- } else {
- Attributes |= TT_TYPE_BLOCK_ENTRY;
- }
-
- // Create a new translation table
- TranslationTable = AllocatePages (1);
- if (TranslationTable == NULL) {
- return NULL;
- }
-
- // Populate the newly created lower level table
- SubTableBlockEntry = TranslationTable;
- for (Index = 0; Index < TT_ENTRY_COUNT; Index++) {
- *SubTableBlockEntry = Attributes | (BlockEntryAddress + (Index << TT_ADDRESS_OFFSET_AT_LEVEL(IndexLevel + 1)));
- SubTableBlockEntry++;
- }
-
- // Fill the BlockEntry with the new TranslationTable
- ReplaceLiveEntry (BlockEntry,
- ((UINTN)TranslationTable & TT_ADDRESS_MASK_DESCRIPTION_TABLE) | TableAttributes | TT_TYPE_TABLE_ENTRY);
- }
- } else {
- if (IndexLevel != PageLevel) {
- //
- // Case when we have an Invalid Entry and we are at a page level above of the one targetted.
- //
-
- // Create a new translation table
- TranslationTable = AllocatePages (1);
- if (TranslationTable == NULL) {
- return NULL;
- }
-
- ZeroMem (TranslationTable, TT_ENTRY_COUNT * sizeof(UINT64));
-
- // Fill the new BlockEntry with the TranslationTable
- *BlockEntry = ((UINTN)TranslationTable & TT_ADDRESS_MASK_DESCRIPTION_TABLE) | TT_TYPE_TABLE_ENTRY;
- }
- }
- }
-
- // Expose the found PageLevel to the caller
- *TableLevel = PageLevel;
-
- // Now, we have the Table Level we can get the Block Size associated to this table
- *BlockEntrySize = TT_BLOCK_ENTRY_SIZE_AT_LEVEL (PageLevel);
-
- // The last block of the root table depends on the number of entry in this table,
- // otherwise it is always the (TT_ENTRY_COUNT - 1)th entry in the table.
- *LastBlockEntry = TT_LAST_BLOCK_ADDRESS(TranslationTable,
- (PageLevel == RootTableLevel) ? RootTableEntryCount : TT_ENTRY_COUNT);
-
- return BlockEntry;
-}
-
-STATIC
-EFI_STATUS
-UpdateRegionMapping (
- IN UINT64 *RootTable,
- IN UINT64 RegionStart,
- IN UINT64 RegionLength,
- IN UINT64 Attributes,
- IN UINT64 BlockEntryMask
- )
-{
- UINT32 Type;
- UINT64 *BlockEntry;
- UINT64 *LastBlockEntry;
- UINT64 BlockEntrySize;
- UINTN TableLevel;
-
- // Ensure the Length is aligned on 4KB boundary
- if ((RegionLength == 0) || ((RegionLength & (SIZE_4KB - 1)) != 0)) {
- ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER);
- return EFI_INVALID_PARAMETER;
- }
-
- do {
- // Get the first Block Entry that matches the Virtual Address and also the information on the Table Descriptor
- // such as the the size of the Block Entry and the address of the last BlockEntry of the Table Descriptor
- BlockEntrySize = RegionLength;
- BlockEntry = GetBlockEntryListFromAddress (RootTable, RegionStart, &TableLevel, &BlockEntrySize, &LastBlockEntry);
- if (BlockEntry == NULL) {
- // GetBlockEntryListFromAddress() return NULL when it fails to allocate new pages from the Translation Tables
- return EFI_OUT_OF_RESOURCES;
- }
-
- if (TableLevel != 3) {
- Type = TT_TYPE_BLOCK_ENTRY;
- } else {
- Type = TT_TYPE_BLOCK_ENTRY_LEVEL3;
- }
-
- do {
- // Fill the Block Entry with attribute and output block address
- *BlockEntry &= BlockEntryMask;
- *BlockEntry |= (RegionStart & TT_ADDRESS_MASK_BLOCK_ENTRY) | Attributes | Type;
-
- // Go to the next BlockEntry
- RegionStart += BlockEntrySize;
- RegionLength -= BlockEntrySize;
- BlockEntry++;
-
- // Break the inner loop when next block is a table
- // Rerun GetBlockEntryListFromAddress to avoid page table memory leak
- if (TableLevel != 3 &&
- (*BlockEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {
- break;
- }
- } while ((RegionLength >= BlockEntrySize) && (BlockEntry <= LastBlockEntry));
- } while (RegionLength != 0);
-
- return EFI_SUCCESS;
-}
-
-STATIC
-EFI_STATUS
-FillTranslationTable (
- IN UINT64 *RootTable,
- IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryRegion
- )
-{
- return UpdateRegionMapping (
- RootTable,
- MemoryRegion->VirtualBase,
- MemoryRegion->Length,
- ArmMemoryAttributeToPageAttribute (MemoryRegion->Attributes) | TT_AF,
- 0
- );
-}
-
-STATIC
-UINT64
-GcdAttributeToPageAttribute (
- IN UINT64 GcdAttributes
- )
-{
- UINT64 PageAttributes;
-
- switch (GcdAttributes & EFI_MEMORY_CACHETYPE_MASK) {
- case EFI_MEMORY_UC:
- PageAttributes = TT_ATTR_INDX_DEVICE_MEMORY;
- break;
- case EFI_MEMORY_WC:
- PageAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
- break;
- case EFI_MEMORY_WT:
- PageAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;
- break;
- case EFI_MEMORY_WB:
- PageAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;
- break;
- default:
- PageAttributes = TT_ATTR_INDX_MASK;
- break;
- }
-
- if ((GcdAttributes & EFI_MEMORY_XP) != 0 ||
- (GcdAttributes & EFI_MEMORY_CACHETYPE_MASK) == EFI_MEMORY_UC) {
- if (ArmReadCurrentEL () == AARCH64_EL2) {
- PageAttributes |= TT_XN_MASK;
- } else {
- PageAttributes |= TT_UXN_MASK | TT_PXN_MASK;
- }
- }
-
- if ((GcdAttributes & EFI_MEMORY_RO) != 0) {
- PageAttributes |= TT_AP_RO_RO;
- }
-
- return PageAttributes | TT_AF;
-}
-
-EFI_STATUS
-ArmSetMemoryAttributes (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN UINT64 Attributes
- )
-{
- EFI_STATUS Status;
- UINT64 *TranslationTable;
- UINT64 PageAttributes;
- UINT64 PageAttributeMask;
-
- PageAttributes = GcdAttributeToPageAttribute (Attributes);
- PageAttributeMask = 0;
-
- if ((Attributes & EFI_MEMORY_CACHETYPE_MASK) == 0) {
- //
- // No memory type was set in Attributes, so we are going to update the
- // permissions only.
- //
- PageAttributes &= TT_AP_MASK | TT_UXN_MASK | TT_PXN_MASK;
- PageAttributeMask = ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK |
- TT_PXN_MASK | TT_XN_MASK);
- }
-
- TranslationTable = ArmGetTTBR0BaseAddress ();
-
- Status = UpdateRegionMapping (
- TranslationTable,
- BaseAddress,
- Length,
- PageAttributes,
- PageAttributeMask);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- // Invalidate all TLB entries so changes are synced
- ArmInvalidateTlb ();
-
- return EFI_SUCCESS;
-}
-
-STATIC
-EFI_STATUS
-SetMemoryRegionAttribute (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN UINT64 Attributes,
- IN UINT64 BlockEntryMask
- )
-{
- EFI_STATUS Status;
- UINT64 *RootTable;
-
- RootTable = ArmGetTTBR0BaseAddress ();
-
- Status = UpdateRegionMapping (RootTable, BaseAddress, Length, Attributes, BlockEntryMask);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- // Invalidate all TLB entries so changes are synced
- ArmInvalidateTlb ();
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-ArmSetMemoryRegionNoExec (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length
- )
-{
- UINT64 Val;
-
- if (ArmReadCurrentEL () == AARCH64_EL1) {
- Val = TT_PXN_MASK | TT_UXN_MASK;
- } else {
- Val = TT_XN_MASK;
- }
-
- return SetMemoryRegionAttribute (
- BaseAddress,
- Length,
- Val,
- ~TT_ADDRESS_MASK_BLOCK_ENTRY);
-}
-
-EFI_STATUS
-ArmClearMemoryRegionNoExec (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length
- )
-{
- UINT64 Mask;
-
- // XN maps to UXN in the EL1&0 translation regime
- Mask = ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_PXN_MASK | TT_XN_MASK);
-
- return SetMemoryRegionAttribute (
- BaseAddress,
- Length,
- 0,
- Mask);
-}
-
-EFI_STATUS
-ArmSetMemoryRegionReadOnly (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length
- )
-{
- return SetMemoryRegionAttribute (
- BaseAddress,
- Length,
- TT_AP_RO_RO,
- ~TT_ADDRESS_MASK_BLOCK_ENTRY);
-}
-
-EFI_STATUS
-ArmClearMemoryRegionReadOnly (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length
- )
-{
- return SetMemoryRegionAttribute (
- BaseAddress,
- Length,
- TT_AP_RW_RW,
- ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK));
-}
-
-EFI_STATUS
-EFIAPI
-ArmConfigureMmu (
- IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
- OUT VOID **TranslationTableBase OPTIONAL,
- OUT UINTN *TranslationTableSize OPTIONAL
- )
-{
- VOID* TranslationTable;
- UINT32 TranslationTableAttribute;
- UINT64 MaxAddress;
- UINTN T0SZ;
- UINTN RootTableEntryCount;
- UINT64 TCR;
- EFI_STATUS Status;
-
- if(MemoryTable == NULL) {
- ASSERT (MemoryTable != NULL);
- return EFI_INVALID_PARAMETER;
- }
-
- // Cover the entire GCD memory space
- MaxAddress = (1UL << PcdGet8 (PcdPrePiCpuMemorySize)) - 1;
-
- // Lookup the Table Level to get the information
- LookupAddresstoRootTable (MaxAddress, &T0SZ, &RootTableEntryCount);
-
- //
- // Set TCR that allows us to retrieve T0SZ in the subsequent functions
- //
- // Ideally we will be running at EL2, but should support EL1 as well.
- // UEFI should not run at EL3.
- if (ArmReadCurrentEL () == AARCH64_EL2) {
- //Note: Bits 23 and 31 are reserved(RES1) bits in TCR_EL2
- TCR = T0SZ | (1UL << 31) | (1UL << 23) | TCR_TG0_4KB;
-
- // Set the Physical Address Size using MaxAddress
- if (MaxAddress < SIZE_4GB) {
- TCR |= TCR_PS_4GB;
- } else if (MaxAddress < SIZE_64GB) {
- TCR |= TCR_PS_64GB;
- } else if (MaxAddress < SIZE_1TB) {
- TCR |= TCR_PS_1TB;
- } else if (MaxAddress < SIZE_4TB) {
- TCR |= TCR_PS_4TB;
- } else if (MaxAddress < SIZE_16TB) {
- TCR |= TCR_PS_16TB;
- } else if (MaxAddress < SIZE_256TB) {
- TCR |= TCR_PS_256TB;
- } else {
- DEBUG ((EFI_D_ERROR, "ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n", MaxAddress));
- ASSERT (0); // Bigger than 48-bit memory space are not supported
- return EFI_UNSUPPORTED;
- }
- } else if (ArmReadCurrentEL () == AARCH64_EL1) {
- // Due to Cortex-A57 erratum #822227 we must set TG1[1] == 1, regardless of EPD1.
- TCR = T0SZ | TCR_TG0_4KB | TCR_TG1_4KB | TCR_EPD1;
-
- // Set the Physical Address Size using MaxAddress
- if (MaxAddress < SIZE_4GB) {
- TCR |= TCR_IPS_4GB;
- } else if (MaxAddress < SIZE_64GB) {
- TCR |= TCR_IPS_64GB;
- } else if (MaxAddress < SIZE_1TB) {
- TCR |= TCR_IPS_1TB;
- } else if (MaxAddress < SIZE_4TB) {
- TCR |= TCR_IPS_4TB;
- } else if (MaxAddress < SIZE_16TB) {
- TCR |= TCR_IPS_16TB;
- } else if (MaxAddress < SIZE_256TB) {
- TCR |= TCR_IPS_256TB;
- } else {
- DEBUG ((EFI_D_ERROR, "ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n", MaxAddress));
- ASSERT (0); // Bigger than 48-bit memory space are not supported
- return EFI_UNSUPPORTED;
- }
- } else {
- ASSERT (0); // UEFI is only expected to run at EL2 and EL1, not EL3.
- return EFI_UNSUPPORTED;
- }
-
- //
- // Translation table walks are always cache coherent on ARMv8-A, so cache
- // maintenance on page tables is never needed. Since there is a risk of
- // loss of coherency when using mismatched attributes, and given that memory
- // is mapped cacheable except for extraordinary cases (such as non-coherent
- // DMA), have the page table walker perform cached accesses as well, and
- // assert below that that matches the attributes we use for CPU accesses to
- // the region.
- //
- TCR |= TCR_SH_INNER_SHAREABLE |
- TCR_RGN_OUTER_WRITE_BACK_ALLOC |
- TCR_RGN_INNER_WRITE_BACK_ALLOC;
-
- // Set TCR
- ArmSetTCR (TCR);
-
- // Allocate pages for translation table
- TranslationTable = AllocatePages (1);
- if (TranslationTable == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
- // We set TTBR0 just after allocating the table to retrieve its location from the subsequent
- // functions without needing to pass this value across the functions. The MMU is only enabled
- // after the translation tables are populated.
- ArmSetTTBR0 (TranslationTable);
-
- if (TranslationTableBase != NULL) {
- *TranslationTableBase = TranslationTable;
- }
-
- if (TranslationTableSize != NULL) {
- *TranslationTableSize = RootTableEntryCount * sizeof(UINT64);
- }
-
- ZeroMem (TranslationTable, RootTableEntryCount * sizeof(UINT64));
-
- // Disable MMU and caches. ArmDisableMmu() also invalidates the TLBs
- ArmDisableMmu ();
- ArmDisableDataCache ();
- ArmDisableInstructionCache ();
-
- // Make sure nothing sneaked into the cache
- ArmCleanInvalidateDataCache ();
- ArmInvalidateInstructionCache ();
-
- TranslationTableAttribute = TT_ATTR_INDX_INVALID;
- while (MemoryTable->Length != 0) {
-
- DEBUG_CODE_BEGIN ();
- // Find the memory attribute for the Translation Table
- if ((UINTN)TranslationTable >= MemoryTable->PhysicalBase &&
- (UINTN)TranslationTable + EFI_PAGE_SIZE <= MemoryTable->PhysicalBase +
- MemoryTable->Length) {
- TranslationTableAttribute = MemoryTable->Attributes;
- }
- DEBUG_CODE_END ();
-
- Status = FillTranslationTable (TranslationTable, MemoryTable);
- if (EFI_ERROR (Status)) {
- goto FREE_TRANSLATION_TABLE;
- }
- MemoryTable++;
- }
-
- ASSERT (TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK ||
- TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK);
-
- ArmSetMAIR (MAIR_ATTR(TT_ATTR_INDX_DEVICE_MEMORY, MAIR_ATTR_DEVICE_MEMORY) | // mapped to EFI_MEMORY_UC
- MAIR_ATTR(TT_ATTR_INDX_MEMORY_NON_CACHEABLE, MAIR_ATTR_NORMAL_MEMORY_NON_CACHEABLE) | // mapped to EFI_MEMORY_WC
- MAIR_ATTR(TT_ATTR_INDX_MEMORY_WRITE_THROUGH, MAIR_ATTR_NORMAL_MEMORY_WRITE_THROUGH) | // mapped to EFI_MEMORY_WT
- MAIR_ATTR(TT_ATTR_INDX_MEMORY_WRITE_BACK, MAIR_ATTR_NORMAL_MEMORY_WRITE_BACK)); // mapped to EFI_MEMORY_WB
-
- ArmDisableAlignmentCheck ();
- ArmEnableStackAlignmentCheck ();
- ArmEnableInstructionCache ();
- ArmEnableDataCache ();
-
- ArmEnableMmu ();
- return EFI_SUCCESS;
-
-FREE_TRANSLATION_TABLE:
- FreePages (TranslationTable, 1);
- return Status;
-}
-
-RETURN_STATUS
-EFIAPI
-ArmMmuBaseLibConstructor (
- VOID
- )
-{
- extern UINT32 ArmReplaceLiveTranslationEntrySize;
-
- //
- // The ArmReplaceLiveTranslationEntry () helper function may be invoked
- // with the MMU off so we have to ensure that it gets cleaned to the PoC
- //
- WriteBackDataCacheRange (ArmReplaceLiveTranslationEntry,
- ArmReplaceLiveTranslationEntrySize);
-
- return RETURN_SUCCESS;
-}
diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S deleted file mode 100644 index 90192df24f..0000000000 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S +++ /dev/null @@ -1,78 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2016, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLibV8.h>
-
- .set CTRL_M_BIT, (1 << 0)
-
- .macro __replace_entry, el
-
- // disable the MMU
- mrs x8, sctlr_el\el
- bic x9, x8, #CTRL_M_BIT
- msr sctlr_el\el, x9
- isb
-
- // write updated entry
- str x1, [x0]
-
- // invalidate again to get rid of stale clean cachelines that may
- // have been filled speculatively since the last invalidate
- dmb sy
- dc ivac, x0
-
- // flush the TLBs
- .if \el == 1
- tlbi vmalle1
- .else
- tlbi alle\el
- .endif
- dsb sy
-
- // re-enable the MMU
- msr sctlr_el\el, x8
- isb
- .endm
-
-//VOID
-//ArmReplaceLiveTranslationEntry (
-// IN UINT64 *Entry,
-// IN UINT64 Value
-// )
-ASM_FUNC(ArmReplaceLiveTranslationEntry)
-
- // disable interrupts
- mrs x2, daif
- msr daifset, #0xf
- isb
-
- // clean and invalidate first so that we don't clobber
- // adjacent entries that are dirty in the caches
- dc civac, x0
- dsb ish
-
- EL1_OR_EL2_OR_EL3(x3)
-1:__replace_entry 1
- b 4f
-2:__replace_entry 2
- b 4f
-3:__replace_entry 3
-
-4:msr daif, x2
- ret
-
-ASM_GLOBAL ASM_PFX(ArmReplaceLiveTranslationEntrySize)
-
-ASM_PFX(ArmReplaceLiveTranslationEntrySize):
- .long . - ArmReplaceLiveTranslationEntry
diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c deleted file mode 100644 index d370b507a8..0000000000 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c +++ /dev/null @@ -1,61 +0,0 @@ -#/* @file
-#
-# Copyright (c) 2016, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-#include <Base.h>
-
-#include <Library/ArmLib.h>
-#include <Library/ArmMmuLib.h>
-#include <Library/CacheMaintenanceLib.h>
-#include <Library/DebugLib.h>
-
-EFI_STATUS
-EFIAPI
-ArmMmuPeiLibConstructor (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
- )
-{
- extern UINT32 ArmReplaceLiveTranslationEntrySize;
-
- EFI_FV_FILE_INFO FileInfo;
- EFI_STATUS Status;
-
- ASSERT (FileHandle != NULL);
-
- Status = (*PeiServices)->FfsGetFileInfo (FileHandle, &FileInfo);
- ASSERT_EFI_ERROR (Status);
-
- //
- // Some platforms do not cope very well with cache maintenance being
- // performed on regions backed by NOR flash. Since the firmware image
- // can be assumed to be clean to the PoC when running XIP, even when PEI
- // is executing from DRAM, we only need to perform the cache maintenance
- // when not executing in place.
- //
- if ((UINTN)FileInfo.Buffer <= (UINTN)ArmReplaceLiveTranslationEntry &&
- ((UINTN)FileInfo.Buffer + FileInfo.BufferSize >=
- (UINTN)ArmReplaceLiveTranslationEntry + ArmReplaceLiveTranslationEntrySize)) {
- DEBUG ((EFI_D_INFO, "ArmMmuLib: skipping cache maintenance on XIP PEIM\n"));
- } else {
- DEBUG ((EFI_D_INFO, "ArmMmuLib: performing cache maintenance on shadowed PEIM\n"));
- //
- // The ArmReplaceLiveTranslationEntry () helper function may be invoked
- // with the MMU off so we have to ensure that it gets cleaned to the PoC
- //
- WriteBackDataCacheRange (ArmReplaceLiveTranslationEntry,
- ArmReplaceLiveTranslationEntrySize);
- }
-
- return RETURN_SUCCESS;
-}
diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c deleted file mode 100644 index b02f6d7fc5..0000000000 --- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c +++ /dev/null @@ -1,839 +0,0 @@ -/** @file
-* File managing the MMU for ARMv7 architecture
-*
-* Copyright (c) 2011-2016, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Uefi.h>
-#include <Chipset/ArmV7.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/CacheMaintenanceLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/ArmLib.h>
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#define ID_MMFR0_SHARELVL_SHIFT 12
-#define ID_MMFR0_SHARELVL_MASK 0xf
-#define ID_MMFR0_SHARELVL_ONE 0
-#define ID_MMFR0_SHARELVL_TWO 1
-
-#define ID_MMFR0_INNERSHR_SHIFT 28
-#define ID_MMFR0_INNERSHR_MASK 0xf
-#define ID_MMFR0_OUTERSHR_SHIFT 8
-#define ID_MMFR0_OUTERSHR_MASK 0xf
-
-#define ID_MMFR0_SHR_IMP_UNCACHED 0
-#define ID_MMFR0_SHR_IMP_HW_COHERENT 1
-#define ID_MMFR0_SHR_IGNORED 0xf
-
-#define __EFI_MEMORY_RWX 0 // no restrictions
-
-#define CACHE_ATTRIBUTE_MASK (EFI_MEMORY_UC | \
- EFI_MEMORY_WC | \
- EFI_MEMORY_WT | \
- EFI_MEMORY_WB | \
- EFI_MEMORY_UCE | \
- EFI_MEMORY_WP)
-
-UINTN
-EFIAPI
-ArmReadIdMmfr0 (
- VOID
- );
-
-BOOLEAN
-EFIAPI
-ArmHasMpExtensions (
- VOID
- );
-
-UINT32
-ConvertSectionAttributesToPageAttributes (
- IN UINT32 SectionAttributes,
- IN BOOLEAN IsLargePage
- )
-{
- UINT32 PageAttributes;
-
- PageAttributes = 0;
- PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY (SectionAttributes, IsLargePage);
- PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_AP (SectionAttributes);
- PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_XN (SectionAttributes, IsLargePage);
- PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_NG (SectionAttributes);
- PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_S (SectionAttributes);
-
- return PageAttributes;
-}
-
-STATIC
-BOOLEAN
-PreferNonshareableMemory (
- VOID
- )
-{
- UINTN Mmfr;
- UINTN Val;
-
- if (FeaturePcdGet (PcdNormalMemoryNonshareableOverride)) {
- return TRUE;
- }
-
- //
- // Check whether the innermost level of shareability (the level we will use
- // by default to map normal memory) is implemented with hardware coherency
- // support. Otherwise, revert to mapping as non-shareable.
- //
- Mmfr = ArmReadIdMmfr0 ();
- switch ((Mmfr >> ID_MMFR0_SHARELVL_SHIFT) & ID_MMFR0_SHARELVL_MASK) {
- case ID_MMFR0_SHARELVL_ONE:
- // one level of shareability
- Val = (Mmfr >> ID_MMFR0_OUTERSHR_SHIFT) & ID_MMFR0_OUTERSHR_MASK;
- break;
- case ID_MMFR0_SHARELVL_TWO:
- // two levels of shareability
- Val = (Mmfr >> ID_MMFR0_INNERSHR_SHIFT) & ID_MMFR0_INNERSHR_MASK;
- break;
- default:
- // unexpected value -> shareable is the safe option
- ASSERT (FALSE);
- return FALSE;
- }
- return Val != ID_MMFR0_SHR_IMP_HW_COHERENT;
-}
-
-STATIC
-VOID
-PopulateLevel2PageTable (
- IN UINT32 *SectionEntry,
- IN UINT32 PhysicalBase,
- IN UINT32 RemainLength,
- IN ARM_MEMORY_REGION_ATTRIBUTES Attributes
- )
-{
- UINT32* PageEntry;
- UINT32 Pages;
- UINT32 Index;
- UINT32 PageAttributes;
- UINT32 SectionDescriptor;
- UINT32 TranslationTable;
- UINT32 BaseSectionAddress;
-
- switch (Attributes) {
- case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK:
- case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:
- PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_BACK;
- break;
- case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
- case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:
- PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_THROUGH;
- break;
- case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:
- case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:
- PageAttributes = TT_DESCRIPTOR_PAGE_DEVICE;
- break;
- case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED:
- case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED:
- PageAttributes = TT_DESCRIPTOR_PAGE_UNCACHED;
- break;
- default:
- PageAttributes = TT_DESCRIPTOR_PAGE_UNCACHED;
- break;
- }
-
- if (PreferNonshareableMemory ()) {
- PageAttributes &= ~TT_DESCRIPTOR_PAGE_S_SHARED;
- }
-
- // Check if the Section Entry has already been populated. Otherwise attach a
- // Level 2 Translation Table to it
- if (*SectionEntry != 0) {
- // The entry must be a page table. Otherwise it exists an overlapping in the memory map
- if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(*SectionEntry)) {
- TranslationTable = *SectionEntry & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK;
- } else if ((*SectionEntry & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) {
- // Case where a virtual memory map descriptor overlapped a section entry
-
- // Allocate a Level2 Page Table for this Section
- TranslationTable = (UINTN)AllocatePages(EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_PAGE_SIZE + TRANSLATION_TABLE_PAGE_ALIGNMENT));
- TranslationTable = ((UINTN)TranslationTable + TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK;
-
- // Translate the Section Descriptor into Page Descriptor
- SectionDescriptor = TT_DESCRIPTOR_PAGE_TYPE_PAGE | ConvertSectionAttributesToPageAttributes (*SectionEntry, FALSE);
-
- BaseSectionAddress = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(*SectionEntry);
-
- // Populate the new Level2 Page Table for the section
- PageEntry = (UINT32*)TranslationTable;
- for (Index = 0; Index < TRANSLATION_TABLE_PAGE_COUNT; Index++) {
- PageEntry[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(BaseSectionAddress + (Index << 12)) | SectionDescriptor;
- }
-
- // Overwrite the section entry to point to the new Level2 Translation Table
- *SectionEntry = (TranslationTable & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) |
- (IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(Attributes) ? (1 << 3) : 0) |
- TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE;
- } else {
- // We do not support the other section type (16MB Section)
- ASSERT(0);
- return;
- }
- } else {
- TranslationTable = (UINTN)AllocatePages(EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_PAGE_SIZE + TRANSLATION_TABLE_PAGE_ALIGNMENT));
- TranslationTable = ((UINTN)TranslationTable + TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK;
-
- ZeroMem ((VOID *)TranslationTable, TRANSLATION_TABLE_PAGE_SIZE);
-
- *SectionEntry = (TranslationTable & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) |
- (IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(Attributes) ? (1 << 3) : 0) |
- TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE;
- }
-
- PageEntry = ((UINT32 *)(TranslationTable) + ((PhysicalBase & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT));
- Pages = RemainLength / TT_DESCRIPTOR_PAGE_SIZE;
-
- for (Index = 0; Index < Pages; Index++) {
- *PageEntry++ = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(PhysicalBase) | PageAttributes;
- PhysicalBase += TT_DESCRIPTOR_PAGE_SIZE;
- }
-
-}
-
-STATIC
-VOID
-FillTranslationTable (
- IN UINT32 *TranslationTable,
- IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryRegion
- )
-{
- UINT32 *SectionEntry;
- UINT32 Attributes;
- UINT32 PhysicalBase;
- UINT64 RemainLength;
-
- ASSERT(MemoryRegion->Length > 0);
-
- if (MemoryRegion->PhysicalBase >= SIZE_4GB) {
- return;
- }
-
- PhysicalBase = MemoryRegion->PhysicalBase;
- RemainLength = MIN(MemoryRegion->Length, SIZE_4GB - PhysicalBase);
-
- switch (MemoryRegion->Attributes) {
- case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK:
- Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
- break;
- case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
- Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0);
- break;
- case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:
- Attributes = TT_DESCRIPTOR_SECTION_DEVICE(0);
- break;
- case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED:
- Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(0);
- break;
- case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:
- Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(1);
- break;
- case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:
- Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH(1);
- break;
- case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:
- Attributes = TT_DESCRIPTOR_SECTION_DEVICE(1);
- break;
- case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED:
- Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(1);
- break;
- default:
- Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(0);
- break;
- }
-
- if (PreferNonshareableMemory ()) {
- Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
- }
-
- // Get the first section entry for this mapping
- SectionEntry = TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(TranslationTable, MemoryRegion->VirtualBase);
-
- while (RemainLength != 0) {
- if (PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE == 0) {
- if (RemainLength >= TT_DESCRIPTOR_SECTION_SIZE) {
- // Case: Physical address aligned on the Section Size (1MB) && the length is greater than the Section Size
- *SectionEntry++ = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(PhysicalBase) | Attributes;
- PhysicalBase += TT_DESCRIPTOR_SECTION_SIZE;
- } else {
- // Case: Physical address aligned on the Section Size (1MB) && the length does not fill a section
- PopulateLevel2PageTable (SectionEntry++, PhysicalBase, RemainLength, MemoryRegion->Attributes);
-
- // It must be the last entry
- break;
- }
- } else {
- // Case: Physical address NOT aligned on the Section Size (1MB)
- PopulateLevel2PageTable (SectionEntry++, PhysicalBase, RemainLength, MemoryRegion->Attributes);
- // Aligned the address
- PhysicalBase = (PhysicalBase + TT_DESCRIPTOR_SECTION_SIZE) & ~(TT_DESCRIPTOR_SECTION_SIZE-1);
-
- // If it is the last entry
- if (RemainLength < TT_DESCRIPTOR_SECTION_SIZE) {
- break;
- }
- }
- RemainLength -= TT_DESCRIPTOR_SECTION_SIZE;
- }
-}
-
-RETURN_STATUS
-EFIAPI
-ArmConfigureMmu (
- IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
- OUT VOID **TranslationTableBase OPTIONAL,
- OUT UINTN *TranslationTableSize OPTIONAL
- )
-{
- VOID* TranslationTable;
- ARM_MEMORY_REGION_ATTRIBUTES TranslationTableAttribute;
- UINT32 TTBRAttributes;
-
- // Allocate pages for translation table.
- TranslationTable = AllocatePages (EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SECTION_SIZE + TRANSLATION_TABLE_SECTION_ALIGNMENT));
- if (TranslationTable == NULL) {
- return RETURN_OUT_OF_RESOURCES;
- }
- TranslationTable = (VOID*)(((UINTN)TranslationTable + TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK);
-
- if (TranslationTableBase != NULL) {
- *TranslationTableBase = TranslationTable;
- }
-
- if (TranslationTableSize != NULL) {
- *TranslationTableSize = TRANSLATION_TABLE_SECTION_SIZE;
- }
-
- ZeroMem (TranslationTable, TRANSLATION_TABLE_SECTION_SIZE);
-
- // By default, mark the translation table as belonging to a uncached region
- TranslationTableAttribute = ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED;
- while (MemoryTable->Length != 0) {
- // Find the memory attribute for the Translation Table
- if (((UINTN)TranslationTable >= MemoryTable->PhysicalBase) && ((UINTN)TranslationTable <= MemoryTable->PhysicalBase - 1 + MemoryTable->Length)) {
- TranslationTableAttribute = MemoryTable->Attributes;
- }
-
- FillTranslationTable (TranslationTable, MemoryTable);
- MemoryTable++;
- }
-
- // Translate the Memory Attributes into Translation Table Register Attributes
- if ((TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED) ||
- (TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED)) {
- TTBRAttributes = ArmHasMpExtensions () ? TTBR_MP_NON_CACHEABLE : TTBR_NON_CACHEABLE;
- } else if ((TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK) ||
- (TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK)) {
- TTBRAttributes = ArmHasMpExtensions () ? TTBR_MP_WRITE_BACK_ALLOC : TTBR_WRITE_BACK_ALLOC;
- } else if ((TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH) ||
- (TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH)) {
- TTBRAttributes = ArmHasMpExtensions () ? TTBR_MP_WRITE_THROUGH : TTBR_WRITE_THROUGH;
- } else {
- ASSERT (0); // No support has been found for the attributes of the memory region that the translation table belongs to.
- return RETURN_UNSUPPORTED;
- }
-
- if (TTBRAttributes & TTBR_SHAREABLE) {
- if (PreferNonshareableMemory ()) {
- TTBRAttributes ^= TTBR_SHAREABLE;
- } else {
- //
- // Unlike the S bit in the short descriptors, which implies inner shareable
- // on an implementation that supports two levels, the meaning of the S bit
- // in the TTBR depends on the NOS bit, which defaults to Outer Shareable.
- // However, we should only set this bit after we have confirmed that the
- // implementation supports multiple levels, or else the NOS bit is UNK/SBZP
- //
- if (((ArmReadIdMmfr0 () >> 12) & 0xf) != 0) {
- TTBRAttributes |= TTBR_NOT_OUTER_SHAREABLE;
- }
- }
- }
-
- ArmCleanInvalidateDataCache ();
- ArmInvalidateInstructionCache ();
-
- ArmDisableDataCache ();
- ArmDisableInstructionCache();
- // TLBs are also invalidated when calling ArmDisableMmu()
- ArmDisableMmu ();
-
- // Make sure nothing sneaked into the cache
- ArmCleanInvalidateDataCache ();
- ArmInvalidateInstructionCache ();
-
- ArmSetTTBR0 ((VOID *)(UINTN)(((UINTN)TranslationTable & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) | (TTBRAttributes & 0x7F)));
-
- //
- // The TTBCR register value is undefined at reset in the Non-Secure world.
- // Writing 0 has the effect of:
- // Clearing EAE: Use short descriptors, as mandated by specification.
- // Clearing PD0 and PD1: Translation Table Walk Disable is off.
- // Clearing N: Perform all translation table walks through TTBR0.
- // (0 is the default reset value in systems not implementing
- // the Security Extensions.)
- //
- ArmSetTTBCR (0);
-
- ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |
- DOMAIN_ACCESS_CONTROL_NONE(14) |
- DOMAIN_ACCESS_CONTROL_NONE(13) |
- DOMAIN_ACCESS_CONTROL_NONE(12) |
- DOMAIN_ACCESS_CONTROL_NONE(11) |
- DOMAIN_ACCESS_CONTROL_NONE(10) |
- DOMAIN_ACCESS_CONTROL_NONE( 9) |
- DOMAIN_ACCESS_CONTROL_NONE( 8) |
- DOMAIN_ACCESS_CONTROL_NONE( 7) |
- DOMAIN_ACCESS_CONTROL_NONE( 6) |
- DOMAIN_ACCESS_CONTROL_NONE( 5) |
- DOMAIN_ACCESS_CONTROL_NONE( 4) |
- DOMAIN_ACCESS_CONTROL_NONE( 3) |
- DOMAIN_ACCESS_CONTROL_NONE( 2) |
- DOMAIN_ACCESS_CONTROL_NONE( 1) |
- DOMAIN_ACCESS_CONTROL_CLIENT(0));
-
- ArmEnableInstructionCache();
- ArmEnableDataCache();
- ArmEnableMmu();
- return RETURN_SUCCESS;
-}
-
-STATIC
-EFI_STATUS
-ConvertSectionToPages (
- IN EFI_PHYSICAL_ADDRESS BaseAddress
- )
-{
- UINT32 FirstLevelIdx;
- UINT32 SectionDescriptor;
- UINT32 PageTableDescriptor;
- UINT32 PageDescriptor;
- UINT32 Index;
-
- volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
- volatile ARM_PAGE_TABLE_ENTRY *PageTable;
-
- DEBUG ((EFI_D_PAGE, "Converting section at 0x%x to pages\n", (UINTN)BaseAddress));
-
- // Obtain page table base
- FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
-
- // Calculate index into first level translation table for start of modification
- FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
- ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);
-
- // Get section attributes and convert to page attributes
- SectionDescriptor = FirstLevelTable[FirstLevelIdx];
- PageDescriptor = TT_DESCRIPTOR_PAGE_TYPE_PAGE | ConvertSectionAttributesToPageAttributes (SectionDescriptor, FALSE);
-
- // Allocate a page table for the 4KB entries (we use up a full page even though we only need 1KB)
- PageTable = (volatile ARM_PAGE_TABLE_ENTRY *)AllocatePages (1);
- if (PageTable == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
-
- // Write the page table entries out
- for (Index = 0; Index < TRANSLATION_TABLE_PAGE_COUNT; Index++) {
- PageTable[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(BaseAddress + (Index << 12)) | PageDescriptor;
- }
-
- // Flush d-cache so descriptors make it back to uncached memory for subsequent table walks
- WriteBackInvalidateDataCacheRange ((VOID *)PageTable, TT_DESCRIPTOR_PAGE_SIZE);
-
- // Formulate page table entry, Domain=0, NS=0
- PageTableDescriptor = (((UINTN)PageTable) & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) | TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE;
-
- // Write the page table entry out, replacing section entry
- FirstLevelTable[FirstLevelIdx] = PageTableDescriptor;
-
- return EFI_SUCCESS;
-}
-
-STATIC
-EFI_STATUS
-UpdatePageEntries (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN UINT64 Attributes,
- OUT BOOLEAN *FlushTlbs OPTIONAL
- )
-{
- EFI_STATUS Status;
- UINT32 EntryValue;
- UINT32 EntryMask;
- UINT32 FirstLevelIdx;
- UINT32 Offset;
- UINT32 NumPageEntries;
- UINT32 Descriptor;
- UINT32 p;
- UINT32 PageTableIndex;
- UINT32 PageTableEntry;
- UINT32 CurrentPageTableEntry;
- VOID *Mva;
-
- volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
- volatile ARM_PAGE_TABLE_ENTRY *PageTable;
-
- Status = EFI_SUCCESS;
-
- // EntryMask: bitmask of values to change (1 = change this value, 0 = leave alone)
- // EntryValue: values at bit positions specified by EntryMask
- EntryMask = TT_DESCRIPTOR_PAGE_TYPE_MASK | TT_DESCRIPTOR_PAGE_AP_MASK;
- if (Attributes & EFI_MEMORY_XP) {
- EntryValue = TT_DESCRIPTOR_PAGE_TYPE_PAGE_XN;
- } else {
- EntryValue = TT_DESCRIPTOR_PAGE_TYPE_PAGE;
- }
-
- // Although the PI spec is unclear on this, the GCD guarantees that only
- // one Attribute bit is set at a time, so the order of the conditionals below
- // is irrelevant. If no memory attribute is specified, we preserve whatever
- // memory type is set in the page tables, and update the permission attributes
- // only.
- if (Attributes & EFI_MEMORY_UC) {
- // modify cacheability attributes
- EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
- // map to strongly ordered
- EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0
- } else if (Attributes & EFI_MEMORY_WC) {
- // modify cacheability attributes
- EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
- // map to normal non-cachable
- EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
- } else if (Attributes & EFI_MEMORY_WT) {
- // modify cacheability attributes
- EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
- // write through with no-allocate
- EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC; // TEX [2:0] = 0, C=1, B=0
- } else if (Attributes & EFI_MEMORY_WB) {
- // modify cacheability attributes
- EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
- // write back (with allocate)
- EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC; // TEX [2:0] = 001, C=1, B=1
- } else if (Attributes & CACHE_ATTRIBUTE_MASK) {
- // catch unsupported memory type attributes
- ASSERT (FALSE);
- return EFI_UNSUPPORTED;
- }
-
- if (Attributes & EFI_MEMORY_RO) {
- EntryValue |= TT_DESCRIPTOR_PAGE_AP_RO_RO;
- } else {
- EntryValue |= TT_DESCRIPTOR_PAGE_AP_RW_RW;
- }
-
- // Obtain page table base
- FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
-
- // Calculate number of 4KB page table entries to change
- NumPageEntries = Length / TT_DESCRIPTOR_PAGE_SIZE;
-
- // Iterate for the number of 4KB pages to change
- Offset = 0;
- for(p = 0; p < NumPageEntries; p++) {
- // Calculate index into first level translation table for page table value
-
- FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress + Offset) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
- ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);
-
- // Read the descriptor from the first level page table
- Descriptor = FirstLevelTable[FirstLevelIdx];
-
- // Does this descriptor need to be converted from section entry to 4K pages?
- if (!TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Descriptor)) {
- Status = ConvertSectionToPages (FirstLevelIdx << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
- if (EFI_ERROR(Status)) {
- // Exit for loop
- break;
- }
-
- // Re-read descriptor
- Descriptor = FirstLevelTable[FirstLevelIdx];
- if (FlushTlbs != NULL) {
- *FlushTlbs = TRUE;
- }
- }
-
- // Obtain page table base address
- PageTable = (ARM_PAGE_TABLE_ENTRY *)TT_DESCRIPTOR_PAGE_BASE_ADDRESS(Descriptor);
-
- // Calculate index into the page table
- PageTableIndex = ((BaseAddress + Offset) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
- ASSERT (PageTableIndex < TRANSLATION_TABLE_PAGE_COUNT);
-
- // Get the entry
- CurrentPageTableEntry = PageTable[PageTableIndex];
-
- // Mask off appropriate fields
- PageTableEntry = CurrentPageTableEntry & ~EntryMask;
-
- // Mask in new attributes and/or permissions
- PageTableEntry |= EntryValue;
-
- if (CurrentPageTableEntry != PageTableEntry) {
- Mva = (VOID *)(UINTN)((((UINTN)FirstLevelIdx) << TT_DESCRIPTOR_SECTION_BASE_SHIFT) + (PageTableIndex << TT_DESCRIPTOR_PAGE_BASE_SHIFT));
-
- // Clean/invalidate the cache for this page, but only
- // if we are modifying the memory type attributes
- if (((CurrentPageTableEntry ^ PageTableEntry) & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) != 0) {
- WriteBackInvalidateDataCacheRange (Mva, TT_DESCRIPTOR_PAGE_SIZE);
- }
-
- // Only need to update if we are changing the entry
- PageTable[PageTableIndex] = PageTableEntry;
- ArmUpdateTranslationTableEntry ((VOID *)&PageTable[PageTableIndex], Mva);
- }
-
- Status = EFI_SUCCESS;
- Offset += TT_DESCRIPTOR_PAGE_SIZE;
-
- } // End first level translation table loop
-
- return Status;
-}
-
-STATIC
-EFI_STATUS
-UpdateSectionEntries (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN UINT64 Attributes
- )
-{
- EFI_STATUS Status = EFI_SUCCESS;
- UINT32 EntryMask;
- UINT32 EntryValue;
- UINT32 FirstLevelIdx;
- UINT32 NumSections;
- UINT32 i;
- UINT32 CurrentDescriptor;
- UINT32 Descriptor;
- VOID *Mva;
- volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
-
- // EntryMask: bitmask of values to change (1 = change this value, 0 = leave alone)
- // EntryValue: values at bit positions specified by EntryMask
-
- // Make sure we handle a section range that is unmapped
- EntryMask = TT_DESCRIPTOR_SECTION_TYPE_MASK | TT_DESCRIPTOR_SECTION_XN_MASK |
- TT_DESCRIPTOR_SECTION_AP_MASK;
- EntryValue = TT_DESCRIPTOR_SECTION_TYPE_SECTION;
-
- // Although the PI spec is unclear on this, the GCD guarantees that only
- // one Attribute bit is set at a time, so the order of the conditionals below
- // is irrelevant. If no memory attribute is specified, we preserve whatever
- // memory type is set in the page tables, and update the permission attributes
- // only.
- if (Attributes & EFI_MEMORY_UC) {
- // modify cacheability attributes
- EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
- // map to strongly ordered
- EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0
- } else if (Attributes & EFI_MEMORY_WC) {
- // modify cacheability attributes
- EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
- // map to normal non-cachable
- EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
- } else if (Attributes & EFI_MEMORY_WT) {
- // modify cacheability attributes
- EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
- // write through with no-allocate
- EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC; // TEX [2:0] = 0, C=1, B=0
- } else if (Attributes & EFI_MEMORY_WB) {
- // modify cacheability attributes
- EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
- // write back (with allocate)
- EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC; // TEX [2:0] = 001, C=1, B=1
- } else if (Attributes & CACHE_ATTRIBUTE_MASK) {
- // catch unsupported memory type attributes
- ASSERT (FALSE);
- return EFI_UNSUPPORTED;
- }
-
- if (Attributes & EFI_MEMORY_RO) {
- EntryValue |= TT_DESCRIPTOR_SECTION_AP_RO_RO;
- } else {
- EntryValue |= TT_DESCRIPTOR_SECTION_AP_RW_RW;
- }
-
- if (Attributes & EFI_MEMORY_XP) {
- EntryValue |= TT_DESCRIPTOR_SECTION_XN_MASK;
- }
-
- // obtain page table base
- FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
-
- // calculate index into first level translation table for start of modification
- FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
- ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);
-
- // calculate number of 1MB first level entries this applies to
- NumSections = Length / TT_DESCRIPTOR_SECTION_SIZE;
-
- // iterate through each descriptor
- for(i=0; i<NumSections; i++) {
- CurrentDescriptor = FirstLevelTable[FirstLevelIdx + i];
-
- // has this descriptor already been coverted to pages?
- if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(CurrentDescriptor)) {
- // forward this 1MB range to page table function instead
- Status = UpdatePageEntries (
- (FirstLevelIdx + i) << TT_DESCRIPTOR_SECTION_BASE_SHIFT,
- TT_DESCRIPTOR_SECTION_SIZE,
- Attributes,
- NULL);
- } else {
- // still a section entry
-
- // mask off appropriate fields
- Descriptor = CurrentDescriptor & ~EntryMask;
-
- // mask in new attributes and/or permissions
- Descriptor |= EntryValue;
-
- if (CurrentDescriptor != Descriptor) {
- Mva = (VOID *)(UINTN)(((UINTN)FirstLevelTable) << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
-
- // Clean/invalidate the cache for this section, but only
- // if we are modifying the memory type attributes
- if (((CurrentDescriptor ^ Descriptor) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) != 0) {
- WriteBackInvalidateDataCacheRange (Mva, SIZE_1MB);
- }
-
- // Only need to update if we are changing the descriptor
- FirstLevelTable[FirstLevelIdx + i] = Descriptor;
- ArmUpdateTranslationTableEntry ((VOID *)&FirstLevelTable[FirstLevelIdx + i], Mva);
- }
-
- Status = EFI_SUCCESS;
- }
- }
-
- return Status;
-}
-
-EFI_STATUS
-ArmSetMemoryAttributes (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN UINT64 Attributes
- )
-{
- EFI_STATUS Status;
- UINT64 ChunkLength;
- BOOLEAN FlushTlbs;
-
- if (Length == 0) {
- return EFI_SUCCESS;
- }
-
- FlushTlbs = FALSE;
- while (Length > 0) {
- if ((BaseAddress % TT_DESCRIPTOR_SECTION_SIZE == 0) &&
- Length >= TT_DESCRIPTOR_SECTION_SIZE) {
-
- ChunkLength = Length - Length % TT_DESCRIPTOR_SECTION_SIZE;
-
- DEBUG ((DEBUG_PAGE,
- "SetMemoryAttributes(): MMU section 0x%lx length 0x%lx to %lx\n",
- BaseAddress, ChunkLength, Attributes));
-
- Status = UpdateSectionEntries (BaseAddress, ChunkLength, Attributes);
-
- FlushTlbs = TRUE;
- } else {
-
- //
- // Process page by page until the next section boundary, but only if
- // we have more than a section's worth of area to deal with after that.
- //
- ChunkLength = TT_DESCRIPTOR_SECTION_SIZE -
- (BaseAddress % TT_DESCRIPTOR_SECTION_SIZE);
- if (ChunkLength + TT_DESCRIPTOR_SECTION_SIZE > Length) {
- ChunkLength = Length;
- }
-
- DEBUG ((DEBUG_PAGE,
- "SetMemoryAttributes(): MMU page 0x%lx length 0x%lx to %lx\n",
- BaseAddress, ChunkLength, Attributes));
-
- Status = UpdatePageEntries (BaseAddress, ChunkLength, Attributes,
- &FlushTlbs);
- }
-
- if (EFI_ERROR (Status)) {
- break;
- }
-
- BaseAddress += ChunkLength;
- Length -= ChunkLength;
- }
-
- if (FlushTlbs) {
- ArmInvalidateTlb ();
- }
- return Status;
-}
-
-EFI_STATUS
-ArmSetMemoryRegionNoExec (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length
- )
-{
- return ArmSetMemoryAttributes (BaseAddress, Length, EFI_MEMORY_XP);
-}
-
-EFI_STATUS
-ArmClearMemoryRegionNoExec (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length
- )
-{
- return ArmSetMemoryAttributes (BaseAddress, Length, __EFI_MEMORY_RWX);
-}
-
-EFI_STATUS
-ArmSetMemoryRegionReadOnly (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length
- )
-{
- return ArmSetMemoryAttributes (BaseAddress, Length, EFI_MEMORY_RO);
-}
-
-EFI_STATUS
-ArmClearMemoryRegionReadOnly (
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length
- )
-{
- return ArmSetMemoryAttributes (BaseAddress, Length, __EFI_MEMORY_RWX);
-}
-
-RETURN_STATUS
-EFIAPI
-ArmMmuBaseLibConstructor (
- VOID
- )
-{
- return RETURN_SUCCESS;
-}
diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.S b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.S deleted file mode 100644 index c89ee5e40b..0000000000 --- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.S +++ /dev/null @@ -1,35 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2016, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-.text
-.align 2
-
-GCC_ASM_EXPORT (ArmReadIdMmfr0)
-GCC_ASM_EXPORT (ArmHasMpExtensions)
-
-#------------------------------------------------------------------------------
-
-ASM_PFX (ArmHasMpExtensions):
- mrc p15,0,R0,c0,c0,5
- // Get Multiprocessing extension (bit31)
- lsr R0, R0, #31
- bx LR
-
-ASM_PFX(ArmReadIdMmfr0):
- mrc p15, 0, r0, c0, c1, 4 @ Read ID_MMFR0 Register
- bx lr
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.asm b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.asm deleted file mode 100644 index 4078394dcd..0000000000 --- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.asm +++ /dev/null @@ -1,32 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2016, Linaro Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
-
- INCLUDE AsmMacroExport.inc
-
-
-//------------------------------------------------------------------------------
-
- RVCT_ASM_EXPORT ArmHasMpExtensions
- mrc p15,0,R0,c0,c0,5
- // Get Multiprocessing extension (bit31)
- lsr R0, R0, #31
- bx LR
-
- RVCT_ASM_EXPORT ArmReadIdMmfr0
- mrc p15, 0, r0, c0, c1, 4 ; Read ID_MMFR0 Register
- bx lr
-
- END
diff --git a/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf b/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf deleted file mode 100644 index b9f264de8d..0000000000 --- a/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf +++ /dev/null @@ -1,47 +0,0 @@ -#/** @file
-#
-# Copyright (c) 2016 Linaro Ltd. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmMmuBaseLib
- FILE_GUID = da8f0232-fb14-42f0-922c-63104d2c70bd
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmMmuLib
- CONSTRUCTOR = ArmMmuBaseLibConstructor
-
-[Sources.AARCH64]
- AArch64/ArmMmuLibCore.c
- AArch64/ArmMmuLibReplaceEntry.S
-
-[Sources.ARM]
- Arm/ArmMmuLibCore.c
- Arm/ArmMmuLibV7Support.S |GCC
- Arm/ArmMmuLibV7Support.asm |RVCT
-
-[Packages]
- ArmPkg/ArmPkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- MdePkg/MdePkg.dec
-
-[LibraryClasses]
- ArmLib
- CacheMaintenanceLib
- MemoryAllocationLib
-
-[Pcd.AARCH64]
- gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
-
-[Pcd.ARM]
- gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride
diff --git a/ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf b/ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf deleted file mode 100644 index ecf13f7907..0000000000 --- a/ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf +++ /dev/null @@ -1,40 +0,0 @@ -#/** @file
-#
-# Copyright (c) 2016 Linaro Ltd. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmMmuPeiLib
- FILE_GUID = b50d8d53-1ad1-44ea-9e69-8c89d4a6d08b
- MODULE_TYPE = PEIM
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmMmuLib|PEIM
- CONSTRUCTOR = ArmMmuPeiLibConstructor
-
-[Sources.AARCH64]
- AArch64/ArmMmuLibCore.c
- AArch64/ArmMmuPeiLibConstructor.c
- AArch64/ArmMmuLibReplaceEntry.S
-
-[Packages]
- ArmPkg/ArmPkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- MdePkg/MdePkg.dec
-
-[LibraryClasses]
- ArmLib
- CacheMaintenanceLib
- MemoryAllocationLib
-
-[Pcd.AARCH64]
- gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
diff --git a/ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.c b/ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.c deleted file mode 100644 index 8df54fdf3c..0000000000 --- a/ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.c +++ /dev/null @@ -1,96 +0,0 @@ -/** @file
- Support ResetSystem Runtime call using PSCI calls
-
- Note: A similar library is implemented in
- ArmVirtPkg/Library/ArmVirtualizationPsciResetSystemLib
- So similar issues might exist in this implementation too.
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2013-2015, ARM Ltd. All rights reserved.<BR>
- Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiDxe.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/EfiResetSystemLib.h>
-#include <Library/ArmSmcLib.h>
-
-#include <IndustryStandard/ArmStdSmc.h>
-
-/**
- Resets the entire platform.
-
- @param ResetType The type of reset to perform.
- @param ResetStatus The status code for the reset.
- @param DataSize The size, in bytes, of WatchdogData.
- @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or
- EfiResetShutdown the data buffer starts with a Null-terminated
- Unicode string, optionally followed by additional binary data.
-
-**/
-EFI_STATUS
-EFIAPI
-LibResetSystem (
- IN EFI_RESET_TYPE ResetType,
- IN EFI_STATUS ResetStatus,
- IN UINTN DataSize,
- IN CHAR16 *ResetData OPTIONAL
- )
-{
- ARM_SMC_ARGS ArmSmcArgs;
-
- switch (ResetType) {
- case EfiResetPlatformSpecific:
- // Map the platform specific reset as reboot
- case EfiResetWarm:
- // Map a warm reset into a cold reset
- case EfiResetCold:
- // Send a PSCI 0.2 SYSTEM_RESET command
- ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_RESET;
- break;
- case EfiResetShutdown:
- // Send a PSCI 0.2 SYSTEM_OFF command
- ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_OFF;
- break;
- default:
- ASSERT (FALSE);
- return EFI_UNSUPPORTED;
- }
-
- ArmCallSmc (&ArmSmcArgs);
-
- // We should never be here
- DEBUG ((EFI_D_ERROR, "%a: PSCI Reset failed\n", __FUNCTION__));
- CpuDeadLoop ();
- return EFI_UNSUPPORTED;
-}
-
-/**
- Initialize any infrastructure required for LibResetSystem () to function.
-
- @param ImageHandle The firmware allocated handle for the EFI image.
- @param SystemTable A pointer to the EFI System Table.
-
- @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
-
-**/
-EFI_STATUS
-EFIAPI
-LibInitializeResetSystem (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- return EFI_SUCCESS;
-}
diff --git a/ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf b/ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf deleted file mode 100644 index 9cdde1f154..0000000000 --- a/ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf +++ /dev/null @@ -1,37 +0,0 @@ -#/** @file
-# Reset System lib using PSCI hypervisor or secure monitor calls
-#
-# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
-# Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmPsciResetSystemLib
- FILE_GUID = A8F59B69-A105-41C7-8F5A-2C60DD7FD7AA
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = EfiResetSystemLib
-
-[Sources]
- ArmPsciResetSystemLib.c
-
-[Packages]
- ArmPkg/ArmPkg.dec
- MdePkg/MdePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
-
-[LibraryClasses]
- DebugLib
- BaseLib
- ArmSmcLib
diff --git a/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S b/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S deleted file mode 100644 index a8dbb911de..0000000000 --- a/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S +++ /dev/null @@ -1,38 +0,0 @@ -//
-// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLibV8.h>
-
-ASM_FUNC(ArmCallSmc)
- // Push x0 on the stack - The stack must always be quad-word aligned
- str x0, [sp, #-16]!
-
- // Load the SMC arguments values into the appropriate registers
- ldp x6, x7, [x0, #48]
- ldp x4, x5, [x0, #32]
- ldp x2, x3, [x0, #16]
- ldp x0, x1, [x0, #0]
-
- smc #0
-
- // Pop the ARM_SMC_ARGS structure address from the stack into x9
- ldr x9, [sp], #16
-
- // Store the SMC returned values into the ARM_SMC_ARGS structure.
- // A SMC call can return up to 4 values - we do not need to store back x4-x7.
- stp x2, x3, [x9, #16]
- stp x0, x1, [x9, #0]
-
- mov x0, x9
-
- ret
diff --git a/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S b/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S deleted file mode 100644 index afb2e9bc90..0000000000 --- a/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S +++ /dev/null @@ -1,50 +0,0 @@ -//
-// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLibV8.h>
-
-.arch_extension sec
-
-ASM_FUNC(ArmCallSmc)
- push {r4-r8}
- // r0 will be popped just after the SMC call
- push {r0}
-
- // Load the SMC arguments values into the appropriate registers
- ldr r7, [r0, #28]
- ldr r6, [r0, #24]
- ldr r5, [r0, #20]
- ldr r4, [r0, #16]
- ldr r3, [r0, #12]
- ldr r2, [r0, #8]
- ldr r1, [r0, #4]
- ldr r0, [r0, #0]
-
- smc #0
-
- // Pop the ARM_SMC_ARGS structure address from the stack into r8
- pop {r8}
-
- // Load the SMC returned values into the appropriate registers
- // A SMC call can return up to 4 values - we do not need to store back r4-r7.
- str r3, [r8, #12]
- str r2, [r8, #8]
- str r1, [r8, #4]
- str r0, [r8, #0]
-
- mov r0, r8
-
- // Restore the registers r4-r8
- pop {r4-r8}
-
- bx lr
diff --git a/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.asm b/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.asm deleted file mode 100644 index b82cf39065..0000000000 --- a/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.asm +++ /dev/null @@ -1,51 +0,0 @@ -//
-// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-
- INCLUDE AsmMacroExport.inc
-
- RVCT_ASM_EXPORT ArmCallSmc
- push {r4-r8}
- // r0 will be popped just after the SMC call
- push {r0}
-
- // Load the SMC arguments values into the appropriate registers
- ldr r7, [r0, #28]
- ldr r6, [r0, #24]
- ldr r5, [r0, #20]
- ldr r4, [r0, #16]
- ldr r3, [r0, #12]
- ldr r2, [r0, #8]
- ldr r1, [r0, #4]
- ldr r0, [r0, #0]
-
- smc #0
-
- // Pop the ARM_SMC_ARGS structure address from the stack into r8
- pop {r8}
-
- // Load the SMC returned values into the appropriate registers
- // A SMC call can return up to 4 values - we do not need to store back r4-r7.
- str r3, [r8, #12]
- str r2, [r8, #8]
- str r1, [r8, #4]
- str r0, [r8, #0]
-
- mov r0, r8
-
- // Restore the registers r4-r8
- pop {r4-r8}
-
- bx lr
-
- END
diff --git a/ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf b/ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf deleted file mode 100644 index 9f9ba72996..0000000000 --- a/ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf +++ /dev/null @@ -1,31 +0,0 @@ -#/** @file
-#
-# Copyright (c) 2012-2013, ARM Ltd. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmSmcLib
- FILE_GUID = eb3f17d5-a3cc-4eac-8912-84162d0f79da
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmSmcLib
-
-[Sources.ARM]
- Arm/ArmSmc.asm | RVCT
- Arm/ArmSmc.S | GCC
-
-[Sources.AARCH64]
- AArch64/ArmSmc.S
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
diff --git a/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.c b/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.c deleted file mode 100644 index e5d4e51133..0000000000 --- a/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.c +++ /dev/null @@ -1,22 +0,0 @@ -// -// Copyright (c) 2016, Linaro Limited. All rights reserved. -// -// This program and the accompanying materials -// are licensed and made available under the terms and conditions of the BSD License -// which accompanies this distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// -// - -#include <Base.h> -#include <Library/ArmSmcLib.h> - -VOID -ArmCallSmc ( - IN OUT ARM_SMC_ARGS *Args - ) -{ -} diff --git a/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf b/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf deleted file mode 100644 index db15a5f8bb..0000000000 --- a/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf +++ /dev/null @@ -1,30 +0,0 @@ -#/** @file
-#
-# ArmSmcLib when no SMC support is desired (might be the case for CPU without the
-# Trustzone support / ARM Security Extension)
-#
-# Copyright (c) 2012-2013, ARM Ltd. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmSmcLibNull
- FILE_GUID = 140e8004-16e1-4de1-a352-c6ef51110ecf
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmSmcLib
-
-[Sources]
- ArmSmcLibNull.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_cdcmp.asm b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_cdcmp.asm deleted file mode 100644 index 4383f6a25e..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_cdcmp.asm +++ /dev/null @@ -1,47 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2015, Linaro Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
- EXPORT __aeabi_cdrcmple
- EXPORT __aeabi_cdcmpeq
- EXPORT __aeabi_cdcmple
- IMPORT _softfloat_float64_eq
- IMPORT _softfloat_float64_lt
-
- AREA __aeabi_cdcmp, CODE, READONLY
- PRESERVE8
-
-__aeabi_cdrcmple
- MOV IP, R0
- MOV R0, R2
- MOV R2, IP
-
- MOV IP, R1
- MOV R1, R3
- MOV R3, IP
-
-__aeabi_cdcmpeq
-__aeabi_cdcmple
- PUSH {R0 - R3, IP, LR}
- BL _softfloat_float64_eq
- SUB IP, R0, #1
- CMP IP, #0 // sets C and Z if R0 == 1
- POPEQ {R0 - R3, IP, PC}
-
- LDM SP, {R0 - R3}
- BL _softfloat_float64_lt
- SUB IP, R0, #1
- CMP IP, #1 // sets C if R0 == 0
- POP {R0 - R3, IP, PC}
-
- END
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_cfcmp.asm b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_cfcmp.asm deleted file mode 100644 index 247f6306eb..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_cfcmp.asm +++ /dev/null @@ -1,43 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2015, Linaro Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
- EXPORT __aeabi_cfrcmple
- EXPORT __aeabi_cfcmpeq
- EXPORT __aeabi_cfcmple
- IMPORT _softfloat_float32_eq
- IMPORT _softfloat_float32_lt
-
- AREA __aeabi_cfcmp, CODE, READONLY
- PRESERVE8
-
-__aeabi_cfrcmple
- MOV IP, R0
- MOV R0, R1
- MOV R1, IP
-
-__aeabi_cfcmpeq
-__aeabi_cfcmple
- PUSH {R0 - R3, IP, LR}
- BL _softfloat_float32_eq
- SUB IP, R0, #1
- CMP IP, #0 // sets C and Z if R0 == 1
- POPEQ {R0 - R3, IP, PC}
-
- LDM SP, {R0 - R1}
- BL _softfloat_float32_lt
- SUB IP, R0, #1
- CMP IP, #1 // sets C if R0 == 0
- POP {R0 - R3, IP, PC}
-
- END
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpeq.c b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpeq.c deleted file mode 100644 index 614c7c61c8..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpeq.c +++ /dev/null @@ -1,36 +0,0 @@ -/* $NetBSD: __aeabi_dcmpeq.c,v 1.1 2013/04/16 10:37:39 matt Exp $ */
-
-/** @file
-*
-* Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-/*
- * Written by Ben Harris, 2000. This file is in the Public Domain.
- */
-
-#if defined(LIBC_SCCS) && !defined(lint)
-__RCSID("$NetBSD: __aeabi_dcmpeq.c,v 1.1 2013/04/16 10:37:39 matt Exp $");
-#endif /* LIBC_SCCS and not lint */
-
-#include "softfloat-for-gcc.h"
-#include "milieu.h"
-#include "softfloat.h"
-
-int __aeabi_dcmpeq(float64, float64);
-
-int
-__aeabi_dcmpeq(float64 a, float64 b)
-{
-
- return float64_eq(a, b);
-}
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpge.c b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpge.c deleted file mode 100644 index 5062a286b7..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpge.c +++ /dev/null @@ -1,34 +0,0 @@ -/* $NetBSD: __aeabi_dcmpge.c,v 1.2 2013/04/16 13:38:34 matt Exp $ */
-/** @file
-*
-* Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-/*
- * Written by Ben Harris, 2000. This file is in the Public Domain.
- */
-
-#include "softfloat-for-gcc.h"
-#include "milieu.h"
-#include "softfloat.h"
-
-#if defined(LIBC_SCCS) && !defined(lint)
-__RCSID("$NetBSD: __aeabi_dcmpge.c,v 1.2 2013/04/16 13:38:34 matt Exp $");
-#endif /* LIBC_SCCS and not lint */
-
-int __aeabi_dcmpge(float64, float64);
-
-int
-__aeabi_dcmpge(float64 a, float64 b)
-{
-
- return !float64_lt(a, b) && float64_eq(a, a) && float64_eq(b, b);
-}
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpgt.c b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpgt.c deleted file mode 100644 index b98652bf94..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpgt.c +++ /dev/null @@ -1,36 +0,0 @@ -/* $NetBSD: __aeabi_dcmpgt.c,v 1.2 2013/04/16 13:38:34 matt Exp $ */
-
-/** @file
-*
-* Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-/*
- * Written by Ben Harris, 2000. This file is in the Public Domain.
- */
-
-#include "softfloat-for-gcc.h"
-#include "milieu.h"
-#include "softfloat.h"
-
-#if defined(LIBC_SCCS) && !defined(lint)
-__RCSID("$NetBSD: __aeabi_dcmpgt.c,v 1.2 2013/04/16 13:38:34 matt Exp $");
-#endif /* LIBC_SCCS and not lint */
-
-int __aeabi_dcmpgt(float64, float64);
-
-int
-__aeabi_dcmpgt(float64 a, float64 b)
-{
-
- return !float64_le(a, b) && float64_eq(a, a) && float64_eq(b, b);
-}
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmple.c b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmple.c deleted file mode 100644 index 8053985f9b..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmple.c +++ /dev/null @@ -1,36 +0,0 @@ -/* $NetBSD: __aeabi_dcmple.c,v 1.1 2013/04/16 10:37:39 matt Exp $ */
-
-/** @file
-*
-* Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-/*
- * Written by Ben Harris, 2000. This file is in the Public Domain.
- */
-
-#include "softfloat-for-gcc.h"
-#include "milieu.h"
-#include "softfloat.h"
-
-#if defined(LIBC_SCCS) && !defined(lint)
-__RCSID("$NetBSD: __aeabi_dcmple.c,v 1.1 2013/04/16 10:37:39 matt Exp $");
-#endif /* LIBC_SCCS and not lint */
-
-int __aeabi_dcmple(float64, float64);
-
-int
-__aeabi_dcmple(float64 a, float64 b)
-{
-
- return float64_le(a, b);
-}
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmplt.c b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmplt.c deleted file mode 100644 index cd166440ef..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmplt.c +++ /dev/null @@ -1,36 +0,0 @@ -/* $NetBSD: __aeabi_dcmplt.c,v 1.1 2013/04/16 10:37:39 matt Exp $ */
-
-/** @file
-*
-* Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-/*
- * Written by Ben Harris, 2000. This file is in the Public Domain.
- */
-
-#include "softfloat-for-gcc.h"
-#include "milieu.h"
-#include "softfloat.h"
-
-#if defined(LIBC_SCCS) && !defined(lint)
-__RCSID("$NetBSD: __aeabi_dcmplt.c,v 1.1 2013/04/16 10:37:39 matt Exp $");
-#endif /* LIBC_SCCS and not lint */
-
-int __aeabi_dcmplt(float64, float64);
-
-int
-__aeabi_dcmplt(float64 a, float64 b)
-{
-
- return float64_lt(a, b);
-}
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpun.c b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpun.c deleted file mode 100644 index 36fd3468cc..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpun.c +++ /dev/null @@ -1,41 +0,0 @@ -/* $NetBSD: __aeabi_dcmpun.c,v 1.1 2013/04/16 10:37:39 matt Exp $ */
-
-/** @file
-*
-* Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-/*
- * Written by Richard Earnshaw, 2003. This file is in the Public Domain.
- */
-
-#include "softfloat-for-gcc.h"
-#include "milieu.h"
-#include "softfloat.h"
-
-#if defined(LIBC_SCCS) && !defined(lint)
-__RCSID("$NetBSD: __aeabi_dcmpun.c,v 1.1 2013/04/16 10:37:39 matt Exp $");
-#endif /* LIBC_SCCS and not lint */
-
-int __aeabi_dcmpun(float64, float64);
-
-int
-__aeabi_dcmpun(float64 a, float64 b)
-{
- /*
- * The comparison is unordered if either input is a NaN.
- * Test for this by comparing each operand with itself.
- * We must perform both comparisons to correctly check for
- * signalling NaNs.
- */
- return !float64_eq(a, a) || !float64_eq(b, b);
-}
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpeq.c b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpeq.c deleted file mode 100644 index ccea1f75e1..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpeq.c +++ /dev/null @@ -1,36 +0,0 @@ -/* $NetBSD: __aeabi_fcmpeq.c,v 1.1 2013/04/16 10:37:39 matt Exp $ */
-
-/** @file
-*
-* Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-/*
- * Written by Ben Harris, 2000. This file is in the Public Domain.
- */
-
-#if defined(LIBC_SCCS) && !defined(lint)
-__RCSID("$NetBSD: __aeabi_fcmpeq.c,v 1.1 2013/04/16 10:37:39 matt Exp $");
-#endif /* LIBC_SCCS and not lint */
-
-#include "softfloat-for-gcc.h"
-#include "milieu.h"
-#include "softfloat.h"
-
-int __aeabi_fcmpeq(float32, float32);
-
-int
-__aeabi_fcmpeq(float32 a, float32 b)
-{
-
- return float32_eq(a, b);
-}
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpge.c b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpge.c deleted file mode 100644 index 69dabbdf94..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpge.c +++ /dev/null @@ -1,36 +0,0 @@ -/* $NetBSD: __aeabi_fcmpge.c,v 1.2 2013/04/16 13:38:34 matt Exp $ */
-
-/** @file
-*
-* Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-/*
- * Written by Ben Harris, 2000. This file is in the Public Domain.
- */
-
-#include "softfloat-for-gcc.h"
-#include "milieu.h"
-#include "softfloat.h"
-
-#if defined(LIBC_SCCS) && !defined(lint)
-__RCSID("$NetBSD: __aeabi_fcmpge.c,v 1.2 2013/04/16 13:38:34 matt Exp $");
-#endif /* LIBC_SCCS and not lint */
-
-int __aeabi_fcmpge(float32, float32);
-
-int
-__aeabi_fcmpge(float32 a, float32 b)
-{
-
- return !float32_lt(a, b) && float32_eq(a, a) && float32_eq(b, b);
-}
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpgt.c b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpgt.c deleted file mode 100644 index 5739a2d6c6..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpgt.c +++ /dev/null @@ -1,36 +0,0 @@ -/* $NetBSD: __aeabi_fcmpgt.c,v 1.2 2013/04/16 13:38:34 matt Exp $ */
-
-/** @file
-*
-* Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-/*
- * Written by Ben Harris, 2000. This file is in the Public Domain.
- */
-
-#include "softfloat-for-gcc.h"
-#include "milieu.h"
-#include "softfloat.h"
-
-#if defined(LIBC_SCCS) && !defined(lint)
-__RCSID("$NetBSD: __aeabi_fcmpgt.c,v 1.2 2013/04/16 13:38:34 matt Exp $");
-#endif /* LIBC_SCCS and not lint */
-
-int __aeabi_fcmpgt(float32, float32);
-
-int
-__aeabi_fcmpgt(float32 a, float32 b)
-{
-
- return !float32_le(a, b) && float32_eq(a, a) && float32_eq(b, b);
-}
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmple.c b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmple.c deleted file mode 100644 index 8534b30fc4..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmple.c +++ /dev/null @@ -1,36 +0,0 @@ -/* $NetBSD: __aeabi_fcmple.c,v 1.1 2013/04/16 10:37:39 matt Exp $ */
-
-/** @file
-*
-* Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-/*
- * Written by Ben Harris, 2000. This file is in the Public Domain.
- */
-
-#include "softfloat-for-gcc.h"
-#include "milieu.h"
-#include "softfloat.h"
-
-#if defined(LIBC_SCCS) && !defined(lint)
-__RCSID("$NetBSD: __aeabi_fcmple.c,v 1.1 2013/04/16 10:37:39 matt Exp $");
-#endif /* LIBC_SCCS and not lint */
-
-int __aeabi_fcmple(float32, float32);
-
-int
-__aeabi_fcmple(float32 a, float32 b)
-{
-
- return float32_le(a, b);
-}
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmplt.c b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmplt.c deleted file mode 100644 index e5b12cdef2..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmplt.c +++ /dev/null @@ -1,36 +0,0 @@ -/* $NetBSD: __aeabi_fcmplt.c,v 1.1 2013/04/16 10:37:39 matt Exp $ */
-
-/** @file
-*
-* Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-/*
- * Written by Ben Harris, 2000. This file is in the Public Domain.
- */
-
-#include "softfloat-for-gcc.h"
-#include "milieu.h"
-#include "softfloat.h"
-
-#if defined(LIBC_SCCS) && !defined(lint)
-__RCSID("$NetBSD: __aeabi_fcmplt.c,v 1.1 2013/04/16 10:37:39 matt Exp $");
-#endif /* LIBC_SCCS and not lint */
-
-int __aeabi_fcmplt(float32, float32);
-
-int
-__aeabi_fcmplt(float32 a, float32 b)
-{
-
- return float32_lt(a, b);
-}
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpun.c b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpun.c deleted file mode 100644 index 903066f3ff..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpun.c +++ /dev/null @@ -1,41 +0,0 @@ -/* $NetBSD: __aeabi_fcmpun.c,v 1.1 2013/04/16 10:37:39 matt Exp $ */
-
-/** @file
-*
-* Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-/*
- * Written by Richard Earnshaw, 2003. This file is in the Public Domain.
- */
-
-#include "softfloat-for-gcc.h"
-#include "milieu.h"
-#include "softfloat.h"
-
-#if defined(LIBC_SCCS) && !defined(lint)
-__RCSID("$NetBSD: __aeabi_fcmpun.c,v 1.1 2013/04/16 10:37:39 matt Exp $");
-#endif /* LIBC_SCCS and not lint */
-
-int __aeabi_fcmpun(float32, float32);
-
-int
-__aeabi_fcmpun(float32 a, float32 b)
-{
- /*
- * The comparison is unordered if either input is a NaN.
- * Test for this by comparing each operand with itself.
- * We must perform both comparisons to correctly check for
- * signalling NaNs.
- */
- return !float32_eq(a, a) || !float32_eq(b, b);
-}
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/softfloat.h b/ArmPkg/Library/ArmSoftFloatLib/Arm/softfloat.h deleted file mode 100644 index a9004f6723..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/Arm/softfloat.h +++ /dev/null @@ -1,345 +0,0 @@ -/* $NetBSD: softfloat.h,v 1.10 2013/04/24 18:04:46 matt Exp $ */
-
-/* This is a derivative work. */
-
-/*
-===============================================================================
-
-This C header file is part of the SoftFloat IEC/IEEE Floating-point
-Arithmetic Package, Release 2a.
-
-Written by John R. Hauser. This work was made possible in part by the
-International Computer Science Institute, located at Suite 600, 1947 Center
-Street, Berkeley, California 94704. Funding was partially provided by the
-National Science Foundation under grant MIP-9311980. The original version
-of this code was written as part of a project to build a fixed-point vector
-processor in collaboration with the University of California at Berkeley,
-overseen by Profs. Nelson Morgan and John Wawrzynek. More information
-is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
-arithmetic/SoftFloat.html'.
-
-THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
-has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
-TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
-PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
-AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
-
-Derivative works are acceptable, even for commercial purposes, so long as
-(1) they include prominent notice that the work is derivative, and (2) they
-include prominent notice akin to these four paragraphs for those parts of
-this code that are retained.
-
-===============================================================================
-*/
-
-/*
--------------------------------------------------------------------------------
-The macro `FLOATX80' must be defined to enable the extended double-precision
-floating-point format `floatx80'. If this macro is not defined, the
-`floatx80' type will not be defined, and none of the functions that either
-input or output the `floatx80' type will be defined. The same applies to
-the `FLOAT128' macro and the quadruple-precision format `float128'.
--------------------------------------------------------------------------------
-*/
-/* #define FLOATX80 */
-/* #define FLOAT128 */
-
-#define FE_INVALID 0x01 /* invalid operation exception */
-#define FE_DIVBYZERO 0x02 /* divide-by-zero exception */
-#define FE_OVERFLOW 0x04 /* overflow exception */
-#define FE_UNDERFLOW 0x08 /* underflow exception */
-#define FE_INEXACT 0x10 /* imprecise (loss of precision; "inexact") */
-
-#define FE_ALL_EXCEPT 0x1f
-
-#define FE_TONEAREST 0 /* round to nearest representable number */
-#define FE_UPWARD 1 /* round toward positive infinity */
-#define FE_DOWNWARD 2 /* round toward negative infinity */
-#define FE_TOWARDZERO 3 /* round to zero (truncate) */
-
-typedef int fp_except;
-
-/* Bit defines for fp_except */
-
-#define FP_X_INV FE_INVALID /* invalid operation exception */
-#define FP_X_DZ FE_DIVBYZERO /* divide-by-zero exception */
-#define FP_X_OFL FE_OVERFLOW /* overflow exception */
-#define FP_X_UFL FE_UNDERFLOW /* underflow exception */
-#define FP_X_IMP FE_INEXACT /* imprecise (prec. loss; "inexact") */
-
-/* Rounding modes */
-
-typedef enum {
- FP_RN=FE_TONEAREST, /* round to nearest representable number */
- FP_RP=FE_UPWARD, /* round toward positive infinity */
- FP_RM=FE_DOWNWARD, /* round toward negative infinity */
- FP_RZ=FE_TOWARDZERO /* round to zero (truncate) */
-} fp_rnd;
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE floating-point types.
--------------------------------------------------------------------------------
-*/
-typedef unsigned int float32;
-typedef unsigned long long float64;
-#ifdef FLOATX80
-typedef struct {
- unsigned short high;
- unsigned long long low;
-} floatx80;
-#endif
-#ifdef FLOAT128
-typedef struct {
- unsigned long long high, low;
-} float128;
-#endif
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE floating-point underflow tininess-detection mode.
--------------------------------------------------------------------------------
-*/
-#ifndef SOFTFLOAT_FOR_GCC
-extern int float_detect_tininess;
-#endif
-enum {
- float_tininess_after_rounding = 0,
- float_tininess_before_rounding = 1
-};
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE floating-point rounding mode.
--------------------------------------------------------------------------------
-*/
-extern fp_rnd float_rounding_mode;
-#define float_round_nearest_even FP_RN
-#define float_round_to_zero FP_RZ
-#define float_round_down FP_RM
-#define float_round_up FP_RP
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE floating-point exception flags.
--------------------------------------------------------------------------------
-*/
-extern fp_except float_exception_flags;
-extern fp_except float_exception_mask;
-enum {
- float_flag_inexact = FP_X_IMP,
- float_flag_underflow = FP_X_UFL,
- float_flag_overflow = FP_X_OFL,
- float_flag_divbyzero = FP_X_DZ,
- float_flag_invalid = FP_X_INV
-};
-
-/*
--------------------------------------------------------------------------------
-Routine to raise any or all of the software IEC/IEEE floating-point
-exception flags.
--------------------------------------------------------------------------------
-*/
-void float_raise( fp_except );
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE integer-to-floating-point conversion routines.
--------------------------------------------------------------------------------
-*/
-float32 int32_to_float32( int32 );
-float32 uint32_to_float32( uint32 );
-float64 int32_to_float64( int32 );
-float64 uint32_to_float64( uint32 );
-#ifdef FLOATX80
-floatx80 int32_to_floatx80( int32 );
-floatx80 uint32_to_floatx80( uint32 );
-#endif
-#ifdef FLOAT128
-float128 int32_to_float128( int32 );
-float128 uint32_to_float128( uint32 );
-#endif
-#ifndef SOFTFLOAT_FOR_GCC /* __floatdi?f is in libgcc2.c */
-float32 int64_to_float32( long long );
-float64 int64_to_float64( long long );
-#ifdef FLOATX80
-floatx80 int64_to_floatx80( long long );
-#endif
-#ifdef FLOAT128
-float128 int64_to_float128( long long );
-#endif
-#endif
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE single-precision conversion routines.
--------------------------------------------------------------------------------
-*/
-int float32_to_int32( float32 );
-int float32_to_int32_round_to_zero( float32 );
-#if defined(SOFTFLOAT_FOR_GCC) && defined(SOFTFLOAT_NEED_FIXUNS)
-unsigned int float32_to_uint32_round_to_zero( float32 );
-#endif
-#ifndef SOFTFLOAT_FOR_GCC /* __fix?fdi provided by libgcc2.c */
-long long float32_to_int64( float32 );
-long long float32_to_int64_round_to_zero( float32 );
-#endif
-float64 float32_to_float64( float32 );
-#ifdef FLOATX80
-floatx80 float32_to_floatx80( float32 );
-#endif
-#ifdef FLOAT128
-float128 float32_to_float128( float32 );
-#endif
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE single-precision operations.
--------------------------------------------------------------------------------
-*/
-float32 float32_round_to_int( float32 );
-float32 float32_add( float32, float32 );
-float32 float32_sub( float32, float32 );
-float32 float32_mul( float32, float32 );
-float32 float32_div( float32, float32 );
-float32 float32_rem( float32, float32 );
-float32 float32_sqrt( float32 );
-int float32_eq( float32, float32 );
-int float32_le( float32, float32 );
-int float32_lt( float32, float32 );
-int float32_eq_signaling( float32, float32 );
-int float32_le_quiet( float32, float32 );
-int float32_lt_quiet( float32, float32 );
-#ifndef SOFTFLOAT_FOR_GCC
-int float32_is_signaling_nan( float32 );
-#endif
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE double-precision conversion routines.
--------------------------------------------------------------------------------
-*/
-int float64_to_int32( float64 );
-int float64_to_int32_round_to_zero( float64 );
-#if defined(SOFTFLOAT_FOR_GCC) && defined(SOFTFLOAT_NEED_FIXUNS)
-unsigned int float64_to_uint32_round_to_zero( float64 );
-#endif
-#ifndef SOFTFLOAT_FOR_GCC /* __fix?fdi provided by libgcc2.c */
-long long float64_to_int64( float64 );
-long long float64_to_int64_round_to_zero( float64 );
-#endif
-float32 float64_to_float32( float64 );
-#ifdef FLOATX80
-floatx80 float64_to_floatx80( float64 );
-#endif
-#ifdef FLOAT128
-float128 float64_to_float128( float64 );
-#endif
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE double-precision operations.
--------------------------------------------------------------------------------
-*/
-float64 float64_round_to_int( float64 );
-float64 float64_add( float64, float64 );
-float64 float64_sub( float64, float64 );
-float64 float64_mul( float64, float64 );
-float64 float64_div( float64, float64 );
-float64 float64_rem( float64, float64 );
-float64 float64_sqrt( float64 );
-int float64_eq( float64, float64 );
-int float64_le( float64, float64 );
-int float64_lt( float64, float64 );
-int float64_eq_signaling( float64, float64 );
-int float64_le_quiet( float64, float64 );
-int float64_lt_quiet( float64, float64 );
-#ifndef SOFTFLOAT_FOR_GCC
-int float64_is_signaling_nan( float64 );
-#endif
-
-#ifdef FLOATX80
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE extended double-precision conversion routines.
--------------------------------------------------------------------------------
-*/
-int floatx80_to_int32( floatx80 );
-int floatx80_to_int32_round_to_zero( floatx80 );
-long long floatx80_to_int64( floatx80 );
-long long floatx80_to_int64_round_to_zero( floatx80 );
-float32 floatx80_to_float32( floatx80 );
-float64 floatx80_to_float64( floatx80 );
-#ifdef FLOAT128
-float128 floatx80_to_float128( floatx80 );
-#endif
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE extended double-precision rounding precision. Valid
-values are 32, 64, and 80.
--------------------------------------------------------------------------------
-*/
-extern int floatx80_rounding_precision;
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE extended double-precision operations.
--------------------------------------------------------------------------------
-*/
-floatx80 floatx80_round_to_int( floatx80 );
-floatx80 floatx80_add( floatx80, floatx80 );
-floatx80 floatx80_sub( floatx80, floatx80 );
-floatx80 floatx80_mul( floatx80, floatx80 );
-floatx80 floatx80_div( floatx80, floatx80 );
-floatx80 floatx80_rem( floatx80, floatx80 );
-floatx80 floatx80_sqrt( floatx80 );
-int floatx80_eq( floatx80, floatx80 );
-int floatx80_le( floatx80, floatx80 );
-int floatx80_lt( floatx80, floatx80 );
-int floatx80_eq_signaling( floatx80, floatx80 );
-int floatx80_le_quiet( floatx80, floatx80 );
-int floatx80_lt_quiet( floatx80, floatx80 );
-int floatx80_is_signaling_nan( floatx80 );
-
-#endif
-
-#ifdef FLOAT128
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE quadruple-precision conversion routines.
--------------------------------------------------------------------------------
-*/
-int float128_to_int32( float128 );
-int float128_to_int32_round_to_zero( float128 );
-long long float128_to_int64( float128 );
-long long float128_to_int64_round_to_zero( float128 );
-float32 float128_to_float32( float128 );
-float64 float128_to_float64( float128 );
-#ifdef FLOATX80
-floatx80 float128_to_floatx80( float128 );
-#endif
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE quadruple-precision operations.
--------------------------------------------------------------------------------
-*/
-float128 float128_round_to_int( float128 );
-float128 float128_add( float128, float128 );
-float128 float128_sub( float128, float128 );
-float128 float128_mul( float128, float128 );
-float128 float128_div( float128, float128 );
-float128 float128_rem( float128, float128 );
-float128 float128_sqrt( float128 );
-int float128_eq( float128, float128 );
-int float128_le( float128, float128 );
-int float128_lt( float128, float128 );
-int float128_eq_signaling( float128, float128 );
-int float128_le_quiet( float128, float128 );
-int float128_lt_quiet( float128, float128 );
-int float128_is_signaling_nan( float128 );
-
-#endif
diff --git a/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf b/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf deleted file mode 100644 index 3c76381b25..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf +++ /dev/null @@ -1,54 +0,0 @@ -## @file
-# ARM Software floating point Library.
-#
-# Copyright (c) 2014, ARM Ltd. All rights reserved.
-# Copyright (c) 2015, Linaro Ltd. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmSoftFloatLib
- FILE_GUID = a485f921-749e-41a0-9f91-62f09a38721c
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmSoftFloatLib
-
-#
-# VALID_ARCHITECTURES = ARM
-#
-
-[Sources]
- bits32/softfloat.c
- Arm/__aeabi_dcmpeq.c
- Arm/__aeabi_fcmpeq.c
- Arm/__aeabi_dcmpge.c
- Arm/__aeabi_fcmpge.c
- Arm/__aeabi_dcmpgt.c
- Arm/__aeabi_fcmpgt.c
- Arm/__aeabi_dcmple.c
- Arm/__aeabi_fcmple.c
- Arm/__aeabi_dcmplt.c
- Arm/__aeabi_fcmplt.c
- Arm/__aeabi_dcmpun.c
- Arm/__aeabi_fcmpun.c
-
- Arm/__aeabi_cdcmp.asm | RVCT
- Arm/__aeabi_cfcmp.asm | RVCT
-
-[Packages]
- MdePkg/MdePkg.dec
-
-[BuildOptions]
- GCC:*_*_*_CC_FLAGS = -DSOFTFLOAT_FOR_GCC -Wno-enum-compare -fno-lto
- *_GCC46_*_CC_FLAGS = -fno-tree-vrp
- *_GCC47_*_CC_FLAGS = -fno-tree-vrp
- RVCT:*_*_*_CC_FLAGS = -DSOFTFLOAT_FOR_GCC
diff --git a/ArmPkg/Library/ArmSoftFloatLib/arm-gcc.h b/ArmPkg/Library/ArmSoftFloatLib/arm-gcc.h deleted file mode 100644 index 8cd4989998..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/arm-gcc.h +++ /dev/null @@ -1,114 +0,0 @@ -/** @file
-
- Copyright (c) 2014, ARM Limited. All rights reserved.
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-/* $NetBSD: arm-gcc.h,v 1.4 2013/01/26 07:08:14 matt Exp $ */
-
-/*
--------------------------------------------------------------------------------
-One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined.
--------------------------------------------------------------------------------
-*/
-#ifdef __ARMEB__
-#define BIGENDIAN
-#else
-#define LITTLEENDIAN
-#endif
-
-/*
--------------------------------------------------------------------------------
-The macro `BITS64' can be defined to indicate that 64-bit integer types are
-supported by the compiler.
--------------------------------------------------------------------------------
-*/
-#define BITS64
-
-/*
--------------------------------------------------------------------------------
-Each of the following `typedef's defines the most convenient type that holds
-integers of at least as many bits as specified. For example, `uint8' should
-be the most convenient type that can hold unsigned integers of as many as
-8 bits. The `flag' type must be able to hold either a 0 or 1. For most
-implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed
-to the same as `int'.
--------------------------------------------------------------------------------
-*/
-typedef int flag;
-typedef int uint8;
-typedef int int8;
-typedef int uint16;
-typedef int int16;
-typedef unsigned int uint32;
-typedef signed int int32;
-#ifdef BITS64
-typedef unsigned long long int uint64;
-typedef signed long long int int64;
-#endif
-
-/*
--------------------------------------------------------------------------------
-Each of the following `typedef's defines a type that holds integers
-of _exactly_ the number of bits specified. For instance, for most
-implementation of C, `bits16' and `sbits16' should be `typedef'ed to
-`unsigned short int' and `signed short int' (or `short int'), respectively.
--------------------------------------------------------------------------------
-*/
-typedef unsigned char bits8;
-typedef signed char sbits8;
-typedef unsigned short int bits16;
-typedef signed short int sbits16;
-typedef unsigned int bits32;
-typedef signed int sbits32;
-#ifdef BITS64
-typedef unsigned long long int bits64;
-typedef signed long long int sbits64;
-#endif
-
-#ifdef BITS64
-/*
--------------------------------------------------------------------------------
-The `LIT64' macro takes as its argument a textual integer literal and
-if necessary ``marks'' the literal as having a 64-bit integer type.
-For example, the GNU C Compiler (`gcc') requires that 64-bit literals be
-appended with the letters `LL' standing for `long long', which is `gcc's
-name for the 64-bit integer type. Some compilers may allow `LIT64' to be
-defined as the identity macro: `#define LIT64( a ) a'.
--------------------------------------------------------------------------------
-*/
-#define LIT64( a ) a##ULL
-#endif
-
-/*
--------------------------------------------------------------------------------
-The macro `INLINE' can be used before functions that should be inlined. If
-a compiler does not support explicit inlining, this macro should be defined
-to be `static'.
--------------------------------------------------------------------------------
-*/
-#define INLINE static inline
-
-/*
--------------------------------------------------------------------------------
-The ARM FPA is odd in that it stores doubles high-order word first, no matter
-what the endianness of the CPU. VFP is sane.
--------------------------------------------------------------------------------
-*/
-#if defined(SOFTFLOAT_FOR_GCC)
-#if defined(__VFP_FP__) || defined(__ARMEB__)
-#define FLOAT64_DEMANGLE(a) (a)
-#define FLOAT64_MANGLE(a) (a)
-#else
-#define FLOAT64_DEMANGLE(a) (((a) << 32) | ((a) >> 32))
-#define FLOAT64_MANGLE(a) FLOAT64_DEMANGLE(a)
-#endif
-#endif
diff --git a/ArmPkg/Library/ArmSoftFloatLib/bits32/softfloat-macros b/ArmPkg/Library/ArmSoftFloatLib/bits32/softfloat-macros deleted file mode 100644 index 8e1f2d8b9a..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/bits32/softfloat-macros +++ /dev/null @@ -1,648 +0,0 @@ -
-/*
-===============================================================================
-
-This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
-Arithmetic Package, Release 2a.
-
-Written by John R. Hauser. This work was made possible in part by the
-International Computer Science Institute, located at Suite 600, 1947 Center
-Street, Berkeley, California 94704. Funding was partially provided by the
-National Science Foundation under grant MIP-9311980. The original version
-of this code was written as part of a project to build a fixed-point vector
-processor in collaboration with the University of California at Berkeley,
-overseen by Profs. Nelson Morgan and John Wawrzynek. More information
-is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
-arithmetic/SoftFloat.html'.
-
-THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
-has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
-TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
-PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
-AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
-
-Derivative works are acceptable, even for commercial purposes, so long as
-(1) they include prominent notice that the work is derivative, and (2) they
-include prominent notice akin to these four paragraphs for those parts of
-this code that are retained.
-
-===============================================================================
-*/
-
-/*
--------------------------------------------------------------------------------
-Shifts `a' right by the number of bits given in `count'. If any nonzero
-bits are shifted off, they are ``jammed'' into the least significant bit of
-the result by setting the least significant bit to 1. The value of `count'
-can be arbitrarily large; in particular, if `count' is greater than 32, the
-result will be either 0 or 1, depending on whether `a' is zero or nonzero.
-The result is stored in the location pointed to by `zPtr'.
--------------------------------------------------------------------------------
-*/
-INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr )
-{
- bits32 z;
-
- if ( count == 0 ) {
- z = a;
- }
- else if ( count < 32 ) {
- z = ( a>>count ) | ( ( a<<( ( - count ) & 31 ) ) != 0 );
- }
- else {
- z = ( a != 0 );
- }
- *zPtr = z;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Shifts the 64-bit value formed by concatenating `a0' and `a1' right by the
-number of bits given in `count'. Any bits shifted off are lost. The value
-of `count' can be arbitrarily large; in particular, if `count' is greater
-than 64, the result will be 0. The result is broken into two 32-bit pieces
-which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
--------------------------------------------------------------------------------
-*/
-INLINE void
- shift64Right(
- bits32 a0, bits32 a1, int16 count, bits32 *z0Ptr, bits32 *z1Ptr )
-{
- bits32 z0, z1;
- int8 negCount = ( - count ) & 31;
-
- if ( count == 0 ) {
- z1 = a1;
- z0 = a0;
- }
- else if ( count < 32 ) {
- z1 = ( a0<<negCount ) | ( a1>>count );
- z0 = a0>>count;
- }
- else {
- z1 = ( count < 64 ) ? ( a0>>( count & 31 ) ) : 0;
- z0 = 0;
- }
- *z1Ptr = z1;
- *z0Ptr = z0;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Shifts the 64-bit value formed by concatenating `a0' and `a1' right by the
-number of bits given in `count'. If any nonzero bits are shifted off, they
-are ``jammed'' into the least significant bit of the result by setting the
-least significant bit to 1. The value of `count' can be arbitrarily large;
-in particular, if `count' is greater than 64, the result will be either 0
-or 1, depending on whether the concatenation of `a0' and `a1' is zero or
-nonzero. The result is broken into two 32-bit pieces which are stored at
-the locations pointed to by `z0Ptr' and `z1Ptr'.
--------------------------------------------------------------------------------
-*/
-INLINE void
- shift64RightJamming(
- bits32 a0, bits32 a1, int16 count, bits32 *z0Ptr, bits32 *z1Ptr )
-{
- bits32 z0, z1;
- int8 negCount = ( - count ) & 31;
-
- if ( count == 0 ) {
- z1 = a1;
- z0 = a0;
- }
- else if ( count < 32 ) {
- z1 = ( a0<<negCount ) | ( a1>>count ) | ( ( a1<<negCount ) != 0 );
- z0 = a0>>count;
- }
- else {
- if ( count == 32 ) {
- z1 = a0 | ( a1 != 0 );
- }
- else if ( count < 64 ) {
- z1 = ( a0>>( count & 31 ) ) | ( ( ( a0<<negCount ) | a1 ) != 0 );
- }
- else {
- z1 = ( ( a0 | a1 ) != 0 );
- }
- z0 = 0;
- }
- *z1Ptr = z1;
- *z0Ptr = z0;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Shifts the 96-bit value formed by concatenating `a0', `a1', and `a2' right
-by 32 _plus_ the number of bits given in `count'. The shifted result is
-at most 64 nonzero bits; these are broken into two 32-bit pieces which are
-stored at the locations pointed to by `z0Ptr' and `z1Ptr'. The bits shifted
-off form a third 32-bit result as follows: The _last_ bit shifted off is
-the most-significant bit of the extra result, and the other 31 bits of the
-extra result are all zero if and only if _all_but_the_last_ bits shifted off
-were all zero. This extra result is stored in the location pointed to by
-`z2Ptr'. The value of `count' can be arbitrarily large.
- (This routine makes more sense if `a0', `a1', and `a2' are considered
-to form a fixed-point value with binary point between `a1' and `a2'. This
-fixed-point value is shifted right by the number of bits given in `count',
-and the integer part of the result is returned at the locations pointed to
-by `z0Ptr' and `z1Ptr'. The fractional part of the result may be slightly
-corrupted as described above, and is returned at the location pointed to by
-`z2Ptr'.)
--------------------------------------------------------------------------------
-*/
-INLINE void
- shift64ExtraRightJamming(
- bits32 a0,
- bits32 a1,
- bits32 a2,
- int16 count,
- bits32 *z0Ptr,
- bits32 *z1Ptr,
- bits32 *z2Ptr
- )
-{
- bits32 z0, z1, z2;
- int8 negCount = ( - count ) & 31;
-
- if ( count == 0 ) {
- z2 = a2;
- z1 = a1;
- z0 = a0;
- }
- else {
- if ( count < 32 ) {
- z2 = a1<<negCount;
- z1 = ( a0<<negCount ) | ( a1>>count );
- z0 = a0>>count;
- }
- else {
- if ( count == 32 ) {
- z2 = a1;
- z1 = a0;
- }
- else {
- a2 |= a1;
- if ( count < 64 ) {
- z2 = a0<<negCount;
- z1 = a0>>( count & 31 );
- }
- else {
- z2 = ( count == 64 ) ? a0 : ( a0 != 0 );
- z1 = 0;
- }
- }
- z0 = 0;
- }
- z2 |= ( a2 != 0 );
- }
- *z2Ptr = z2;
- *z1Ptr = z1;
- *z0Ptr = z0;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Shifts the 64-bit value formed by concatenating `a0' and `a1' left by the
-number of bits given in `count'. Any bits shifted off are lost. The value
-of `count' must be less than 32. The result is broken into two 32-bit
-pieces which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
--------------------------------------------------------------------------------
-*/
-INLINE void
- shortShift64Left(
- bits32 a0, bits32 a1, int16 count, bits32 *z0Ptr, bits32 *z1Ptr )
-{
-
- *z1Ptr = a1<<count;
- *z0Ptr =
- ( count == 0 ) ? a0 : ( a0<<count ) | ( a1>>( ( - count ) & 31 ) );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Shifts the 96-bit value formed by concatenating `a0', `a1', and `a2' left
-by the number of bits given in `count'. Any bits shifted off are lost.
-The value of `count' must be less than 32. The result is broken into three
-32-bit pieces which are stored at the locations pointed to by `z0Ptr',
-`z1Ptr', and `z2Ptr'.
--------------------------------------------------------------------------------
-*/
-INLINE void
- shortShift96Left(
- bits32 a0,
- bits32 a1,
- bits32 a2,
- int16 count,
- bits32 *z0Ptr,
- bits32 *z1Ptr,
- bits32 *z2Ptr
- )
-{
- bits32 z0, z1, z2;
- int8 negCount;
-
- z2 = a2<<count;
- z1 = a1<<count;
- z0 = a0<<count;
- if ( 0 < count ) {
- negCount = ( ( - count ) & 31 );
- z1 |= a2>>negCount;
- z0 |= a1>>negCount;
- }
- *z2Ptr = z2;
- *z1Ptr = z1;
- *z0Ptr = z0;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Adds the 64-bit value formed by concatenating `a0' and `a1' to the 64-bit
-value formed by concatenating `b0' and `b1'. Addition is modulo 2^64, so
-any carry out is lost. The result is broken into two 32-bit pieces which
-are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
--------------------------------------------------------------------------------
-*/
-INLINE void
- add64(
- bits32 a0, bits32 a1, bits32 b0, bits32 b1, bits32 *z0Ptr, bits32 *z1Ptr )
-{
- bits32 z1;
-
- z1 = a1 + b1;
- *z1Ptr = z1;
- *z0Ptr = a0 + b0 + ( z1 < a1 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Adds the 96-bit value formed by concatenating `a0', `a1', and `a2' to the
-96-bit value formed by concatenating `b0', `b1', and `b2'. Addition is
-modulo 2^96, so any carry out is lost. The result is broken into three
-32-bit pieces which are stored at the locations pointed to by `z0Ptr',
-`z1Ptr', and `z2Ptr'.
--------------------------------------------------------------------------------
-*/
-INLINE void
- add96(
- bits32 a0,
- bits32 a1,
- bits32 a2,
- bits32 b0,
- bits32 b1,
- bits32 b2,
- bits32 *z0Ptr,
- bits32 *z1Ptr,
- bits32 *z2Ptr
- )
-{
- bits32 z0, z1, z2;
- int8 carry0, carry1;
-
- z2 = a2 + b2;
- carry1 = ( z2 < a2 );
- z1 = a1 + b1;
- carry0 = ( z1 < a1 );
- z0 = a0 + b0;
- z1 += carry1;
- z0 += ( z1 < (bits32)carry1 );
- z0 += carry0;
- *z2Ptr = z2;
- *z1Ptr = z1;
- *z0Ptr = z0;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Subtracts the 64-bit value formed by concatenating `b0' and `b1' from the
-64-bit value formed by concatenating `a0' and `a1'. Subtraction is modulo
-2^64, so any borrow out (carry out) is lost. The result is broken into two
-32-bit pieces which are stored at the locations pointed to by `z0Ptr' and
-`z1Ptr'.
--------------------------------------------------------------------------------
-*/
-INLINE void
- sub64(
- bits32 a0, bits32 a1, bits32 b0, bits32 b1, bits32 *z0Ptr, bits32 *z1Ptr )
-{
-
- *z1Ptr = a1 - b1;
- *z0Ptr = a0 - b0 - ( a1 < b1 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Subtracts the 96-bit value formed by concatenating `b0', `b1', and `b2' from
-the 96-bit value formed by concatenating `a0', `a1', and `a2'. Subtraction
-is modulo 2^96, so any borrow out (carry out) is lost. The result is broken
-into three 32-bit pieces which are stored at the locations pointed to by
-`z0Ptr', `z1Ptr', and `z2Ptr'.
--------------------------------------------------------------------------------
-*/
-INLINE void
- sub96(
- bits32 a0,
- bits32 a1,
- bits32 a2,
- bits32 b0,
- bits32 b1,
- bits32 b2,
- bits32 *z0Ptr,
- bits32 *z1Ptr,
- bits32 *z2Ptr
- )
-{
- bits32 z0, z1, z2;
- int8 borrow0, borrow1;
-
- z2 = a2 - b2;
- borrow1 = ( a2 < b2 );
- z1 = a1 - b1;
- borrow0 = ( a1 < b1 );
- z0 = a0 - b0;
- z0 -= ( z1 < (bits32)borrow1 );
- z1 -= borrow1;
- z0 -= borrow0;
- *z2Ptr = z2;
- *z1Ptr = z1;
- *z0Ptr = z0;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Multiplies `a' by `b' to obtain a 64-bit product. The product is broken
-into two 32-bit pieces which are stored at the locations pointed to by
-`z0Ptr' and `z1Ptr'.
--------------------------------------------------------------------------------
-*/
-INLINE void mul32To64( bits32 a, bits32 b, bits32 *z0Ptr, bits32 *z1Ptr )
-{
- bits16 aHigh, aLow, bHigh, bLow;
- bits32 z0, zMiddleA, zMiddleB, z1;
-
- aLow = a;
- aHigh = a>>16;
- bLow = b;
- bHigh = b>>16;
- z1 = ( (bits32) aLow ) * bLow;
- zMiddleA = ( (bits32) aLow ) * bHigh;
- zMiddleB = ( (bits32) aHigh ) * bLow;
- z0 = ( (bits32) aHigh ) * bHigh;
- zMiddleA += zMiddleB;
- z0 += ( ( (bits32) ( zMiddleA < zMiddleB ) )<<16 ) + ( zMiddleA>>16 );
- zMiddleA <<= 16;
- z1 += zMiddleA;
- z0 += ( z1 < zMiddleA );
- *z1Ptr = z1;
- *z0Ptr = z0;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Multiplies the 64-bit value formed by concatenating `a0' and `a1' by `b'
-to obtain a 96-bit product. The product is broken into three 32-bit pieces
-which are stored at the locations pointed to by `z0Ptr', `z1Ptr', and
-`z2Ptr'.
--------------------------------------------------------------------------------
-*/
-INLINE void
- mul64By32To96(
- bits32 a0,
- bits32 a1,
- bits32 b,
- bits32 *z0Ptr,
- bits32 *z1Ptr,
- bits32 *z2Ptr
- )
-{
- bits32 z0, z1, z2, more1;
-
- mul32To64( a1, b, &z1, &z2 );
- mul32To64( a0, b, &z0, &more1 );
- add64( z0, more1, 0, z1, &z0, &z1 );
- *z2Ptr = z2;
- *z1Ptr = z1;
- *z0Ptr = z0;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Multiplies the 64-bit value formed by concatenating `a0' and `a1' to the
-64-bit value formed by concatenating `b0' and `b1' to obtain a 128-bit
-product. The product is broken into four 32-bit pieces which are stored at
-the locations pointed to by `z0Ptr', `z1Ptr', `z2Ptr', and `z3Ptr'.
--------------------------------------------------------------------------------
-*/
-INLINE void
- mul64To128(
- bits32 a0,
- bits32 a1,
- bits32 b0,
- bits32 b1,
- bits32 *z0Ptr,
- bits32 *z1Ptr,
- bits32 *z2Ptr,
- bits32 *z3Ptr
- )
-{
- bits32 z0, z1, z2, z3;
- bits32 more1, more2;
-
- mul32To64( a1, b1, &z2, &z3 );
- mul32To64( a1, b0, &z1, &more2 );
- add64( z1, more2, 0, z2, &z1, &z2 );
- mul32To64( a0, b0, &z0, &more1 );
- add64( z0, more1, 0, z1, &z0, &z1 );
- mul32To64( a0, b1, &more1, &more2 );
- add64( more1, more2, 0, z2, &more1, &z2 );
- add64( z0, z1, 0, more1, &z0, &z1 );
- *z3Ptr = z3;
- *z2Ptr = z2;
- *z1Ptr = z1;
- *z0Ptr = z0;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns an approximation to the 32-bit integer quotient obtained by dividing
-`b' into the 64-bit value formed by concatenating `a0' and `a1'. The
-divisor `b' must be at least 2^31. If q is the exact quotient truncated
-toward zero, the approximation returned lies between q and q + 2 inclusive.
-If the exact quotient q is larger than 32 bits, the maximum positive 32-bit
-unsigned integer is returned.
--------------------------------------------------------------------------------
-*/
-static bits32 estimateDiv64To32( bits32 a0, bits32 a1, bits32 b )
-{
- bits32 b0, b1;
- bits32 rem0, rem1, term0, term1;
- bits32 z;
-
- if ( b <= a0 ) return 0xFFFFFFFF;
- b0 = b>>16;
- z = ( b0<<16 <= a0 ) ? 0xFFFF0000 : ( a0 / b0 )<<16;
- mul32To64( b, z, &term0, &term1 );
- sub64( a0, a1, term0, term1, &rem0, &rem1 );
- while ( ( (sbits32) rem0 ) < 0 ) {
- z -= 0x10000;
- b1 = b<<16;
- add64( rem0, rem1, b0, b1, &rem0, &rem1 );
- }
- rem0 = ( rem0<<16 ) | ( rem1>>16 );
- z |= ( b0<<16 <= rem0 ) ? 0xFFFF : rem0 / b0;
- return z;
-
-}
-
-#ifndef SOFTFLOAT_FOR_GCC
-/*
--------------------------------------------------------------------------------
-Returns an approximation to the square root of the 32-bit significand given
-by `a'. Considered as an integer, `a' must be at least 2^31. If bit 0 of
-`aExp' (the least significant bit) is 1, the integer returned approximates
-2^31*sqrt(`a'/2^31), where `a' is considered an integer. If bit 0 of `aExp'
-is 0, the integer returned approximates 2^31*sqrt(`a'/2^30). In either
-case, the approximation returned lies strictly within +/-2 of the exact
-value.
--------------------------------------------------------------------------------
-*/
-static bits32 estimateSqrt32( int16 aExp, bits32 a )
-{
- static const bits16 sqrtOddAdjustments[] = {
- 0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0,
- 0x039C, 0x0468, 0x0545, 0x0631, 0x072B, 0x0832, 0x0946, 0x0A67
- };
- static const bits16 sqrtEvenAdjustments[] = {
- 0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E,
- 0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002
- };
- int8 index;
- bits32 z;
-
- index = ( a>>27 ) & 15;
- if ( aExp & 1 ) {
- z = 0x4000 + ( a>>17 ) - sqrtOddAdjustments[ index ];
- z = ( ( a / z )<<14 ) + ( z<<15 );
- a >>= 1;
- }
- else {
- z = 0x8000 + ( a>>17 ) - sqrtEvenAdjustments[ index ];
- z = a / z + z;
- z = ( 0x20000 <= z ) ? 0xFFFF8000 : ( z<<15 );
- if ( z <= a ) return (bits32) ( ( (sbits32) a )>>1 );
- }
- return ( ( estimateDiv64To32( a, 0, z ) )>>1 ) + ( z>>1 );
-
-}
-#endif
-
-/*
--------------------------------------------------------------------------------
-Returns the number of leading 0 bits before the most-significant 1 bit of
-`a'. If `a' is zero, 32 is returned.
--------------------------------------------------------------------------------
-*/
-static int8 countLeadingZeros32( bits32 a )
-{
- static const int8 countLeadingZerosHigh[] = {
- 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4,
- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
- };
- int8 shiftCount;
-
- shiftCount = 0;
- if ( a < 0x10000 ) {
- shiftCount += 16;
- a <<= 16;
- }
- if ( a < 0x1000000 ) {
- shiftCount += 8;
- a <<= 8;
- }
- shiftCount += countLeadingZerosHigh[ a>>24 ];
- return shiftCount;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the 64-bit value formed by concatenating `a0' and `a1' is
-equal to the 64-bit value formed by concatenating `b0' and `b1'. Otherwise,
-returns 0.
--------------------------------------------------------------------------------
-*/
-INLINE flag eq64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 )
-{
-
- return ( a0 == b0 ) && ( a1 == b1 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the 64-bit value formed by concatenating `a0' and `a1' is less
-than or equal to the 64-bit value formed by concatenating `b0' and `b1'.
-Otherwise, returns 0.
--------------------------------------------------------------------------------
-*/
-INLINE flag le64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 )
-{
-
- return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 <= b1 ) );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the 64-bit value formed by concatenating `a0' and `a1' is less
-than the 64-bit value formed by concatenating `b0' and `b1'. Otherwise,
-returns 0.
--------------------------------------------------------------------------------
-*/
-INLINE flag lt64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 )
-{
-
- return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the 64-bit value formed by concatenating `a0' and `a1' is not
-equal to the 64-bit value formed by concatenating `b0' and `b1'. Otherwise,
-returns 0.
--------------------------------------------------------------------------------
-*/
-INLINE flag ne64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 )
-{
-
- return ( a0 != b0 ) || ( a1 != b1 );
-
-}
-
diff --git a/ArmPkg/Library/ArmSoftFloatLib/bits32/softfloat.c b/ArmPkg/Library/ArmSoftFloatLib/bits32/softfloat.c deleted file mode 100644 index 759b8a0077..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/bits32/softfloat.c +++ /dev/null @@ -1,2354 +0,0 @@ -/* $NetBSD: softfloat.c,v 1.3 2013/01/10 08:16:11 matt Exp $ */
-
-/*
- * This version hacked for use with gcc -msoft-float by bjh21.
- * (Mostly a case of #ifdefing out things GCC doesn't need or provides
- * itself).
- */
-
-/*
- * Things you may want to define:
- *
- * SOFTFLOAT_FOR_GCC - build only those functions necessary for GCC (with
- * -msoft-float) to work. Include "softfloat-for-gcc.h" to get them
- * properly renamed.
- */
-
-/*
- * This differs from the standard bits32/softfloat.c in that float64
- * is defined to be a 64-bit integer rather than a structure. The
- * structure is float64s, with translation between the two going via
- * float64u.
- */
-
-/*
-===============================================================================
-
-This C source file is part of the SoftFloat IEC/IEEE Floating-Point
-Arithmetic Package, Release 2a.
-
-Written by John R. Hauser. This work was made possible in part by the
-International Computer Science Institute, located at Suite 600, 1947 Center
-Street, Berkeley, California 94704. Funding was partially provided by the
-National Science Foundation under grant MIP-9311980. The original version
-of this code was written as part of a project to build a fixed-point vector
-processor in collaboration with the University of California at Berkeley,
-overseen by Profs. Nelson Morgan and John Wawrzynek. More information
-is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
-arithmetic/SoftFloat.html'.
-
-THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
-has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
-TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
-PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
-AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
-
-Derivative works are acceptable, even for commercial purposes, so long as
-(1) they include prominent notice that the work is derivative, and (2) they
-include prominent notice akin to these four paragraphs for those parts of
-this code that are retained.
-
-===============================================================================
-*/
-
-#if defined(LIBC_SCCS) && !defined(lint)
-__RCSID("$NetBSD: softfloat.c,v 1.3 2013/01/10 08:16:11 matt Exp $");
-#endif /* LIBC_SCCS and not lint */
-
-#ifdef SOFTFLOAT_FOR_GCC
-#include "softfloat-for-gcc.h"
-#endif
-
-#include "milieu.h"
-#include "softfloat.h"
-
-/*
- * Conversions between floats as stored in memory and floats as
- * SoftFloat uses them
- */
-#ifndef FLOAT64_DEMANGLE
-#define FLOAT64_DEMANGLE(a) (a)
-#endif
-#ifndef FLOAT64_MANGLE
-#define FLOAT64_MANGLE(a) (a)
-#endif
-
-/*
--------------------------------------------------------------------------------
-Floating-point rounding mode and exception flags.
--------------------------------------------------------------------------------
-*/
-#ifndef set_float_rounding_mode
-fp_rnd float_rounding_mode = float_round_nearest_even;
-fp_except float_exception_flags = 0;
-#endif
-#ifndef set_float_exception_inexact_flag
-#define set_float_exception_inexact_flag() \
- ((void)(float_exception_flags |= float_flag_inexact))
-#endif
-
-/*
--------------------------------------------------------------------------------
-Primitive arithmetic functions, including multi-word arithmetic, and
-division and square root approximations. (Can be specialized to target if
-desired.)
--------------------------------------------------------------------------------
-*/
-#include "softfloat-macros"
-
-/*
--------------------------------------------------------------------------------
-Functions and definitions to determine: (1) whether tininess for underflow
-is detected before or after rounding by default, (2) what (if anything)
-happens when exceptions are raised, (3) how signaling NaNs are distinguished
-from quiet NaNs, (4) the default generated quiet NaNs, and (4) how NaNs
-are propagated from function inputs to output. These details are target-
-specific.
--------------------------------------------------------------------------------
-*/
-#include "softfloat-specialize"
-
-/*
--------------------------------------------------------------------------------
-Returns the fraction bits of the single-precision floating-point value `a'.
--------------------------------------------------------------------------------
-*/
-INLINE bits32 extractFloat32Frac( float32 a )
-{
-
- return a & 0x007FFFFF;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the exponent bits of the single-precision floating-point value `a'.
--------------------------------------------------------------------------------
-*/
-INLINE int16 extractFloat32Exp( float32 a )
-{
-
- return ( a>>23 ) & 0xFF;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the sign bit of the single-precision floating-point value `a'.
--------------------------------------------------------------------------------
-*/
-INLINE flag extractFloat32Sign( float32 a )
-{
-
- return a>>31;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Normalizes the subnormal single-precision floating-point value represented
-by the denormalized significand `aSig'. The normalized exponent and
-significand are stored at the locations pointed to by `zExpPtr' and
-`zSigPtr', respectively.
--------------------------------------------------------------------------------
-*/
-static void
- normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr )
-{
- int8 shiftCount;
-
- shiftCount = countLeadingZeros32( aSig ) - 8;
- *zSigPtr = aSig<<shiftCount;
- *zExpPtr = 1 - shiftCount;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Packs the sign `zSign', exponent `zExp', and significand `zSig' into a
-single-precision floating-point value, returning the result. After being
-shifted into the proper positions, the three fields are simply added
-together to form the result. This means that any integer portion of `zSig'
-will be added into the exponent. Since a properly normalized significand
-will have an integer portion equal to 1, the `zExp' input should be 1 less
-than the desired result exponent whenever `zSig' is a complete, normalized
-significand.
--------------------------------------------------------------------------------
-*/
-INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig )
-{
-
- return ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Takes an abstract floating-point value having sign `zSign', exponent `zExp',
-and significand `zSig', and returns the proper single-precision floating-
-point value corresponding to the abstract input. Ordinarily, the abstract
-value is simply rounded and packed into the single-precision format, with
-the inexact exception raised if the abstract input cannot be represented
-exactly. However, if the abstract value is too large, the overflow and
-inexact exceptions are raised and an infinity or maximal finite value is
-returned. If the abstract value is too small, the input value is rounded to
-a subnormal number, and the underflow and inexact exceptions are raised if
-the abstract input cannot be represented exactly as a subnormal single-
-precision floating-point number.
- The input significand `zSig' has its binary point between bits 30
-and 29, which is 7 bits to the left of the usual location. This shifted
-significand must be normalized or smaller. If `zSig' is not normalized,
-`zExp' must be 0; in that case, the result returned is a subnormal number,
-and it must not require rounding. In the usual case that `zSig' is
-normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.
-The handling of underflow and overflow follows the IEC/IEEE Standard for
-Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )
-{
- int8 roundingMode;
- flag roundNearestEven;
- int8 roundIncrement, roundBits;
- flag isTiny;
-
- roundingMode = float_rounding_mode;
- roundNearestEven = roundingMode == float_round_nearest_even;
- roundIncrement = 0x40;
- if ( ! roundNearestEven ) {
- if ( roundingMode == float_round_to_zero ) {
- roundIncrement = 0;
- }
- else {
- roundIncrement = 0x7F;
- if ( zSign ) {
- if ( roundingMode == float_round_up ) roundIncrement = 0;
- }
- else {
- if ( roundingMode == float_round_down ) roundIncrement = 0;
- }
- }
- }
- roundBits = zSig & 0x7F;
- if ( 0xFD <= (bits16) zExp ) {
- if ( ( 0xFD < zExp )
- || ( ( zExp == 0xFD )
- && ( (sbits32) ( zSig + roundIncrement ) < 0 ) )
- ) {
- float_raise( float_flag_overflow | float_flag_inexact );
- return packFloat32( zSign, 0xFF, 0 ) - ( roundIncrement == 0 );
- }
- if ( zExp < 0 ) {
- isTiny =
- ( float_detect_tininess == float_tininess_before_rounding )
- || ( zExp < -1 )
- || ( zSig + roundIncrement < (uint32)0x80000000 );
- shift32RightJamming( zSig, - zExp, &zSig );
- zExp = 0;
- roundBits = zSig & 0x7F;
- if ( isTiny && roundBits ) float_raise( float_flag_underflow );
- }
- }
- if ( roundBits ) set_float_exception_inexact_flag();
- zSig = ( zSig + roundIncrement )>>7;
- zSig &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
- if ( zSig == 0 ) zExp = 0;
- return packFloat32( zSign, zExp, zSig );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Takes an abstract floating-point value having sign `zSign', exponent `zExp',
-and significand `zSig', and returns the proper single-precision floating-
-point value corresponding to the abstract input. This routine is just like
-`roundAndPackFloat32' except that `zSig' does not have to be normalized.
-Bit 31 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''
-floating-point exponent.
--------------------------------------------------------------------------------
-*/
-static float32
- normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )
-{
- int8 shiftCount;
-
- shiftCount = countLeadingZeros32( zSig ) - 1;
- return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<<shiftCount );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the least-significant 32 fraction bits of the double-precision
-floating-point value `a'.
--------------------------------------------------------------------------------
-*/
-INLINE bits32 extractFloat64Frac1( float64 a )
-{
-
- return (bits32)(FLOAT64_DEMANGLE(a) & LIT64(0x00000000FFFFFFFF));
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the most-significant 20 fraction bits of the double-precision
-floating-point value `a'.
--------------------------------------------------------------------------------
-*/
-INLINE bits32 extractFloat64Frac0( float64 a )
-{
-
- return (bits32)((FLOAT64_DEMANGLE(a) >> 32) & 0x000FFFFF);
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the exponent bits of the double-precision floating-point value `a'.
--------------------------------------------------------------------------------
-*/
-INLINE int16 extractFloat64Exp( float64 a )
-{
-
- return (int16)((FLOAT64_DEMANGLE(a) >> 52) & 0x7FF);
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the sign bit of the double-precision floating-point value `a'.
--------------------------------------------------------------------------------
-*/
-INLINE flag extractFloat64Sign( float64 a )
-{
-
- return (flag)(FLOAT64_DEMANGLE(a) >> 63);
-
-}
-
-/*
--------------------------------------------------------------------------------
-Normalizes the subnormal double-precision floating-point value represented
-by the denormalized significand formed by the concatenation of `aSig0' and
-`aSig1'. The normalized exponent is stored at the location pointed to by
-`zExpPtr'. The most significant 21 bits of the normalized significand are
-stored at the location pointed to by `zSig0Ptr', and the least significant
-32 bits of the normalized significand are stored at the location pointed to
-by `zSig1Ptr'.
--------------------------------------------------------------------------------
-*/
-static void
- normalizeFloat64Subnormal(
- bits32 aSig0,
- bits32 aSig1,
- int16 *zExpPtr,
- bits32 *zSig0Ptr,
- bits32 *zSig1Ptr
- )
-{
- int8 shiftCount;
-
- if ( aSig0 == 0 ) {
- shiftCount = countLeadingZeros32( aSig1 ) - 11;
- if ( shiftCount < 0 ) {
- *zSig0Ptr = aSig1>>( - shiftCount );
- *zSig1Ptr = aSig1<<( shiftCount & 31 );
- }
- else {
- *zSig0Ptr = aSig1<<shiftCount;
- *zSig1Ptr = 0;
- }
- *zExpPtr = - shiftCount - 31;
- }
- else {
- shiftCount = countLeadingZeros32( aSig0 ) - 11;
- shortShift64Left( aSig0, aSig1, shiftCount, zSig0Ptr, zSig1Ptr );
- *zExpPtr = 1 - shiftCount;
- }
-
-}
-
-/*
--------------------------------------------------------------------------------
-Packs the sign `zSign', the exponent `zExp', and the significand formed by
-the concatenation of `zSig0' and `zSig1' into a double-precision floating-
-point value, returning the result. After being shifted into the proper
-positions, the three fields `zSign', `zExp', and `zSig0' are simply added
-together to form the most significant 32 bits of the result. This means
-that any integer portion of `zSig0' will be added into the exponent. Since
-a properly normalized significand will have an integer portion equal to 1,
-the `zExp' input should be 1 less than the desired result exponent whenever
-`zSig0' and `zSig1' concatenated form a complete, normalized significand.
--------------------------------------------------------------------------------
-*/
-INLINE float64
- packFloat64( flag zSign, int16 zExp, bits32 zSig0, bits32 zSig1 )
-{
-
- return FLOAT64_MANGLE( ( ( (bits64) zSign )<<63 ) +
- ( ( (bits64) zExp )<<52 ) +
- ( ( (bits64) zSig0 )<<32 ) + zSig1 );
-
-
-}
-
-/*
--------------------------------------------------------------------------------
-Takes an abstract floating-point value having sign `zSign', exponent `zExp',
-and extended significand formed by the concatenation of `zSig0', `zSig1',
-and `zSig2', and returns the proper double-precision floating-point value
-corresponding to the abstract input. Ordinarily, the abstract value is
-simply rounded and packed into the double-precision format, with the inexact
-exception raised if the abstract input cannot be represented exactly.
-However, if the abstract value is too large, the overflow and inexact
-exceptions are raised and an infinity or maximal finite value is returned.
-If the abstract value is too small, the input value is rounded to a
-subnormal number, and the underflow and inexact exceptions are raised if the
-abstract input cannot be represented exactly as a subnormal double-precision
-floating-point number.
- The input significand must be normalized or smaller. If the input
-significand is not normalized, `zExp' must be 0; in that case, the result
-returned is a subnormal number, and it must not require rounding. In the
-usual case that the input significand is normalized, `zExp' must be 1 less
-than the ``true'' floating-point exponent. The handling of underflow and
-overflow follows the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-static float64
- roundAndPackFloat64(
- flag zSign, int16 zExp, bits32 zSig0, bits32 zSig1, bits32 zSig2 )
-{
- int8 roundingMode;
- flag roundNearestEven, increment, isTiny;
-
- roundingMode = float_rounding_mode;
- roundNearestEven = ( roundingMode == float_round_nearest_even );
- increment = ( (sbits32) zSig2 < 0 );
- if ( ! roundNearestEven ) {
- if ( roundingMode == float_round_to_zero ) {
- increment = 0;
- }
- else {
- if ( zSign ) {
- increment = ( roundingMode == float_round_down ) && zSig2;
- }
- else {
- increment = ( roundingMode == float_round_up ) && zSig2;
- }
- }
- }
- if ( 0x7FD <= (bits16) zExp ) {
- if ( ( 0x7FD < zExp )
- || ( ( zExp == 0x7FD )
- && eq64( 0x001FFFFF, 0xFFFFFFFF, zSig0, zSig1 )
- && increment
- )
- ) {
- float_raise( float_flag_overflow | float_flag_inexact );
- if ( ( roundingMode == float_round_to_zero )
- || ( zSign && ( roundingMode == float_round_up ) )
- || ( ! zSign && ( roundingMode == float_round_down ) )
- ) {
- return packFloat64( zSign, 0x7FE, 0x000FFFFF, 0xFFFFFFFF );
- }
- return packFloat64( zSign, 0x7FF, 0, 0 );
- }
- if ( zExp < 0 ) {
- isTiny =
- ( float_detect_tininess == float_tininess_before_rounding )
- || ( zExp < -1 )
- || ! increment
- || lt64( zSig0, zSig1, 0x001FFFFF, 0xFFFFFFFF );
- shift64ExtraRightJamming(
- zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );
- zExp = 0;
- if ( isTiny && zSig2 ) float_raise( float_flag_underflow );
- if ( roundNearestEven ) {
- increment = ( (sbits32) zSig2 < 0 );
- }
- else {
- if ( zSign ) {
- increment = ( roundingMode == float_round_down ) && zSig2;
- }
- else {
- increment = ( roundingMode == float_round_up ) && zSig2;
- }
- }
- }
- }
- if ( zSig2 ) set_float_exception_inexact_flag();
- if ( increment ) {
- add64( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );
- zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );
- }
- else {
- if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;
- }
- return packFloat64( zSign, zExp, zSig0, zSig1 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Takes an abstract floating-point value having sign `zSign', exponent `zExp',
-and significand formed by the concatenation of `zSig0' and `zSig1', and
-returns the proper double-precision floating-point value corresponding
-to the abstract input. This routine is just like `roundAndPackFloat64'
-except that the input significand has fewer bits and does not have to be
-normalized. In all cases, `zExp' must be 1 less than the ``true'' floating-
-point exponent.
--------------------------------------------------------------------------------
-*/
-static float64
- normalizeRoundAndPackFloat64(
- flag zSign, int16 zExp, bits32 zSig0, bits32 zSig1 )
-{
- int8 shiftCount;
- bits32 zSig2;
-
- if ( zSig0 == 0 ) {
- zSig0 = zSig1;
- zSig1 = 0;
- zExp -= 32;
- }
- shiftCount = countLeadingZeros32( zSig0 ) - 11;
- if ( 0 <= shiftCount ) {
- zSig2 = 0;
- shortShift64Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
- }
- else {
- shift64ExtraRightJamming(
- zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 );
- }
- zExp -= shiftCount;
- return roundAndPackFloat64( zSign, zExp, zSig0, zSig1, zSig2 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the 32-bit two's complement integer `a' to
-the single-precision floating-point format. The conversion is performed
-according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float32 int32_to_float32( int32 a )
-{
- flag zSign;
-
- if ( a == 0 ) return 0;
- if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );
- zSign = ( a < 0 );
- return normalizeRoundAndPackFloat32(zSign, 0x9C, (uint32)(zSign ? - a : a));
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the 32-bit two's complement integer `a' to
-the double-precision floating-point format. The conversion is performed
-according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float64 int32_to_float64( int32 a )
-{
- flag zSign;
- bits32 absA;
- int8 shiftCount;
- bits32 zSig0, zSig1;
-
- if ( a == 0 ) return packFloat64( 0, 0, 0, 0 );
- zSign = ( a < 0 );
- absA = zSign ? - a : a;
- shiftCount = countLeadingZeros32( absA ) - 11;
- if ( 0 <= shiftCount ) {
- zSig0 = absA<<shiftCount;
- zSig1 = 0;
- }
- else {
- shift64Right( absA, 0, - shiftCount, &zSig0, &zSig1 );
- }
- return packFloat64( zSign, 0x412 - shiftCount, zSig0, zSig1 );
-
-}
-
-#ifndef SOFTFLOAT_FOR_GCC
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the single-precision floating-point value
-`a' to the 32-bit two's complement integer format. The conversion is
-performed according to the IEC/IEEE Standard for Binary Floating-Point
-Arithmetic---which means in particular that the conversion is rounded
-according to the current rounding mode. If `a' is a NaN, the largest
-positive integer is returned. Otherwise, if the conversion overflows, the
-largest integer with the same sign as `a' is returned.
--------------------------------------------------------------------------------
-*/
-int32 float32_to_int32( float32 a )
-{
- flag aSign;
- int16 aExp, shiftCount;
- bits32 aSig, aSigExtra;
- int32 z;
- int8 roundingMode;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- shiftCount = aExp - 0x96;
- if ( 0 <= shiftCount ) {
- if ( 0x9E <= aExp ) {
- if ( a != 0xCF000000 ) {
- float_raise( float_flag_invalid );
- if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) {
- return 0x7FFFFFFF;
- }
- }
- return (sbits32) 0x80000000;
- }
- z = ( aSig | 0x00800000 )<<shiftCount;
- if ( aSign ) z = - z;
- }
- else {
- if ( aExp < 0x7E ) {
- aSigExtra = aExp | aSig;
- z = 0;
- }
- else {
- aSig |= 0x00800000;
- aSigExtra = aSig<<( shiftCount & 31 );
- z = aSig>>( - shiftCount );
- }
- if ( aSigExtra ) set_float_exception_inexact_flag();
- roundingMode = float_rounding_mode;
- if ( roundingMode == float_round_nearest_even ) {
- if ( (sbits32) aSigExtra < 0 ) {
- ++z;
- if ( (bits32) ( aSigExtra<<1 ) == 0 ) z &= ~1;
- }
- if ( aSign ) z = - z;
- }
- else {
- aSigExtra = ( aSigExtra != 0 );
- if ( aSign ) {
- z += ( roundingMode == float_round_down ) & aSigExtra;
- z = - z;
- }
- else {
- z += ( roundingMode == float_round_up ) & aSigExtra;
- }
- }
- }
- return z;
-
-}
-#endif
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the single-precision floating-point value
-`a' to the 32-bit two's complement integer format. The conversion is
-performed according to the IEC/IEEE Standard for Binary Floating-Point
-Arithmetic, except that the conversion is always rounded toward zero.
-If `a' is a NaN, the largest positive integer is returned. Otherwise, if
-the conversion overflows, the largest integer with the same sign as `a' is
-returned.
--------------------------------------------------------------------------------
-*/
-int32 float32_to_int32_round_to_zero( float32 a )
-{
- flag aSign;
- int16 aExp, shiftCount;
- bits32 aSig;
- int32 z;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- shiftCount = aExp - 0x9E;
- if ( 0 <= shiftCount ) {
- if ( a != 0xCF000000 ) {
- float_raise( float_flag_invalid );
- if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) return 0x7FFFFFFF;
- }
- return (sbits32) 0x80000000;
- }
- else if ( aExp <= 0x7E ) {
- if ( aExp | aSig ) set_float_exception_inexact_flag();
- return 0;
- }
- aSig = ( aSig | 0x00800000 )<<8;
- z = aSig>>( - shiftCount );
- if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) {
- set_float_exception_inexact_flag();
- }
- if ( aSign ) z = - z;
- return z;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the single-precision floating-point value
-`a' to the double-precision floating-point format. The conversion is
-performed according to the IEC/IEEE Standard for Binary Floating-Point
-Arithmetic.
--------------------------------------------------------------------------------
-*/
-float64 float32_to_float64( float32 a )
-{
- flag aSign;
- int16 aExp;
- bits32 aSig, zSig0, zSig1;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- if ( aExp == 0xFF ) {
- if ( aSig ) return commonNaNToFloat64( float32ToCommonNaN( a ) );
- return packFloat64( aSign, 0x7FF, 0, 0 );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return packFloat64( aSign, 0, 0, 0 );
- normalizeFloat32Subnormal( aSig, &aExp, &aSig );
- --aExp;
- }
- shift64Right( aSig, 0, 3, &zSig0, &zSig1 );
- return packFloat64( aSign, aExp + 0x380, zSig0, zSig1 );
-
-}
-
-#ifndef SOFTFLOAT_FOR_GCC
-/*
--------------------------------------------------------------------------------
-Rounds the single-precision floating-point value `a' to an integer,
-and returns the result as a single-precision floating-point value. The
-operation is performed according to the IEC/IEEE Standard for Binary
-Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float32 float32_round_to_int( float32 a )
-{
- flag aSign;
- int16 aExp;
- bits32 lastBitMask, roundBitsMask;
- int8 roundingMode;
- float32 z;
-
- aExp = extractFloat32Exp( a );
- if ( 0x96 <= aExp ) {
- if ( ( aExp == 0xFF ) && extractFloat32Frac( a ) ) {
- return propagateFloat32NaN( a, a );
- }
- return a;
- }
- if ( aExp <= 0x7E ) {
- if ( (bits32) ( a<<1 ) == 0 ) return a;
- set_float_exception_inexact_flag();
- aSign = extractFloat32Sign( a );
- switch ( float_rounding_mode ) {
- case float_round_nearest_even:
- if ( ( aExp == 0x7E ) && extractFloat32Frac( a ) ) {
- return packFloat32( aSign, 0x7F, 0 );
- }
- break;
- case float_round_to_zero:
- break;
- case float_round_down:
- return aSign ? 0xBF800000 : 0;
- case float_round_up:
- return aSign ? 0x80000000 : 0x3F800000;
- }
- return packFloat32( aSign, 0, 0 );
- }
- lastBitMask = 1;
- lastBitMask <<= 0x96 - aExp;
- roundBitsMask = lastBitMask - 1;
- z = a;
- roundingMode = float_rounding_mode;
- if ( roundingMode == float_round_nearest_even ) {
- z += lastBitMask>>1;
- if ( ( z & roundBitsMask ) == 0 ) z &= ~ lastBitMask;
- }
- else if ( roundingMode != float_round_to_zero ) {
- if ( extractFloat32Sign( z ) ^ ( roundingMode == float_round_up ) ) {
- z += roundBitsMask;
- }
- }
- z &= ~ roundBitsMask;
- if ( z != a ) set_float_exception_inexact_flag();
- return z;
-
-}
-#endif
-
-/*
--------------------------------------------------------------------------------
-Returns the result of adding the absolute values of the single-precision
-floating-point values `a' and `b'. If `zSign' is 1, the sum is negated
-before being returned. `zSign' is ignored if the result is a NaN.
-The addition is performed according to the IEC/IEEE Standard for Binary
-Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-static float32 addFloat32Sigs( float32 a, float32 b, flag zSign )
-{
- int16 aExp, bExp, zExp;
- bits32 aSig, bSig, zSig;
- int16 expDiff;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- bSig = extractFloat32Frac( b );
- bExp = extractFloat32Exp( b );
- expDiff = aExp - bExp;
- aSig <<= 6;
- bSig <<= 6;
- if ( 0 < expDiff ) {
- if ( aExp == 0xFF ) {
- if ( aSig ) return propagateFloat32NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- --expDiff;
- }
- else {
- bSig |= 0x20000000;
- }
- shift32RightJamming( bSig, expDiff, &bSig );
- zExp = aExp;
- }
- else if ( expDiff < 0 ) {
- if ( bExp == 0xFF ) {
- if ( bSig ) return propagateFloat32NaN( a, b );
- return packFloat32( zSign, 0xFF, 0 );
- }
- if ( aExp == 0 ) {
- ++expDiff;
- }
- else {
- aSig |= 0x20000000;
- }
- shift32RightJamming( aSig, - expDiff, &aSig );
- zExp = bExp;
- }
- else {
- if ( aExp == 0xFF ) {
- if ( aSig | bSig ) return propagateFloat32NaN( a, b );
- return a;
- }
- if ( aExp == 0 ) return packFloat32( zSign, 0, ( aSig + bSig )>>6 );
- zSig = 0x40000000 + aSig + bSig;
- zExp = aExp;
- goto roundAndPack;
- }
- aSig |= 0x20000000;
- zSig = ( aSig + bSig )<<1;
- --zExp;
- if ( (sbits32) zSig < 0 ) {
- zSig = aSig + bSig;
- ++zExp;
- }
- roundAndPack:
- return roundAndPackFloat32( zSign, zExp, zSig );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of subtracting the absolute values of the single-
-precision floating-point values `a' and `b'. If `zSign' is 1, the
-difference is negated before being returned. `zSign' is ignored if the
-result is a NaN. The subtraction is performed according to the IEC/IEEE
-Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-static float32 subFloat32Sigs( float32 a, float32 b, flag zSign )
-{
- int16 aExp, bExp, zExp;
- bits32 aSig, bSig, zSig;
- int16 expDiff;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- bSig = extractFloat32Frac( b );
- bExp = extractFloat32Exp( b );
- expDiff = aExp - bExp;
- aSig <<= 7;
- bSig <<= 7;
- if ( 0 < expDiff ) goto aExpBigger;
- if ( expDiff < 0 ) goto bExpBigger;
- if ( aExp == 0xFF ) {
- if ( aSig | bSig ) return propagateFloat32NaN( a, b );
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- if ( aExp == 0 ) {
- aExp = 1;
- bExp = 1;
- }
- if ( bSig < aSig ) goto aBigger;
- if ( aSig < bSig ) goto bBigger;
- return packFloat32( float_rounding_mode == float_round_down, 0, 0 );
- bExpBigger:
- if ( bExp == 0xFF ) {
- if ( bSig ) return propagateFloat32NaN( a, b );
- return packFloat32( zSign ^ 1, 0xFF, 0 );
- }
- if ( aExp == 0 ) {
- ++expDiff;
- }
- else {
- aSig |= 0x40000000;
- }
- shift32RightJamming( aSig, - expDiff, &aSig );
- bSig |= 0x40000000;
- bBigger:
- zSig = bSig - aSig;
- zExp = bExp;
- zSign ^= 1;
- goto normalizeRoundAndPack;
- aExpBigger:
- if ( aExp == 0xFF ) {
- if ( aSig ) return propagateFloat32NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- --expDiff;
- }
- else {
- bSig |= 0x40000000;
- }
- shift32RightJamming( bSig, expDiff, &bSig );
- aSig |= 0x40000000;
- aBigger:
- zSig = aSig - bSig;
- zExp = aExp;
- normalizeRoundAndPack:
- --zExp;
- return normalizeRoundAndPackFloat32( zSign, zExp, zSig );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of adding the single-precision floating-point values `a'
-and `b'. The operation is performed according to the IEC/IEEE Standard for
-Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float32 float32_add( float32 a, float32 b )
-{
- flag aSign, bSign;
-
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- if ( aSign == bSign ) {
- return addFloat32Sigs( a, b, aSign );
- }
- else {
- return subFloat32Sigs( a, b, aSign );
- }
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of subtracting the single-precision floating-point values
-`a' and `b'. The operation is performed according to the IEC/IEEE Standard
-for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float32 float32_sub( float32 a, float32 b )
-{
- flag aSign, bSign;
-
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- if ( aSign == bSign ) {
- return subFloat32Sigs( a, b, aSign );
- }
- else {
- return addFloat32Sigs( a, b, aSign );
- }
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of multiplying the single-precision floating-point values
-`a' and `b'. The operation is performed according to the IEC/IEEE Standard
-for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float32 float32_mul( float32 a, float32 b )
-{
- flag aSign, bSign, zSign;
- int16 aExp, bExp, zExp;
- bits32 aSig, bSig, zSig0, zSig1;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- bSig = extractFloat32Frac( b );
- bExp = extractFloat32Exp( b );
- bSign = extractFloat32Sign( b );
- zSign = aSign ^ bSign;
- if ( aExp == 0xFF ) {
- if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {
- return propagateFloat32NaN( a, b );
- }
- if ( ( bExp | bSig ) == 0 ) {
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- return packFloat32( zSign, 0xFF, 0 );
- }
- if ( bExp == 0xFF ) {
- if ( bSig ) return propagateFloat32NaN( a, b );
- if ( ( aExp | aSig ) == 0 ) {
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- return packFloat32( zSign, 0xFF, 0 );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return packFloat32( zSign, 0, 0 );
- normalizeFloat32Subnormal( aSig, &aExp, &aSig );
- }
- if ( bExp == 0 ) {
- if ( bSig == 0 ) return packFloat32( zSign, 0, 0 );
- normalizeFloat32Subnormal( bSig, &bExp, &bSig );
- }
- zExp = aExp + bExp - 0x7F;
- aSig = ( aSig | 0x00800000 )<<7;
- bSig = ( bSig | 0x00800000 )<<8;
- mul32To64( aSig, bSig, &zSig0, &zSig1 );
- zSig0 |= ( zSig1 != 0 );
- if ( 0 <= (sbits32) ( zSig0<<1 ) ) {
- zSig0 <<= 1;
- --zExp;
- }
- return roundAndPackFloat32( zSign, zExp, zSig0 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of dividing the single-precision floating-point value `a'
-by the corresponding value `b'. The operation is performed according to the
-IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float32 float32_div( float32 a, float32 b )
-{
- flag aSign, bSign, zSign;
- int16 aExp, bExp, zExp;
- bits32 aSig, bSig, zSig, rem0, rem1, term0, term1;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- bSig = extractFloat32Frac( b );
- bExp = extractFloat32Exp( b );
- bSign = extractFloat32Sign( b );
- zSign = aSign ^ bSign;
- if ( aExp == 0xFF ) {
- if ( aSig ) return propagateFloat32NaN( a, b );
- if ( bExp == 0xFF ) {
- if ( bSig ) return propagateFloat32NaN( a, b );
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- return packFloat32( zSign, 0xFF, 0 );
- }
- if ( bExp == 0xFF ) {
- if ( bSig ) return propagateFloat32NaN( a, b );
- return packFloat32( zSign, 0, 0 );
- }
- if ( bExp == 0 ) {
- if ( bSig == 0 ) {
- if ( ( aExp | aSig ) == 0 ) {
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- float_raise( float_flag_divbyzero );
- return packFloat32( zSign, 0xFF, 0 );
- }
- normalizeFloat32Subnormal( bSig, &bExp, &bSig );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return packFloat32( zSign, 0, 0 );
- normalizeFloat32Subnormal( aSig, &aExp, &aSig );
- }
- zExp = aExp - bExp + 0x7D;
- aSig = ( aSig | 0x00800000 )<<7;
- bSig = ( bSig | 0x00800000 )<<8;
- if ( bSig <= ( aSig + aSig ) ) {
- aSig >>= 1;
- ++zExp;
- }
- zSig = estimateDiv64To32( aSig, 0, bSig );
- if ( ( zSig & 0x3F ) <= 2 ) {
- mul32To64( bSig, zSig, &term0, &term1 );
- sub64( aSig, 0, term0, term1, &rem0, &rem1 );
- while ( (sbits32) rem0 < 0 ) {
- --zSig;
- add64( rem0, rem1, 0, bSig, &rem0, &rem1 );
- }
- zSig |= ( rem1 != 0 );
- }
- return roundAndPackFloat32( zSign, zExp, zSig );
-
-}
-
-#ifndef SOFTFLOAT_FOR_GCC
-/*
--------------------------------------------------------------------------------
-Returns the remainder of the single-precision floating-point value `a'
-with respect to the corresponding value `b'. The operation is performed
-according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float32 float32_rem( float32 a, float32 b )
-{
- flag aSign, bSign, zSign;
- int16 aExp, bExp, expDiff;
- bits32 aSig, bSig, q, allZero, alternateASig;
- sbits32 sigMean;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- bSig = extractFloat32Frac( b );
- bExp = extractFloat32Exp( b );
- bSign = extractFloat32Sign( b );
- if ( aExp == 0xFF ) {
- if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {
- return propagateFloat32NaN( a, b );
- }
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- if ( bExp == 0xFF ) {
- if ( bSig ) return propagateFloat32NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- if ( bSig == 0 ) {
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- normalizeFloat32Subnormal( bSig, &bExp, &bSig );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return a;
- normalizeFloat32Subnormal( aSig, &aExp, &aSig );
- }
- expDiff = aExp - bExp;
- aSig = ( aSig | 0x00800000 )<<8;
- bSig = ( bSig | 0x00800000 )<<8;
- if ( expDiff < 0 ) {
- if ( expDiff < -1 ) return a;
- aSig >>= 1;
- }
- q = ( bSig <= aSig );
- if ( q ) aSig -= bSig;
- expDiff -= 32;
- while ( 0 < expDiff ) {
- q = estimateDiv64To32( aSig, 0, bSig );
- q = ( 2 < q ) ? q - 2 : 0;
- aSig = - ( ( bSig>>2 ) * q );
- expDiff -= 30;
- }
- expDiff += 32;
- if ( 0 < expDiff ) {
- q = estimateDiv64To32( aSig, 0, bSig );
- q = ( 2 < q ) ? q - 2 : 0;
- q >>= 32 - expDiff;
- bSig >>= 2;
- aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;
- }
- else {
- aSig >>= 2;
- bSig >>= 2;
- }
- do {
- alternateASig = aSig;
- ++q;
- aSig -= bSig;
- } while ( 0 <= (sbits32) aSig );
- sigMean = aSig + alternateASig;
- if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
- aSig = alternateASig;
- }
- zSign = ( (sbits32) aSig < 0 );
- if ( zSign ) aSig = - aSig;
- return normalizeRoundAndPackFloat32( aSign ^ zSign, bExp, aSig );
-
-}
-#endif
-
-#ifndef SOFTFLOAT_FOR_GCC
-/*
--------------------------------------------------------------------------------
-Returns the square root of the single-precision floating-point value `a'.
-The operation is performed according to the IEC/IEEE Standard for Binary
-Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float32 float32_sqrt( float32 a )
-{
- flag aSign;
- int16 aExp, zExp;
- bits32 aSig, zSig, rem0, rem1, term0, term1;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- if ( aExp == 0xFF ) {
- if ( aSig ) return propagateFloat32NaN( a, 0 );
- if ( ! aSign ) return a;
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- if ( aSign ) {
- if ( ( aExp | aSig ) == 0 ) return a;
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return 0;
- normalizeFloat32Subnormal( aSig, &aExp, &aSig );
- }
- zExp = ( ( aExp - 0x7F )>>1 ) + 0x7E;
- aSig = ( aSig | 0x00800000 )<<8;
- zSig = estimateSqrt32( aExp, aSig ) + 2;
- if ( ( zSig & 0x7F ) <= 5 ) {
- if ( zSig < 2 ) {
- zSig = 0x7FFFFFFF;
- goto roundAndPack;
- }
- else {
- aSig >>= aExp & 1;
- mul32To64( zSig, zSig, &term0, &term1 );
- sub64( aSig, 0, term0, term1, &rem0, &rem1 );
- while ( (sbits32) rem0 < 0 ) {
- --zSig;
- shortShift64Left( 0, zSig, 1, &term0, &term1 );
- term1 |= 1;
- add64( rem0, rem1, term0, term1, &rem0, &rem1 );
- }
- zSig |= ( ( rem0 | rem1 ) != 0 );
- }
- }
- shift32RightJamming( zSig, 1, &zSig );
- roundAndPack:
- return roundAndPackFloat32( 0, zExp, zSig );
-
-}
-#endif
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the single-precision floating-point value `a' is equal to
-the corresponding value `b', and 0 otherwise. The comparison is performed
-according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float32_eq( float32 a, float32 b )
-{
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- return ( a == b ) || ( (bits32) ( ( a | b )<<1 ) == 0 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the single-precision floating-point value `a' is less than
-or equal to the corresponding value `b', and 0 otherwise. The comparison
-is performed according to the IEC/IEEE Standard for Binary Floating-Point
-Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float32_le( float32 a, float32 b )
-{
- flag aSign, bSign;
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- if ( aSign != bSign ) return aSign || ( (bits32) ( ( a | b )<<1 ) == 0 );
- return ( a == b ) || ( aSign ^ ( a < b ) );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the single-precision floating-point value `a' is less than
-the corresponding value `b', and 0 otherwise. The comparison is performed
-according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float32_lt( float32 a, float32 b )
-{
- flag aSign, bSign;
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- if ( aSign != bSign ) return aSign && ( (bits32) ( ( a | b )<<1 ) != 0 );
- return ( a != b ) && ( aSign ^ ( a < b ) );
-
-}
-
-#ifndef SOFTFLOAT_FOR_GCC /* Not needed */
-/*
--------------------------------------------------------------------------------
-Returns 1 if the single-precision floating-point value `a' is equal to
-the corresponding value `b', and 0 otherwise. The invalid exception is
-raised if either operand is a NaN. Otherwise, the comparison is performed
-according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float32_eq_signaling( float32 a, float32 b )
-{
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- return ( a == b ) || ( (bits32) ( ( a | b )<<1 ) == 0 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the single-precision floating-point value `a' is less than or
-equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not
-cause an exception. Otherwise, the comparison is performed according to the
-IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float32_le_quiet( float32 a, float32 b )
-{
- flag aSign, bSign;
- int16 aExp, bExp;
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- if ( aSign != bSign ) return aSign || ( (bits32) ( ( a | b )<<1 ) == 0 );
- return ( a == b ) || ( aSign ^ ( a < b ) );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the single-precision floating-point value `a' is less than
-the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
-exception. Otherwise, the comparison is performed according to the IEC/IEEE
-Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float32_lt_quiet( float32 a, float32 b )
-{
- flag aSign, bSign;
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- if ( aSign != bSign ) return aSign && ( (bits32) ( ( a | b )<<1 ) != 0 );
- return ( a != b ) && ( aSign ^ ( a < b ) );
-
-}
-#endif /* !SOFTFLOAT_FOR_GCC */
-
-#ifndef SOFTFLOAT_FOR_GCC /* Not needed */
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the double-precision floating-point value
-`a' to the 32-bit two's complement integer format. The conversion is
-performed according to the IEC/IEEE Standard for Binary Floating-Point
-Arithmetic---which means in particular that the conversion is rounded
-according to the current rounding mode. If `a' is a NaN, the largest
-positive integer is returned. Otherwise, if the conversion overflows, the
-largest integer with the same sign as `a' is returned.
--------------------------------------------------------------------------------
-*/
-int32 float64_to_int32( float64 a )
-{
- flag aSign;
- int16 aExp, shiftCount;
- bits32 aSig0, aSig1, absZ, aSigExtra;
- int32 z;
- int8 roundingMode;
-
- aSig1 = extractFloat64Frac1( a );
- aSig0 = extractFloat64Frac0( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- shiftCount = aExp - 0x413;
- if ( 0 <= shiftCount ) {
- if ( 0x41E < aExp ) {
- if ( ( aExp == 0x7FF ) && ( aSig0 | aSig1 ) ) aSign = 0;
- goto invalid;
- }
- shortShift64Left(
- aSig0 | 0x00100000, aSig1, shiftCount, &absZ, &aSigExtra );
- if ( 0x80000000 < absZ ) goto invalid;
- }
- else {
- aSig1 = ( aSig1 != 0 );
- if ( aExp < 0x3FE ) {
- aSigExtra = aExp | aSig0 | aSig1;
- absZ = 0;
- }
- else {
- aSig0 |= 0x00100000;
- aSigExtra = ( aSig0<<( shiftCount & 31 ) ) | aSig1;
- absZ = aSig0>>( - shiftCount );
- }
- }
- roundingMode = float_rounding_mode;
- if ( roundingMode == float_round_nearest_even ) {
- if ( (sbits32) aSigExtra < 0 ) {
- ++absZ;
- if ( (bits32) ( aSigExtra<<1 ) == 0 ) absZ &= ~1;
- }
- z = aSign ? - absZ : absZ;
- }
- else {
- aSigExtra = ( aSigExtra != 0 );
- if ( aSign ) {
- z = - ( absZ
- + ( ( roundingMode == float_round_down ) & aSigExtra ) );
- }
- else {
- z = absZ + ( ( roundingMode == float_round_up ) & aSigExtra );
- }
- }
- if ( ( aSign ^ ( z < 0 ) ) && z ) {
- invalid:
- float_raise( float_flag_invalid );
- return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
- }
- if ( aSigExtra ) set_float_exception_inexact_flag();
- return z;
-
-}
-#endif /* !SOFTFLOAT_FOR_GCC */
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the double-precision floating-point value
-`a' to the 32-bit two's complement integer format. The conversion is
-performed according to the IEC/IEEE Standard for Binary Floating-Point
-Arithmetic, except that the conversion is always rounded toward zero.
-If `a' is a NaN, the largest positive integer is returned. Otherwise, if
-the conversion overflows, the largest integer with the same sign as `a' is
-returned.
--------------------------------------------------------------------------------
-*/
-int32 float64_to_int32_round_to_zero( float64 a )
-{
- flag aSign;
- int16 aExp, shiftCount;
- bits32 aSig0, aSig1, absZ, aSigExtra;
- int32 z;
-
- aSig1 = extractFloat64Frac1( a );
- aSig0 = extractFloat64Frac0( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- shiftCount = aExp - 0x413;
- if ( 0 <= shiftCount ) {
- if ( 0x41E < aExp ) {
- if ( ( aExp == 0x7FF ) && ( aSig0 | aSig1 ) ) aSign = 0;
- goto invalid;
- }
- shortShift64Left(
- aSig0 | 0x00100000, aSig1, shiftCount, &absZ, &aSigExtra );
- }
- else {
- if ( aExp < 0x3FF ) {
- if ( aExp | aSig0 | aSig1 ) {
- set_float_exception_inexact_flag();
- }
- return 0;
- }
- aSig0 |= 0x00100000;
- aSigExtra = ( aSig0<<( shiftCount & 31 ) ) | aSig1;
- absZ = aSig0>>( - shiftCount );
- }
- z = aSign ? - absZ : absZ;
- if ( ( aSign ^ ( z < 0 ) ) && z ) {
- invalid:
- float_raise( float_flag_invalid );
- return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
- }
- if ( aSigExtra ) set_float_exception_inexact_flag();
- return z;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the double-precision floating-point value
-`a' to the single-precision floating-point format. The conversion is
-performed according to the IEC/IEEE Standard for Binary Floating-Point
-Arithmetic.
--------------------------------------------------------------------------------
-*/
-float32 float64_to_float32( float64 a )
-{
- flag aSign;
- int16 aExp;
- bits32 aSig0, aSig1, zSig;
- bits32 allZero;
-
- aSig1 = extractFloat64Frac1( a );
- aSig0 = extractFloat64Frac0( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- if ( aExp == 0x7FF ) {
- if ( aSig0 | aSig1 ) {
- return commonNaNToFloat32( float64ToCommonNaN( a ) );
- }
- return packFloat32( aSign, 0xFF, 0 );
- }
- shift64RightJamming( aSig0, aSig1, 22, &allZero, &zSig );
- if ( aExp ) zSig |= 0x40000000;
- return roundAndPackFloat32( aSign, aExp - 0x381, zSig );
-
-}
-
-#ifndef SOFTFLOAT_FOR_GCC
-/*
--------------------------------------------------------------------------------
-Rounds the double-precision floating-point value `a' to an integer,
-and returns the result as a double-precision floating-point value. The
-operation is performed according to the IEC/IEEE Standard for Binary
-Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float64 float64_round_to_int( float64 a )
-{
- flag aSign;
- int16 aExp;
- bits32 lastBitMask, roundBitsMask;
- int8 roundingMode;
- float64 z;
-
- aExp = extractFloat64Exp( a );
- if ( 0x413 <= aExp ) {
- if ( 0x433 <= aExp ) {
- if ( ( aExp == 0x7FF )
- && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) ) {
- return propagateFloat64NaN( a, a );
- }
- return a;
- }
- lastBitMask = 1;
- lastBitMask = ( lastBitMask<<( 0x432 - aExp ) )<<1;
- roundBitsMask = lastBitMask - 1;
- z = a;
- roundingMode = float_rounding_mode;
- if ( roundingMode == float_round_nearest_even ) {
- if ( lastBitMask ) {
- add64( z.high, z.low, 0, lastBitMask>>1, &z.high, &z.low );
- if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;
- }
- else {
- if ( (sbits32) z.low < 0 ) {
- ++z.high;
- if ( (bits32) ( z.low<<1 ) == 0 ) z.high &= ~1;
- }
- }
- }
- else if ( roundingMode != float_round_to_zero ) {
- if ( extractFloat64Sign( z )
- ^ ( roundingMode == float_round_up ) ) {
- add64( z.high, z.low, 0, roundBitsMask, &z.high, &z.low );
- }
- }
- z.low &= ~ roundBitsMask;
- }
- else {
- if ( aExp <= 0x3FE ) {
- if ( ( ( (bits32) ( a.high<<1 ) ) | a.low ) == 0 ) return a;
- set_float_exception_inexact_flag();
- aSign = extractFloat64Sign( a );
- switch ( float_rounding_mode ) {
- case float_round_nearest_even:
- if ( ( aExp == 0x3FE )
- && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) )
- ) {
- return packFloat64( aSign, 0x3FF, 0, 0 );
- }
- break;
- case float_round_down:
- return
- aSign ? packFloat64( 1, 0x3FF, 0, 0 )
- : packFloat64( 0, 0, 0, 0 );
- case float_round_up:
- return
- aSign ? packFloat64( 1, 0, 0, 0 )
- : packFloat64( 0, 0x3FF, 0, 0 );
- }
- return packFloat64( aSign, 0, 0, 0 );
- }
- lastBitMask = 1;
- lastBitMask <<= 0x413 - aExp;
- roundBitsMask = lastBitMask - 1;
- z.low = 0;
- z.high = a.high;
- roundingMode = float_rounding_mode;
- if ( roundingMode == float_round_nearest_even ) {
- z.high += lastBitMask>>1;
- if ( ( ( z.high & roundBitsMask ) | a.low ) == 0 ) {
- z.high &= ~ lastBitMask;
- }
- }
- else if ( roundingMode != float_round_to_zero ) {
- if ( extractFloat64Sign( z )
- ^ ( roundingMode == float_round_up ) ) {
- z.high |= ( a.low != 0 );
- z.high += roundBitsMask;
- }
- }
- z.high &= ~ roundBitsMask;
- }
- if ( ( z.low != a.low ) || ( z.high != a.high ) ) {
- set_float_exception_inexact_flag();
- }
- return z;
-
-}
-#endif
-
-/*
--------------------------------------------------------------------------------
-Returns the result of adding the absolute values of the double-precision
-floating-point values `a' and `b'. If `zSign' is 1, the sum is negated
-before being returned. `zSign' is ignored if the result is a NaN.
-The addition is performed according to the IEC/IEEE Standard for Binary
-Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-static float64 addFloat64Sigs( float64 a, float64 b, flag zSign )
-{
- int16 aExp, bExp, zExp;
- bits32 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
- int16 expDiff;
-
- aSig1 = extractFloat64Frac1( a );
- aSig0 = extractFloat64Frac0( a );
- aExp = extractFloat64Exp( a );
- bSig1 = extractFloat64Frac1( b );
- bSig0 = extractFloat64Frac0( b );
- bExp = extractFloat64Exp( b );
- expDiff = aExp - bExp;
- if ( 0 < expDiff ) {
- if ( aExp == 0x7FF ) {
- if ( aSig0 | aSig1 ) return propagateFloat64NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- --expDiff;
- }
- else {
- bSig0 |= 0x00100000;
- }
- shift64ExtraRightJamming(
- bSig0, bSig1, 0, expDiff, &bSig0, &bSig1, &zSig2 );
- zExp = aExp;
- }
- else if ( expDiff < 0 ) {
- if ( bExp == 0x7FF ) {
- if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );
- return packFloat64( zSign, 0x7FF, 0, 0 );
- }
- if ( aExp == 0 ) {
- ++expDiff;
- }
- else {
- aSig0 |= 0x00100000;
- }
- shift64ExtraRightJamming(
- aSig0, aSig1, 0, - expDiff, &aSig0, &aSig1, &zSig2 );
- zExp = bExp;
- }
- else {
- if ( aExp == 0x7FF ) {
- if ( aSig0 | aSig1 | bSig0 | bSig1 ) {
- return propagateFloat64NaN( a, b );
- }
- return a;
- }
- add64( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
- if ( aExp == 0 ) return packFloat64( zSign, 0, zSig0, zSig1 );
- zSig2 = 0;
- zSig0 |= 0x00200000;
- zExp = aExp;
- goto shiftRight1;
- }
- aSig0 |= 0x00100000;
- add64( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
- --zExp;
- if ( zSig0 < 0x00200000 ) goto roundAndPack;
- ++zExp;
- shiftRight1:
- shift64ExtraRightJamming( zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
- roundAndPack:
- return roundAndPackFloat64( zSign, zExp, zSig0, zSig1, zSig2 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of subtracting the absolute values of the double-
-precision floating-point values `a' and `b'. If `zSign' is 1, the
-difference is negated before being returned. `zSign' is ignored if the
-result is a NaN. The subtraction is performed according to the IEC/IEEE
-Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-static float64 subFloat64Sigs( float64 a, float64 b, flag zSign )
-{
- int16 aExp, bExp, zExp;
- bits32 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;
- int16 expDiff;
-
- aSig1 = extractFloat64Frac1( a );
- aSig0 = extractFloat64Frac0( a );
- aExp = extractFloat64Exp( a );
- bSig1 = extractFloat64Frac1( b );
- bSig0 = extractFloat64Frac0( b );
- bExp = extractFloat64Exp( b );
- expDiff = aExp - bExp;
- shortShift64Left( aSig0, aSig1, 10, &aSig0, &aSig1 );
- shortShift64Left( bSig0, bSig1, 10, &bSig0, &bSig1 );
- if ( 0 < expDiff ) goto aExpBigger;
- if ( expDiff < 0 ) goto bExpBigger;
- if ( aExp == 0x7FF ) {
- if ( aSig0 | aSig1 | bSig0 | bSig1 ) {
- return propagateFloat64NaN( a, b );
- }
- float_raise( float_flag_invalid );
- return float64_default_nan;
- }
- if ( aExp == 0 ) {
- aExp = 1;
- bExp = 1;
- }
- if ( bSig0 < aSig0 ) goto aBigger;
- if ( aSig0 < bSig0 ) goto bBigger;
- if ( bSig1 < aSig1 ) goto aBigger;
- if ( aSig1 < bSig1 ) goto bBigger;
- return packFloat64( float_rounding_mode == float_round_down, 0, 0, 0 );
- bExpBigger:
- if ( bExp == 0x7FF ) {
- if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );
- return packFloat64( zSign ^ 1, 0x7FF, 0, 0 );
- }
- if ( aExp == 0 ) {
- ++expDiff;
- }
- else {
- aSig0 |= 0x40000000;
- }
- shift64RightJamming( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
- bSig0 |= 0x40000000;
- bBigger:
- sub64( bSig0, bSig1, aSig0, aSig1, &zSig0, &zSig1 );
- zExp = bExp;
- zSign ^= 1;
- goto normalizeRoundAndPack;
- aExpBigger:
- if ( aExp == 0x7FF ) {
- if ( aSig0 | aSig1 ) return propagateFloat64NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- --expDiff;
- }
- else {
- bSig0 |= 0x40000000;
- }
- shift64RightJamming( bSig0, bSig1, expDiff, &bSig0, &bSig1 );
- aSig0 |= 0x40000000;
- aBigger:
- sub64( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
- zExp = aExp;
- normalizeRoundAndPack:
- --zExp;
- return normalizeRoundAndPackFloat64( zSign, zExp - 10, zSig0, zSig1 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of adding the double-precision floating-point values `a'
-and `b'. The operation is performed according to the IEC/IEEE Standard for
-Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float64 float64_add( float64 a, float64 b )
-{
- flag aSign, bSign;
-
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- if ( aSign == bSign ) {
- return addFloat64Sigs( a, b, aSign );
- }
- else {
- return subFloat64Sigs( a, b, aSign );
- }
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of subtracting the double-precision floating-point values
-`a' and `b'. The operation is performed according to the IEC/IEEE Standard
-for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float64 float64_sub( float64 a, float64 b )
-{
- flag aSign, bSign;
-
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- if ( aSign == bSign ) {
- return subFloat64Sigs( a, b, aSign );
- }
- else {
- return addFloat64Sigs( a, b, aSign );
- }
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of multiplying the double-precision floating-point values
-`a' and `b'. The operation is performed according to the IEC/IEEE Standard
-for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float64 float64_mul( float64 a, float64 b )
-{
- flag aSign, bSign, zSign;
- int16 aExp, bExp, zExp;
- bits32 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;
-
- aSig1 = extractFloat64Frac1( a );
- aSig0 = extractFloat64Frac0( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- bSig1 = extractFloat64Frac1( b );
- bSig0 = extractFloat64Frac0( b );
- bExp = extractFloat64Exp( b );
- bSign = extractFloat64Sign( b );
- zSign = aSign ^ bSign;
- if ( aExp == 0x7FF ) {
- if ( ( aSig0 | aSig1 )
- || ( ( bExp == 0x7FF ) && ( bSig0 | bSig1 ) ) ) {
- return propagateFloat64NaN( a, b );
- }
- if ( ( bExp | bSig0 | bSig1 ) == 0 ) goto invalid;
- return packFloat64( zSign, 0x7FF, 0, 0 );
- }
- if ( bExp == 0x7FF ) {
- if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );
- if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
- invalid:
- float_raise( float_flag_invalid );
- return float64_default_nan;
- }
- return packFloat64( zSign, 0x7FF, 0, 0 );
- }
- if ( aExp == 0 ) {
- if ( ( aSig0 | aSig1 ) == 0 ) return packFloat64( zSign, 0, 0, 0 );
- normalizeFloat64Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
- }
- if ( bExp == 0 ) {
- if ( ( bSig0 | bSig1 ) == 0 ) return packFloat64( zSign, 0, 0, 0 );
- normalizeFloat64Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
- }
- zExp = aExp + bExp - 0x400;
- aSig0 |= 0x00100000;
- shortShift64Left( bSig0, bSig1, 12, &bSig0, &bSig1 );
- mul64To128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1, &zSig2, &zSig3 );
- add64( zSig0, zSig1, aSig0, aSig1, &zSig0, &zSig1 );
- zSig2 |= ( zSig3 != 0 );
- if ( 0x00200000 <= zSig0 ) {
- shift64ExtraRightJamming(
- zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
- ++zExp;
- }
- return roundAndPackFloat64( zSign, zExp, zSig0, zSig1, zSig2 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of dividing the double-precision floating-point value `a'
-by the corresponding value `b'. The operation is performed according to the
-IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float64 float64_div( float64 a, float64 b )
-{
- flag aSign, bSign, zSign;
- int16 aExp, bExp, zExp;
- bits32 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
- bits32 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
-
- aSig1 = extractFloat64Frac1( a );
- aSig0 = extractFloat64Frac0( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- bSig1 = extractFloat64Frac1( b );
- bSig0 = extractFloat64Frac0( b );
- bExp = extractFloat64Exp( b );
- bSign = extractFloat64Sign( b );
- zSign = aSign ^ bSign;
- if ( aExp == 0x7FF ) {
- if ( aSig0 | aSig1 ) return propagateFloat64NaN( a, b );
- if ( bExp == 0x7FF ) {
- if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );
- goto invalid;
- }
- return packFloat64( zSign, 0x7FF, 0, 0 );
- }
- if ( bExp == 0x7FF ) {
- if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );
- return packFloat64( zSign, 0, 0, 0 );
- }
- if ( bExp == 0 ) {
- if ( ( bSig0 | bSig1 ) == 0 ) {
- if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
- invalid:
- float_raise( float_flag_invalid );
- return float64_default_nan;
- }
- float_raise( float_flag_divbyzero );
- return packFloat64( zSign, 0x7FF, 0, 0 );
- }
- normalizeFloat64Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
- }
- if ( aExp == 0 ) {
- if ( ( aSig0 | aSig1 ) == 0 ) return packFloat64( zSign, 0, 0, 0 );
- normalizeFloat64Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
- }
- zExp = aExp - bExp + 0x3FD;
- shortShift64Left( aSig0 | 0x00100000, aSig1, 11, &aSig0, &aSig1 );
- shortShift64Left( bSig0 | 0x00100000, bSig1, 11, &bSig0, &bSig1 );
- if ( le64( bSig0, bSig1, aSig0, aSig1 ) ) {
- shift64Right( aSig0, aSig1, 1, &aSig0, &aSig1 );
- ++zExp;
- }
- zSig0 = estimateDiv64To32( aSig0, aSig1, bSig0 );
- mul64By32To96( bSig0, bSig1, zSig0, &term0, &term1, &term2 );
- sub96( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 );
- while ( (sbits32) rem0 < 0 ) {
- --zSig0;
- add96( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 );
- }
- zSig1 = estimateDiv64To32( rem1, rem2, bSig0 );
- if ( ( zSig1 & 0x3FF ) <= 4 ) {
- mul64By32To96( bSig0, bSig1, zSig1, &term1, &term2, &term3 );
- sub96( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 );
- while ( (sbits32) rem1 < 0 ) {
- --zSig1;
- add96( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 );
- }
- zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
- }
- shift64ExtraRightJamming( zSig0, zSig1, 0, 11, &zSig0, &zSig1, &zSig2 );
- return roundAndPackFloat64( zSign, zExp, zSig0, zSig1, zSig2 );
-
-}
-
-#ifndef SOFTFLOAT_FOR_GCC
-/*
--------------------------------------------------------------------------------
-Returns the remainder of the double-precision floating-point value `a'
-with respect to the corresponding value `b'. The operation is performed
-according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float64 float64_rem( float64 a, float64 b )
-{
- flag aSign, bSign, zSign;
- int16 aExp, bExp, expDiff;
- bits32 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
- bits32 allZero, alternateASig0, alternateASig1, sigMean1;
- sbits32 sigMean0;
- float64 z;
-
- aSig1 = extractFloat64Frac1( a );
- aSig0 = extractFloat64Frac0( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- bSig1 = extractFloat64Frac1( b );
- bSig0 = extractFloat64Frac0( b );
- bExp = extractFloat64Exp( b );
- bSign = extractFloat64Sign( b );
- if ( aExp == 0x7FF ) {
- if ( ( aSig0 | aSig1 )
- || ( ( bExp == 0x7FF ) && ( bSig0 | bSig1 ) ) ) {
- return propagateFloat64NaN( a, b );
- }
- goto invalid;
- }
- if ( bExp == 0x7FF ) {
- if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- if ( ( bSig0 | bSig1 ) == 0 ) {
- invalid:
- float_raise( float_flag_invalid );
- return float64_default_nan;
- }
- normalizeFloat64Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
- }
- if ( aExp == 0 ) {
- if ( ( aSig0 | aSig1 ) == 0 ) return a;
- normalizeFloat64Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
- }
- expDiff = aExp - bExp;
- if ( expDiff < -1 ) return a;
- shortShift64Left(
- aSig0 | 0x00100000, aSig1, 11 - ( expDiff < 0 ), &aSig0, &aSig1 );
- shortShift64Left( bSig0 | 0x00100000, bSig1, 11, &bSig0, &bSig1 );
- q = le64( bSig0, bSig1, aSig0, aSig1 );
- if ( q ) sub64( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
- expDiff -= 32;
- while ( 0 < expDiff ) {
- q = estimateDiv64To32( aSig0, aSig1, bSig0 );
- q = ( 4 < q ) ? q - 4 : 0;
- mul64By32To96( bSig0, bSig1, q, &term0, &term1, &term2 );
- shortShift96Left( term0, term1, term2, 29, &term1, &term2, &allZero );
- shortShift64Left( aSig0, aSig1, 29, &aSig0, &allZero );
- sub64( aSig0, 0, term1, term2, &aSig0, &aSig1 );
- expDiff -= 29;
- }
- if ( -32 < expDiff ) {
- q = estimateDiv64To32( aSig0, aSig1, bSig0 );
- q = ( 4 < q ) ? q - 4 : 0;
- q >>= - expDiff;
- shift64Right( bSig0, bSig1, 8, &bSig0, &bSig1 );
- expDiff += 24;
- if ( expDiff < 0 ) {
- shift64Right( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
- }
- else {
- shortShift64Left( aSig0, aSig1, expDiff, &aSig0, &aSig1 );
- }
- mul64By32To96( bSig0, bSig1, q, &term0, &term1, &term2 );
- sub64( aSig0, aSig1, term1, term2, &aSig0, &aSig1 );
- }
- else {
- shift64Right( aSig0, aSig1, 8, &aSig0, &aSig1 );
- shift64Right( bSig0, bSig1, 8, &bSig0, &bSig1 );
- }
- do {
- alternateASig0 = aSig0;
- alternateASig1 = aSig1;
- ++q;
- sub64( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
- } while ( 0 <= (sbits32) aSig0 );
- add64(
- aSig0, aSig1, alternateASig0, alternateASig1, &sigMean0, &sigMean1 );
- if ( ( sigMean0 < 0 )
- || ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) {
- aSig0 = alternateASig0;
- aSig1 = alternateASig1;
- }
- zSign = ( (sbits32) aSig0 < 0 );
- if ( zSign ) sub64( 0, 0, aSig0, aSig1, &aSig0, &aSig1 );
- return
- normalizeRoundAndPackFloat64( aSign ^ zSign, bExp - 4, aSig0, aSig1 );
-
-}
-#endif
-
-#ifndef SOFTFLOAT_FOR_GCC
-/*
--------------------------------------------------------------------------------
-Returns the square root of the double-precision floating-point value `a'.
-The operation is performed according to the IEC/IEEE Standard for Binary
-Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float64 float64_sqrt( float64 a )
-{
- flag aSign;
- int16 aExp, zExp;
- bits32 aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;
- bits32 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
- float64 z;
-
- aSig1 = extractFloat64Frac1( a );
- aSig0 = extractFloat64Frac0( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- if ( aExp == 0x7FF ) {
- if ( aSig0 | aSig1 ) return propagateFloat64NaN( a, a );
- if ( ! aSign ) return a;
- goto invalid;
- }
- if ( aSign ) {
- if ( ( aExp | aSig0 | aSig1 ) == 0 ) return a;
- invalid:
- float_raise( float_flag_invalid );
- return float64_default_nan;
- }
- if ( aExp == 0 ) {
- if ( ( aSig0 | aSig1 ) == 0 ) return packFloat64( 0, 0, 0, 0 );
- normalizeFloat64Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
- }
- zExp = ( ( aExp - 0x3FF )>>1 ) + 0x3FE;
- aSig0 |= 0x00100000;
- shortShift64Left( aSig0, aSig1, 11, &term0, &term1 );
- zSig0 = ( estimateSqrt32( aExp, term0 )>>1 ) + 1;
- if ( zSig0 == 0 ) zSig0 = 0x7FFFFFFF;
- doubleZSig0 = zSig0 + zSig0;
- shortShift64Left( aSig0, aSig1, 9 - ( aExp & 1 ), &aSig0, &aSig1 );
- mul32To64( zSig0, zSig0, &term0, &term1 );
- sub64( aSig0, aSig1, term0, term1, &rem0, &rem1 );
- while ( (sbits32) rem0 < 0 ) {
- --zSig0;
- doubleZSig0 -= 2;
- add64( rem0, rem1, 0, doubleZSig0 | 1, &rem0, &rem1 );
- }
- zSig1 = estimateDiv64To32( rem1, 0, doubleZSig0 );
- if ( ( zSig1 & 0x1FF ) <= 5 ) {
- if ( zSig1 == 0 ) zSig1 = 1;
- mul32To64( doubleZSig0, zSig1, &term1, &term2 );
- sub64( rem1, 0, term1, term2, &rem1, &rem2 );
- mul32To64( zSig1, zSig1, &term2, &term3 );
- sub96( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
- while ( (sbits32) rem1 < 0 ) {
- --zSig1;
- shortShift64Left( 0, zSig1, 1, &term2, &term3 );
- term3 |= 1;
- term2 |= doubleZSig0;
- add96( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );
- }
- zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
- }
- shift64ExtraRightJamming( zSig0, zSig1, 0, 10, &zSig0, &zSig1, &zSig2 );
- return roundAndPackFloat64( 0, zExp, zSig0, zSig1, zSig2 );
-
-}
-#endif
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the double-precision floating-point value `a' is equal to
-the corresponding value `b', and 0 otherwise. The comparison is performed
-according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float64_eq( float64 a, float64 b )
-{
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF )
- && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF )
- && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )
- ) {
- if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- return ( a == b ) ||
- ( (bits64) ( ( FLOAT64_DEMANGLE(a) | FLOAT64_DEMANGLE(b) )<<1 ) == 0 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the double-precision floating-point value `a' is less than
-or equal to the corresponding value `b', and 0 otherwise. The comparison
-is performed according to the IEC/IEEE Standard for Binary Floating-Point
-Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float64_le( float64 a, float64 b )
-{
- flag aSign, bSign;
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF )
- && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF )
- && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- if ( aSign != bSign )
- return aSign ||
- ( (bits64) ( ( FLOAT64_DEMANGLE(a) | FLOAT64_DEMANGLE(b) )<<1 ) ==
- 0 );
- return ( a == b ) ||
- ( aSign ^ ( FLOAT64_DEMANGLE(a) < FLOAT64_DEMANGLE(b) ) );
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the double-precision floating-point value `a' is less than
-the corresponding value `b', and 0 otherwise. The comparison is performed
-according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float64_lt( float64 a, float64 b )
-{
- flag aSign, bSign;
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF )
- && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF )
- && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- if ( aSign != bSign )
- return aSign &&
- ( (bits64) ( ( FLOAT64_DEMANGLE(a) | FLOAT64_DEMANGLE(b) )<<1 ) !=
- 0 );
- return ( a != b ) &&
- ( aSign ^ ( FLOAT64_DEMANGLE(a) < FLOAT64_DEMANGLE(b) ) );
-
-}
-
-#ifndef SOFTFLOAT_FOR_GCC
-/*
--------------------------------------------------------------------------------
-Returns 1 if the double-precision floating-point value `a' is equal to
-the corresponding value `b', and 0 otherwise. The invalid exception is
-raised if either operand is a NaN. Otherwise, the comparison is performed
-according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float64_eq_signaling( float64 a, float64 b )
-{
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF )
- && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF )
- && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- return ( a == b ) || ( (bits64) ( ( a | b )<<1 ) == 0 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the double-precision floating-point value `a' is less than or
-equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not
-cause an exception. Otherwise, the comparison is performed according to the
-IEC/IEEE Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float64_le_quiet( float64 a, float64 b )
-{
- flag aSign, bSign;
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF )
- && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF )
- && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )
- ) {
- if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- if ( aSign != bSign ) return aSign || ( (bits64) ( ( a | b )<<1 ) == 0 );
- return ( a == b ) || ( aSign ^ ( a < b ) );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the double-precision floating-point value `a' is less than
-the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
-exception. Otherwise, the comparison is performed according to the IEC/IEEE
-Standard for Binary Floating-Point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float64_lt_quiet( float64 a, float64 b )
-{
- flag aSign, bSign;
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF )
- && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF )
- && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )
- ) {
- if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- if ( aSign != bSign ) return aSign && ( (bits64) ( ( a | b )<<1 ) != 0 );
- return ( a != b ) && ( aSign ^ ( a < b ) );
-
-}
-
-#endif
diff --git a/ArmPkg/Library/ArmSoftFloatLib/milieu.h b/ArmPkg/Library/ArmSoftFloatLib/milieu.h deleted file mode 100644 index 8f4ac00076..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/milieu.h +++ /dev/null @@ -1,38 +0,0 @@ -/* $NetBSD: milieu.h,v 1.1 2000/12/29 20:13:54 bjh21 Exp $ */
-
-/*
-===============================================================================
-
-This C header file is part of the SoftFloat IEC/IEEE Floating-point
-Arithmetic Package, Release 2a.
-
-Written by John R. Hauser. This work was made possible in part by the
-International Computer Science Institute, located at Suite 600, 1947 Center
-Street, Berkeley, California 94704. Funding was partially provided by the
-National Science Foundation under grant MIP-9311980. The original version
-of this code was written as part of a project to build a fixed-point vector
-processor in collaboration with the University of California at Berkeley,
-overseen by Profs. Nelson Morgan and John Wawrzynek. More information
-is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
-arithmetic/SoftFloat.html'.
-
-THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
-has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
-TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
-PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
-AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
-
-Derivative works are acceptable, even for commercial purposes, so long as
-(1) they include prominent notice that the work is derivative, and (2) they
-include prominent notice akin to these four paragraphs for those parts of
-this code that are retained.
-
-===============================================================================
-*/
-
-/*
--------------------------------------------------------------------------------
-Include common integer types and flags.
--------------------------------------------------------------------------------
-*/
-#include "arm-gcc.h"
diff --git a/ArmPkg/Library/ArmSoftFloatLib/softfloat-for-gcc.h b/ArmPkg/Library/ArmSoftFloatLib/softfloat-for-gcc.h deleted file mode 100644 index c825d70097..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/softfloat-for-gcc.h +++ /dev/null @@ -1,242 +0,0 @@ -/* $NetBSD: softfloat-for-gcc.h,v 1.12 2013/08/01 23:21:19 matt Exp $ */
-/*-
- * Copyright (c) 2008 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Move private identifiers with external linkage into implementation
- * namespace. -- Klaus Klein <kleink@NetBSD.org>, May 5, 1999
- */
-#define float_exception_flags _softfloat_float_exception_flags
-#define float_exception_mask _softfloat_float_exception_mask
-#define float_rounding_mode _softfloat_float_rounding_mode
-#define float_raise _softfloat_float_raise
-
-/* The following batch are called by GCC through wrappers */
-#define float32_eq _softfloat_float32_eq
-#define float32_le _softfloat_float32_le
-#define float32_lt _softfloat_float32_lt
-#define float64_eq _softfloat_float64_eq
-#define float64_le _softfloat_float64_le
-#define float64_lt _softfloat_float64_lt
-#define float128_eq _softfloat_float128_eq
-#define float128_le _softfloat_float128_le
-#define float128_lt _softfloat_float128_lt
-
-/*
- * Macros to define functions with the GCC expected names
- */
-
-#define float32_add __addsf3
-#define float64_add __adddf3
-#define floatx80_add __addxf3
-#define float128_add __addtf3
-
-#define float32_sub __subsf3
-#define float64_sub __subdf3
-#define floatx80_sub __subxf3
-#define float128_sub __subtf3
-
-#define float32_mul __mulsf3
-#define float64_mul __muldf3
-#define floatx80_mul __mulxf3
-#define float128_mul __multf3
-
-#define float32_div __divsf3
-#define float64_div __divdf3
-#define floatx80_div __divxf3
-#define float128_div __divtf3
-
-#if 0
-#define float32_neg __negsf2
-#define float64_neg __negdf2
-#define floatx80_neg __negxf2
-#define float128_neg __negtf2
-#endif
-
-#define int32_to_float32 __floatsisf
-#define int32_to_float64 __floatsidf
-#define int32_to_floatx80 __floatsixf
-#define int32_to_float128 __floatsitf
-
-#define int64_to_float32 __floatdisf
-#define int64_to_float64 __floatdidf
-#define int64_to_floatx80 __floatdixf
-#define int64_to_float128 __floatditf
-
-#define int128_to_float32 __floattisf
-#define int128_to_float64 __floattidf
-#define int128_to_floatx80 __floattixf
-#define int128_to_float128 __floattitf
-
-#define uint32_to_float32 __floatunsisf
-#define uint32_to_float64 __floatunsidf
-#define uint32_to_floatx80 __floatunsixf
-#define uint32_to_float128 __floatunsitf
-
-#define uint64_to_float32 __floatundisf
-#define uint64_to_float64 __floatundidf
-#define uint64_to_floatx80 __floatundixf
-#define uint64_to_float128 __floatunditf
-
-#define uint128_to_float32 __floatuntisf
-#define uint128_to_float64 __floatuntidf
-#define uint128_to_floatx80 __floatuntixf
-#define uint128_to_float128 __floatuntitf
-
-#define float32_to_int32_round_to_zero __fixsfsi
-#define float64_to_int32_round_to_zero __fixdfsi
-#define floatx80_to_int32_round_to_zero __fixxfsi
-#define float128_to_int32_round_to_zero __fixtfsi
-
-#define float32_to_int64_round_to_zero __fixsfdi
-#define float64_to_int64_round_to_zero __fixdfdi
-#define floatx80_to_int64_round_to_zero __fixxfdi
-#define float128_to_int64_round_to_zero __fixtfdi
-
-#define float32_to_int128_round_to_zero __fixsfti
-#define float64_to_int128_round_to_zero __fixdfti
-#define floatx80_to_int128_round_to_zero __fixxfti
-#define float128_to_int128_round_to_zero __fixtfti
-
-#define float32_to_uint32_round_to_zero __fixunssfsi
-#define float64_to_uint32_round_to_zero __fixunsdfsi
-#define floatx80_to_uint32_round_to_zero __fixunsxfsi
-#define float128_to_uint32_round_to_zero __fixunstfsi
-
-#define float32_to_uint64_round_to_zero __fixunssfdi
-#define float64_to_uint64_round_to_zero __fixunsdfdi
-#define floatx80_to_uint64_round_to_zero __fixunsxfdi
-#define float128_to_uint64_round_to_zero __fixunstfdi
-
-#define float32_to_uint128_round_to_zero __fixunssfti
-#define float64_to_uint128_round_to_zero __fixunsdfti
-#define floatx80_to_uint128_round_to_zero __fixunsxfti
-#define float128_to_uint128_round_to_zero __fixunstfti
-
-#define float32_to_float64 __extendsfdf2
-#define float32_to_floatx80 __extendsfxf2
-#define float32_to_float128 __extendsftf2
-#define float64_to_floatx80 __extenddfxf2
-#define float64_to_float128 __extenddftf2
-
-#define float128_to_float64 __trunctfdf2
-#define floatx80_to_float64 __truncxfdf2
-#define float128_to_float32 __trunctfsf2
-#define floatx80_to_float32 __truncxfsf2
-#define float64_to_float32 __truncdfsf2
-
-#if 0
-#define float32_cmp __cmpsf2
-#define float32_unord __unordsf2
-#define float32_eq __eqsf2
-#define float32_ne __nesf2
-#define float32_ge __gesf2
-#define float32_lt __ltsf2
-#define float32_le __lesf2
-#define float32_gt __gtsf2
-#endif
-
-#if 0
-#define float64_cmp __cmpdf2
-#define float64_unord __unorddf2
-#define float64_eq __eqdf2
-#define float64_ne __nedf2
-#define float64_ge __gedf2
-#define float64_lt __ltdf2
-#define float64_le __ledf2
-#define float64_gt __gtdf2
-#endif
-
-/* XXX not in libgcc */
-#if 1
-#define floatx80_cmp __cmpxf2
-#define floatx80_unord __unordxf2
-#define floatx80_eq __eqxf2
-#define floatx80_ne __nexf2
-#define floatx80_ge __gexf2
-#define floatx80_lt __ltxf2
-#define floatx80_le __lexf2
-#define floatx80_gt __gtxf2
-#endif
-
-#if 0
-#define float128_cmp __cmptf2
-#define float128_unord __unordtf2
-#define float128_eq __eqtf2
-#define float128_ne __netf2
-#define float128_ge __getf2
-#define float128_lt __lttf2
-#define float128_le __letf2
-#define float128_gt __gttf2
-#endif
-
-#if defined (__ARM_EABI__) || defined (__CC_ARM)
-#ifdef __ARM_PCS_VFP
-#include <arm/aeabi.h>
-#endif
-#define __addsf3 __aeabi_fadd
-#define __adddf3 __aeabi_dadd
-
-#define __subsf3 __aeabi_fsub
-#define __subdf3 __aeabi_dsub
-
-#define __mulsf3 __aeabi_fmul
-#define __muldf3 __aeabi_dmul
-
-#define __divsf3 __aeabi_fdiv
-#define __divdf3 __aeabi_ddiv
-
-#define __floatsisf __aeabi_i2f
-#define __floatsidf __aeabi_i2d
-
-#define __floatdisf __aeabi_l2f
-#define __floatdidf __aeabi_l2d
-
-#define __floatunsisf __aeabi_ui2f
-#define __floatunsidf __aeabi_ui2d
-
-#define __floatundisf __aeabi_ul2f
-#define __floatundidf __aeabi_ul2d
-
-#define __fixsfsi __aeabi_f2iz
-#define __fixdfsi __aeabi_d2iz
-
-#define __fixsfdi __aeabi_f2lz
-#define __fixdfdi __aeabi_d2lz
-
-#define __fixunssfsi __aeabi_f2uiz
-#define __fixunsdfsi __aeabi_d2uiz
-
-#define __fixunssfdi __aeabi_f2ulz
-#define __fixunsdfdi __aeabi_d2ulz
-
-#define __extendsfdf2 __aeabi_f2d
-#define __truncdfsf2 __aeabi_d2f
-
-#endif /* __ARM_EABI__ */
diff --git a/ArmPkg/Library/ArmSoftFloatLib/softfloat-specialize b/ArmPkg/Library/ArmSoftFloatLib/softfloat-specialize deleted file mode 100644 index 4c99d0ae99..0000000000 --- a/ArmPkg/Library/ArmSoftFloatLib/softfloat-specialize +++ /dev/null @@ -1,525 +0,0 @@ -/* $NetBSD: softfloat-specialize,v 1.8 2013/01/10 08:16:10 matt Exp $ */
-
-/* This is a derivative work. */
-
-/*
-===============================================================================
-
-This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
-Arithmetic Package, Release 2a.
-
-Written by John R. Hauser. This work was made possible in part by the
-International Computer Science Institute, located at Suite 600, 1947 Center
-Street, Berkeley, California 94704. Funding was partially provided by the
-National Science Foundation under grant MIP-9311980. The original version
-of this code was written as part of a project to build a fixed-point vector
-processor in collaboration with the University of California at Berkeley,
-overseen by Profs. Nelson Morgan and John Wawrzynek. More information
-is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
-arithmetic/SoftFloat.html'.
-
-THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
-has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
-TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
-PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
-AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
-
-Derivative works are acceptable, even for commercial purposes, so long as
-(1) they include prominent notice that the work is derivative, and (2) they
-include prominent notice akin to these four paragraphs for those parts of
-this code that are retained.
-
-===============================================================================
-*/
-
-/*
--------------------------------------------------------------------------------
-Underflow tininess-detection mode, statically initialized to default value.
-(The declaration in `softfloat.h' must match the `int8' type here.)
--------------------------------------------------------------------------------
-*/
-#ifdef SOFTFLOAT_FOR_GCC
-static
-#endif
-int8 float_detect_tininess = float_tininess_after_rounding;
-
-/*
--------------------------------------------------------------------------------
-Raises the exceptions specified by `flags'. Floating-point traps can be
-defined here if desired. It is currently not possible for such a trap to
-substitute a result value. If traps are not implemented, this routine
-should be simply `float_exception_flags |= flags;'.
--------------------------------------------------------------------------------
-*/
-#ifdef SOFTFLOAT_FOR_GCC
-#ifndef set_float_exception_mask
-#define float_exception_mask _softfloat_float_exception_mask
-#endif
-#endif
-#ifndef set_float_exception_mask
-fp_except float_exception_mask = 0;
-#endif
-void
-float_raise( fp_except flags )
-{
-
-#if 0 // Don't raise exceptions
- siginfo_t info;
- fp_except mask = float_exception_mask;
-
-#ifdef set_float_exception_mask
- flags |= set_float_exception_flags(flags, 0);
-#else
- float_exception_flags |= flags;
- flags = float_exception_flags;
-#endif
-
- flags &= mask;
- if ( flags ) {
- memset(&info, 0, sizeof info);
- info.si_signo = SIGFPE;
- info.si_pid = getpid();
- info.si_uid = geteuid();
- if (flags & float_flag_underflow)
- info.si_code = FPE_FLTUND;
- else if (flags & float_flag_overflow)
- info.si_code = FPE_FLTOVF;
- else if (flags & float_flag_divbyzero)
- info.si_code = FPE_FLTDIV;
- else if (flags & float_flag_invalid)
- info.si_code = FPE_FLTINV;
- else if (flags & float_flag_inexact)
- info.si_code = FPE_FLTRES;
- sigqueueinfo(getpid(), &info);
- }
-#else // Don't raise exceptions
- float_exception_flags |= flags;
-#endif // Don't raise exceptions
-}
-#undef float_exception_mask
-
-/*
--------------------------------------------------------------------------------
-Internal canonical NaN format.
--------------------------------------------------------------------------------
-*/
-typedef struct {
- flag sign;
- bits64 high, low;
-} commonNaNT;
-
-/*
--------------------------------------------------------------------------------
-The pattern for a default generated single-precision NaN.
--------------------------------------------------------------------------------
-*/
-#define float32_default_nan 0xFFFFFFFF
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the single-precision floating-point value `a' is a NaN;
-otherwise returns 0.
--------------------------------------------------------------------------------
-*/
-#ifdef SOFTFLOAT_FOR_GCC
-static
-#endif
-flag float32_is_nan( float32 a )
-{
-
- return ( (bits32)0xFF000000 < (bits32) ( a<<1 ) );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the single-precision floating-point value `a' is a signaling
-NaN; otherwise returns 0.
--------------------------------------------------------------------------------
-*/
-#if defined(SOFTFLOAT_FOR_GCC) && !defined(SOFTFLOATSPARC64_FOR_GCC) && \
- !defined(SOFTFLOAT_M68K_FOR_GCC)
-static
-#endif
-flag float32_is_signaling_nan( float32 a )
-{
-
- return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the single-precision floating-point NaN
-`a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
-exception is raised.
--------------------------------------------------------------------------------
-*/
-static commonNaNT float32ToCommonNaN( float32 a )
-{
- commonNaNT z;
-
- if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
- z.sign = a>>31;
- z.low = 0;
- z.high = ( (bits64) a )<<41;
- return z;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the canonical NaN `a' to the single-
-precision floating-point format.
--------------------------------------------------------------------------------
-*/
-static float32 commonNaNToFloat32( commonNaNT a )
-{
-
- return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | (bits32)( a.high>>41 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Takes two single-precision floating-point values `a' and `b', one of which
-is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
-signaling NaN, the invalid exception is raised.
--------------------------------------------------------------------------------
-*/
-static float32 propagateFloat32NaN( float32 a, float32 b )
-{
- flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
-
- aIsNaN = float32_is_nan( a );
- aIsSignalingNaN = float32_is_signaling_nan( a );
- bIsNaN = float32_is_nan( b );
- bIsSignalingNaN = float32_is_signaling_nan( b );
- a |= 0x00400000;
- b |= 0x00400000;
- if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
- if ( aIsNaN ) {
- return ( aIsSignalingNaN & bIsNaN ) ? b : a;
- }
- else {
- return b;
- }
-
-}
-
-/*
--------------------------------------------------------------------------------
-The pattern for a default generated double-precision NaN.
--------------------------------------------------------------------------------
-*/
-#define float64_default_nan LIT64( 0xFFFFFFFFFFFFFFFF )
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the double-precision floating-point value `a' is a NaN;
-otherwise returns 0.
--------------------------------------------------------------------------------
-*/
-#ifdef SOFTFLOAT_FOR_GCC
-static
-#endif
-flag float64_is_nan( float64 a )
-{
-
- return ( (bits64)LIT64( 0xFFE0000000000000 ) <
- (bits64) ( FLOAT64_DEMANGLE(a)<<1 ) );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the double-precision floating-point value `a' is a signaling
-NaN; otherwise returns 0.
--------------------------------------------------------------------------------
-*/
-#if defined(SOFTFLOAT_FOR_GCC) && !defined(SOFTFLOATSPARC64_FOR_GCC) && \
- !defined(SOFTFLOATM68K_FOR_GCC)
-static
-#endif
-flag float64_is_signaling_nan( float64 a )
-{
-
- return
- ( ( ( FLOAT64_DEMANGLE(a)>>51 ) & 0xFFF ) == 0xFFE )
- && ( FLOAT64_DEMANGLE(a) & LIT64( 0x0007FFFFFFFFFFFF ) );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the double-precision floating-point NaN
-`a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
-exception is raised.
--------------------------------------------------------------------------------
-*/
-static commonNaNT float64ToCommonNaN( float64 a )
-{
- commonNaNT z;
-
- if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
- z.sign = (flag)(FLOAT64_DEMANGLE(a)>>63);
- z.low = 0;
- z.high = FLOAT64_DEMANGLE(a)<<12;
- return z;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the canonical NaN `a' to the double-
-precision floating-point format.
--------------------------------------------------------------------------------
-*/
-static float64 commonNaNToFloat64( commonNaNT a )
-{
-
- return FLOAT64_MANGLE(
- ( ( (bits64) a.sign )<<63 )
- | LIT64( 0x7FF8000000000000 )
- | ( a.high>>12 ) );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Takes two double-precision floating-point values `a' and `b', one of which
-is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
-signaling NaN, the invalid exception is raised.
--------------------------------------------------------------------------------
-*/
-static float64 propagateFloat64NaN( float64 a, float64 b )
-{
- flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
-
- aIsNaN = float64_is_nan( a );
- aIsSignalingNaN = float64_is_signaling_nan( a );
- bIsNaN = float64_is_nan( b );
- bIsSignalingNaN = float64_is_signaling_nan( b );
- a |= FLOAT64_MANGLE(LIT64( 0x0008000000000000 ));
- b |= FLOAT64_MANGLE(LIT64( 0x0008000000000000 ));
- if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
- if ( aIsNaN ) {
- return ( aIsSignalingNaN & bIsNaN ) ? b : a;
- }
- else {
- return b;
- }
-
-}
-
-#ifdef FLOATX80
-
-/*
--------------------------------------------------------------------------------
-The pattern for a default generated extended double-precision NaN. The
-`high' and `low' values hold the most- and least-significant bits,
-respectively.
--------------------------------------------------------------------------------
-*/
-#define floatx80_default_nan_high 0xFFFF
-#define floatx80_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the extended double-precision floating-point value `a' is a
-NaN; otherwise returns 0.
--------------------------------------------------------------------------------
-*/
-flag floatx80_is_nan( floatx80 a )
-{
-
- return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( a.low<<1 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the extended double-precision floating-point value `a' is a
-signaling NaN; otherwise returns 0.
--------------------------------------------------------------------------------
-*/
-flag floatx80_is_signaling_nan( floatx80 a )
-{
- bits64 aLow;
-
- aLow = a.low & ~ LIT64( 0x4000000000000000 );
- return
- ( ( a.high & 0x7FFF ) == 0x7FFF )
- && (bits64) ( aLow<<1 )
- && ( a.low == aLow );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the extended double-precision floating-
-point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the
-invalid exception is raised.
--------------------------------------------------------------------------------
-*/
-static commonNaNT floatx80ToCommonNaN( floatx80 a )
-{
- commonNaNT z;
-
- if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
- z.sign = a.high>>15;
- z.low = 0;
- z.high = a.low<<1;
- return z;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the canonical NaN `a' to the extended
-double-precision floating-point format.
--------------------------------------------------------------------------------
-*/
-static floatx80 commonNaNToFloatx80( commonNaNT a )
-{
- floatx80 z;
-
- z.low = LIT64( 0xC000000000000000 ) | ( a.high>>1 );
- z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF;
- return z;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Takes two extended double-precision floating-point values `a' and `b', one
-of which is a NaN, and returns the appropriate NaN result. If either `a' or
-`b' is a signaling NaN, the invalid exception is raised.
--------------------------------------------------------------------------------
-*/
-static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b )
-{
- flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
-
- aIsNaN = floatx80_is_nan( a );
- aIsSignalingNaN = floatx80_is_signaling_nan( a );
- bIsNaN = floatx80_is_nan( b );
- bIsSignalingNaN = floatx80_is_signaling_nan( b );
- a.low |= LIT64( 0xC000000000000000 );
- b.low |= LIT64( 0xC000000000000000 );
- if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
- if ( aIsNaN ) {
- return ( aIsSignalingNaN & bIsNaN ) ? b : a;
- }
- else {
- return b;
- }
-
-}
-
-#endif
-
-#ifdef FLOAT128
-
-/*
--------------------------------------------------------------------------------
-The pattern for a default generated quadruple-precision NaN. The `high' and
-`low' values hold the most- and least-significant bits, respectively.
--------------------------------------------------------------------------------
-*/
-#define float128_default_nan_high LIT64( 0xFFFFFFFFFFFFFFFF )
-#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the quadruple-precision floating-point value `a' is a NaN;
-otherwise returns 0.
--------------------------------------------------------------------------------
-*/
-flag float128_is_nan( float128 a )
-{
-
- return
- ( (bits64)LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
- && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the quadruple-precision floating-point value `a' is a
-signaling NaN; otherwise returns 0.
--------------------------------------------------------------------------------
-*/
-flag float128_is_signaling_nan( float128 a )
-{
-
- return
- ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
- && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the quadruple-precision floating-point NaN
-`a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
-exception is raised.
--------------------------------------------------------------------------------
-*/
-static commonNaNT float128ToCommonNaN( float128 a )
-{
- commonNaNT z;
-
- if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
- z.sign = (flag)(a.high>>63);
- shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
- return z;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the canonical NaN `a' to the quadruple-
-precision floating-point format.
--------------------------------------------------------------------------------
-*/
-static float128 commonNaNToFloat128( commonNaNT a )
-{
- float128 z;
-
- shift128Right( a.high, a.low, 16, &z.high, &z.low );
- z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF800000000000 );
- return z;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Takes two quadruple-precision floating-point values `a' and `b', one of
-which is a NaN, and returns the appropriate NaN result. If either `a' or
-`b' is a signaling NaN, the invalid exception is raised.
--------------------------------------------------------------------------------
-*/
-static float128 propagateFloat128NaN( float128 a, float128 b )
-{
- flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
-
- aIsNaN = float128_is_nan( a );
- aIsSignalingNaN = float128_is_signaling_nan( a );
- bIsNaN = float128_is_nan( b );
- bIsSignalingNaN = float128_is_signaling_nan( b );
- a.high |= LIT64( 0x0000800000000000 );
- b.high |= LIT64( 0x0000800000000000 );
- if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
- if ( aIsNaN ) {
- return ( aIsSignalingNaN & bIsNaN ) ? b : a;
- }
- else {
- return b;
- }
-
-}
-
-#endif
-
diff --git a/ArmPkg/Library/BdsLib/BdsAppLoader.c b/ArmPkg/Library/BdsLib/BdsAppLoader.c deleted file mode 100644 index 1f208f8dd7..0000000000 --- a/ArmPkg/Library/BdsLib/BdsAppLoader.c +++ /dev/null @@ -1,253 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2015, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "BdsInternal.h"
-
-/**
- Locate an EFI application in a the Firmware Volumes by its Name
-
- @param EfiAppGuid Guid of the EFI Application into the Firmware Volume
- @param DevicePath EFI Device Path of the EFI application
-
- @return EFI_SUCCESS The function completed successfully.
- @return EFI_NOT_FOUND The protocol could not be located.
- @return EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
-
-**/
-EFI_STATUS
-LocateEfiApplicationInFvByName (
- IN CONST CHAR16* EfiAppName,
- OUT EFI_DEVICE_PATH **DevicePath
- )
-{
- VOID *Key;
- EFI_STATUS Status, FileStatus;
- EFI_GUID NameGuid;
- EFI_FV_FILETYPE FileType;
- EFI_FV_FILE_ATTRIBUTES Attributes;
- UINTN Size;
- UINTN UiStringLen;
- CHAR16 *UiSection;
- UINT32 Authentication;
- EFI_DEVICE_PATH *FvDevicePath;
- MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileDevicePath;
- EFI_HANDLE *HandleBuffer;
- UINTN NumberOfHandles;
- UINTN Index;
- EFI_FIRMWARE_VOLUME2_PROTOCOL *FvInstance;
-
- ASSERT (DevicePath != NULL);
-
- // Length of FilePath
- UiStringLen = StrLen (EfiAppName);
-
- // Locate all the Firmware Volume protocols.
- Status = gBS->LocateHandleBuffer (
- ByProtocol,
- &gEfiFirmwareVolume2ProtocolGuid,
- NULL,
- &NumberOfHandles,
- &HandleBuffer
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- *DevicePath = NULL;
-
- // Looking for FV with ACPI storage file
- for (Index = 0; Index < NumberOfHandles; Index++) {
- //
- // Get the protocol on this handle
- // This should not fail because of LocateHandleBuffer
- //
- Status = gBS->HandleProtocol (
- HandleBuffer[Index],
- &gEfiFirmwareVolume2ProtocolGuid,
- (VOID**) &FvInstance
- );
- if (EFI_ERROR (Status)) {
- goto FREE_HANDLE_BUFFER;
- }
-
- // Allocate Key
- Key = AllocatePool (FvInstance->KeySize);
- ASSERT (Key != NULL);
- ZeroMem (Key, FvInstance->KeySize);
-
- do {
- // Search in all files
- FileType = EFI_FV_FILETYPE_ALL;
-
- Status = FvInstance->GetNextFile (FvInstance, Key, &FileType, &NameGuid, &Attributes, &Size);
- if (!EFI_ERROR (Status)) {
- UiSection = NULL;
- FileStatus = FvInstance->ReadSection (
- FvInstance,
- &NameGuid,
- EFI_SECTION_USER_INTERFACE,
- 0,
- (VOID **)&UiSection,
- &Size,
- &Authentication
- );
- if (!EFI_ERROR (FileStatus)) {
- if (StrnCmp (EfiAppName, UiSection, UiStringLen) == 0) {
- //
- // We found a UiString match.
- //
- Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID **)&FvDevicePath);
-
- // Generate the Device Path for the file
- EfiInitializeFwVolDevicepathNode (&FileDevicePath, &NameGuid);
- *DevicePath = AppendDevicePathNode (FvDevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&FileDevicePath);
- ASSERT (*DevicePath != NULL);
-
- FreePool (Key);
- FreePool (UiSection);
- FreePool (HandleBuffer);
- return FileStatus;
- }
- FreePool (UiSection);
- }
- }
- } while (!EFI_ERROR (Status));
-
- FreePool (Key);
- }
-
-FREE_HANDLE_BUFFER:
- FreePool (HandleBuffer);
- return EFI_NOT_FOUND;
-}
-
-/**
- Locate an EFI application in a the Firmware Volumes by its GUID
-
- @param EfiAppGuid Guid of the EFI Application into the Firmware Volume
- @param DevicePath EFI Device Path of the EFI application
-
- @return EFI_SUCCESS The function completed successfully.
- @return EFI_NOT_FOUND The protocol could not be located.
- @return EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
-
-**/
-EFI_STATUS
-LocateEfiApplicationInFvByGuid (
- IN CONST EFI_GUID *EfiAppGuid,
- OUT EFI_DEVICE_PATH **DevicePath
- )
-{
- EFI_STATUS Status;
- EFI_DEVICE_PATH *FvDevicePath;
- EFI_HANDLE *HandleBuffer;
- UINTN NumberOfHandles;
- UINTN Index;
- EFI_FIRMWARE_VOLUME2_PROTOCOL *FvInstance;
- EFI_FV_FILE_ATTRIBUTES Attributes;
- UINT32 AuthenticationStatus;
- EFI_FV_FILETYPE Type;
- UINTN Size;
- CHAR16 *UiSection;
- MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FvFileDevicePath;
-
- ASSERT (DevicePath != NULL);
-
- // Locate all the Firmware Volume protocols.
- Status = gBS->LocateHandleBuffer (
- ByProtocol,
- &gEfiFirmwareVolume2ProtocolGuid,
- NULL,
- &NumberOfHandles,
- &HandleBuffer
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- *DevicePath = NULL;
-
- // Looking for FV with ACPI storage file
- for (Index = 0; Index < NumberOfHandles; Index++) {
- //
- // Get the protocol on this handle
- // This should not fail because of LocateHandleBuffer
- //
- Status = gBS->HandleProtocol (
- HandleBuffer[Index],
- &gEfiFirmwareVolume2ProtocolGuid,
- (VOID**) &FvInstance
- );
- if (EFI_ERROR (Status)) {
- goto FREE_HANDLE_BUFFER;
- }
-
- Status = FvInstance->ReadFile (
- FvInstance,
- EfiAppGuid,
- NULL,
- &Size,
- &Type,
- &Attributes,
- &AuthenticationStatus
- );
- if (EFI_ERROR (Status)) {
- //
- // Skip if no EFI application file in the FV
- //
- continue;
- } else {
- UiSection = NULL;
- Status = FvInstance->ReadSection (
- FvInstance,
- EfiAppGuid,
- EFI_SECTION_USER_INTERFACE,
- 0,
- (VOID **)&UiSection,
- &Size,
- &AuthenticationStatus
- );
- if (!EFI_ERROR (Status)) {
- //
- // Create the EFI Device Path for the application using the Filename of the application
- //
- *DevicePath = FileDevicePath (HandleBuffer[Index], UiSection);
- } else {
- Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID**)&FvDevicePath);
- ASSERT_EFI_ERROR (Status);
-
- //
- // Create the EFI Device Path for the application using the EFI GUID of the application
- //
- EfiInitializeFwVolDevicepathNode (&FvFileDevicePath, EfiAppGuid);
-
- *DevicePath = AppendDevicePathNode (FvDevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&FvFileDevicePath);
- ASSERT (*DevicePath != NULL);
- }
- break;
- }
- }
-
-FREE_HANDLE_BUFFER:
- //
- // Free any allocated buffers
- //
- FreePool (HandleBuffer);
-
- if (*DevicePath == NULL) {
- return EFI_NOT_FOUND;
- } else {
- return EFI_SUCCESS;
- }
-}
diff --git a/ArmPkg/Library/BdsLib/BdsFilePath.c b/ArmPkg/Library/BdsLib/BdsFilePath.c deleted file mode 100644 index f9d8c4c205..0000000000 --- a/ArmPkg/Library/BdsLib/BdsFilePath.c +++ /dev/null @@ -1,1414 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "BdsInternal.h"
-
-#include <Library/NetLib.h>
-
-#include <Protocol/Bds.h>
-#include <Protocol/UsbIo.h>
-#include <Protocol/DiskIo.h>
-#include <Protocol/LoadedImage.h>
-#include <Protocol/SimpleNetwork.h>
-#include <Protocol/Dhcp4.h>
-#include <Protocol/Mtftp4.h>
-
-
-#define IS_DEVICE_PATH_NODE(node,type,subtype) (((node)->Type == (type)) && ((node)->SubType == (subtype)))
-
-/* Type and defines to set up the DHCP4 options */
-
-typedef struct {
- EFI_DHCP4_PACKET_OPTION Head;
- UINT8 Route;
-} DHCP4_OPTION;
-
-#define DHCP_TAG_PARA_LIST 55
-#define DHCP_TAG_NETMASK 1
-#define DHCP_TAG_ROUTER 3
-
-/*
- Constant strings and define related to the message indicating the amount of
- progress in the dowloading of a TFTP file.
-*/
-
-// Frame for the progression slider
-STATIC CONST CHAR16 mTftpProgressFrame[] = L"[ ]";
-
-// Number of steps in the progression slider
-#define TFTP_PROGRESS_SLIDER_STEPS ((sizeof (mTftpProgressFrame) / sizeof (CHAR16)) - 3)
-
-// Size in number of characters plus one (final zero) of the message to
-// indicate the progress of a tftp download. The format is "[(progress slider:
-// 40 characters)] (nb of KBytes downloaded so far: 7 characters) Kb". There
-// are thus the number of characters in mTftpProgressFrame[] plus 11 characters
-// (2 // spaces, "Kb" and seven characters for the number of KBytes).
-#define TFTP_PROGRESS_MESSAGE_SIZE ((sizeof (mTftpProgressFrame) / sizeof (CHAR16)) + 12)
-
-// String to delete the tftp progress message to be able to update it :
-// (TFTP_PROGRESS_MESSAGE_SIZE-1) '\b'
-STATIC CONST CHAR16 mTftpProgressDelete[] = L"\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b";
-
-
-// Extract the FilePath from the Device Path
-CHAR16*
-BdsExtractFilePathFromDevicePath (
- IN CONST CHAR16 *StrDevicePath,
- IN UINTN NumberDevicePathNode
- )
-{
- UINTN Node;
- CHAR16 *Str;
-
- Str = (CHAR16*)StrDevicePath;
- Node = 0;
- while ((Str != NULL) && (*Str != L'\0') && (Node < NumberDevicePathNode)) {
- if ((*Str == L'/') || (*Str == L'\\')) {
- Node++;
- }
- Str++;
- }
-
- if (*Str == L'\0') {
- return NULL;
- } else {
- return Str;
- }
-}
-
-BOOLEAN
-BdsIsRemovableUsb (
- IN EFI_DEVICE_PATH* DevicePath
- )
-{
- return ((DevicePathType (DevicePath) == MESSAGING_DEVICE_PATH) &&
- ((DevicePathSubType (DevicePath) == MSG_USB_CLASS_DP) ||
- (DevicePathSubType (DevicePath) == MSG_USB_WWID_DP)));
-}
-
-EFI_STATUS
-BdsGetDeviceUsb (
- IN EFI_DEVICE_PATH* RemovableDevicePath,
- OUT EFI_HANDLE* DeviceHandle,
- OUT EFI_DEVICE_PATH** NewDevicePath
- )
-{
- EFI_STATUS Status;
- UINTN Index;
- UINTN UsbIoHandleCount;
- EFI_HANDLE *UsbIoBuffer;
- EFI_DEVICE_PATH* UsbIoDevicePath;
- EFI_DEVICE_PATH* TmpDevicePath;
- USB_WWID_DEVICE_PATH* WwidDevicePath1;
- USB_WWID_DEVICE_PATH* WwidDevicePath2;
- USB_CLASS_DEVICE_PATH* UsbClassDevicePath1;
- USB_CLASS_DEVICE_PATH* UsbClassDevicePath2;
-
- // Get all the UsbIo handles
- UsbIoHandleCount = 0;
- Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiUsbIoProtocolGuid, NULL, &UsbIoHandleCount, &UsbIoBuffer);
- if (EFI_ERROR (Status) || (UsbIoHandleCount == 0)) {
- return Status;
- }
-
- // Check if one of the handles matches the USB description
- for (Index = 0; Index < UsbIoHandleCount; Index++) {
- Status = gBS->HandleProtocol (UsbIoBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID **) &UsbIoDevicePath);
- if (!EFI_ERROR (Status)) {
- TmpDevicePath = UsbIoDevicePath;
- while (!IsDevicePathEnd (TmpDevicePath)) {
- // Check if the Device Path node is a USB Removable device Path node
- if (BdsIsRemovableUsb (TmpDevicePath)) {
- if (TmpDevicePath->SubType == MSG_USB_WWID_DP) {
- WwidDevicePath1 = (USB_WWID_DEVICE_PATH*)RemovableDevicePath;
- WwidDevicePath2 = (USB_WWID_DEVICE_PATH*)TmpDevicePath;
- if ((WwidDevicePath1->VendorId == WwidDevicePath2->VendorId) &&
- (WwidDevicePath1->ProductId == WwidDevicePath2->ProductId) &&
- (CompareMem (WwidDevicePath1+1, WwidDevicePath2+1, DevicePathNodeLength(WwidDevicePath1)-sizeof (USB_WWID_DEVICE_PATH)) == 0))
- {
- *DeviceHandle = UsbIoBuffer[Index];
- // Add the additional original Device Path Nodes (eg: FilePath Device Path Node) to the new Device Path
- *NewDevicePath = AppendDevicePath (UsbIoDevicePath, NextDevicePathNode (RemovableDevicePath));
- return EFI_SUCCESS;
- }
- } else {
- UsbClassDevicePath1 = (USB_CLASS_DEVICE_PATH*)RemovableDevicePath;
- UsbClassDevicePath2 = (USB_CLASS_DEVICE_PATH*)TmpDevicePath;
- if ((UsbClassDevicePath1->VendorId != 0xFFFF) && (UsbClassDevicePath1->VendorId == UsbClassDevicePath2->VendorId) &&
- (UsbClassDevicePath1->ProductId != 0xFFFF) && (UsbClassDevicePath1->ProductId == UsbClassDevicePath2->ProductId) &&
- (UsbClassDevicePath1->DeviceClass != 0xFF) && (UsbClassDevicePath1->DeviceClass == UsbClassDevicePath2->DeviceClass) &&
- (UsbClassDevicePath1->DeviceSubClass != 0xFF) && (UsbClassDevicePath1->DeviceSubClass == UsbClassDevicePath2->DeviceSubClass) &&
- (UsbClassDevicePath1->DeviceProtocol != 0xFF) && (UsbClassDevicePath1->DeviceProtocol == UsbClassDevicePath2->DeviceProtocol))
- {
- *DeviceHandle = UsbIoBuffer[Index];
- // Add the additional original Device Path Nodes (eg: FilePath Device Path Node) to the new Device Path
- *NewDevicePath = AppendDevicePath (UsbIoDevicePath, NextDevicePathNode (RemovableDevicePath));
- return EFI_SUCCESS;
- }
- }
- }
- TmpDevicePath = NextDevicePathNode (TmpDevicePath);
- }
-
- }
- }
-
- return EFI_NOT_FOUND;
-}
-
-BOOLEAN
-BdsIsRemovableHd (
- IN EFI_DEVICE_PATH* DevicePath
- )
-{
- return IS_DEVICE_PATH_NODE (DevicePath, MEDIA_DEVICE_PATH, MEDIA_HARDDRIVE_DP);
-}
-
-EFI_STATUS
-BdsGetDeviceHd (
- IN EFI_DEVICE_PATH* RemovableDevicePath,
- OUT EFI_HANDLE* DeviceHandle,
- OUT EFI_DEVICE_PATH** NewDevicePath
- )
-{
- EFI_STATUS Status;
- UINTN Index;
- UINTN PartitionHandleCount;
- EFI_HANDLE *PartitionBuffer;
- EFI_DEVICE_PATH* PartitionDevicePath;
- EFI_DEVICE_PATH* TmpDevicePath;
- HARDDRIVE_DEVICE_PATH* HardDriveDevicePath1;
- HARDDRIVE_DEVICE_PATH* HardDriveDevicePath2;
-
- // Get all the DiskIo handles
- PartitionHandleCount = 0;
- Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiDiskIoProtocolGuid, NULL, &PartitionHandleCount, &PartitionBuffer);
- if (EFI_ERROR (Status) || (PartitionHandleCount == 0)) {
- return Status;
- }
-
- // Check if one of the handles matches the Hard Disk Description
- for (Index = 0; Index < PartitionHandleCount; Index++) {
- Status = gBS->HandleProtocol (PartitionBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID **) &PartitionDevicePath);
- if (!EFI_ERROR (Status)) {
- TmpDevicePath = PartitionDevicePath;
- while (!IsDevicePathEnd (TmpDevicePath)) {
- // Check if the Device Path node is a HD Removable device Path node
- if (BdsIsRemovableHd (TmpDevicePath)) {
- HardDriveDevicePath1 = (HARDDRIVE_DEVICE_PATH*)RemovableDevicePath;
- HardDriveDevicePath2 = (HARDDRIVE_DEVICE_PATH*)TmpDevicePath;
- if ((HardDriveDevicePath1->SignatureType == HardDriveDevicePath2->SignatureType) &&
- (CompareGuid ((EFI_GUID *)HardDriveDevicePath1->Signature, (EFI_GUID *)HardDriveDevicePath2->Signature) == TRUE) &&
- (HardDriveDevicePath1->PartitionNumber == HardDriveDevicePath2->PartitionNumber))
- {
- *DeviceHandle = PartitionBuffer[Index];
- // Add the additional original Device Path Nodes (eg: FilePath Device Path Node) to the new Device Path
- *NewDevicePath = AppendDevicePath (PartitionDevicePath, NextDevicePathNode (RemovableDevicePath));
- return EFI_SUCCESS;
- }
- }
- TmpDevicePath = NextDevicePathNode (TmpDevicePath);
- }
-
- }
- }
-
- return EFI_NOT_FOUND;
-}
-
-/*BOOLEAN
-BdsIsRemovableCdrom (
- IN EFI_DEVICE_PATH* DevicePath
- )
-{
- return IS_DEVICE_PATH_NODE (DevicePath, MEDIA_DEVICE_PATH, MEDIA_CDROM_DP);
-}
-
-EFI_STATUS
-BdsGetDeviceCdrom (
- IN EFI_DEVICE_PATH* RemovableDevicePath,
- OUT EFI_HANDLE* DeviceHandle,
- OUT EFI_DEVICE_PATH** DevicePath
- )
-{
- ASSERT(0);
- return EFI_UNSUPPORTED;
-}*/
-
-typedef BOOLEAN
-(*BDS_IS_REMOVABLE) (
- IN EFI_DEVICE_PATH* DevicePath
- );
-
-typedef EFI_STATUS
-(*BDS_GET_DEVICE) (
- IN EFI_DEVICE_PATH* RemovableDevicePath,
- OUT EFI_HANDLE* DeviceHandle,
- OUT EFI_DEVICE_PATH** DevicePath
- );
-
-typedef struct {
- BDS_IS_REMOVABLE IsRemovable;
- BDS_GET_DEVICE GetDevice;
-} BDS_REMOVABLE_DEVICE_SUPPORT;
-
-BDS_REMOVABLE_DEVICE_SUPPORT RemovableDeviceSupport[] = {
- { BdsIsRemovableUsb, BdsGetDeviceUsb },
- { BdsIsRemovableHd, BdsGetDeviceHd },
- //{ BdsIsRemovableCdrom, BdsGetDeviceCdrom }
-};
-
-STATIC
-BOOLEAN
-IsRemovableDevice (
- IN EFI_DEVICE_PATH* DevicePath
- )
-{
- UINTN Index;
- EFI_DEVICE_PATH* TmpDevicePath;
-
- TmpDevicePath = DevicePath;
- while (!IsDevicePathEnd (TmpDevicePath)) {
- for (Index = 0; Index < sizeof (RemovableDeviceSupport) / sizeof (BDS_REMOVABLE_DEVICE_SUPPORT); Index++) {
- if (RemovableDeviceSupport[Index].IsRemovable (TmpDevicePath)) {
- return TRUE;
- }
- }
- TmpDevicePath = NextDevicePathNode (TmpDevicePath);
- }
-
- return FALSE;
-}
-
-STATIC
-EFI_STATUS
-TryRemovableDevice (
- IN EFI_DEVICE_PATH* DevicePath,
- OUT EFI_HANDLE* DeviceHandle,
- OUT EFI_DEVICE_PATH** NewDevicePath
- )
-{
- EFI_STATUS Status;
- UINTN Index;
- EFI_DEVICE_PATH* TmpDevicePath;
- BDS_REMOVABLE_DEVICE_SUPPORT* RemovableDevice;
- EFI_DEVICE_PATH* RemovableDevicePath;
- BOOLEAN RemovableFound;
-
- RemovableDevice = NULL;
- RemovableDevicePath = NULL;
- RemovableFound = FALSE;
- TmpDevicePath = DevicePath;
-
- while (!IsDevicePathEnd (TmpDevicePath) && !RemovableFound) {
- for (Index = 0; Index < sizeof (RemovableDeviceSupport) / sizeof (BDS_REMOVABLE_DEVICE_SUPPORT); Index++) {
- RemovableDevice = &RemovableDeviceSupport[Index];
- if (RemovableDevice->IsRemovable (TmpDevicePath)) {
- RemovableDevicePath = TmpDevicePath;
- RemovableFound = TRUE;
- break;
- }
- }
- TmpDevicePath = NextDevicePathNode (TmpDevicePath);
- }
-
- if (!RemovableFound) {
- return EFI_NOT_FOUND;
- }
-
- // Search into the current started drivers
- Status = RemovableDevice->GetDevice (RemovableDevicePath, DeviceHandle, NewDevicePath);
- if (Status == EFI_NOT_FOUND) {
- // Connect all the drivers
- BdsConnectAllDrivers ();
-
- // Search again into all the drivers
- Status = RemovableDevice->GetDevice (RemovableDevicePath, DeviceHandle, NewDevicePath);
- }
-
- return Status;
-}
-
-STATIC
-EFI_STATUS
-BdsConnectAndUpdateDevicePath (
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath,
- OUT EFI_HANDLE *Handle,
- OUT EFI_DEVICE_PATH_PROTOCOL **RemainingDevicePath
- )
-{
- EFI_DEVICE_PATH* Remaining;
- EFI_DEVICE_PATH* NewDevicePath;
- EFI_STATUS Status;
- EFI_HANDLE PreviousHandle;
-
- if ((DevicePath == NULL) || (*DevicePath == NULL) || (Handle == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- PreviousHandle = NULL;
- do {
- Remaining = *DevicePath;
-
- // The LocateDevicePath() function locates all devices on DevicePath that support Protocol and returns
- // the handle to the device that is closest to DevicePath. On output, the device path pointer is modified
- // to point to the remaining part of the device path
- Status = gBS->LocateDevicePath (&gEfiDevicePathProtocolGuid, &Remaining, Handle);
-
- if (!EFI_ERROR (Status)) {
- if (*Handle == PreviousHandle) {
- //
- // If no forward progress is made try invoking the Dispatcher.
- // A new FV may have been added to the system and new drivers
- // may now be found.
- // Status == EFI_SUCCESS means a driver was dispatched
- // Status == EFI_NOT_FOUND means no new drivers were dispatched
- //
- Status = gDS->Dispatch ();
- }
-
- if (!EFI_ERROR (Status)) {
- PreviousHandle = *Handle;
-
- // Recursive = FALSE: We do not want to start the whole device tree
- Status = gBS->ConnectController (*Handle, NULL, Remaining, FALSE);
- }
- }
- } while (!EFI_ERROR (Status) && !IsDevicePathEnd (Remaining));
-
- if (!EFI_ERROR (Status)) {
- // Now, we have got the whole Device Path connected, call again ConnectController to ensure all the supported Driver
- // Binding Protocol are connected (such as DiskIo and SimpleFileSystem)
- Remaining = *DevicePath;
- Status = gBS->LocateDevicePath (&gEfiDevicePathProtocolGuid, &Remaining, Handle);
- if (!EFI_ERROR (Status)) {
- Status = gBS->ConnectController (*Handle, NULL, Remaining, FALSE);
- if (EFI_ERROR (Status)) {
- // If the last node is a Memory Map Device Path just return EFI_SUCCESS.
- if ((Remaining->Type == HARDWARE_DEVICE_PATH) && (Remaining->SubType == HW_MEMMAP_DP)) {
- Status = EFI_SUCCESS;
- }
- }
- }
- } else if (!IsDevicePathEnd (Remaining) && !IsRemovableDevice (Remaining)) {
-
- /*// If the remaining Device Path is a FilePath or MemoryMap then we consider the Device Path has been loaded correctly
- if ((Remaining->Type == MEDIA_DEVICE_PATH) && (Remaining->SubType == MEDIA_FILEPATH_DP)) {
- Status = EFI_SUCCESS;
- } else if ((Remaining->Type == HARDWARE_DEVICE_PATH) && (Remaining->SubType == HW_MEMMAP_DP)) {
- Status = EFI_SUCCESS;
- }*/
-
- //TODO: Should we just return success and leave the caller decide if it is the expected RemainingPath
- Status = EFI_SUCCESS;
- } else {
- Status = TryRemovableDevice (*DevicePath, Handle, &NewDevicePath);
- if (!EFI_ERROR (Status)) {
- Status = BdsConnectAndUpdateDevicePath (&NewDevicePath, Handle, RemainingDevicePath);
- *DevicePath = NewDevicePath;
- return Status;
- }
- }
-
- if (RemainingDevicePath) {
- *RemainingDevicePath = Remaining;
- }
-
- return Status;
-}
-
-/**
- Connect a Device Path and return the handle of the driver that support this DevicePath
-
- @param DevicePath Device Path of the File to connect
- @param Handle Handle of the driver that support this DevicePath
- @param RemainingDevicePath Remaining DevicePath nodes that do not match the driver DevicePath
-
- @retval EFI_SUCCESS A driver that matches the Device Path has been found
- @retval EFI_NOT_FOUND No handles match the search.
- @retval EFI_INVALID_PARAMETER DevicePath or Handle is NULL
-
-**/
-EFI_STATUS
-BdsConnectDevicePath (
- IN EFI_DEVICE_PATH_PROTOCOL* DevicePath,
- OUT EFI_HANDLE *Handle,
- OUT EFI_DEVICE_PATH_PROTOCOL **RemainingDevicePath
- )
-{
- return BdsConnectAndUpdateDevicePath (&DevicePath, Handle, RemainingDevicePath);
-}
-
-BOOLEAN
-BdsFileSystemSupport (
- IN EFI_DEVICE_PATH *DevicePath,
- IN EFI_HANDLE Handle,
- IN EFI_DEVICE_PATH *RemainingDevicePath
- )
-{
- EFI_STATUS Status;
- EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *FsProtocol;
-
- Status = gBS->HandleProtocol (Handle, &gEfiSimpleFileSystemProtocolGuid, (VOID **)&FsProtocol);
-
- return (!EFI_ERROR (Status) && IS_DEVICE_PATH_NODE (RemainingDevicePath, MEDIA_DEVICE_PATH, MEDIA_FILEPATH_DP));
-}
-
-EFI_STATUS
-BdsFileSystemLoadImage (
- IN OUT EFI_DEVICE_PATH **DevicePath,
- IN EFI_HANDLE Handle,
- IN EFI_DEVICE_PATH *RemainingDevicePath,
- IN EFI_ALLOCATE_TYPE Type,
- IN OUT EFI_PHYSICAL_ADDRESS *Image,
- OUT UINTN *ImageSize
- )
-{
- EFI_STATUS Status;
- FILEPATH_DEVICE_PATH *FilePathDevicePath;
- EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *FsProtocol;
- EFI_FILE_PROTOCOL *Fs;
- EFI_FILE_INFO *FileInfo;
- EFI_FILE_PROTOCOL *File;
- UINTN Size;
-
- ASSERT (IS_DEVICE_PATH_NODE (RemainingDevicePath, MEDIA_DEVICE_PATH, MEDIA_FILEPATH_DP));
-
- FilePathDevicePath = (FILEPATH_DEVICE_PATH*)RemainingDevicePath;
-
- Status = gBS->OpenProtocol (
- Handle,
- &gEfiSimpleFileSystemProtocolGuid,
- (VOID**)&FsProtocol,
- gImageHandle,
- Handle,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- // Try to Open the volume and get root directory
- Status = FsProtocol->OpenVolume (FsProtocol, &Fs);
- if (EFI_ERROR (Status)) {
- goto CLOSE_PROTOCOL;
- }
-
- Status = Fs->Open (Fs, &File, FilePathDevicePath->PathName, EFI_FILE_MODE_READ, 0);
- if (EFI_ERROR (Status)) {
- goto CLOSE_PROTOCOL;
- }
-
- Size = 0;
- File->GetInfo (File, &gEfiFileInfoGuid, &Size, NULL);
- FileInfo = AllocatePool (Size);
- Status = File->GetInfo (File, &gEfiFileInfoGuid, &Size, FileInfo);
- if (EFI_ERROR (Status)) {
- goto CLOSE_FILE;
- }
-
- // Get the file size
- Size = FileInfo->FileSize;
- if (ImageSize) {
- *ImageSize = Size;
- }
- FreePool (FileInfo);
-
- Status = gBS->AllocatePages (Type, EfiBootServicesCode, EFI_SIZE_TO_PAGES(Size), Image);
- // Try to allocate in any pages if failed to allocate memory at the defined location
- if ((Status == EFI_OUT_OF_RESOURCES) && (Type != AllocateAnyPages)) {
- Status = gBS->AllocatePages (AllocateAnyPages, EfiBootServicesCode, EFI_SIZE_TO_PAGES(Size), Image);
- }
- if (!EFI_ERROR (Status)) {
- Status = File->Read (File, &Size, (VOID*)(UINTN)(*Image));
- }
-
-CLOSE_FILE:
- File->Close (File);
-
-CLOSE_PROTOCOL:
- gBS->CloseProtocol (
- Handle,
- &gEfiSimpleFileSystemProtocolGuid,
- gImageHandle,
- Handle);
-
- return Status;
-}
-
-BOOLEAN
-BdsMemoryMapSupport (
- IN EFI_DEVICE_PATH *DevicePath,
- IN EFI_HANDLE Handle,
- IN EFI_DEVICE_PATH *RemainingDevicePath
- )
-{
- return IS_DEVICE_PATH_NODE (DevicePath, HARDWARE_DEVICE_PATH, HW_MEMMAP_DP) ||
- IS_DEVICE_PATH_NODE (RemainingDevicePath, HARDWARE_DEVICE_PATH, HW_MEMMAP_DP);
-}
-
-EFI_STATUS
-BdsMemoryMapLoadImage (
- IN OUT EFI_DEVICE_PATH **DevicePath,
- IN EFI_HANDLE Handle,
- IN EFI_DEVICE_PATH *RemainingDevicePath,
- IN EFI_ALLOCATE_TYPE Type,
- IN OUT EFI_PHYSICAL_ADDRESS* Image,
- OUT UINTN *ImageSize
- )
-{
- EFI_STATUS Status;
- MEMMAP_DEVICE_PATH* MemMapPathDevicePath;
- UINTN Size;
-
- if (IS_DEVICE_PATH_NODE (RemainingDevicePath, HARDWARE_DEVICE_PATH, HW_MEMMAP_DP)) {
- MemMapPathDevicePath = (MEMMAP_DEVICE_PATH*)RemainingDevicePath;
- } else {
- ASSERT (IS_DEVICE_PATH_NODE (*DevicePath, HARDWARE_DEVICE_PATH, HW_MEMMAP_DP));
- MemMapPathDevicePath = (MEMMAP_DEVICE_PATH*)*DevicePath;
- }
-
- Size = MemMapPathDevicePath->EndingAddress - MemMapPathDevicePath->StartingAddress;
- if (Size == 0) {
- return EFI_INVALID_PARAMETER;
- }
-
- Status = gBS->AllocatePages (Type, EfiBootServicesCode, EFI_SIZE_TO_PAGES(Size), Image);
- // Try to allocate in any pages if failed to allocate memory at the defined location
- if ((Status == EFI_OUT_OF_RESOURCES) && (Type != AllocateAnyPages)) {
- Status = gBS->AllocatePages (AllocateAnyPages, EfiBootServicesCode, EFI_SIZE_TO_PAGES(Size), Image);
- }
- if (!EFI_ERROR (Status)) {
- CopyMem ((VOID*)(UINTN)(*Image), (CONST VOID*)(UINTN)MemMapPathDevicePath->StartingAddress, Size);
-
- if (ImageSize != NULL) {
- *ImageSize = Size;
- }
- }
-
- return Status;
-}
-
-BOOLEAN
-BdsFirmwareVolumeSupport (
- IN EFI_DEVICE_PATH *DevicePath,
- IN EFI_HANDLE Handle,
- IN EFI_DEVICE_PATH *RemainingDevicePath
- )
-{
- return IS_DEVICE_PATH_NODE (RemainingDevicePath, MEDIA_DEVICE_PATH, MEDIA_PIWG_FW_FILE_DP);
-}
-
-EFI_STATUS
-BdsFirmwareVolumeLoadImage (
- IN OUT EFI_DEVICE_PATH **DevicePath,
- IN EFI_HANDLE Handle,
- IN EFI_DEVICE_PATH *RemainingDevicePath,
- IN EFI_ALLOCATE_TYPE Type,
- IN OUT EFI_PHYSICAL_ADDRESS* Image,
- OUT UINTN *ImageSize
- )
-{
- EFI_STATUS Status;
- EFI_FIRMWARE_VOLUME2_PROTOCOL *FwVol;
- EFI_GUID *FvNameGuid;
- EFI_SECTION_TYPE SectionType;
- EFI_FV_FILETYPE FvType;
- EFI_FV_FILE_ATTRIBUTES Attrib;
- UINT32 AuthenticationStatus;
- VOID* ImageBuffer;
-
- ASSERT (IS_DEVICE_PATH_NODE (RemainingDevicePath, MEDIA_DEVICE_PATH, MEDIA_PIWG_FW_FILE_DP));
-
- Status = gBS->HandleProtocol (Handle, &gEfiFirmwareVolume2ProtocolGuid, (VOID **)&FwVol);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- FvNameGuid = EfiGetNameGuidFromFwVolDevicePathNode ((CONST MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *)RemainingDevicePath);
- if (FvNameGuid == NULL) {
- Status = EFI_INVALID_PARAMETER;
- }
-
- SectionType = EFI_SECTION_PE32;
- AuthenticationStatus = 0;
- //Note: ReadSection at the opposite of ReadFile does not allow to pass ImageBuffer == NULL to get the size of the file.
- ImageBuffer = NULL;
- Status = FwVol->ReadSection (
- FwVol,
- FvNameGuid,
- SectionType,
- 0,
- &ImageBuffer,
- ImageSize,
- &AuthenticationStatus
- );
- if (!EFI_ERROR (Status)) {
-#if 0
- // In case the buffer has some address requirements, we must copy the buffer to a buffer following the requirements
- if (Type != AllocateAnyPages) {
- Status = gBS->AllocatePages (Type, EfiBootServicesCode, EFI_SIZE_TO_PAGES(*ImageSize),Image);
- if (!EFI_ERROR (Status)) {
- CopyMem ((VOID*)(UINTN)(*Image), ImageBuffer, *ImageSize);
- FreePool (ImageBuffer);
- }
- }
-#else
- // We must copy the buffer into a page allocations. Otherwise, the caller could call gBS->FreePages() on the pool allocation
- Status = gBS->AllocatePages (Type, EfiBootServicesCode, EFI_SIZE_TO_PAGES(*ImageSize), Image);
- // Try to allocate in any pages if failed to allocate memory at the defined location
- if ((Status == EFI_OUT_OF_RESOURCES) && (Type != AllocateAnyPages)) {
- Status = gBS->AllocatePages (AllocateAnyPages, EfiBootServicesCode, EFI_SIZE_TO_PAGES(*ImageSize), Image);
- }
- if (!EFI_ERROR (Status)) {
- CopyMem ((VOID*)(UINTN)(*Image), ImageBuffer, *ImageSize);
- FreePool (ImageBuffer);
- }
-#endif
- } else {
- // Try a raw file, since a PE32 SECTION does not exist
- Status = FwVol->ReadFile (
- FwVol,
- FvNameGuid,
- NULL,
- ImageSize,
- &FvType,
- &Attrib,
- &AuthenticationStatus
- );
- if (!EFI_ERROR (Status)) {
- Status = gBS->AllocatePages (Type, EfiBootServicesCode, EFI_SIZE_TO_PAGES(*ImageSize), Image);
- // Try to allocate in any pages if failed to allocate memory at the defined location
- if ((Status == EFI_OUT_OF_RESOURCES) && (Type != AllocateAnyPages)) {
- Status = gBS->AllocatePages (AllocateAnyPages, EfiBootServicesCode, EFI_SIZE_TO_PAGES(*ImageSize), Image);
- }
- if (!EFI_ERROR (Status)) {
- Status = FwVol->ReadFile (
- FwVol,
- FvNameGuid,
- (VOID**)Image,
- ImageSize,
- &FvType,
- &Attrib,
- &AuthenticationStatus
- );
- }
- }
- }
- return Status;
-}
-
-BOOLEAN
-BdsPxeSupport (
- IN EFI_DEVICE_PATH* DevicePath,
- IN EFI_HANDLE Handle,
- IN EFI_DEVICE_PATH* RemainingDevicePath
- )
-{
- EFI_STATUS Status;
- EFI_PXE_BASE_CODE_PROTOCOL* PxeBcProtocol;
-
- if (!IsDevicePathEnd (RemainingDevicePath)) {
- return FALSE;
- }
-
- Status = gBS->HandleProtocol (Handle, &gEfiPxeBaseCodeProtocolGuid, (VOID **)&PxeBcProtocol);
- if (EFI_ERROR (Status)) {
- return FALSE;
- } else {
- return TRUE;
- }
-}
-
-EFI_STATUS
-BdsPxeLoadImage (
- IN OUT EFI_DEVICE_PATH **DevicePath,
- IN EFI_HANDLE Handle,
- IN EFI_DEVICE_PATH *RemainingDevicePath,
- IN EFI_ALLOCATE_TYPE Type,
- IN OUT EFI_PHYSICAL_ADDRESS* Image,
- OUT UINTN *ImageSize
- )
-{
- EFI_STATUS Status;
- EFI_LOAD_FILE_PROTOCOL *LoadFileProtocol;
- UINTN BufferSize;
- EFI_PXE_BASE_CODE_PROTOCOL *Pxe;
-
- // Get Load File Protocol attached to the PXE protocol
- Status = gBS->HandleProtocol (Handle, &gEfiLoadFileProtocolGuid, (VOID **)&LoadFileProtocol);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Status = LoadFileProtocol->LoadFile (LoadFileProtocol, RemainingDevicePath, TRUE, &BufferSize, NULL);
- if (Status == EFI_BUFFER_TOO_SMALL) {
- Status = gBS->AllocatePages (Type, EfiBootServicesCode, EFI_SIZE_TO_PAGES(BufferSize), Image);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Status = LoadFileProtocol->LoadFile (LoadFileProtocol, RemainingDevicePath, TRUE, &BufferSize, (VOID*)(UINTN)(*Image));
- if (!EFI_ERROR (Status) && (ImageSize != NULL)) {
- *ImageSize = BufferSize;
- }
- }
-
- if (Status == EFI_ALREADY_STARTED) {
- Status = gBS->LocateProtocol (&gEfiPxeBaseCodeProtocolGuid, NULL, (VOID **)&Pxe);
- if (!EFI_ERROR(Status)) {
- // If PXE is already started, we stop it
- Pxe->Stop (Pxe);
- // And we try again
- return BdsPxeLoadImage (DevicePath, Handle, RemainingDevicePath, Type, Image, ImageSize);
- }
- }
- return Status;
-}
-
-BOOLEAN
-BdsTftpSupport (
- IN EFI_DEVICE_PATH *DevicePath,
- IN EFI_HANDLE Handle,
- IN EFI_DEVICE_PATH *RemainingDevicePath
- )
-{
- EFI_STATUS Status;
- EFI_DEVICE_PATH *NextDevicePath;
- VOID *Interface;
-
- // Validate the Remaining Device Path
- if (IsDevicePathEnd (RemainingDevicePath)) {
- return FALSE;
- }
- if (!IS_DEVICE_PATH_NODE (RemainingDevicePath, MESSAGING_DEVICE_PATH, MSG_IPv4_DP) &&
- !IS_DEVICE_PATH_NODE (RemainingDevicePath, MESSAGING_DEVICE_PATH, MSG_IPv6_DP)) {
- return FALSE;
- }
- NextDevicePath = NextDevicePathNode (RemainingDevicePath);
- if (IsDevicePathEnd (NextDevicePath)) {
- return FALSE;
- }
- if (!IS_DEVICE_PATH_NODE (NextDevicePath, MEDIA_DEVICE_PATH, MEDIA_FILEPATH_DP)) {
- return FALSE;
- }
-
- Status = gBS->HandleProtocol (
- Handle, &gEfiDevicePathProtocolGuid,
- &Interface
- );
- if (EFI_ERROR (Status)) {
- return FALSE;
- }
-
- //
- // Check that the controller (identified by its handle "Handle") supports the
- // MTFTPv4 Service Binding Protocol. If it does, it means that it supports the
- // EFI MTFTPv4 Protocol needed to download the image through TFTP.
- //
- Status = gBS->HandleProtocol (
- Handle, &gEfiMtftp4ServiceBindingProtocolGuid,
- &Interface
- );
- if (EFI_ERROR (Status)) {
- return FALSE;
- }
-
- return TRUE;
-}
-
-/**
- Worker function that get the size in numbers of bytes of a file from a TFTP
- server before to download the file.
-
- @param[in] Mtftp4 MTFTP4 protocol interface
- @param[in] FilePath Path of the file, Ascii encoded
- @param[out] FileSize Address where to store the file size in number of
- bytes.
-
- @retval EFI_SUCCESS The size of the file was returned.
- @retval !EFI_SUCCESS The size of the file was not returned.
-
-**/
-STATIC
-EFI_STATUS
-Mtftp4GetFileSize (
- IN EFI_MTFTP4_PROTOCOL *Mtftp4,
- IN CHAR8 *FilePath,
- OUT UINT64 *FileSize
- )
-{
- EFI_STATUS Status;
- EFI_MTFTP4_OPTION ReqOpt[1];
- EFI_MTFTP4_PACKET *Packet;
- UINT32 PktLen;
- EFI_MTFTP4_OPTION *TableOfOptions;
- EFI_MTFTP4_OPTION *Option;
- UINT32 OptCnt;
- UINT8 OptBuf[128];
-
- ReqOpt[0].OptionStr = (UINT8*)"tsize";
- OptBuf[0] = '0';
- OptBuf[1] = 0;
- ReqOpt[0].ValueStr = OptBuf;
-
- Status = Mtftp4->GetInfo (
- Mtftp4,
- NULL,
- (UINT8*)FilePath,
- NULL,
- 1,
- ReqOpt,
- &PktLen,
- &Packet
- );
-
- if (EFI_ERROR (Status)) {
- goto Error;
- }
-
- Status = Mtftp4->ParseOptions (
- Mtftp4,
- PktLen,
- Packet,
- (UINT32 *) &OptCnt,
- &TableOfOptions
- );
- if (EFI_ERROR (Status)) {
- goto Error;
- }
-
- Option = TableOfOptions;
- while (OptCnt != 0) {
- if (AsciiStrnCmp ((CHAR8 *)Option->OptionStr, "tsize", 5) == 0) {
- *FileSize = AsciiStrDecimalToUint64 ((CHAR8 *)Option->ValueStr);
- break;
- }
- OptCnt--;
- Option++;
- }
- FreePool (TableOfOptions);
-
- if (OptCnt == 0) {
- Status = EFI_UNSUPPORTED;
- }
-
-Error :
-
- return Status;
-}
-
-/**
- Update the progress of a file download
- This procedure is called each time a new TFTP packet is received.
-
- @param[in] This MTFTP4 protocol interface
- @param[in] Token Parameters for the download of the file
- @param[in] PacketLen Length of the packet
- @param[in] Packet Address of the packet
-
- @retval EFI_SUCCESS All packets are accepted.
-
-**/
-STATIC
-EFI_STATUS
-Mtftp4CheckPacket (
- IN EFI_MTFTP4_PROTOCOL *This,
- IN EFI_MTFTP4_TOKEN *Token,
- IN UINT16 PacketLen,
- IN EFI_MTFTP4_PACKET *Packet
- )
-{
- BDS_TFTP_CONTEXT *Context;
- CHAR16 Progress[TFTP_PROGRESS_MESSAGE_SIZE];
- UINT64 NbOfKb;
- UINTN Index;
- UINTN LastStep;
- UINTN Step;
- UINT64 LastNbOf50Kb;
- UINT64 NbOf50Kb;
-
- if ((NTOHS (Packet->OpCode)) == EFI_MTFTP4_OPCODE_DATA) {
- Context = (BDS_TFTP_CONTEXT*)Token->Context;
-
- if (Context->DownloadedNbOfBytes == 0) {
- if (Context->FileSize > 0) {
- Print (L"%s 0 Kb", mTftpProgressFrame);
- } else {
- Print (L" 0 Kb");
- }
- }
-
- //
- // The data is the packet are prepended with two UINT16 :
- // . OpCode = EFI_MTFTP4_OPCODE_DATA
- // . Block = the number of this block of data
- //
- Context->DownloadedNbOfBytes += PacketLen - sizeof (Packet->OpCode) - sizeof (Packet->Data.Block);
- NbOfKb = Context->DownloadedNbOfBytes / 1024;
-
- Progress[0] = L'\0';
- if (Context->FileSize > 0) {
- LastStep = (Context->LastReportedNbOfBytes * TFTP_PROGRESS_SLIDER_STEPS) / Context->FileSize;
- Step = (Context->DownloadedNbOfBytes * TFTP_PROGRESS_SLIDER_STEPS) / Context->FileSize;
- if (Step > LastStep) {
- Print (mTftpProgressDelete);
- CopyMem (Progress, mTftpProgressFrame, sizeof mTftpProgressFrame);
- for (Index = 1; Index < Step; Index++) {
- Progress[Index] = L'=';
- }
- Progress[Step] = L'>';
-
- UnicodeSPrint (
- Progress + (sizeof (mTftpProgressFrame) / sizeof (CHAR16)) - 1,
- sizeof (Progress) - sizeof (mTftpProgressFrame),
- L" %7d Kb",
- NbOfKb
- );
- Context->LastReportedNbOfBytes = Context->DownloadedNbOfBytes;
- }
- } else {
- //
- // Case when we do not know the size of the final file.
- // We print the updated size every 50KB of downloaded data
- //
- LastNbOf50Kb = Context->LastReportedNbOfBytes / (50*1024);
- NbOf50Kb = Context->DownloadedNbOfBytes / (50*1024);
- if (NbOf50Kb > LastNbOf50Kb) {
- Print (L"\b\b\b\b\b\b\b\b\b\b");
- UnicodeSPrint (Progress, sizeof (Progress), L"%7d Kb", NbOfKb);
- Context->LastReportedNbOfBytes = Context->DownloadedNbOfBytes;
- }
- }
- if (Progress[0] != L'\0') {
- Print (L"%s", Progress);
- }
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- Download an image from a TFTP server
-
- @param[in] DevicePath Device path of the TFTP boot option
- @param[in] ControllerHandle Handle of the network controller
- @param[in] RemainingDevicePath Device path of the TFTP boot option but
- the first node that identifies the network controller
- @param[in] Type Type to allocate memory pages
- @param[out] Image Address of the bufer where the image is stored in
- case of success
- @param[out] ImageSize Size in number of bytes of the i;age in case of
- success
-
- @retval EFI_SUCCESS The image was returned.
- @retval !EFI_SUCCESS Something went wrong.
-
-**/
-EFI_STATUS
-BdsTftpLoadImage (
- IN OUT EFI_DEVICE_PATH **DevicePath,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_DEVICE_PATH *RemainingDevicePath,
- IN EFI_ALLOCATE_TYPE Type,
- IN OUT EFI_PHYSICAL_ADDRESS *Image,
- OUT UINTN *ImageSize
- )
-{
- EFI_STATUS Status;
- EFI_HANDLE Dhcp4ChildHandle;
- EFI_DHCP4_PROTOCOL *Dhcp4;
- BOOLEAN Dhcp4ToStop;
- EFI_HANDLE Mtftp4ChildHandle;
- EFI_MTFTP4_PROTOCOL *Mtftp4;
- DHCP4_OPTION ParaList;
- EFI_DHCP4_PACKET_OPTION *OptionList[2];
- EFI_DHCP4_CONFIG_DATA Dhcp4CfgData;
- EFI_DHCP4_MODE_DATA Dhcp4Mode;
- EFI_MTFTP4_CONFIG_DATA Mtftp4CfgData;
- IPv4_DEVICE_PATH *IPv4DevicePathNode;
- CHAR16 *PathName;
- CHAR8 *AsciiFilePath;
- EFI_MTFTP4_TOKEN Mtftp4Token;
- UINT64 FileSize;
- UINT64 TftpBufferSize;
- BDS_TFTP_CONTEXT *TftpContext;
- UINTN PathNameLen;
-
- ASSERT(IS_DEVICE_PATH_NODE (RemainingDevicePath, MESSAGING_DEVICE_PATH, MSG_IPv4_DP));
- IPv4DevicePathNode = (IPv4_DEVICE_PATH*)RemainingDevicePath;
-
- Dhcp4ChildHandle = NULL;
- Dhcp4 = NULL;
- Dhcp4ToStop = FALSE;
- Mtftp4ChildHandle = NULL;
- Mtftp4 = NULL;
- AsciiFilePath = NULL;
- TftpContext = NULL;
-
- if (!IPv4DevicePathNode->StaticIpAddress) {
- //
- // Using the DHCP4 Service Binding Protocol, create a child handle of the DHCP4 service and
- // install the DHCP4 protocol on it. Then, open the DHCP protocol.
- //
- Status = NetLibCreateServiceChild (
- ControllerHandle,
- gImageHandle,
- &gEfiDhcp4ServiceBindingProtocolGuid,
- &Dhcp4ChildHandle
- );
- if (!EFI_ERROR (Status)) {
- Status = gBS->OpenProtocol (
- Dhcp4ChildHandle,
- &gEfiDhcp4ProtocolGuid,
- (VOID **) &Dhcp4,
- gImageHandle,
- ControllerHandle,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
- }
- if (EFI_ERROR (Status)) {
- Print (L"Unable to open DHCP4 protocol\n");
- goto Error;
- }
- }
-
- //
- // Using the MTFTP4 Service Binding Protocol, create a child handle of the MTFTP4 service and
- // install the MTFTP4 protocol on it. Then, open the MTFTP4 protocol.
- //
- Status = NetLibCreateServiceChild (
- ControllerHandle,
- gImageHandle,
- &gEfiMtftp4ServiceBindingProtocolGuid,
- &Mtftp4ChildHandle
- );
- if (!EFI_ERROR (Status)) {
- Status = gBS->OpenProtocol (
- Mtftp4ChildHandle,
- &gEfiMtftp4ProtocolGuid,
- (VOID **) &Mtftp4,
- gImageHandle,
- ControllerHandle,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
- }
- if (EFI_ERROR (Status)) {
- Print (L"Unable to open MTFTP4 protocol\n");
- goto Error;
- }
-
- if (!IPv4DevicePathNode->StaticIpAddress) {
- //
- // Configure the DHCP4, all default settings. It is acceptable for the configuration to
- // fail if the return code is equal to EFI_ACCESS_DENIED which means that the configuration
- // has been done by another instance of the DHCP4 protocol or that the DHCP configuration
- // process has been started but is not completed yet.
- //
- ZeroMem (&Dhcp4CfgData, sizeof (EFI_DHCP4_CONFIG_DATA));
- ParaList.Head.OpCode = DHCP_TAG_PARA_LIST;
- ParaList.Head.Length = 2;
- ParaList.Head.Data[0] = DHCP_TAG_NETMASK;
- ParaList.Route = DHCP_TAG_ROUTER;
- OptionList[0] = &ParaList.Head;
- Dhcp4CfgData.OptionCount = 1;
- Dhcp4CfgData.OptionList = OptionList;
-
- Status = Dhcp4->Configure (Dhcp4, &Dhcp4CfgData);
- if (EFI_ERROR (Status)) {
- if (Status != EFI_ACCESS_DENIED) {
- Print (L"Error while configuring the DHCP4 protocol\n");
- goto Error;
- }
- }
-
- //
- // Start the DHCP configuration. This may have already been done thus do not leave in error
- // if the return code is EFI_ALREADY_STARTED.
- //
- Status = Dhcp4->Start (Dhcp4, NULL);
- if (EFI_ERROR (Status)) {
- if (Status != EFI_ALREADY_STARTED) {
- Print (L"DHCP configuration failed\n");
- goto Error;
- }
- } else {
- Dhcp4ToStop = TRUE;
- }
-
- Status = Dhcp4->GetModeData (Dhcp4, &Dhcp4Mode);
- if (EFI_ERROR (Status)) {
- goto Error;
- }
-
- if (Dhcp4Mode.State != Dhcp4Bound) {
- Status = EFI_TIMEOUT;
- Print (L"DHCP configuration failed\n");
- goto Error;
- }
- }
-
- //
- // Configure the TFTP4 protocol
- //
-
- ZeroMem (&Mtftp4CfgData, sizeof (EFI_MTFTP4_CONFIG_DATA));
- Mtftp4CfgData.UseDefaultSetting = FALSE;
- Mtftp4CfgData.TimeoutValue = 4;
- Mtftp4CfgData.TryCount = 6;
-
- if (IPv4DevicePathNode->StaticIpAddress) {
- CopyMem (&Mtftp4CfgData.StationIp , &IPv4DevicePathNode->LocalIpAddress, sizeof (EFI_IPv4_ADDRESS));
- CopyMem (&Mtftp4CfgData.SubnetMask, &IPv4DevicePathNode->SubnetMask, sizeof (EFI_IPv4_ADDRESS));
- CopyMem (&Mtftp4CfgData.GatewayIp , &IPv4DevicePathNode->GatewayIpAddress, sizeof (EFI_IPv4_ADDRESS));
- } else {
- CopyMem (&Mtftp4CfgData.StationIp , &Dhcp4Mode.ClientAddress, sizeof (EFI_IPv4_ADDRESS));
- CopyMem (&Mtftp4CfgData.SubnetMask, &Dhcp4Mode.SubnetMask , sizeof (EFI_IPv4_ADDRESS));
- CopyMem (&Mtftp4CfgData.GatewayIp , &Dhcp4Mode.RouterAddress, sizeof (EFI_IPv4_ADDRESS));
- }
-
- CopyMem (&Mtftp4CfgData.ServerIp , &IPv4DevicePathNode->RemoteIpAddress, sizeof (EFI_IPv4_ADDRESS));
-
- Status = Mtftp4->Configure (Mtftp4, &Mtftp4CfgData);
- if (EFI_ERROR (Status)) {
- Print (L"Error while configuring the MTFTP4 protocol\n");
- goto Error;
- }
-
- // The Device Path might contain multiple FilePath nodes
- PathName = ConvertDevicePathToText ((EFI_DEVICE_PATH_PROTOCOL*)(IPv4DevicePathNode + 1), FALSE, FALSE);
- PathNameLen = StrLen (PathName) + 1;
- AsciiFilePath = AllocatePool (PathNameLen);
- UnicodeStrToAsciiStrS (PathName, AsciiFilePath, PathNameLen);
-
- //
- // Try to get the size of the file in bytes from the server. If it fails,
- // start with a 8MB buffer to download the file.
- //
- FileSize = 0;
- if (Mtftp4GetFileSize (Mtftp4, AsciiFilePath, &FileSize) == EFI_SUCCESS) {
- TftpBufferSize = FileSize;
- } else {
- TftpBufferSize = SIZE_16MB;
- }
-
- TftpContext = AllocatePool (sizeof (BDS_TFTP_CONTEXT));
- if (TftpContext == NULL) {
- Status = EFI_OUT_OF_RESOURCES;
- goto Error;
- }
- TftpContext->FileSize = FileSize;
-
- for (; TftpBufferSize <= FixedPcdGet32 (PcdMaxTftpFileSize);
- TftpBufferSize = (TftpBufferSize + SIZE_16MB) & (~(SIZE_16MB-1))) {
- //
- // Allocate a buffer to hold the whole file.
- //
- Status = gBS->AllocatePages (
- Type,
- EfiBootServicesCode,
- EFI_SIZE_TO_PAGES (TftpBufferSize),
- Image
- );
- if (EFI_ERROR (Status)) {
- Print (L"Failed to allocate space for image\n");
- goto Error;
- }
-
- TftpContext->DownloadedNbOfBytes = 0;
- TftpContext->LastReportedNbOfBytes = 0;
-
- ZeroMem (&Mtftp4Token, sizeof (EFI_MTFTP4_TOKEN));
- Mtftp4Token.Filename = (UINT8*)AsciiFilePath;
- Mtftp4Token.BufferSize = TftpBufferSize;
- Mtftp4Token.Buffer = (VOID *)(UINTN)*Image;
- Mtftp4Token.CheckPacket = Mtftp4CheckPacket;
- Mtftp4Token.Context = (VOID*)TftpContext;
-
- Print (L"Downloading the file <%a> from the TFTP server\n", AsciiFilePath);
- Status = Mtftp4->ReadFile (Mtftp4, &Mtftp4Token);
- Print (L"\n");
- if (EFI_ERROR (Status)) {
- gBS->FreePages (*Image, EFI_SIZE_TO_PAGES (TftpBufferSize));
- if (Status == EFI_BUFFER_TOO_SMALL) {
- Print (L"Downloading failed, file larger than expected.\n");
- continue;
- } else {
- goto Error;
- }
- }
-
- *ImageSize = Mtftp4Token.BufferSize;
- break;
- }
-
-Error:
- if (Dhcp4ChildHandle != NULL) {
- if (Dhcp4 != NULL) {
- if (Dhcp4ToStop) {
- Dhcp4->Stop (Dhcp4);
- }
- gBS->CloseProtocol (
- Dhcp4ChildHandle,
- &gEfiDhcp4ProtocolGuid,
- gImageHandle,
- ControllerHandle
- );
- }
- NetLibDestroyServiceChild (
- ControllerHandle,
- gImageHandle,
- &gEfiDhcp4ServiceBindingProtocolGuid,
- Dhcp4ChildHandle
- );
- }
-
- if (Mtftp4ChildHandle != NULL) {
- if (Mtftp4 != NULL) {
- if (AsciiFilePath != NULL) {
- FreePool (AsciiFilePath);
- }
- if (TftpContext != NULL) {
- FreePool (TftpContext);
- }
- gBS->CloseProtocol (
- Mtftp4ChildHandle,
- &gEfiMtftp4ProtocolGuid,
- gImageHandle,
- ControllerHandle
- );
- }
- NetLibDestroyServiceChild (
- ControllerHandle,
- gImageHandle,
- &gEfiMtftp4ServiceBindingProtocolGuid,
- Mtftp4ChildHandle
- );
- }
-
- if (EFI_ERROR (Status)) {
- *Image = 0;
- Print (L"Failed to download the file - Error=%r\n", Status);
- }
-
- return Status;
-}
-
-BDS_FILE_LOADER FileLoaders[] = {
- { BdsFileSystemSupport, BdsFileSystemLoadImage },
- { BdsFirmwareVolumeSupport, BdsFirmwareVolumeLoadImage },
- //{ BdsLoadFileSupport, BdsLoadFileLoadImage },
- { BdsMemoryMapSupport, BdsMemoryMapLoadImage },
- { BdsPxeSupport, BdsPxeLoadImage },
- { BdsTftpSupport, BdsTftpLoadImage },
- { NULL, NULL }
-};
-
-EFI_STATUS
-BdsLoadImageAndUpdateDevicePath (
- IN OUT EFI_DEVICE_PATH **DevicePath,
- IN EFI_ALLOCATE_TYPE Type,
- IN OUT EFI_PHYSICAL_ADDRESS* Image,
- OUT UINTN *FileSize
- )
-{
- EFI_STATUS Status;
- EFI_HANDLE Handle;
- EFI_DEVICE_PATH *RemainingDevicePath;
- BDS_FILE_LOADER* FileLoader;
-
- Status = BdsConnectAndUpdateDevicePath (DevicePath, &Handle, &RemainingDevicePath);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- FileLoader = FileLoaders;
- while (FileLoader->Support != NULL) {
- if (FileLoader->Support (*DevicePath, Handle, RemainingDevicePath)) {
- return FileLoader->LoadImage (DevicePath, Handle, RemainingDevicePath, Type, Image, FileSize);
- }
- FileLoader++;
- }
-
- return EFI_UNSUPPORTED;
-}
-
-EFI_STATUS
-BdsLoadImage (
- IN EFI_DEVICE_PATH *DevicePath,
- IN EFI_ALLOCATE_TYPE Type,
- IN OUT EFI_PHYSICAL_ADDRESS* Image,
- OUT UINTN *FileSize
- )
-{
- return BdsLoadImageAndUpdateDevicePath (&DevicePath, Type, Image, FileSize);
-}
-
-/**
- Start an EFI Application from a Device Path
-
- @param ParentImageHandle Handle of the calling image
- @param DevicePath Location of the EFI Application
-
- @retval EFI_SUCCESS All drivers have been connected
- @retval EFI_NOT_FOUND The Linux kernel Device Path has not been found
- @retval EFI_OUT_OF_RESOURCES There is not enough resource memory to store the matching results.
-
-**/
-EFI_STATUS
-BdsStartEfiApplication (
- IN EFI_HANDLE ParentImageHandle,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- IN UINTN LoadOptionsSize,
- IN VOID* LoadOptions
- )
-{
- EFI_STATUS Status;
- EFI_HANDLE ImageHandle;
- EFI_PHYSICAL_ADDRESS BinaryBuffer;
- UINTN BinarySize;
- EFI_LOADED_IMAGE_PROTOCOL* LoadedImage;
-
- // Find the nearest supported file loader
- Status = BdsLoadImageAndUpdateDevicePath (&DevicePath, AllocateAnyPages, &BinaryBuffer, &BinarySize);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- // Load the image from the Buffer with Boot Services function
- Status = gBS->LoadImage (TRUE, ParentImageHandle, DevicePath, (VOID*)(UINTN)BinaryBuffer, BinarySize, &ImageHandle);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- // Passed LoadOptions to the EFI Application
- if (LoadOptionsSize != 0) {
- Status = gBS->HandleProtocol (ImageHandle, &gEfiLoadedImageProtocolGuid, (VOID **) &LoadedImage);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- LoadedImage->LoadOptionsSize = LoadOptionsSize;
- LoadedImage->LoadOptions = LoadOptions;
- }
-
- // Before calling the image, enable the Watchdog Timer for the 5 Minute period
- gBS->SetWatchdogTimer (5 * 60, 0x0000, 0x00, NULL);
- // Start the image
- Status = gBS->StartImage (ImageHandle, NULL, NULL);
- // Clear the Watchdog Timer after the image returns
- gBS->SetWatchdogTimer (0x0000, 0x0000, 0x0000, NULL);
-
- return Status;
-}
diff --git a/ArmPkg/Library/BdsLib/BdsHelper.c b/ArmPkg/Library/BdsLib/BdsHelper.c deleted file mode 100644 index b10fe2074d..0000000000 --- a/ArmPkg/Library/BdsLib/BdsHelper.c +++ /dev/null @@ -1,183 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2015, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "BdsInternal.h"
-
-EFI_STATUS
-ShutdownUefiBootServices (
- VOID
- )
-{
- EFI_STATUS Status;
- UINTN MemoryMapSize;
- EFI_MEMORY_DESCRIPTOR *MemoryMap;
- UINTN MapKey;
- UINTN DescriptorSize;
- UINT32 DescriptorVersion;
- UINTN Pages;
-
- MemoryMap = NULL;
- MemoryMapSize = 0;
- Pages = 0;
-
- do {
- Status = gBS->GetMemoryMap (
- &MemoryMapSize,
- MemoryMap,
- &MapKey,
- &DescriptorSize,
- &DescriptorVersion
- );
- if (Status == EFI_BUFFER_TOO_SMALL) {
-
- Pages = EFI_SIZE_TO_PAGES (MemoryMapSize) + 1;
- MemoryMap = AllocatePages (Pages);
-
- //
- // Get System MemoryMap
- //
- Status = gBS->GetMemoryMap (
- &MemoryMapSize,
- MemoryMap,
- &MapKey,
- &DescriptorSize,
- &DescriptorVersion
- );
- }
-
- // Don't do anything between the GetMemoryMap() and ExitBootServices()
- if (!EFI_ERROR(Status)) {
- Status = gBS->ExitBootServices (gImageHandle, MapKey);
- if (EFI_ERROR(Status)) {
- FreePages (MemoryMap, Pages);
- MemoryMap = NULL;
- MemoryMapSize = 0;
- }
- }
- } while (EFI_ERROR(Status));
-
- return Status;
-}
-
-/**
- Connect all DXE drivers
-
- @retval EFI_SUCCESS All drivers have been connected
- @retval EFI_NOT_FOUND No handles match the search.
- @retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results.
-
-**/
-EFI_STATUS
-BdsConnectAllDrivers (
- VOID
- )
-{
- UINTN HandleCount, Index;
- EFI_HANDLE *HandleBuffer;
- EFI_STATUS Status;
-
- do {
- // Locate all the driver handles
- Status = gBS->LocateHandleBuffer (
- AllHandles,
- NULL,
- NULL,
- &HandleCount,
- &HandleBuffer
- );
- if (EFI_ERROR (Status)) {
- break;
- }
-
- // Connect every handles
- for (Index = 0; Index < HandleCount; Index++) {
- gBS->ConnectController (HandleBuffer[Index], NULL, NULL, TRUE);
- }
-
- if (HandleBuffer != NULL) {
- FreePool (HandleBuffer);
- }
-
- // Check if new handles have been created after the start of the previous handles
- Status = gDS->Dispatch ();
- } while (!EFI_ERROR(Status));
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-GetGlobalEnvironmentVariable (
- IN CONST CHAR16* VariableName,
- IN VOID* DefaultValue,
- IN OUT UINTN* Size,
- OUT VOID** Value
- )
-{
- return GetEnvironmentVariable (VariableName, &gEfiGlobalVariableGuid,
- DefaultValue, Size, Value);
-}
-
-EFI_STATUS
-GetEnvironmentVariable (
- IN CONST CHAR16* VariableName,
- IN EFI_GUID* VendorGuid,
- IN VOID* DefaultValue,
- IN OUT UINTN* Size,
- OUT VOID** Value
- )
-{
- EFI_STATUS Status;
- UINTN VariableSize;
-
- // Try to get the variable size.
- *Value = NULL;
- VariableSize = 0;
- Status = gRT->GetVariable ((CHAR16 *) VariableName, VendorGuid, NULL, &VariableSize, *Value);
- if (Status == EFI_NOT_FOUND) {
- if ((DefaultValue != NULL) && (Size != NULL) && (*Size != 0)) {
- // If the environment variable does not exist yet then set it with the default value
- Status = gRT->SetVariable (
- (CHAR16*)VariableName,
- VendorGuid,
- EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
- *Size,
- DefaultValue
- );
- *Value = AllocateCopyPool (*Size, DefaultValue);
- } else {
- return EFI_NOT_FOUND;
- }
- } else if (Status == EFI_BUFFER_TOO_SMALL) {
- // Get the environment variable value
- *Value = AllocatePool (VariableSize);
- if (*Value == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
-
- Status = gRT->GetVariable ((CHAR16 *)VariableName, VendorGuid, NULL, &VariableSize, *Value);
- if (EFI_ERROR (Status)) {
- FreePool(*Value);
- return EFI_INVALID_PARAMETER;
- }
-
- if (Size) {
- *Size = VariableSize;
- }
- } else {
- *Value = AllocateCopyPool (*Size, DefaultValue);
- return Status;
- }
-
- return EFI_SUCCESS;
-}
diff --git a/ArmPkg/Library/BdsLib/BdsInternal.h b/ArmPkg/Library/BdsLib/BdsInternal.h deleted file mode 100644 index f70aae603d..0000000000 --- a/ArmPkg/Library/BdsLib/BdsInternal.h +++ /dev/null @@ -1,111 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2015, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __BDS_INTERNAL_H__
-#define __BDS_INTERNAL_H__
-
-#include <PiDxe.h>
-#include <Library/ArmLib.h>
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DxeServicesTableLib.h>
-#include <Library/HobLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiLib.h>
-#include <Library/DevicePathLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BdsLib.h>
-#include <Library/PcdLib.h>
-#include <Library/PrintLib.h>
-#include <Library/UefiRuntimeServicesTableLib.h>
-
-#include <Guid/GlobalVariable.h>
-#include <Guid/FileInfo.h>
-
-#include <Protocol/DevicePath.h>
-#include <Protocol/DevicePathFromText.h>
-#include <Protocol/SimpleFileSystem.h>
-#include <Protocol/FirmwareVolume2.h>
-#include <Protocol/LoadFile.h>
-#include <Protocol/PxeBaseCode.h>
-
-#include <Uefi.h>
-
-/**
- * Check if the file loader can support this device path.
- *
- * @param DevicePath EFI Device Path of the image to load.
- * This device path generally comes from the boot entry (ie: Boot####).
- * @param Handle Handle of the driver supporting the device path
- * @param RemainingDevicePath Part of the EFI Device Path that has not been resolved during
- * the Device Path discovery
- */
-typedef BOOLEAN (*BDS_FILE_LOADER_SUPPORT) (
- IN EFI_DEVICE_PATH *DevicePath,
- IN EFI_HANDLE Handle,
- IN EFI_DEVICE_PATH *RemainingDevicePath
- );
-
-/**
- * Function to load an image from a given Device Path for a
- * specific support (FileSystem, TFTP, PXE, ...)
- *
- * @param DevicePath EFI Device Path of the image to load.
- * This device path generally comes from the boot entry (ie: Boot####).
- * This path is also defined as 'OUT' as there are some device paths that
- * might not be completed such as EFI path for removable device. In these
- * cases, it is expected the loader to add \EFI\BOOT\BOOT(ARM|AA64).EFI
- * @param Handle Handle of the driver supporting the device path
- * @param RemainingDevicePath Part of the EFI Device Path that has not been resolved during
- * the Device Path discovery
- * @param Type Define where the image should be loaded (see EFI_ALLOCATE_TYPE definition)
- * @param Image Base Address of the image has been loaded
- * @param ImageSize Size of the image that has been loaded
- */
-typedef EFI_STATUS (*BDS_FILE_LOADER_LOAD_IMAGE) (
- IN OUT EFI_DEVICE_PATH **DevicePath,
- IN EFI_HANDLE Handle,
- IN EFI_DEVICE_PATH *RemainingDevicePath,
- IN EFI_ALLOCATE_TYPE Type,
- IN OUT EFI_PHYSICAL_ADDRESS* Image,
- OUT UINTN *ImageSize
- );
-
-typedef struct {
- BDS_FILE_LOADER_SUPPORT Support;
- BDS_FILE_LOADER_LOAD_IMAGE LoadImage;
-} BDS_FILE_LOADER;
-
-typedef struct _BDS_SYSTEM_MEMORY_RESOURCE {
- LIST_ENTRY Link; // This attribute must be the first entry of this structure (to avoid pointer computation)
- EFI_PHYSICAL_ADDRESS PhysicalStart;
- UINT64 ResourceLength;
-} BDS_SYSTEM_MEMORY_RESOURCE;
-
-typedef struct {
- UINT64 FileSize;
- UINT64 DownloadedNbOfBytes;
- UINT64 LastReportedNbOfBytes;
-} BDS_TFTP_CONTEXT;
-
-EFI_STATUS
-BdsLoadImage (
- IN EFI_DEVICE_PATH *DevicePath,
- IN EFI_ALLOCATE_TYPE Type,
- IN OUT EFI_PHYSICAL_ADDRESS* Image,
- OUT UINTN *FileSize
- );
-
-#endif
diff --git a/ArmPkg/Library/BdsLib/BdsLib.inf b/ArmPkg/Library/BdsLib/BdsLib.inf deleted file mode 100644 index 458fc66ff0..0000000000 --- a/ArmPkg/Library/BdsLib/BdsLib.inf +++ /dev/null @@ -1,69 +0,0 @@ -#/* @file
-#
-# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = BdsLib
- FILE_GUID = ddbf73a0-bb25-11df-8e4e-0002a5d5c51b
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
- LIBRARY_CLASS = BdsLib
-
-[Sources.common]
- BdsFilePath.c
- BdsAppLoader.c
- BdsHelper.c
- BdsLoadOption.c
-
-[Packages]
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- ArmLib
- BaseLib
- DebugLib
- DevicePathLib
- HobLib
- PcdLib
- NetLib
-
-[Guids]
- gEfiFileInfoGuid
-
-[Protocols]
- gEfiBdsArchProtocolGuid
- gEfiDevicePathProtocolGuid
- gEfiDevicePathFromTextProtocolGuid
- gEfiSimpleFileSystemProtocolGuid
- gEfiFirmwareVolume2ProtocolGuid
- gEfiLoadFileProtocolGuid
- gEfiPxeBaseCodeProtocolGuid
- gEfiDiskIoProtocolGuid
- gEfiUsbIoProtocolGuid
- gEfiLoadedImageProtocolGuid
- gEfiSimpleNetworkProtocolGuid
- gEfiDhcp4ServiceBindingProtocolGuid
- gEfiDhcp4ProtocolGuid
- gEfiMtftp4ServiceBindingProtocolGuid
- gEfiMtftp4ProtocolGuid
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdMaxTftpFileSize
-
-[Depex]
- TRUE
diff --git a/ArmPkg/Library/BdsLib/BdsLoadOption.c b/ArmPkg/Library/BdsLib/BdsLoadOption.c deleted file mode 100644 index 766a9890fc..0000000000 --- a/ArmPkg/Library/BdsLib/BdsLoadOption.c +++ /dev/null @@ -1,272 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "BdsInternal.h"
-
-EFI_STATUS
-BootOptionParseLoadOption (
- IN EFI_LOAD_OPTION *EfiLoadOption,
- IN UINTN EfiLoadOptionSize,
- IN OUT BDS_LOAD_OPTION **BdsLoadOption
- )
-{
- BDS_LOAD_OPTION *LoadOption;
- UINTN DescriptionLength;
- UINTN EfiLoadOptionPtr;
-
- if (EfiLoadOption == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (EfiLoadOptionSize < sizeof(UINT32) + sizeof(UINT16) + sizeof(CHAR16) + sizeof(EFI_DEVICE_PATH_PROTOCOL)) {
- return EFI_BAD_BUFFER_SIZE;
- }
-
- if (*BdsLoadOption == NULL) {
- LoadOption = (BDS_LOAD_OPTION*)AllocateZeroPool (sizeof(BDS_LOAD_OPTION));
- if (LoadOption == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
- } else {
- LoadOption = *BdsLoadOption;
- }
-
- EfiLoadOptionPtr = (UINTN)EfiLoadOption;
- LoadOption->LoadOption = EfiLoadOption;
- LoadOption->LoadOptionSize = EfiLoadOptionSize;
-
- LoadOption->Attributes = *(UINT32*)EfiLoadOptionPtr;
- LoadOption->FilePathListLength = *(UINT16*)(EfiLoadOptionPtr + sizeof(UINT32));
- LoadOption->Description = (CHAR16*)(EfiLoadOptionPtr + sizeof(UINT32) + sizeof(UINT16));
- DescriptionLength = StrSize (LoadOption->Description);
- LoadOption->FilePathList = (EFI_DEVICE_PATH_PROTOCOL*)(EfiLoadOptionPtr + sizeof(UINT32) + sizeof(UINT16) + DescriptionLength);
-
- // If ((End of EfiLoadOptiony - Start of EfiLoadOption) == EfiLoadOptionSize) then No Optional Data
- if ((UINTN)((UINTN)LoadOption->FilePathList + LoadOption->FilePathListLength - EfiLoadOptionPtr) == EfiLoadOptionSize) {
- LoadOption->OptionalData = NULL;
- LoadOption->OptionalDataSize = 0;
- } else {
- LoadOption->OptionalData = (VOID*)((UINTN)(LoadOption->FilePathList) + LoadOption->FilePathListLength);
- LoadOption->OptionalDataSize = EfiLoadOptionSize - ((UINTN)LoadOption->OptionalData - EfiLoadOptionPtr);
- }
-
- if (*BdsLoadOption == NULL) {
- *BdsLoadOption = LoadOption;
- }
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-BootOptionFromLoadOptionVariable (
- IN CHAR16* BootVariableName,
- OUT BDS_LOAD_OPTION** BdsLoadOption
- )
-{
- EFI_STATUS Status;
- EFI_LOAD_OPTION *EfiLoadOption;
- UINTN EfiLoadOptionSize;
-
- Status = GetGlobalEnvironmentVariable (BootVariableName, NULL, &EfiLoadOptionSize, (VOID**)&EfiLoadOption);
- if (!EFI_ERROR(Status)) {
- *BdsLoadOption = NULL;
- Status = BootOptionParseLoadOption (EfiLoadOption, EfiLoadOptionSize, BdsLoadOption);
- }
-
- return Status;
-}
-
-EFI_STATUS
-BootOptionFromLoadOptionIndex (
- IN UINT16 LoadOptionIndex,
- OUT BDS_LOAD_OPTION **BdsLoadOption
- )
-{
- CHAR16 BootVariableName[9];
- EFI_STATUS Status;
-
- UnicodeSPrint (BootVariableName, 9 * sizeof(CHAR16), L"Boot%04X", LoadOptionIndex);
-
- Status = BootOptionFromLoadOptionVariable (BootVariableName, BdsLoadOption);
- if (!EFI_ERROR(Status)) {
- (*BdsLoadOption)->LoadOptionIndex = LoadOptionIndex;
- }
-
- return Status;
-}
-
-EFI_STATUS
-BootOptionToLoadOptionVariable (
- IN BDS_LOAD_OPTION* BdsLoadOption
- )
-{
- EFI_STATUS Status;
- UINTN DescriptionSize;
- //UINT16 FilePathListLength;
- EFI_DEVICE_PATH_PROTOCOL* DevicePathNode;
- UINTN NodeLength;
- UINT8* EfiLoadOptionPtr;
- VOID* OldLoadOption;
- CHAR16 BootVariableName[9];
- UINTN BootOrderSize;
- UINT16* BootOrder;
-
- // If we are overwriting an existent Boot Option then we have to free previously allocated memory
- if (BdsLoadOption->LoadOptionSize > 0) {
- OldLoadOption = BdsLoadOption->LoadOption;
- } else {
- OldLoadOption = NULL;
-
- // If this function is called at the creation of the Boot Device entry (not at the update) the
- // BootOption->LoadOptionSize must be zero then we get a new BootIndex for this entry
- BdsLoadOption->LoadOptionIndex = BootOptionAllocateBootIndex ();
-
- //TODO: Add to the the Boot Entry List
- }
-
- DescriptionSize = StrSize(BdsLoadOption->Description);
-
- // Ensure the FilePathListLength information is correct
- ASSERT (GetDevicePathSize (BdsLoadOption->FilePathList) == BdsLoadOption->FilePathListLength);
-
- // Allocate the memory for the EFI Load Option
- BdsLoadOption->LoadOptionSize = sizeof(UINT32) + sizeof(UINT16) + DescriptionSize + BdsLoadOption->FilePathListLength + BdsLoadOption->OptionalDataSize;
-
- BdsLoadOption->LoadOption = (EFI_LOAD_OPTION *)AllocateZeroPool (BdsLoadOption->LoadOptionSize);
- if (BdsLoadOption->LoadOption == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
-
- EfiLoadOptionPtr = (UINT8 *) BdsLoadOption->LoadOption;
-
- //
- // Populate the EFI Load Option and BDS Boot Option structures
- //
-
- // Attributes fields
- *(UINT32*)EfiLoadOptionPtr = BdsLoadOption->Attributes;
- EfiLoadOptionPtr += sizeof(UINT32);
-
- // FilePath List fields
- *(UINT16*)EfiLoadOptionPtr = BdsLoadOption->FilePathListLength;
- EfiLoadOptionPtr += sizeof(UINT16);
-
- // Boot description fields
- CopyMem (EfiLoadOptionPtr, BdsLoadOption->Description, DescriptionSize);
- EfiLoadOptionPtr += DescriptionSize;
-
- // File path fields
- DevicePathNode = BdsLoadOption->FilePathList;
- while (!IsDevicePathEndType (DevicePathNode)) {
- NodeLength = DevicePathNodeLength(DevicePathNode);
- CopyMem (EfiLoadOptionPtr, DevicePathNode, NodeLength);
- EfiLoadOptionPtr += NodeLength;
- DevicePathNode = NextDevicePathNode (DevicePathNode);
- }
-
- // Set the End Device Path Type
- SetDevicePathEndNode (EfiLoadOptionPtr);
- EfiLoadOptionPtr += sizeof(EFI_DEVICE_PATH);
-
- // Fill the Optional Data
- if (BdsLoadOption->OptionalDataSize > 0) {
- CopyMem (EfiLoadOptionPtr, BdsLoadOption->OptionalData, BdsLoadOption->OptionalDataSize);
- }
-
- // Case where the fields have been updated
- if (OldLoadOption) {
- // Now, the old data has been copied to the new allocated packed structure, we need to update the pointers of BdsLoadOption
- BootOptionParseLoadOption (BdsLoadOption->LoadOption, BdsLoadOption->LoadOptionSize, &BdsLoadOption);
- // Free the old packed structure
- FreePool (OldLoadOption);
- }
-
- // Create/Update Boot#### environment variable
- UnicodeSPrint (BootVariableName, 9 * sizeof(CHAR16), L"Boot%04X", BdsLoadOption->LoadOptionIndex);
- Status = gRT->SetVariable (
- BootVariableName,
- &gEfiGlobalVariableGuid,
- EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
- BdsLoadOption->LoadOptionSize,
- BdsLoadOption->LoadOption
- );
-
- // When it is a new entry we must add the entry to the BootOrder
- if (OldLoadOption == NULL) {
- // Add the new Boot Index to the list
- Status = GetGlobalEnvironmentVariable (L"BootOrder", NULL, &BootOrderSize, (VOID**)&BootOrder);
- if (!EFI_ERROR(Status)) {
- BootOrder = ReallocatePool (BootOrderSize, BootOrderSize + sizeof(UINT16), BootOrder);
- // Add the new index at the end
- BootOrder[BootOrderSize / sizeof(UINT16)] = BdsLoadOption->LoadOptionIndex;
- BootOrderSize += sizeof(UINT16);
- } else {
- // BootOrder does not exist. Create it
- BootOrderSize = sizeof(UINT16);
- BootOrder = &(BdsLoadOption->LoadOptionIndex);
- }
-
- // Update (or Create) the BootOrder environment variable
- gRT->SetVariable (
- L"BootOrder",
- &gEfiGlobalVariableGuid,
- EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
- BootOrderSize,
- BootOrder
- );
- DEBUG((EFI_D_ERROR,"Create %s\n",BootVariableName));
-
- // Free memory allocated by GetGlobalEnvironmentVariable
- if (!EFI_ERROR(Status)) {
- FreePool (BootOrder);
- }
- } else {
- DEBUG((EFI_D_ERROR,"Update %s\n",BootVariableName));
- }
-
- return EFI_SUCCESS;
-}
-
-UINT16
-BootOptionAllocateBootIndex (
- VOID
- )
-{
- EFI_STATUS Status;
- UINTN Index;
- UINT32 BootIndex;
- UINT16 *BootOrder;
- UINTN BootOrderSize;
- BOOLEAN Found;
-
- // Get the Boot Option Order from the environment variable
- Status = GetGlobalEnvironmentVariable (L"BootOrder", NULL, &BootOrderSize, (VOID**)&BootOrder);
- if (!EFI_ERROR(Status)) {
- for (BootIndex = 0; BootIndex <= 0xFFFF; BootIndex++) {
- Found = FALSE;
- for (Index = 0; Index < BootOrderSize / sizeof (UINT16); Index++) {
- if (BootOrder[Index] == BootIndex) {
- Found = TRUE;
- break;
- }
- }
- if (!Found) {
- return BootIndex;
- }
- }
- FreePool (BootOrder);
- }
- // Return the first index
- return 0;
-}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/Llvm_int_lib.h b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/Llvm_int_lib.h deleted file mode 100644 index 78d3e218ed..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/Llvm_int_lib.h +++ /dev/null @@ -1,99 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-#include <Base.h>
-#include <Library/DebugLib.h>
-
-#define CHAR_BIT 8
-
-typedef union {
- INT64 all;
- struct {
- UINT32 low;
- INT32 high;
- };
-} dwords;
-
-typedef union {
- UINT64 all;
- struct {
- UINT32 low;
- UINT32 high;
- };
-} udwords;
-
-// __aeabi_ return values
-typedef struct {
- UINT64 Quotent;
- UINT64 Remainder;
-} ulldiv_t;
-
-typedef struct {
- INT64 Quotent;
- INT64 Remainder;
-} lldiv_t;
-
-typedef struct {
- UINT32 Quotent;
- UINT32 Remainder;
-} uidiv_return;
-
-#if __GNUC__
- #define COUNT_LEADING_ZEROS(_a) __builtin_clz((_a))
- #define COUNT_TRAILING_ZEROS(_a) __builtin_ctz((_a))
-#else
-#error COUNT_LEADING_ZEROS() and COUNT_TRAILING_ZEROS() macros not ported to your compiler
-#endif
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S deleted file mode 100644 index a68b60cf0c..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S +++ /dev/null @@ -1,33 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(__ashldi3)
- cmp r2, #31
- bls L2
- cmp r2, #63
- subls r2, r2, #32
- movls r2, r0, asl r2
- movhi r2, #0
- mov r1, r2
- mov r0, #0
- bx lr
-L2:
- cmp r2, #0
- rsbne r3, r2, #32
- movne r3, r0, lsr r3
- movne r0, r0, asl r2
- orrne r1, r3, r1, asl r2
- bx lr
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.c deleted file mode 100644 index e13ea016f5..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.c +++ /dev/null @@ -1,83 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-#include "Llvm_int_lib.h"
-
-// Returns: a << b
-
-// Precondition: 0 <= b < bits_in_dword
-
-INT64
-__ashldi3(INT64 a, INT32 b)
-{
- const int bits_in_word = (int)(sizeof(INT32) * CHAR_BIT);
- dwords input;
- dwords result;
- input.all = a;
- if (b & bits_in_word) // bits_in_word <= b < bits_in_dword
- {
- result.low = 0;
- result.high = input.low << (b - bits_in_word);
- }
- else // 0 <= b < bits_in_word
- {
- if (b == 0)
- return a;
- result.low = input.low << b;
- result.high = (input.high << b) | (input.low >> (bits_in_word - b));
- }
- return result.all;
-}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S deleted file mode 100644 index 6d004a553f..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S +++ /dev/null @@ -1,34 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(__ashrdi3)
- cmp r2, #31
- bls L2
- cmp r2, #63
- subls r2, r2, #32
- mov ip, r1, asr #31
- movls r2, r1, asr r2
- movhi r2, ip
- mov r0, r2
- mov r1, ip
- bx lr
-L2:
- cmp r2, #0
- rsbne r3, r2, #32
- movne r3, r1, asl r3
- movne r1, r1, asr r2
- orrne r0, r3, r0, lsr r2
- bx lr
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.c deleted file mode 100644 index 1617543ef5..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.c +++ /dev/null @@ -1,84 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-#include "Llvm_int_lib.h"
-
-// Returns: arithmetic a >> b
-
-// Precondition: 0 <= b < bits_in_dword
-
-INT64
-__ashrdi3(INT64 a, INT32 b)
-{
- const int bits_in_word = (int)(sizeof(INT32) * CHAR_BIT);
- dwords input;
- dwords result;
- input.all = a;
- if (b & bits_in_word) // bits_in_word <= b < bits_in_dword
- {
- // result.high = input.high < 0 ? -1 : 0
- result.high = input.high >> (bits_in_word - 1);
- result.low = input.high >> (b - bits_in_word);
- }
- else // 0 <= b < bits_in_word
- {
- if (b == 0)
- return a;
- result.high = input.high >> b;
- result.low = (input.high << (bits_in_word - b)) | (input.low >> b);
- }
- return result.all;
-}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S deleted file mode 100644 index 8ebf65bc8c..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S +++ /dev/null @@ -1,55 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(__clzsi2)
- @ frame_needed = 1, uses_anonymous_args = 0
- stmfd sp!, {r7, lr}
- add r7, sp, #0
- movs r3, r0, lsr #16
- movne r3, #16
- moveq r3, #0
- movne r9, #0
- moveq r9, #16
- mov r3, r0, lsr r3
- tst r3, #65280
- movne r0, #8
- moveq r0, #0
- movne lr, #0
- moveq lr, #8
- mov r3, r3, lsr r0
- tst r3, #240
- movne r0, #4
- moveq r0, #0
- movne ip, #0
- moveq ip, #4
- mov r3, r3, lsr r0
- tst r3, #12
- movne r0, #2
- moveq r0, #0
- movne r1, #0
- moveq r1, #2
- mov r2, r3, lsr r0
- add r3, lr, r9
- add r0, r3, ip
- add r1, r0, r1
- mov r0, r2, lsr #1
- eor r0, r0, #1
- ands r0, r0, #1
- mvnne r0, #0
- rsb r3, r2, #2
- and r0, r0, r3
- add r0, r1, r0
- ldmfd sp!, {r7, pc}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.c deleted file mode 100644 index 5c2a3ea2b4..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.c +++ /dev/null @@ -1,96 +0,0 @@ -/** @file
- Compiler intrinsic to return the number of leading zeros, ported from LLVM code.
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-
-#include "Llvm_int_lib.h"
-
-// Returns: the number of leading 0-bits
-
-// Precondition: a != 0
-
-INT32
-__clzsi2(INT32 a)
-{
- UINT32 x = (UINT32)a;
- INT32 t = ((x & 0xFFFF0000) == 0) << 4; // if (x is small) t = 16 else 0
- x >>= 16 - t; // x = [0 - 0xFFFF]
- UINT32 r = t; // r = [0, 16]
- // return r + clz(x)
- t = ((x & 0xFF00) == 0) << 3;
- x >>= 8 - t; // x = [0 - 0xFF]
- r += t; // r = [0, 8, 16, 24]
- // return r + clz(x)
- t = ((x & 0xF0) == 0) << 2;
- x >>= 4 - t; // x = [0 - 0xF]
- r += t; // r = [0, 4, 8, 12, 16, 20, 24, 28]
- // return r + clz(x)
- t = ((x & 0xC) == 0) << 1;
- x >>= 2 - t; // x = [0 - 3]
- r += t; // r = [0 - 30] and is even
- // return r + clz(x)
-// switch (x)
-// {
-// case 0:
-// return r + 2;
-// case 1:
-// return r + 1;
-// case 2:
-// case 3:
-// return r;
-// }
- return r + ((2 - x) & -((x & 2) == 0));
-}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S deleted file mode 100644 index ea957fb198..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S +++ /dev/null @@ -1,47 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(__ctzsi2)
- uxth r3, r0
- cmp r3, #0
- moveq ip, #16
- movne ip, #0
- @ lr needed for prologue
- mov r0, r0, lsr ip
- tst r0, #255
- movne r3, #0
- moveq r3, #8
- mov r0, r0, lsr r3
- tst r0, #15
- movne r1, #0
- moveq r1, #4
- add r3, r3, ip
- mov r0, r0, lsr r1
- tst r0, #3
- movne r2, #0
- moveq r2, #2
- add r3, r3, r1
- mov r0, r0, lsr r2
- and r0, r0, #3
- add r2, r3, r2
- eor r3, r0, #1
- mov r0, r0, lsr #1
- ands r3, r3, #1
- mvnne r3, #0
- rsb r0, r0, #2
- and r0, r3, r0
- add r0, r2, r0
- bx lr
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.c deleted file mode 100644 index 12cad92da7..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.c +++ /dev/null @@ -1,98 +0,0 @@ -/** @file
- Compiler intrinsic to return the number of trailing zeros, ported from LLVM code.
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-
-#include "Llvm_int_lib.h"
-
-// Returns: the number of trailing 0-bits
-
-// Precondition: a != 0
-
-INT32
-__ctzsi2(INT32 a)
-{
- UINT32 x = (UINT32)a;
- INT32 t = ((x & 0x0000FFFF) == 0) << 4; // if (x has no small bits) t = 16 else 0
- x >>= t; // x = [0 - 0xFFFF] + higher garbage bits
- UINT32 r = t; // r = [0, 16]
- // return r + ctz(x)
- t = ((x & 0x00FF) == 0) << 3;
- x >>= t; // x = [0 - 0xFF] + higher garbage bits
- r += t; // r = [0, 8, 16, 24]
- // return r + ctz(x)
- t = ((x & 0x0F) == 0) << 2;
- x >>= t; // x = [0 - 0xF] + higher garbage bits
- r += t; // r = [0, 4, 8, 12, 16, 20, 24, 28]
- // return r + ctz(x)
- t = ((x & 0x3) == 0) << 1;
- x >>= t;
- x &= 3; // x = [0 - 3]
- r += t; // r = [0 - 30] and is even
- // return r + ctz(x)
-// The branch-less return statement below is equivalent
-// to the following switch statement:
-// switch (x)
-// {
-// case 0:
-// return r + 2;
-// case 2:
-// return r + 1;
-// case 1:
-// case 3:
-// return r;
-// }
- return r + ((2 - (x >> 1)) & -((x & 1) == 0));
-}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S deleted file mode 100644 index faf70dbf45..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S +++ /dev/null @@ -1,153 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2011, ARM. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-.text
-.align 2
-GCC_ASM_EXPORT(__aeabi_uidiv)
-GCC_ASM_EXPORT(__aeabi_uidivmod)
-GCC_ASM_EXPORT(__aeabi_idiv)
-GCC_ASM_EXPORT(__aeabi_idivmod)
-
-# AREA Math, CODE, READONLY
-
-#
-#UINT32
-#EFIAPI
-#__aeabi_uidivmode (
-# IN UINT32 Dividen
-# IN UINT32 Divisor
-# );
-#
-
-ASM_PFX(__aeabi_uidiv):
-ASM_PFX(__aeabi_uidivmod):
- rsbs r12, r1, r0, LSR #4
- mov r2, #0
- bcc ASM_PFX(__arm_div4)
- rsbs r12, r1, r0, LSR #8
- bcc ASM_PFX(__arm_div8)
- mov r3, #0
- b ASM_PFX(__arm_div_large)
-
-#
-#INT32
-#EFIAPI
-#__aeabi_idivmode (
-# IN INT32 Dividen
-# IN INT32 Divisor
-# );
-#
-ASM_PFX(__aeabi_idiv):
-ASM_PFX(__aeabi_idivmod):
- orrs r12, r0, r1
- bmi ASM_PFX(__arm_div_negative)
- rsbs r12, r1, r0, LSR #1
- mov r2, #0
- bcc ASM_PFX(__arm_div1)
- rsbs r12, r1, r0, LSR #4
- bcc ASM_PFX(__arm_div4)
- rsbs r12, r1, r0, LSR #8
- bcc ASM_PFX(__arm_div8)
- mov r3, #0
- b ASM_PFX(__arm_div_large)
-ASM_PFX(__arm_div8):
- rsbs r12, r1, r0, LSR #7
- subcs r0, r0, r1, LSL #7
- adc r2, r2, r2
- rsbs r12, r1, r0,LSR #6
- subcs r0, r0, r1, LSL #6
- adc r2, r2, r2
- rsbs r12, r1, r0, LSR #5
- subcs r0, r0, r1, LSL #5
- adc r2, r2, r2
- rsbs r12, r1, r0, LSR #4
- subcs r0, r0, r1, LSL #4
- adc r2, r2, r2
-ASM_PFX(__arm_div4):
- rsbs r12, r1, r0, LSR #3
- subcs r0, r0, r1, LSL #3
- adc r2, r2, r2
- rsbs r12, r1, r0, LSR #2
- subcs r0, r0, r1, LSL #2
- adcs r2, r2, r2
- rsbs r12, r1, r0, LSR #1
- subcs r0, r0, r1, LSL #1
- adc r2, r2, r2
-ASM_PFX(__arm_div1):
- subs r1, r0, r1
- movcc r1, r0
- adc r0, r2, r2
- bx r14
-ASM_PFX(__arm_div_negative):
- ands r2, r1, #0x80000000
- rsbmi r1, r1, #0
- eors r3, r2, r0, ASR #32
- rsbcs r0, r0, #0
- rsbs r12, r1, r0, LSR #4
- bcc label1
- rsbs r12, r1, r0, LSR #8
- bcc label2
-ASM_PFX(__arm_div_large):
- lsl r1, r1, #6
- rsbs r12, r1, r0, LSR #8
- orr r2, r2, #0xfc000000
- bcc label2
- lsl r1, r1, #6
- rsbs r12, r1, r0, LSR #8
- orr r2, r2, #0x3f00000
- bcc label2
- lsl r1, r1, #6
- rsbs r12, r1, r0, LSR #8
- orr r2, r2, #0xfc000
- orrcs r2, r2, #0x3f00
- lslcs r1, r1, #6
- rsbs r12, r1, #0
- bcs ASM_PFX(__aeabi_idiv0)
-label3:
- lsrcs r1, r1, #6
-label2:
- rsbs r12, r1, r0, LSR #7
- subcs r0, r0, r1, LSL #7
- adc r2, r2, r2
- rsbs r12, r1, r0, LSR #6
- subcs r0, r0, r1, LSL #6
- adc r2, r2, r2
- rsbs r12, r1, r0, LSR #5
- subcs r0, r0, r1, LSL #5
- adc r2, r2, r2
- rsbs r12, r1, r0, LSR #4
- subcs r0, r0, r1, LSL #4
- adc r2, r2, r2
-label1:
- rsbs r12, r1, r0, LSR #3
- subcs r0, r0, r1, LSL #3
- adc r2, r2, r2
- rsbs r12, r1, r0, LSR #2
- subcs r0, r0, r1, LSL #2
- adcs r2, r2, r2
- bcs label3
- rsbs r12, r1, r0, LSR #1
- subcs r0, r0, r1, LSL #1
- adc r2, r2, r2
- subs r1, r0, r1
- movcc r1, r0
- adc r0, r2, r2
- asrs r3, r3, #31
- rsbmi r0, r0, #0
- rsbcs r1, r1, #0
- bx r14
-
- @ What to do about division by zero? For now, just return.
-ASM_PFX(__aeabi_idiv0):
- bx r14
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.asm deleted file mode 100644 index b539e51689..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.asm +++ /dev/null @@ -1,155 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
- EXPORT __aeabi_uidiv
- EXPORT __aeabi_uidivmod
- EXPORT __aeabi_idiv
- EXPORT __aeabi_idivmod
-
- AREA Math, CODE, READONLY
-
-;
-;UINT32
-;EFIAPI
-;__aeabi_uidivmode (
-; IN UINT32 Dividen
-; IN UINT32 Divisor
-; );
-;
-
-__aeabi_uidiv
-__aeabi_uidivmod
- RSBS r12, r1, r0, LSR #4
- MOV r2, #0
- BCC __arm_div4
- RSBS r12, r1, r0, LSR #8
- BCC __arm_div8
- MOV r3, #0
- B __arm_div_large
-
-;
-;INT32
-;EFIAPI
-;__aeabi_idivmode (
-; IN INT32 Dividen
-; IN INT32 Divisor
-; );
-;
-__aeabi_idiv
-__aeabi_idivmod
- ORRS r12, r0, r1
- BMI __arm_div_negative
- RSBS r12, r1, r0, LSR #1
- MOV r2, #0
- BCC __arm_div1
- RSBS r12, r1, r0, LSR #4
- BCC __arm_div4
- RSBS r12, r1, r0, LSR #8
- BCC __arm_div8
- MOV r3, #0
- B __arm_div_large
-__arm_div8
- RSBS r12, r1, r0, LSR #7
- SUBCS r0, r0, r1, LSL #7
- ADC r2, r2, r2
- RSBS r12, r1, r0,LSR #6
- SUBCS r0, r0, r1, LSL #6
- ADC r2, r2, r2
- RSBS r12, r1, r0, LSR #5
- SUBCS r0, r0, r1, LSL #5
- ADC r2, r2, r2
- RSBS r12, r1, r0, LSR #4
- SUBCS r0, r0, r1, LSL #4
- ADC r2, r2, r2
-__arm_div4
- RSBS r12, r1, r0, LSR #3
- SUBCS r0, r0, r1, LSL #3
- ADC r2, r2, r2
- RSBS r12, r1, r0, LSR #2
- SUBCS r0, r0, r1, LSL #2
- ADCS r2, r2, r2
- RSBS r12, r1, r0, LSR #1
- SUBCS r0, r0, r1, LSL #1
- ADC r2, r2, r2
-__arm_div1
- SUBS r1, r0, r1
- MOVCC r1, r0
- ADC r0, r2, r2
- BX r14
-__arm_div_negative
- ANDS r2, r1, #0x80000000
- RSBMI r1, r1, #0
- EORS r3, r2, r0, ASR #32
- RSBCS r0, r0, #0
- RSBS r12, r1, r0, LSR #4
- BCC label1
- RSBS r12, r1, r0, LSR #8
- BCC label2
-__arm_div_large
- LSL r1, r1, #6
- RSBS r12, r1, r0, LSR #8
- ORR r2, r2, #0xfc000000
- BCC label2
- LSL r1, r1, #6
- RSBS r12, r1, r0, LSR #8
- ORR r2, r2, #0x3f00000
- BCC label2
- LSL r1, r1, #6
- RSBS r12, r1, r0, LSR #8
- ORR r2, r2, #0xfc000
- ORRCS r2, r2, #0x3f00
- LSLCS r1, r1, #6
- RSBS r12, r1, #0
- BCS __aeabi_idiv0
-label3
- LSRCS r1, r1, #6
-label2
- RSBS r12, r1, r0, LSR #7
- SUBCS r0, r0, r1, LSL #7
- ADC r2, r2, r2
- RSBS r12, r1, r0, LSR #6
- SUBCS r0, r0, r1, LSL #6
- ADC r2, r2, r2
- RSBS r12, r1, r0, LSR #5
- SUBCS r0, r0, r1, LSL #5
- ADC r2, r2, r2
- RSBS r12, r1, r0, LSR #4
- SUBCS r0, r0, r1, LSL #4
- ADC r2, r2, r2
-label1
- RSBS r12, r1, r0, LSR #3
- SUBCS r0, r0, r1, LSL #3
- ADC r2, r2, r2
- RSBS r12, r1, r0, LSR #2
- SUBCS r0, r0, r1, LSL #2
- ADCS r2, r2, r2
- BCS label3
- RSBS r12, r1, r0, LSR #1
- SUBCS r0, r0, r1, LSL #1
- ADC r2, r2, r2
- SUBS r1, r0, r1
- MOVCC r1, r0
- ADC r0, r2, r2
- ASRS r3, r3, #31
- RSBMI r0, r0, #0
- RSBCS r1, r1, #0
- BX r14
-
- ; What to do about division by zero? For now, just return.
-__aeabi_idiv0
- BX r14
-
- END
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S deleted file mode 100644 index ce55951d3c..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S +++ /dev/null @@ -1,47 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(__divdi3)
- @ args = 0, pretend = 0, frame = 0
- @ frame_needed = 1, uses_anonymous_args = 0
- stmfd sp!, {r4, r5, r7, lr}
- mov r4, r3, asr #31
- add r7, sp, #8
- stmfd sp!, {r10, r11}
- mov r10, r1, asr #31
- sub sp, sp, #8
- mov r11, r10
- mov r5, r4
- eor r0, r0, r10
- eor r1, r1, r10
- eor r2, r2, r4
- eor r3, r3, r4
- subs r2, r2, r4
- sbc r3, r3, r5
- mov ip, #0
- subs r0, r0, r10
- sbc r1, r1, r11
- str ip, [sp, #0]
- bl ASM_PFX(__udivmoddi4)
- eor r2, r10, r4
- eor r3, r10, r4
- eor r0, r0, r2
- eor r1, r1, r3
- subs r0, r0, r2
- sbc r1, r1, r3
- sub sp, r7, #16
- ldmfd sp!, {r10, r11}
- ldmfd sp!, {r4, r5, r7, pc}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.c deleted file mode 100644 index c7916b8009..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.c +++ /dev/null @@ -1,77 +0,0 @@ -/** @file
- Compiler intrinsic for 64-bit compare, ported from LLVM code.
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-
-#include "Llvm_int_lib.h"
-
-UINT64 __udivmoddi4(UINT64 a, UINT64 b, UINT64* rem);
-
-// Returns: a / b
-
-INT64
-__divdi3(INT64 a, INT64 b)
-{
- const int bits_in_dword_m1 = (int)(sizeof(INT64) * CHAR_BIT) - 1;
- INT64 s_a = a >> bits_in_dword_m1; // s_a = a < 0 ? -1 : 0
- INT64 s_b = b >> bits_in_dword_m1; // s_b = b < 0 ? -1 : 0
- a = (a ^ s_a) - s_a; // negate if s_a == -1
- b = (b ^ s_b) - s_b; // negate if s_b == -1
- s_a ^= s_b; // sign of quotient
- return (__udivmoddi4(a, b, (UINT64*)0) ^ s_a) - s_a; // negate if s_a == -1
-}
-
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S deleted file mode 100644 index 835f1c5171..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S +++ /dev/null @@ -1,30 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(__divsi3)
- eor r3, r0, r0, asr #31
- eor r2, r1, r1, asr #31
- stmfd sp!, {r4, r5, r7, lr}
- mov r5, r0, asr #31
- add r7, sp, #8
- mov r4, r1, asr #31
- sub r0, r3, r0, asr #31
- sub r1, r2, r1, asr #31
- bl ASM_PFX(__udivsi3)
- eor r1, r5, r4
- eor r0, r0, r1
- rsb r0, r1, r0
- ldmfd sp!, {r4, r5, r7, pc}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.c deleted file mode 100644 index 24e43dd6d7..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.c +++ /dev/null @@ -1,78 +0,0 @@ -/** @file
- Compiler intrinsic for 32--bit unsigned division, ported from LLVM code.
-
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-
-#include "Llvm_int_lib.h"
-
-UINT32 __udivsi3(UINT32 n, UINT32 d);
-
-// Returns: a / b
-
-INT32
-__divsi3(INT32 a, INT32 b)
-{
- const int bits_in_word_m1 = (int)(sizeof(INT32) * CHAR_BIT) - 1;
- INT32 s_a = a >> bits_in_word_m1; // s_a = a < 0 ? -1 : 0
- INT32 s_b = b >> bits_in_word_m1; // s_b = b < 0 ? -1 : 0
- a = (a ^ s_a) - s_a; // negate if s_a == -1
- b = (b ^ s_b) - s_b; // negate if s_b == -1
- s_a ^= s_b; // sign of quotient
- return (__udivsi3(a, b) ^ s_a) - s_a; // negate if s_a == -1
-}
-
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lasr.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lasr.asm deleted file mode 100644 index 35723ff173..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lasr.asm +++ /dev/null @@ -1,40 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
-
- INCLUDE AsmMacroExport.inc
-
-;
-;UINT32
-;EFIAPI
-;__aeabi_lasr (
-; IN UINT32 Dividen
-; IN UINT32 Divisor
-; );
-;
- RVCT_ASM_EXPORT __aeabi_lasr
- SUBS r3,r2,#0x20
- BPL {pc} + 0x18 ; 0x1c
- RSB r3,r2,#0x20
- LSR r0,r0,r2
- ORR r0,r0,r1,LSL r3
- ASR r1,r1,r2
- BX lr
- ASR r0,r1,r3
- ASR r1,r1,#31
- BX lr
-
- END
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S deleted file mode 100644 index 98632cf445..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S +++ /dev/null @@ -1,56 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-//
-// A pair of (unsigned) long longs is returned in {{r0, r1}, {r2, r3}},
-// the quotient in {r0, r1}, and the remainder in {r2, r3}.
-//
-//__value_in_regs lldiv_t
-//EFIAPI
-//__aeabi_ldivmod (
-// IN UINT64 Dividen
-// IN UINT64 Divisor
-// )//
-//
-
-ASM_FUNC(__aeabi_ldivmod)
- push {r4,lr}
- asrs r4,r1,#1
- eor r4,r4,r3,LSR #1
- bpl L_Test1
- rsbs r0,r0,#0
- rsc r1,r1,#0
-L_Test1:
- tst r3,r3
- bpl L_Test2
- rsbs r2,r2,#0
- rsc r3,r3,#0
-L_Test2:
- bl ASM_PFX(__aeabi_uldivmod)
- tst r4,#0x40000000
- beq L_Test3
- rsbs r0,r0,#0
- rsc r1,r1,#0
-L_Test3:
- tst r4,#0x80000000
- beq L_Exit
- rsbs r2,r2,#0
- rsc r3,r3,#0
-L_Exit:
- pop {r4,pc}
-
-
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.asm deleted file mode 100644 index c71bd59e45..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.asm +++ /dev/null @@ -1,57 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
- EXTERN __aeabi_uldivmod
-
- INCLUDE AsmMacroExport.inc
-
-;
-;UINT32
-;EFIAPI
-;__aeabi_uidivmode (
-; IN UINT32 Dividen
-; IN UINT32 Divisor
-; );
-;
-
- RVCT_ASM_EXPORT __aeabi_ldivmod
- PUSH {r4,lr}
- ASRS r4,r1,#1
- EOR r4,r4,r3,LSR #1
- BPL L_Test1
- RSBS r0,r0,#0
- RSC r1,r1,#0
-L_Test1
- TST r3,r3
- BPL L_Test2
- RSBS r2,r2,#0
- RSC r3,r3,#0
-L_Test2
- BL __aeabi_uldivmod ;
- TST r4,#0x40000000
- BEQ L_Test3
- RSBS r0,r0,#0
- RSC r1,r1,#0
-L_Test3
- TST r4,#0x80000000
- BEQ L_Exit
- RSBS r2,r2,#0
- RSC r3,r3,#0
-L_Exit
- POP {r4,pc}
-
- END
-
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S deleted file mode 100644 index f72aca97c1..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S +++ /dev/null @@ -1,37 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2013, ARM. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-#
-#VOID
-#EFIAPI
-#__aeabi_llsl (
-# IN VOID *Destination,
-# IN VOID *Source,
-# IN UINT32 Size
-# );
-#
-ASM_FUNC(__aeabi_llsl)
- subs r3,r2,#0x20
- bpl 1f
- rsb r3,r2,#0x20
- lsl r1,r1,r2
- orr r1,r1,r0,lsr r3
- lsl r0,r0,r2
- bx lr
-1:
- lsl r1,r0,r3
- mov r0,#0
- bx lr
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.asm deleted file mode 100644 index a31e18666a..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.asm +++ /dev/null @@ -1,42 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
-
- INCLUDE AsmMacroExport.inc
-
-;
-;VOID
-;EFIAPI
-;__aeabi_llsl (
-; IN VOID *Destination,
-; IN VOID *Source,
-; IN UINT32 Size
-; );
-;
-
- RVCT_ASM_EXPORT __aeabi_llsl
- SUBS r3,r2,#0x20
- BPL {pc} + 0x18 ; 0x1c
- RSB r3,r2,#0x20
- LSL r1,r1,r2
- ORR r1,r1,r0,LSR r3
- LSL r0,r0,r2
- BX lr
- LSL r1,r0,r3
- MOV r0,#0
- BX lr
-
- END
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S deleted file mode 100644 index 6908bd6b7c..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S +++ /dev/null @@ -1,36 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2013, ARM. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-#VOID
-#EFIAPI
-#__aeabi_llsr (
-# IN VOID *Destination,
-# IN VOID *Source,
-# IN UINT32 Size
-# );
-#
-ASM_FUNC(__aeabi_llsr)
- subs r3,r2,#0x20
- bpl 1f
- rsb r3,r2,#0x20
- lsr r0,r0,r2
- orr r0,r0,r1,lsl r3
- lsr r1,r1,r2
- bx lr
-1:
- lsr r0,r1,r3
- mov r1,#0
- bx lr
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.asm deleted file mode 100644 index 881db106d9..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.asm +++ /dev/null @@ -1,43 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
-
- INCLUDE AsmMacroExport.inc
-
-;
-;VOID
-;EFIAPI
-;__aeabi_llsr (
-; IN VOID *Destination,
-; IN VOID *Source,
-; IN UINT32 Size
-; );
-;
- RVCT_ASM_EXPORT __aeabi_llsr
- SUBS r3,r2,#0x20
- BPL {pc} + 0x18 ; 0x1c
- RSB r3,r2,#0x20
- LSR r0,r0,r2
- ORR r0,r0,r1,LSL r3
- LSR r1,r1,r2
- BX lr
- LSR r0,r1,r3
- MOV r1,#0
- BX lr
-
- END
-
-
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S deleted file mode 100644 index e17391184a..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S +++ /dev/null @@ -1,33 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(__lshrdi3)
- cmp r2, #31
- bls L2
- cmp r2, #63
- subls r2, r2, #32
- movls r2, r1, lsr r2
- movhi r2, #0
- mov r0, r2
- mov r1, #0
- bx lr
-L2:
- cmp r2, #0
- rsbne r3, r2, #32
- movne r3, r1, asl r3
- movne r1, r1, lsr r2
- orrne r0, r3, r0, lsr r2
- bx lr
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.c deleted file mode 100644 index 2175cd9b54..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.c +++ /dev/null @@ -1,83 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-#include "Llvm_int_lib.h"
-
-// Returns: logical a >> b
-
-// Precondition: 0 <= b < bits_in_dword
-
-INT64
-__lshrdi3(INT64 a, INT32 b)
-{
- const int bits_in_word = (int)(sizeof(INT32) * CHAR_BIT);
- udwords input;
- udwords result;
- input.all = a;
- if (b & bits_in_word) // bits_in_word <= b < bits_in_dword
- {
- result.high = 0;
- result.low = input.high >> (b - bits_in_word);
- }
- else // 0 <= b < bits_in_word
- {
- if (b == 0)
- return a;
- result.high = input.high >> b;
- result.low = (input.high << (bits_in_word - b)) | (input.low >> b);
- }
- return result.all;
-}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S deleted file mode 100644 index d10860d806..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S +++ /dev/null @@ -1,46 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-# VOID
-# EFIAPI
-# memmove (
-# IN VOID *Destination,
-# IN CONST VOID *Source,
-# IN UINT32 Size
-# );
-ASM_FUNC(memmove)
- CMP r2, #0
- BXEQ lr
- CMP r0, r1
- BXEQ lr
- BHI memmove_backward
-
-memmove_forward:
- LDRB r3, [r1], #1
- STRB r3, [r0], #1
- SUBS r2, r2, #1
- BXEQ lr
- B memmove_forward
-
-memmove_backward:
- add r0, r2
- add r1, r2
-memmove_backward_loop:
- LDRB r3, [r1, #-1]!
- STRB r3, [r0, #-1]!
- SUBS r2, r2, #1
- BXEQ lr
- B memmove_backward_loop
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.asm deleted file mode 100644 index 09773b0c75..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.asm +++ /dev/null @@ -1,52 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
-
- INCLUDE AsmMacroExport.inc
-
-;
-;VOID
-;EFIAPI
-;__aeabi_memmove (
-; IN VOID *Destination,
-; IN CONST VOID *Source,
-; IN UINT32 Size
-; );
-;
- RVCT_ASM_EXPORT __aeabi_memmove
- CMP r2, #0
- BXEQ lr
- CMP r0, r1
- BXEQ lr
- BHI memmove_backward
-
-memmove_forward
- LDRB r3, [r1], #1
- STRB r3, [r0], #1
- SUBS r2, r2, #1
- BNE memmove_forward
- BX lr
-
-memmove_backward
- add r0, r2
- add r1, r2
-memmove_backward_loop
- LDRB r3, [r1, #-1]!
- STRB r3, [r0, #-1]!
- SUBS r2, r2, #1
- BNE memmove_backward_loop
- BX lr
-
- END
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S deleted file mode 100644 index c8c87d8e23..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S +++ /dev/null @@ -1,44 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(__moddi3)
- stmfd sp!, {r4, r5, r7, lr}
- mov r4, r1, asr #31
- add r7, sp, #8
- stmfd sp!, {r10, r11}
- mov r10, r3, asr #31
- sub sp, sp, #16
- mov r5, r4
- mov r11, r10
- eor r0, r0, r4
- eor r1, r1, r4
- eor r2, r2, r10
- eor r3, r3, r10
- add ip, sp, #8
- subs r0, r0, r4
- sbc r1, r1, r5
- subs r2, r2, r10
- sbc r3, r3, r11
- str ip, [sp, #0]
- bl ASM_PFX(__udivmoddi4)
- ldrd r0, [sp, #8]
- eor r0, r0, r4
- eor r1, r1, r4
- subs r0, r0, r4
- sbc r1, r1, r5
- sub sp, r7, #16
- ldmfd sp!, {r10, r11}
- ldmfd sp!, {r4, r5, r7, pc}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.c deleted file mode 100644 index 04562de4c3..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.c +++ /dev/null @@ -1,77 +0,0 @@ -/** @file
- Compiler intrinsic for 64-bit mod, ported from LLVM code.
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-
-#include "Llvm_int_lib.h"
-
-UINT64 __udivmoddi4(UINT64 a, UINT64 b, UINT64* rem);
-
-// Returns: a % b
-
-INT64
-__moddi3(INT64 a, INT64 b)
-{
- const int bits_in_dword_m1 = (int)(sizeof(INT64) * CHAR_BIT) - 1;
- INT64 s = b >> bits_in_dword_m1; // s = b < 0 ? -1 : 0
- b = (b ^ s) - s; // negate if s == -1
- s = a >> bits_in_dword_m1; // s = a < 0 ? -1 : 0
- a = (a ^ s) - s; // negate if s == -1
- INT64 r;
- __udivmoddi4(a, b, (UINT64*)&r);
- return (r ^ s) - s; // negate if s == -1
-}
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S deleted file mode 100644 index d5624b90f9..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S +++ /dev/null @@ -1,25 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(__modsi3)
- stmfd sp!, {r4, r5, r7, lr}
- add r7, sp, #8
- mov r5, r0
- mov r4, r1
- bl ASM_PFX(__divsi3)
- mul r0, r4, r0
- rsb r0, r0, r5
- ldmfd sp!, {r4, r5, r7, pc}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.c deleted file mode 100644 index 91ee6aa279..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.c +++ /dev/null @@ -1,70 +0,0 @@ -/** @file
- Compiler intrinsic for 32-bit mod, ported from LLVM code.
-
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-
-#include "Llvm_int_lib.h"
-
-// Returns: a % b
-
-INT32
-__modsi3(INT32 a, INT32 b)
-{
- return a - (a / b) * b;
-}
-
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S deleted file mode 100644 index a6689fcee9..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S +++ /dev/null @@ -1,56 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(__muldi3)
- stmfd sp!, {r4, r5, r6, r7, lr}
- add r7, sp, #12
- stmfd sp!, {r8, r10, r11}
- ldr r11, L4
- mov r4, r0, lsr #16
- and r8, r0, r11
- and ip, r2, r11
- mul lr, ip, r8
- mul ip, r4, ip
- sub sp, sp, #8
- add r10, ip, lr, lsr #16
- and ip, r10, r11
- and lr, lr, r11
- mov r6, r2, lsr #16
- str r4, [sp, #4]
- add r4, lr, ip, asl #16
- mul ip, r8, r6
- mov r5, r10, lsr #16
- add r10, ip, r4, lsr #16
- and ip, r10, r11
- and lr, r4, r11
- add r4, lr, ip, asl #16
- mul r0, r3, r0
- add ip, r5, r10, lsr #16
- ldr r5, [sp, #4]
- mla r0, r2, r1, r0
- mla r5, r6, r5, ip
- mov r10, r4
- add r11, r0, r5
- mov r1, r11
- mov r0, r4
- sub sp, r7, #24
- ldmfd sp!, {r8, r10, r11}
- ldmfd sp!, {r4, r5, r6, r7, pc}
- .p2align 2
-L5:
- .align 2
-L4:
- .long 65535
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.c deleted file mode 100644 index dbdda86c13..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.c +++ /dev/null @@ -1,98 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-#include <Base.h>
-#include "Llvm_int_lib.h"
-
-
-// Returns: a * b
-
-static
-INT64
-__muldsi3(UINT32 a, UINT32 b)
-{
- dwords r;
- const int bits_in_word_2 = (int)(sizeof(INT32) * CHAR_BIT) / 2;
- const UINT32 lower_mask = (UINT32)~0 >> bits_in_word_2;
- r.low = (a & lower_mask) * (b & lower_mask);
- UINT32 t = r.low >> bits_in_word_2;
- r.low &= lower_mask;
- t += (a >> bits_in_word_2) * (b & lower_mask);
- r.low += (t & lower_mask) << bits_in_word_2;
- r.high = t >> bits_in_word_2;
- t = r.low >> bits_in_word_2;
- r.low &= lower_mask;
- t += (b >> bits_in_word_2) * (a & lower_mask);
- r.low += (t & lower_mask) << bits_in_word_2;
- r.high += t >> bits_in_word_2;
- r.high += (a >> bits_in_word_2) * (b >> bits_in_word_2);
- return r.all;
-}
-
-// Returns: a * b
-
-INT64
-__muldi3(INT64 a, INT64 b)
-{
- dwords x;
- x.all = a;
- dwords y;
- y.all = b;
- dwords r;
- r.all = __muldsi3(x.low, y.low);
- r.high += x.high * y.low + x.low * y.high;
- return r.all;
-}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.S deleted file mode 100644 index e65355970b..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.S +++ /dev/null @@ -1,44 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-.text
-
-GCC_ASM_EXPORT(__ARM_ll_mullu)
-GCC_ASM_EXPORT(__aeabi_lmul)
-#
-#INT64
-#EFIAPI
-#__aeabi_lmul (
-# IN INT64 Multiplicand
-# IN INT32 Multiplier
-# );
-#
-ASM_PFX(__ARM_ll_mullu):
- mov r3, #0
-# Make upper part of INT64 Multiplier 0 and use __aeabi_lmul
-
-#
-#INT64
-#EFIAPI
-#__aeabi_lmul (
-# IN INT64 Multiplicand
-# IN INT64 Multiplier
-# );
-#
-ASM_PFX(__aeabi_lmul):
- stmdb sp!, {lr}
- mov lr, r0
- umull r0, ip, r2, lr
- mla r1, r2, r1, ip
- mla r1, r3, lr, r1
- ldmia sp!, {pc}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.asm deleted file mode 100644 index 3451c2c943..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.asm +++ /dev/null @@ -1,49 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
- EXPORT __ARM_ll_mullu
- EXPORT __aeabi_lmul
-
- AREA Math, CODE, READONLY
-
-;
-;INT64
-;EFIAPI
-;__aeabi_lmul (
-; IN INT64 Multiplicand
-; IN INT32 Multiplier
-; );
-;
-__ARM_ll_mullu
- mov r3, #0
-// Make upper part of INT64 Multiplier 0 and use __aeabi_lmul
-
-;
-;INT64
-;EFIAPI
-;__aeabi_lmul (
-; IN INT64 Multiplicand
-; IN INT64 Multiplier
-; );
-;
-__aeabi_lmul
- stmdb sp!, {lr}
- mov lr, r0
- umull r0, ip, r2, lr
- mla r1, r2, r1, ip
- mla r1, r3, lr, r1
- ldmia sp!, {pc}
-
- END
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/sourcery.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/sourcery.S deleted file mode 100644 index 1e0b524cfe..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/sourcery.S +++ /dev/null @@ -1,55 +0,0 @@ -#------s------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-
- .text
- .align 2
- GCC_ASM_EXPORT(__aeabi_ulcmp)
-
-ASM_PFX(__aeabi_ulcmp):
- stmfd sp!, {r4, r5, r8}
- cmp r3, r1
- mov r8, r0
- mov r9, r1
- mov r4, r2
- mov r5, r3
- bls L16
-L2:
- mvn r0, #0
-L1:
- ldmfd sp!, {r4, r5, r8}
- bx lr
-L16:
- beq L17
-L4:
- cmp r9, r5
- bhi L7
- beq L18
- cmp r8, r4
-L14:
- cmpeq r9, r5
- moveq r0, #0
- beq L1
- b L1
-L18:
- cmp r8, r4
- bls L14
-L7:
- mov r0, #1
- b L1
-L17:
- cmp r2, r0
- bhi L2
- b L4
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch.asm deleted file mode 100644 index f23aa42d44..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch.asm +++ /dev/null @@ -1,28 +0,0 @@ -///------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
-
-
- INCLUDE AsmMacroExport.inc
-
- RVCT_ASM_EXPORT __ARM_switch8
- LDRB r12,[lr,#-1]
- CMP r3,r12
- LDRBCC r3,[lr,r3]
- LDRBCS r3,[lr,r12]
- ADD r12,lr,r3,LSL #1
- BX r12
-
- END
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S deleted file mode 100644 index 6de2d4513c..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S +++ /dev/null @@ -1,30 +0,0 @@ -#/** @file
-# Compiler intrinsic for ARM compiler
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.;
-#
-#**/
-#
-
-#include <AsmMacroIoLib.h>
-
-.syntax unified
-
-ASM_FUNC(__switch16)
- ldrh ip, [lr, #-1]
- cmp r0, ip
- add r0, lr, r0, lsl #1
- ldrshcc r0, [r0, #1]
- add ip, lr, ip, lsl #1
- ldrshcs r0, [ip, #1]
- add ip, lr, r0, lsl #1
- bx ip
-
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S deleted file mode 100644 index f4b3343a78..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S +++ /dev/null @@ -1,29 +0,0 @@ -#/** @file
-# Compiler intrinsic for ARM compiler
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.;
-#
-#**/
-#
-
-#include <AsmMacroIoLib.h>
-
-.syntax unified
-
-ASM_FUNC(__switch32)
- ldr ip, [lr, #-1]
- cmp r0, ip
- add r0, lr, r0, lsl #2
- ldrcc r0, [r0, #3]
- add ip, lr, ip, lsl #2
- ldrcs r0, [ip, #3]
- add ip, lr, r0
- bx ip
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S deleted file mode 100644 index 7f84b16c79..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S +++ /dev/null @@ -1,27 +0,0 @@ -#/** @file
-# Compiler intrinsic for ARM compiler
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http)://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.;
-#
-#**/
-#
-
-#include <AsmMacroIoLib.h>
-
-.syntax unified
-
-ASM_FUNC(__switch8)
- ldrb ip, [lr, #-1]
- cmp r0, ip
- ldrsbcc r0, [lr, r0]
- ldrsbcs r0, [lr, ip]
- add ip, lr, r0, lsl #1
- bx ip
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S deleted file mode 100644 index 7c94dd4fad..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S +++ /dev/null @@ -1,27 +0,0 @@ -#/** @file
-# Compiler intrinsic for ARM compiler
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http)://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.;
-#
-#**/
-#
-
-#include <AsmMacroIoLib.h>
-
-.syntax unified
-
-ASM_FUNC(__switchu8)
- ldrb ip,[lr,#-1]
- cmp r0,ip
- ldrbcc r0,[lr,r0]
- ldrbcs r0,[lr,ip]
- add ip,lr,r0,LSL #1
- bx ip
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S deleted file mode 100644 index 472bbc1056..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S +++ /dev/null @@ -1,36 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(__ucmpdi2)
- stmfd sp!, {r4, r5, r8, lr}
- cmp r1, r3
- mov r8, r0
- mov r4, r2
- mov r5, r3
- bcc L2
- bhi L4
- cmp r0, r2
- bcc L2
- movls r0, #1
- bls L8
- b L4
-L2:
- mov r0, #0
- b L8
-L4:
- mov r0, #2
-L8:
- ldmfd sp!, {r4, r5, r8, pc}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.c deleted file mode 100644 index aa03a3db39..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.c +++ /dev/null @@ -1,82 +0,0 @@ -/** @file
- Compiler intrinsic for 64-bit compare, ported from LLVM code.
-
- Copyright (c) 2008-2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-
-#include "Llvm_int_lib.h"
-
-
-// Returns: if (a < b) returns 0
-// if (a == b) returns 1
-// if (a > b) returns 2
-
-UINT32
-__ucmpdi2(UINT64 a, UINT64 b)
-{
- udwords x;
- x.all = a;
- udwords y;
- y.all = b;
- if (x.high < y.high)
- return 0;
- if (x.high > y.high)
- return 2;
- if (x.low < y.low)
- return 0;
- if (x.low > y.low)
- return 2;
- return 1;
-}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S deleted file mode 100644 index e173d4ada7..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S +++ /dev/null @@ -1,25 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(__udivdi3)
- stmfd sp!, {r7, lr}
- add r7, sp, #0
- sub sp, sp, #8
- mov ip, #0
- str ip, [sp, #0]
- bl ASM_PFX(__udivmoddi4)
- sub sp, r7, #0
- ldmfd sp!, {r7, pc}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.c deleted file mode 100644 index fc383b47e8..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.c +++ /dev/null @@ -1,71 +0,0 @@ -/** @file
- Compiler intrinsic for 64-bit unisigned div, ported from LLVM code.
-
- Copyright (c) 2008-2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-
-#include "Llvm_int_lib.h"
-
-UINT64 __udivmoddi4 (UINT64 a, UINT64 b, UINT64 *rem);
-
-// Returns: a / b
-
-UINT64
-__udivdi3(UINT64 a, UINT64 b)
-{
- return __udivmoddi4(a, b, 0);
-}
-
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S deleted file mode 100644 index b87872d39e..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S +++ /dev/null @@ -1,242 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
- .syntax unified
-
-ASM_FUNC(__udivmoddi4)
- stmfd sp!, {r4, r5, r6, r7, lr}
- add r7, sp, #12
- stmfd sp!, {r10, r11}
- sub sp, sp, #20
- stmia sp, {r2-r3}
- ldr r6, [sp, #48]
- orrs r2, r2, r3
- mov r10, r0
- mov r11, r1
- beq L2
- subs ip, r1, #0
- bne L4
- cmp r3, #0
- bne L6
- cmp r6, #0
- beq L8
- mov r1, r2
- bl ASM_PFX(__umodsi3)
- mov r1, #0
- stmia r6, {r0-r1}
-L8:
- ldr r1, [sp, #0]
- mov r0, r10
- b L45
-L6:
- cmp r6, #0
- movne r1, #0
- stmiane r6, {r0-r1}
- b L2
-L4:
- ldr r1, [sp, #0]
- cmp r1, #0
- bne L12
- ldr r2, [sp, #4]
- cmp r2, #0
- bne L14
- cmp r6, #0
- beq L16
- mov r1, r2
- mov r0, r11
- bl ASM_PFX(__umodsi3)
- mov r1, #0
- stmia r6, {r0-r1}
-L16:
- ldr r1, [sp, #4]
- mov r0, r11
-L45:
- bl ASM_PFX(__udivsi3)
-L46:
- mov r10, r0
- mov r11, #0
- b L10
-L14:
- subs r1, r0, #0
- bne L18
- cmp r6, #0
- beq L16
- ldr r1, [sp, #4]
- mov r0, r11
- bl ASM_PFX(__umodsi3)
- mov r4, r10
- mov r5, r0
- stmia r6, {r4-r5}
- b L16
-L18:
- sub r3, r2, #1
- tst r2, r3
- bne L22
- cmp r6, #0
- movne r4, r0
- andne r5, ip, r3
- stmiane r6, {r4-r5}
-L24:
- rsb r3, r2, #0
- and r3, r2, r3
- clz r3, r3
- rsb r3, r3, #31
- mov r0, ip, lsr r3
- b L46
-L22:
- clz r2, r2
- clz r3, ip
- rsb r3, r3, r2
- cmp r3, #30
- bhi L48
- rsb r2, r3, #31
- add lr, r3, #1
- mov r3, r1, asl r2
- str r3, [sp, #12]
- mov r3, r1, lsr lr
- ldr r0, [sp, #0]
- mov r5, ip, lsr lr
- orr r4, r3, ip, asl r2
- str r0, [sp, #8]
- b L29
-L12:
- ldr r3, [sp, #4]
- cmp r3, #0
- bne L30
- sub r3, r1, #1
- tst r1, r3
- bne L32
- cmp r6, #0
- andne r3, r3, r0
- movne r2, r3
- movne r3, #0
- stmiane r6, {r2-r3}
-L34:
- cmp r1, #1
- beq L10
- rsb r3, r1, #0
- and r3, r1, r3
- clz r3, r3
- rsb r0, r3, #31
- mov r1, ip, lsr r0
- rsb r3, r0, #32
- mov r0, r10, lsr r0
- orr ip, r0, ip, asl r3
- str r1, [sp, #12]
- str ip, [sp, #8]
- ldrd r10, [sp, #8]
- b L10
-L32:
- clz r2, r1
- clz r3, ip
- rsb r3, r3, r2
- rsb r4, r3, #31
- mov r2, r0, asl r4
- mvn r1, r3
- and r2, r2, r1, asr #31
- add lr, r3, #33
- str r2, [sp, #8]
- add r2, r3, #1
- mov r3, r3, asr #31
- and r0, r3, r0, asl r1
- mov r3, r10, lsr r2
- orr r3, r3, ip, asl r4
- and r3, r3, r1, asr #31
- orr r0, r0, r3
- mov r3, ip, lsr lr
- str r0, [sp, #12]
- mov r0, r10, lsr lr
- and r5, r3, r2, asr #31
- rsb r3, lr, #31
- mov r3, r3, asr #31
- orr r0, r0, ip, asl r1
- and r3, r3, ip, lsr r2
- and r0, r0, r2, asr #31
- orr r4, r3, r0
- b L29
-L30:
- clz r2, r3
- clz r3, ip
- rsb r3, r3, r2
- cmp r3, #31
- bls L37
-L48:
- cmp r6, #0
- stmiane r6, {r10-r11}
- b L2
-L37:
- rsb r1, r3, #31
- mov r0, r0, asl r1
- add lr, r3, #1
- mov r2, #0
- str r0, [sp, #12]
- mov r0, r10, lsr lr
- str r2, [sp, #8]
- sub r2, r3, #31
- and r0, r0, r2, asr #31
- mov r3, ip, lsr lr
- orr r4, r0, ip, asl r1
- and r5, r3, r2, asr #31
-L29:
- mov ip, #0
- mov r10, ip
- b L40
-L41:
- ldr r1, [sp, #12]
- ldr r2, [sp, #8]
- mov r3, r4, lsr #31
- orr r5, r3, r5, asl #1
- mov r3, r1, lsr #31
- orr r4, r3, r4, asl #1
- mov r3, r2, lsr #31
- orr r0, r3, r1, asl #1
- orr r1, ip, r2, asl #1
- ldmia sp, {r2-r3}
- str r0, [sp, #12]
- subs r2, r2, r4
- sbc r3, r3, r5
- str r1, [sp, #8]
- subs r0, r2, #1
- sbc r1, r3, #0
- mov r2, r1, asr #31
- ldmia sp, {r0-r1}
- mov r3, r2
- and ip, r2, #1
- and r3, r3, r1
- and r2, r2, r0
- subs r4, r4, r2
- sbc r5, r5, r3
- add r10, r10, #1
-L40:
- cmp r10, lr
- bne L41
- ldrd r0, [sp, #8]
- adds r0, r0, r0
- adc r1, r1, r1
- cmp r6, #0
- orr r10, r0, ip
- mov r11, r1
- stmiane r6, {r4-r5}
- b L10
-L2:
- mov r10, #0
- mov r11, #0
-L10:
- mov r0, r10
- mov r1, r11
- sub sp, r7, #20
- ldmfd sp!, {r10, r11}
- ldmfd sp!, {r4, r5, r6, r7, pc}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.c deleted file mode 100644 index a268596a11..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.c +++ /dev/null @@ -1,287 +0,0 @@ -/** @file
- Compiler intrinsic for 64-bit compare, ported from LLVM code.
-
- Copyright (c) 2008-2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-
-#include "Llvm_int_lib.h"
-
-// Effects: if rem != 0, *rem = a % b
-// Returns: a / b
-
-// Translated from Figure 3-40 of The PowerPC Compiler Writer's Guide
-
-UINT64
-__udivmoddi4 (UINT64 a, UINT64 b, UINT64* rem)
-{
- const unsigned n_uword_bits = sizeof(UINT32) * CHAR_BIT;
- const unsigned n_udword_bits = sizeof(UINT64) * CHAR_BIT;
- udwords n;
- n.all = a;
- udwords d;
- d.all = b;
- udwords q;
- udwords r;
- unsigned sr;
-
- if (b == 0) {
-// ASSERT (FALSE);
- return 0;
- }
-
- // special cases, X is unknown, K != 0
- if (n.high == 0)
- {
- if (d.high == 0)
- {
- // 0 X
- // ---
- // 0 X
- if (rem)
- *rem = n.low % d.low;
- return n.low / d.low;
- }
- // 0 X
- // ---
- // K X
- if (rem)
- *rem = n.low;
- return 0;
- }
- // n.high != 0
- if (d.low == 0)
- {
- if (d.high == 0)
- {
- // K X
- // ---
- // 0 0
- if (rem)
- *rem = n.high % d.low;
- return n.high / d.low;
- }
- // d.high != 0
- if (n.low == 0)
- {
- // K 0
- // ---
- // K 0
- if (rem)
- {
- r.high = n.high % d.high;
- r.low = 0;
- *rem = r.all;
- }
- return n.high / d.high;
- }
- // K K
- // ---
- // K 0
- if ((d.high & (d.high - 1)) == 0) // if d is a power of 2
- {
- if (rem)
- {
- r.low = n.low;
- r.high = n.high & (d.high - 1);
- *rem = r.all;
- }
- return n.high >> COUNT_TRAILING_ZEROS(d.high);
- }
- // K K
- // ---
- // K 0
- sr = COUNT_LEADING_ZEROS(d.high) - COUNT_LEADING_ZEROS(n.high);
- // 0 <= sr <= n_uword_bits - 2 or sr large
- if (sr > n_uword_bits - 2)
- {
- if (rem)
- *rem = n.all;
- return 0;
- }
- ++sr;
- // 1 <= sr <= n_uword_bits - 1
- // q.all = n.all << (n_udword_bits - sr);
- q.low = 0;
- q.high = n.low << (n_uword_bits - sr);
- // r.all = n.all >> sr;
- r.high = n.high >> sr;
- r.low = (n.high << (n_uword_bits - sr)) | (n.low >> sr);
- }
- else // d.low != 0
- {
- if (d.high == 0)
- {
- // K X
- // ---
- // 0 K
- if ((d.low & (d.low - 1)) == 0) // if d is a power of 2
- {
- if (rem)
- *rem = n.low & (d.low - 1);
- if (d.low == 1)
- return n.all;
- unsigned sr = COUNT_TRAILING_ZEROS(d.low);
- q.high = n.high >> sr;
- q.low = (n.high << (n_uword_bits - sr)) | (n.low >> sr);
- return q.all;
- }
- // K X
- // ---
- // 0 K
- sr = 1 + n_uword_bits + COUNT_LEADING_ZEROS(d.low) - COUNT_LEADING_ZEROS(n.high);
- // 2 <= sr <= n_udword_bits - 1
- // q.all = n.all << (n_udword_bits - sr);
- // r.all = n.all >> sr;
- // if (sr == n_uword_bits)
- // {
- // q.low = 0;
- // q.high = n.low;
- // r.high = 0;
- // r.low = n.high;
- // }
- // else if (sr < n_uword_bits) // 2 <= sr <= n_uword_bits - 1
- // {
- // q.low = 0;
- // q.high = n.low << (n_uword_bits - sr);
- // r.high = n.high >> sr;
- // r.low = (n.high << (n_uword_bits - sr)) | (n.low >> sr);
- // }
- // else // n_uword_bits + 1 <= sr <= n_udword_bits - 1
- // {
- // q.low = n.low << (n_udword_bits - sr);
- // q.high = (n.high << (n_udword_bits - sr)) |
- // (n.low >> (sr - n_uword_bits));
- // r.high = 0;
- // r.low = n.high >> (sr - n_uword_bits);
- // }
- q.low = (n.low << (n_udword_bits - sr)) &
- ((INT32)(n_uword_bits - sr) >> (n_uword_bits-1));
- q.high = ((n.low << ( n_uword_bits - sr)) &
- ((INT32)(sr - n_uword_bits - 1) >> (n_uword_bits-1))) |
- (((n.high << (n_udword_bits - sr)) |
- (n.low >> (sr - n_uword_bits))) &
- ((INT32)(n_uword_bits - sr) >> (n_uword_bits-1)));
- r.high = (n.high >> sr) &
- ((INT32)(sr - n_uword_bits) >> (n_uword_bits-1));
- r.low = ((n.high >> (sr - n_uword_bits)) &
- ((INT32)(n_uword_bits - sr - 1) >> (n_uword_bits-1))) |
- (((n.high << (n_uword_bits - sr)) |
- (n.low >> sr)) &
- ((INT32)(sr - n_uword_bits) >> (n_uword_bits-1)));
- }
- else
- {
- // K X
- // ---
- // K K
- sr = COUNT_LEADING_ZEROS(d.high) - COUNT_LEADING_ZEROS(n.high);
- // 0 <= sr <= n_uword_bits - 1 or sr large
- if (sr > n_uword_bits - 1)
- {
- if (rem)
- *rem = n.all;
- return 0;
- }
- ++sr;
- // 1 <= sr <= n_uword_bits
- // q.all = n.all << (n_udword_bits - sr);
- q.low = 0;
- q.high = n.low << (n_uword_bits - sr);
- // r.all = n.all >> sr;
- // if (sr < n_uword_bits)
- // {
- // r.high = n.high >> sr;
- // r.low = (n.high << (n_uword_bits - sr)) | (n.low >> sr);
- // }
- // else
- // {
- // r.high = 0;
- // r.low = n.high;
- // }
- r.high = (n.high >> sr) &
- ((INT32)(sr - n_uword_bits) >> (n_uword_bits-1));
- r.low = (n.high << (n_uword_bits - sr)) |
- ((n.low >> sr) &
- ((INT32)(sr - n_uword_bits) >> (n_uword_bits-1)));
- }
- }
- // Not a special case
- // q and r are initialized with:
- // q.all = n.all << (n_udword_bits - sr);
- // r.all = n.all >> sr;
- // 1 <= sr <= n_udword_bits - 1
- UINT32 carry = 0;
- for (; sr > 0; --sr)
- {
- // r:q = ((r:q) << 1) | carry
- r.high = (r.high << 1) | (r.low >> (n_uword_bits - 1));
- r.low = (r.low << 1) | (q.high >> (n_uword_bits - 1));
- q.high = (q.high << 1) | (q.low >> (n_uword_bits - 1));
- q.low = (q.low << 1) | carry;
- // carry = 0;
- // if (r.all >= d.all)
- // {
- // r.all -= d.all;
- // carry = 1;
- // }
- const INT64 s = (INT64)(d.all - r.all - 1) >> (n_udword_bits - 1);
- carry = s & 1;
- r.all -= d.all & s;
- }
- q.all = (q.all << 1) | carry;
- if (rem)
- *rem = r.all;
- return q.all;
-}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S deleted file mode 100644 index b70d1d7f03..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S +++ /dev/null @@ -1,57 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
- .syntax unified
-
-ASM_FUNC(__udivsi3)
- cmp r1, #0
- cmpne r0, #0
- stmfd sp!, {r4, r5, r7, lr}
- add r7, sp, #8
- beq L2
- clz r2, r1
- clz r3, r0
- rsb r3, r3, r2
- cmp r3, #31
- bhi L2
- ldmfdeq sp!, {r4, r5, r7, pc}
- add r5, r3, #1
- rsb r3, r3, #31
- mov lr, #0
- mov r2, r0, asl r3
- mov ip, r0, lsr r5
- mov r4, lr
- b L8
-L9:
- mov r0, r2, lsr #31
- orr ip, r0, ip, asl #1
- orr r2, r3, lr
- rsb r3, ip, r1
- sub r3, r3, #1
- and r0, r1, r3, asr #31
- mov lr, r3, lsr #31
- rsb ip, r0, ip
- add r4, r4, #1
-L8:
- cmp r4, r5
- mov r3, r2, asl #1
- bne L9
- orr r0, r3, lr
- ldmfd sp!, {r4, r5, r7, pc}
-L2:
- mov r0, #0
- ldmfd sp!, {r4, r5, r7, pc}
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.c deleted file mode 100644 index 8b9cb9f170..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.c +++ /dev/null @@ -1,111 +0,0 @@ -/** @file
- Compiler intrinsic for 32-bit unsigned div, ported from LLVM code.
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-
-#include "Llvm_int_lib.h"
-
-
-// Returns: n / d
-
-// Translated from Figure 3-40 of The PowerPC Compiler Writer's Guide
-
-UINT32
-__udivsi3(UINT32 n, UINT32 d)
-{
- const unsigned n_uword_bits = sizeof(UINT32) * CHAR_BIT;
- UINT32 q;
- UINT32 r;
- unsigned sr;
-
- // special cases
- if (d == 0) {
-// ASSERT (FALSE);
- return 0; // ?!
- }
- if (n == 0)
- return 0;
-
- sr = COUNT_LEADING_ZEROS(d) - COUNT_LEADING_ZEROS(n);
- // 0 <= sr <= n_uword_bits - 1 or sr large
- if (sr > n_uword_bits - 1) // d > r
- return 0;
- if (sr == n_uword_bits - 1) // d == 1
- return n;
- ++sr;
- // 1 <= sr <= n_uword_bits - 1
- // Not a special case
- q = n << (n_uword_bits - sr);
- r = n >> sr;
- UINT32 carry = 0;
- for (; sr > 0; --sr)
- {
- // r:q = ((r:q) << 1) | carry
- r = (r << 1) | (q >> (n_uword_bits - 1));
- q = (q << 1) | carry;
- // carry = 0;
- // if (r.all >= d.all)
- // {
- // r.all -= d.all;
- // carry = 1;
- // }
- const INT32 s = (INT32)(d - r - 1) >> (n_uword_bits - 1);
- carry = s & 1;
- r -= d & s;
- }
- q = (q << 1) | carry;
- return q;
-}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.S deleted file mode 100644 index 4481c6d677..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.S +++ /dev/null @@ -1,267 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
-
- .text
- .align 2
- GCC_ASM_EXPORT(__aeabi_uldivmod)
-
-//
-//UINT64
-//EFIAPI
-//__aeabi_uldivmod (
-// IN UINT64 Dividend
-// IN UINT64 Divisor
-// )
-//
-ASM_PFX(__aeabi_uldivmod):
- stmdb sp!, {r4, r5, r6, lr}
- mov r4, r1
- mov r5, r0
- mov r6, #0 // 0x0
- orrs ip, r3, r2, lsr #31
- bne ASM_PFX(__aeabi_uldivmod_label1)
- tst r2, r2
- beq ASM_PFX(_ll_div0)
- movs ip, r2, lsr #15
- addeq r6, r6, #16 // 0x10
- mov ip, r2, lsl r6
- movs lr, ip, lsr #23
- moveq ip, ip, lsl #8
- addeq r6, r6, #8 // 0x8
- movs lr, ip, lsr #27
- moveq ip, ip, lsl #4
- addeq r6, r6, #4 // 0x4
- movs lr, ip, lsr #29
- moveq ip, ip, lsl #2
- addeq r6, r6, #2 // 0x2
- movs lr, ip, lsr #30
- moveq ip, ip, lsl #1
- addeq r6, r6, #1 // 0x1
- b ASM_PFX(_ll_udiv_small)
-ASM_PFX(__aeabi_uldivmod_label1):
- tst r3, #-2147483648 // 0x80000000
- bne ASM_PFX(__aeabi_uldivmod_label2)
- movs ip, r3, lsr #15
- addeq r6, r6, #16 // 0x10
- mov ip, r3, lsl r6
- movs lr, ip, lsr #23
- moveq ip, ip, lsl #8
- addeq r6, r6, #8 // 0x8
- movs lr, ip, lsr #27
- moveq ip, ip, lsl #4
- addeq r6, r6, #4 // 0x4
- movs lr, ip, lsr #29
- moveq ip, ip, lsl #2
- addeq r6, r6, #2 // 0x2
- movs lr, ip, lsr #30
- addeq r6, r6, #1 // 0x1
- rsb r3, r6, #32 // 0x20
- moveq ip, ip, lsl #1
- orr ip, ip, r2, lsr r3
- mov lr, r2, lsl r6
- b ASM_PFX(_ll_udiv_big)
-ASM_PFX(__aeabi_uldivmod_label2):
- mov ip, r3
- mov lr, r2
- b ASM_PFX(_ll_udiv_ginormous)
-
-ASM_PFX(_ll_udiv_small):
- cmp r4, ip, lsl #1
- mov r3, #0 // 0x0
- subcs r4, r4, ip, lsl #1
- addcs r3, r3, #2 // 0x2
- cmp r4, ip
- subcs r4, r4, ip
- adcs r3, r3, #0 // 0x0
- add r2, r6, #32 // 0x20
- cmp r2, #32 // 0x20
- rsb ip, ip, #0 // 0x0
- bcc ASM_PFX(_ll_udiv_small_label1)
- orrs r0, r4, r5, lsr #30
- moveq r4, r5
- moveq r5, #0 // 0x0
- subeq r2, r2, #32 // 0x20
-ASM_PFX(_ll_udiv_small_label1):
- mov r1, #0 // 0x0
- cmp r2, #16 // 0x10
- bcc ASM_PFX(_ll_udiv_small_label2)
- movs r0, r4, lsr #14
- moveq r4, r4, lsl #16
- addeq r1, r1, #16 // 0x10
-ASM_PFX(_ll_udiv_small_label2):
- sub lr, r2, r1
- cmp lr, #8 // 0x8
- bcc ASM_PFX(_ll_udiv_small_label3)
- movs r0, r4, lsr #22
- moveq r4, r4, lsl #8
- addeq r1, r1, #8 // 0x8
-ASM_PFX(_ll_udiv_small_label3):
- rsb r0, r1, #32 // 0x20
- sub r2, r2, r1
- orr r4, r4, r5, lsr r0
- mov r5, r5, lsl r1
- cmp r2, #1 // 0x1
- bcc ASM_PFX(_ll_udiv_small_label5)
- sub r2, r2, #1 // 0x1
- and r0, r2, #7 // 0x7
- eor r0, r0, #7 // 0x7
- adds r0, r0, r0, lsl #1
- add pc, pc, r0, lsl #2
- nop // (mov r0,r0)
-ASM_PFX(_ll_udiv_small_label4):
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- rsbcc r4, ip, r4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- rsbcc r4, ip, r4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- rsbcc r4, ip, r4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- rsbcc r4, ip, r4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- rsbcc r4, ip, r4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- rsbcc r4, ip, r4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- rsbcc r4, ip, r4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- sub r2, r2, #8 // 0x8
- tst r2, r2
- rsbcc r4, ip, r4
- bpl ASM_PFX(_ll_udiv_small_label4)
-ASM_PFX(_ll_udiv_small_label5):
- mov r2, r4, lsr r6
- bic r4, r4, r2, lsl r6
- adcs r0, r5, r5
- adc r1, r4, r4
- add r1, r1, r3, lsl r6
- mov r3, #0 // 0x0
- ldmia sp!, {r4, r5, r6, pc}
-
-ASM_PFX(_ll_udiv_big):
- subs r0, r5, lr
- mov r3, #0 // 0x0
- sbcs r1, r4, ip
- movcs r5, r0
- movcs r4, r1
- adcs r3, r3, #0 // 0x0
- subs r0, r5, lr
- sbcs r1, r4, ip
- movcs r5, r0
- movcs r4, r1
- adcs r3, r3, #0 // 0x0
- subs r0, r5, lr
- sbcs r1, r4, ip
- movcs r5, r0
- movcs r4, r1
- adcs r3, r3, #0 // 0x0
- mov r1, #0 // 0x0
- rsbs lr, lr, #0 // 0x0
- rsc ip, ip, #0 // 0x0
- cmp r6, #16 // 0x10
- bcc ASM_PFX(_ll_udiv_big_label1)
- movs r0, r4, lsr #14
- moveq r4, r4, lsl #16
- addeq r1, r1, #16 // 0x10
-ASM_PFX(_ll_udiv_big_label1):
- sub r2, r6, r1
- cmp r2, #8 // 0x8
- bcc ASM_PFX(_ll_udiv_big_label2)
- movs r0, r4, lsr #22
- moveq r4, r4, lsl #8
- addeq r1, r1, #8 // 0x8
-ASM_PFX(_ll_udiv_big_label2):
- rsb r0, r1, #32 // 0x20
- sub r2, r6, r1
- orr r4, r4, r5, lsr r0
- mov r5, r5, lsl r1
- cmp r2, #1 // 0x1
- bcc ASM_PFX(_ll_udiv_big_label4)
- sub r2, r2, #1 // 0x1
- and r0, r2, #3 // 0x3
- rsb r0, r0, #3 // 0x3
- adds r0, r0, r0, lsl #1
- add pc, pc, r0, lsl #3
- nop // (mov r0,r0)
-ASM_PFX(_ll_udiv_big_label3):
- adcs r5, r5, r5
- adcs r4, r4, r4
- adcs r0, lr, r5
- adcs r1, ip, r4
- movcs r5, r0
- movcs r4, r1
- adcs r5, r5, r5
- adcs r4, r4, r4
- adcs r0, lr, r5
- adcs r1, ip, r4
- movcs r5, r0
- movcs r4, r1
- adcs r5, r5, r5
- adcs r4, r4, r4
- adcs r0, lr, r5
- adcs r1, ip, r4
- movcs r5, r0
- movcs r4, r1
- sub r2, r2, #4 // 0x4
- adcs r5, r5, r5
- adcs r4, r4, r4
- adcs r0, lr, r5
- adcs r1, ip, r4
- tst r2, r2
- movcs r5, r0
- movcs r4, r1
- bpl ASM_PFX(_ll_udiv_big_label3)
-ASM_PFX(_ll_udiv_big_label4):
- mov r1, #0 // 0x0
- mov r2, r5, lsr r6
- bic r5, r5, r2, lsl r6
- adcs r0, r5, r5
- adc r1, r1, #0 // 0x0
- movs lr, r3, lsl r6
- mov r3, r4, lsr r6
- bic r4, r4, r3, lsl r6
- adc r1, r1, #0 // 0x0
- adds r0, r0, lr
- orr r2, r2, r4, ror r6
- adc r1, r1, #0 // 0x0
- ldmia sp!, {r4, r5, r6, pc}
-
-ASM_PFX(_ll_udiv_ginormous):
- subs r2, r5, lr
- mov r1, #0 // 0x0
- sbcs r3, r4, ip
- adc r0, r1, r1
- movcc r2, r5
- movcc r3, r4
- ldmia sp!, {r4, r5, r6, pc}
-
-ASM_PFX(_ll_div0):
- ldmia sp!, {r4, r5, r6, lr}
- mov r0, #0 // 0x0
- mov r1, #0 // 0x0
- b ASM_PFX(__aeabi_ldiv0)
-
-ASM_PFX(__aeabi_ldiv0):
- bx r14
-
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.asm deleted file mode 100644 index 6b6184ebd3..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.asm +++ /dev/null @@ -1,267 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
-
-
- INCLUDE AsmMacroExport.inc
-
-;
-;UINT64
-;EFIAPI
-;__aeabi_uldivmod (
-; IN UINT64 Dividend
-; IN UINT64 Divisor
-; )
-;
- RVCT_ASM_EXPORT __aeabi_uldivmod
- stmdb sp!, {r4, r5, r6, lr}
- mov r4, r1
- mov r5, r0
- mov r6, #0 ; 0x0
- orrs ip, r3, r2, lsr #31
- bne __aeabi_uldivmod_label1
- tst r2, r2
- beq _ll_div0
- movs ip, r2, lsr #15
- addeq r6, r6, #16 ; 0x10
- mov ip, r2, lsl r6
- movs lr, ip, lsr #23
- moveq ip, ip, lsl #8
- addeq r6, r6, #8 ; 0x8
- movs lr, ip, lsr #27
- moveq ip, ip, lsl #4
- addeq r6, r6, #4 ; 0x4
- movs lr, ip, lsr #29
- moveq ip, ip, lsl #2
- addeq r6, r6, #2 ; 0x2
- movs lr, ip, lsr #30
- moveq ip, ip, lsl #1
- addeq r6, r6, #1 ; 0x1
- b _ll_udiv_small
-__aeabi_uldivmod_label1
- tst r3, #-2147483648 ; 0x80000000
- bne __aeabi_uldivmod_label2
- movs ip, r3, lsr #15
- addeq r6, r6, #16 ; 0x10
- mov ip, r3, lsl r6
- movs lr, ip, lsr #23
- moveq ip, ip, lsl #8
- addeq r6, r6, #8 ; 0x8
- movs lr, ip, lsr #27
- moveq ip, ip, lsl #4
- addeq r6, r6, #4 ; 0x4
- movs lr, ip, lsr #29
- moveq ip, ip, lsl #2
- addeq r6, r6, #2 ; 0x2
- movs lr, ip, lsr #30
- addeq r6, r6, #1 ; 0x1
- rsb r3, r6, #32 ; 0x20
- moveq ip, ip, lsl #1
- orr ip, ip, r2, lsr r3
- mov lr, r2, lsl r6
- b _ll_udiv_big
-__aeabi_uldivmod_label2
- mov ip, r3
- mov lr, r2
- b _ll_udiv_ginormous
-
-_ll_udiv_small
- cmp r4, ip, lsl #1
- mov r3, #0 ; 0x0
- subcs r4, r4, ip, lsl #1
- addcs r3, r3, #2 ; 0x2
- cmp r4, ip
- subcs r4, r4, ip
- adcs r3, r3, #0 ; 0x0
- add r2, r6, #32 ; 0x20
- cmp r2, #32 ; 0x20
- rsb ip, ip, #0 ; 0x0
- bcc _ll_udiv_small_label1
- orrs r0, r4, r5, lsr #30
- moveq r4, r5
- moveq r5, #0 ; 0x0
- subeq r2, r2, #32 ; 0x20
-_ll_udiv_small_label1
- mov r1, #0 ; 0x0
- cmp r2, #16 ; 0x10
- bcc _ll_udiv_small_label2
- movs r0, r4, lsr #14
- moveq r4, r4, lsl #16
- addeq r1, r1, #16 ; 0x10
-_ll_udiv_small_label2
- sub lr, r2, r1
- cmp lr, #8 ; 0x8
- bcc _ll_udiv_small_label3
- movs r0, r4, lsr #22
- moveq r4, r4, lsl #8
- addeq r1, r1, #8 ; 0x8
-_ll_udiv_small_label3
- rsb r0, r1, #32 ; 0x20
- sub r2, r2, r1
- orr r4, r4, r5, lsr r0
- mov r5, r5, lsl r1
- cmp r2, #1 ; 0x1
- bcc _ll_udiv_small_label5
- sub r2, r2, #1 ; 0x1
- and r0, r2, #7 ; 0x7
- eor r0, r0, #7 ; 0x7
- adds r0, r0, r0, lsl #1
- add pc, pc, r0, lsl #2
- nop ; (mov r0,r0)
-_ll_udiv_small_label4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- rsbcc r4, ip, r4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- rsbcc r4, ip, r4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- rsbcc r4, ip, r4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- rsbcc r4, ip, r4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- rsbcc r4, ip, r4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- rsbcc r4, ip, r4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- rsbcc r4, ip, r4
- adcs r5, r5, r5
- adcs r4, ip, r4, lsl #1
- sub r2, r2, #8 ; 0x8
- tst r2, r2
- rsbcc r4, ip, r4
- bpl _ll_udiv_small_label4
-_ll_udiv_small_label5
- mov r2, r4, lsr r6
- bic r4, r4, r2, lsl r6
- adcs r0, r5, r5
- adc r1, r4, r4
- add r1, r1, r3, lsl r6
- mov r3, #0 ; 0x0
- ldmia sp!, {r4, r5, r6, pc}
-
-_ll_udiv_big
- subs r0, r5, lr
- mov r3, #0 ; 0x0
- sbcs r1, r4, ip
- movcs r5, r0
- movcs r4, r1
- adcs r3, r3, #0 ; 0x0
- subs r0, r5, lr
- sbcs r1, r4, ip
- movcs r5, r0
- movcs r4, r1
- adcs r3, r3, #0 ; 0x0
- subs r0, r5, lr
- sbcs r1, r4, ip
- movcs r5, r0
- movcs r4, r1
- adcs r3, r3, #0 ; 0x0
- mov r1, #0 ; 0x0
- rsbs lr, lr, #0 ; 0x0
- rsc ip, ip, #0 ; 0x0
- cmp r6, #16 ; 0x10
- bcc _ll_udiv_big_label1
- movs r0, r4, lsr #14
- moveq r4, r4, lsl #16
- addeq r1, r1, #16 ; 0x10
-_ll_udiv_big_label1
- sub r2, r6, r1
- cmp r2, #8 ; 0x8
- bcc _ll_udiv_big_label2
- movs r0, r4, lsr #22
- moveq r4, r4, lsl #8
- addeq r1, r1, #8 ; 0x8
-_ll_udiv_big_label2
- rsb r0, r1, #32 ; 0x20
- sub r2, r6, r1
- orr r4, r4, r5, lsr r0
- mov r5, r5, lsl r1
- cmp r2, #1 ; 0x1
- bcc _ll_udiv_big_label4
- sub r2, r2, #1 ; 0x1
- and r0, r2, #3 ; 0x3
- rsb r0, r0, #3 ; 0x3
- adds r0, r0, r0, lsl #1
- add pc, pc, r0, lsl #3
- nop ; (mov r0,r0)
-_ll_udiv_big_label3
- adcs r5, r5, r5
- adcs r4, r4, r4
- adcs r0, lr, r5
- adcs r1, ip, r4
- movcs r5, r0
- movcs r4, r1
- adcs r5, r5, r5
- adcs r4, r4, r4
- adcs r0, lr, r5
- adcs r1, ip, r4
- movcs r5, r0
- movcs r4, r1
- adcs r5, r5, r5
- adcs r4, r4, r4
- adcs r0, lr, r5
- adcs r1, ip, r4
- movcs r5, r0
- movcs r4, r1
- sub r2, r2, #4 ; 0x4
- adcs r5, r5, r5
- adcs r4, r4, r4
- adcs r0, lr, r5
- adcs r1, ip, r4
- tst r2, r2
- movcs r5, r0
- movcs r4, r1
- bpl _ll_udiv_big_label3
-_ll_udiv_big_label4
- mov r1, #0 ; 0x0
- mov r2, r5, lsr r6
- bic r5, r5, r2, lsl r6
- adcs r0, r5, r5
- adc r1, r1, #0 ; 0x0
- movs lr, r3, lsl r6
- mov r3, r4, lsr r6
- bic r4, r4, r3, lsl r6
- adc r1, r1, #0 ; 0x0
- adds r0, r0, lr
- orr r2, r2, r4, ror r6
- adc r1, r1, #0 ; 0x0
- ldmia sp!, {r4, r5, r6, pc}
-
-_ll_udiv_ginormous
- subs r2, r5, lr
- mov r1, #0 ; 0x0
- sbcs r3, r4, ip
- adc r0, r1, r1
- movcc r2, r5
- movcc r3, r4
- ldmia sp!, {r4, r5, r6, pc}
-
-_ll_div0
- ldmia sp!, {r4, r5, r6, lr}
- mov r0, #0 ; 0x0
- mov r1, #0 ; 0x0
- b __aeabi_ldiv0
-
-__aeabi_ldiv0
- BX r14
-
- END
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldivmod.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldivmod.c deleted file mode 100644 index 8887938362..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldivmod.c +++ /dev/null @@ -1,43 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "Llvm_int_lib.h"
-#include <Library/BaseLib.h>
-
-
-UINT32 __udivsi3(UINT32 n, UINT32 d);
-UINT32 __umodsi3(UINT32 a, UINT32 b);
-
-
-UINT64
-__aeabi_uidivmod(unsigned numerator, unsigned denominator)
-{
- UINT64 Return;
-
- Return = __udivsi3 (numerator, denominator);
- Return |= LShiftU64 (__umodsi3 (numerator, denominator), 32);
-
- return Return;
-}
-
-unsigned
-__aeabi_uidiv (unsigned n, unsigned d)
-{
- return __udivsi3 (n, d);
-}
-
-
-
-
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S deleted file mode 100644 index 3edff1b715..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S +++ /dev/null @@ -1,27 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(__umoddi3)
- stmfd sp!, {r7, lr}
- add r7, sp, #0
- sub sp, sp, #16
- add ip, sp, #8
- str ip, [sp, #0]
- bl ASM_PFX(__udivmoddi4)
- ldrd r0, [sp, #8]
- sub sp, r7, #0
- ldmfd sp!, {r7, pc}
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.c deleted file mode 100644 index 2a2ec61fd1..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.c +++ /dev/null @@ -1,72 +0,0 @@ -/** @file
- Compiler intrinsic for 64-bit unsigned mod, ported from LLVM code.
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-
-#include "Llvm_int_lib.h"
-
-UINT64 __udivmoddi4(UINT64 a, UINT64 b, UINT64* rem);
-
-// Returns: a % b
-
-UINT64
-__umoddi3(UINT64 a, UINT64 b)
-{
- UINT64 r;
- __udivmoddi4(a, b, &r);
- return r;
-}
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S deleted file mode 100644 index 2a300601d0..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S +++ /dev/null @@ -1,26 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-ASM_FUNC(__umodsi3)
- stmfd sp!, {r4, r5, r7, lr}
- add r7, sp, #8
- mov r5, r0
- mov r4, r1
- bl ASM_PFX(__udivsi3)
- mul r0, r4, r0
- rsb r0, r0, r5
- ldmfd sp!, {r4, r5, r7, pc}
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.c b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.c deleted file mode 100644 index d0a5b76f40..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.c +++ /dev/null @@ -1,68 +0,0 @@ -/** @file
- Compiler intrinsic for 32-bit unsigned mod, ported from LLVM code.
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-/**
- University of Illinois/NCSA
- Open Source License
-
- Copyright (c) 2003-2008 University of Illinois at Urbana-Champaign.
- All rights reserved.
-
- Developed by:
-
- LLVM Team
-
- University of Illinois at Urbana-Champaign
-
- http://llvm.org
-
- Permission is hereby granted, free of charge, to any person obtaining a copy of
- this software and associated documentation files (the "Software"), to deal with
- the Software without restriction, including without limitation the rights to
- use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
- of the Software, and to permit persons to whom the Software is furnished to do
- so, subject to the following conditions:
-
- * Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimers.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimers in the
- documentation and/or other materials provided with the distribution.
-
- * Neither the names of the LLVM Team, University of Illinois at
- Urbana-Champaign, nor the names of its contributors may be used to
- endorse or promote products derived from this Software without specific
- prior written permission.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
- SOFTWARE.
-**/
-
-
-#include "Llvm_int_lib.h"
-
-
-// Returns: a % b
-
-UINT32
-__umodsi3(UINT32 a, UINT32 b)
-{
- return a - (a / b) * b;
-}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uread.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uread.asm deleted file mode 100644 index f369e4d251..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uread.asm +++ /dev/null @@ -1,64 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
-
-
- INCLUDE AsmMacroExport.inc
-
-;
-;UINT32
-;EFIAPI
-;__aeabi_uread4 (
-; IN VOID *Pointer
-; );
-;
- RVCT_ASM_EXPORT __aeabi_uread4
- ldrb r1, [r0]
- ldrb r2, [r0, #1]
- ldrb r3, [r0, #2]
- ldrb r0, [r0, #3]
- orr r1, r1, r2, lsl #8
- orr r1, r1, r3, lsl #16
- orr r0, r1, r0, lsl #24
- bx lr
-
-;
-;UINT64
-;EFIAPI
-;__aeabi_uread8 (
-; IN VOID *Pointer
-; );
-;
- RVCT_ASM_EXPORT __aeabi_uread8
- mov r3, r0
-
- ldrb r1, [r3]
- ldrb r2, [r3, #1]
- orr r1, r1, r2, lsl #8
- ldrb r2, [r3, #2]
- orr r1, r1, r2, lsl #16
- ldrb r0, [r3, #3]
- orr r0, r1, r0, lsl #24
-
- ldrb r1, [r3, #4]
- ldrb r2, [r3, #5]
- orr r1, r1, r2, lsl #8
- ldrb r2, [r3, #6]
- orr r1, r1, r2, lsl #16
- ldrb r2, [r3, #7]
- orr r1, r1, r2, lsl #24
-
- bx lr
- END
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uwrite.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uwrite.asm deleted file mode 100644 index 434a652f78..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uwrite.asm +++ /dev/null @@ -1,66 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-
-
- INCLUDE AsmMacroExport.inc
-
-;
-;UINT32
-;EFIAPI
-;__aeabi_uwrite4 (
-; IN UINT32 Data,
-; IN VOID *Pointer
-; );
-;
-;
- RVCT_ASM_EXPORT __aeabi_uwrite4
- mov r2, r0, lsr #8
- strb r0, [r1]
- strb r2, [r1, #1]
- mov r2, r0, lsr #16
- strb r2, [r1, #2]
- mov r2, r0, lsr #24
- strb r2, [r1, #3]
- bx lr
-
-;
-;UINT64
-;EFIAPI
-;__aeabi_uwrite8 (
-; IN UINT64 Data, //r0-r1
-; IN VOID *Pointer //r2
-; );
-;
-;
- RVCT_ASM_EXPORT __aeabi_uwrite8
- mov r3, r0, lsr #8
- strb r0, [r2]
- strb r3, [r2, #1]
- mov r3, r0, lsr #16
- strb r3, [r2, #2]
- mov r3, r0, lsr #24
- strb r3, [r2, #3]
-
- mov r3, r1, lsr #8
- strb r1, [r2, #4]
- strb r3, [r2, #5]
- mov r3, r1, lsr #16
- strb r3, [r2, #6]
- mov r3, r1, lsr #24
- strb r3, [r2, #7]
- bx lr
-
- END
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf b/ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf deleted file mode 100644 index 44333141a7..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf +++ /dev/null @@ -1,103 +0,0 @@ -#/** @file
-# Base Library implementation.
-#
-# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CompilerIntrinsicsLib
- FILE_GUID = 855274FA-3575-4C20-9709-C031DC5589FA
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = CompilerIntrinsicsLib
-
-[Sources]
- memcpy.c
- memset.c
-
-[Sources.ARM]
- Arm/mullu.asm | RVCT
- Arm/switch.asm | RVCT
- Arm/llsr.asm | RVCT
- Arm/memmove.asm | RVCT
- Arm/uread.asm | RVCT
- Arm/uwrite.asm | RVCT
- Arm/lasr.asm | RVCT
- Arm/llsl.asm | RVCT
- Arm/div.asm | RVCT
- Arm/uldiv.asm | RVCT
- Arm/ldivmod.asm | RVCT
-
-
-#
-# Move .c to .s to work around LLVM issues
-#
-# Arm/ashrdi3.c | GCC
-# Arm/ashldi3.c | GCC
-# Arm/divdi3.c | GCC
-# Arm/divsi3.c | GCC
-# Arm/lshrdi3.c | GCC
- Arm/ashrdi3.S | GCC
- Arm/ashldi3.S | GCC
- Arm/div.S | GCC
- Arm/divdi3.S | GCC
- Arm/divsi3.S | GCC
- Arm/lshrdi3.S | GCC
-
- Arm/memmove.S | GCC
-
-# Arm/modsi3.c | GCC
-# Arm/moddi3.c | GCC
-# Arm/muldi3.c | GCC
- Arm/modsi3.S | GCC
- Arm/moddi3.S | GCC
- Arm/muldi3.S | GCC
- Arm/mullu.S | GCC
-
-# Arm/udivsi3.c | GCC
-# Arm/umodsi3.c | GCC
-# Arm/udivdi3.c | GCC
-# Arm/umoddi3.c | GCC
-# Arm/udivmoddi4.c | GCC
- Arm/udivsi3.S | GCC
- Arm/umodsi3.S | GCC
- Arm/udivdi3.S | GCC
- Arm/umoddi3.S | GCC
- Arm/udivmoddi4.S | GCC
-
-# Arm/clzsi2.c | GCC
-# Arm/ctzsi2.c | GCC
-# Arm/ucmpdi2.c | GCC
- Arm/clzsi2.S | GCC
- Arm/ctzsi2.S | GCC
- Arm/ucmpdi2.S | GCC
- Arm/switch8.S | GCC
- Arm/switchu8.S | GCC
- Arm/switch16.S | GCC
- Arm/switch32.S | GCC
-
- Arm/sourcery.S | GCC
- Arm/uldiv.S | GCC
- Arm/ldivmod.S | GCC
-
- Arm/llsr.S | GCC
- Arm/llsl.S | GCC
-
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c b/ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c deleted file mode 100644 index a944e00b89..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c +++ /dev/null @@ -1,44 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
-//
-// This program and the accompanying materials are licensed and made
-// available under the terms and conditions of the BSD License which
-// accompanies this distribution. The full text of the license may be
-// found at http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
-// IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-typedef __SIZE_TYPE__ size_t;
-
-static __attribute__((__used__))
-void *__memcpy(void *dest, const void *src, size_t n)
-{
- unsigned char *d = dest;
- unsigned char const *s = src;
-
- while (n--)
- *d++ = *s++;
-
- return dest;
-}
-
-__attribute__((__alias__("__memcpy")))
-void *memcpy(void *dest, const void *src, size_t n);
-
-#ifdef __arm__
-
-__attribute__((__alias__("__memcpy")))
-void __aeabi_memcpy(void *dest, const void *src, size_t n);
-
-__attribute__((__alias__("__memcpy")))
-void __aeabi_memcpy4(void *dest, const void *src, size_t n);
-
-__attribute__((__alias__("__memcpy")))
-void __aeabi_memcpy8(void *dest, const void *src, size_t n);
-
-#endif
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/memset.c b/ArmPkg/Library/CompilerIntrinsicsLib/memset.c deleted file mode 100644 index 7271b4be6f..0000000000 --- a/ArmPkg/Library/CompilerIntrinsicsLib/memset.c +++ /dev/null @@ -1,62 +0,0 @@ -//------------------------------------------------------------------------------ -// -// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR> -// -// This program and the accompanying materials are licensed and made -// available under the terms and conditions of the BSD License which -// accompanies this distribution. The full text of the license may be -// found at http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR -// IMPLIED. -// -//------------------------------------------------------------------------------ - -typedef __SIZE_TYPE__ size_t; - -static __attribute__((__used__)) -void *__memset(void *s, int c, size_t n) -{ - unsigned char *d = s; - - while (n--) - *d++ = c; - - return s; -} - -// -// Other modules (such as CryptoPkg/IntrinsicLib) may provide another -// implementation of memset(), which may conflict with this one if this -// object was pulled into the link due to the definitions below. So make -// our memset() 'weak' to let the other implementation take precedence. -// -__attribute__((__weak__, __alias__("__memset"))) -void *memset(void *dest, int c, size_t n); - -#ifdef __arm__ - -void __aeabi_memset(void *dest, size_t n, int c) -{ - __memset(dest, c, n); -} - -__attribute__((__alias__("__aeabi_memset"))) -void __aeabi_memset4(void *dest, size_t n, int c); - -__attribute__((__alias__("__aeabi_memset"))) -void __aeabi_memset8(void *dest, size_t n, int c); - -void __aeabi_memclr(void *dest, size_t n) -{ - __memset(dest, 0, n); -} - -__attribute__((__alias__("__aeabi_memclr"))) -void __aeabi_memclr4(void *dest, size_t n); - -__attribute__((__alias__("__aeabi_memclr"))) -void __aeabi_memclr8(void *dest, size_t n); - -#endif diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/AArch64/DebugAgentException.S b/ArmPkg/Library/DebugAgentSymbolsBaseLib/AArch64/DebugAgentException.S deleted file mode 100644 index f33a07a19b..0000000000 --- a/ArmPkg/Library/DebugAgentSymbolsBaseLib/AArch64/DebugAgentException.S +++ /dev/null @@ -1,96 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <Chipset/AArch64.h>
-
-GCC_ASM_IMPORT(DefaultExceptionHandler)
-
-.text
-VECTOR_BASE(DebugAgentVectorTable)
-
-//
-// Current EL with SP0 : 0x0 - 0x180
-//
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SP0_SYNC)
-ASM_PFX(SynchronousExceptionSP0):
- b ASM_PFX(SynchronousExceptionSP0)
-
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SP0_IRQ)
-ASM_PFX(IrqSP0):
- b ASM_PFX(IrqSP0)
-
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SP0_FIQ)
-ASM_PFX(FiqSP0):
- b ASM_PFX(FiqSP0)
-
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SP0_SERR)
-ASM_PFX(SErrorSP0):
- b ASM_PFX(SErrorSP0)
-
-//
-// Current EL with SPx: 0x200 - 0x380
-//
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SPx_SYNC)
-ASM_PFX(SynchronousExceptionSPx):
- b ASM_PFX(SynchronousExceptionSPx)
-
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SPx_IRQ)
-ASM_PFX(IrqSPx):
- b ASM_PFX(IrqSPx)
-
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SPx_FIQ)
-ASM_PFX(FiqSPx):
- b ASM_PFX(FiqSPx)
-
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SPx_SERR)
-ASM_PFX(SErrorSPx):
- b ASM_PFX(SErrorSPx)
-
-/* Lower EL using AArch64 : 0x400 - 0x580 */
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A64_SYNC)
-ASM_PFX(SynchronousExceptionA64):
- b ASM_PFX(SynchronousExceptionA64)
-
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A64_IRQ)
-ASM_PFX(IrqA64):
- b ASM_PFX(IrqA64)
-
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A64_FIQ)
-ASM_PFX(FiqA64):
- b ASM_PFX(FiqA64)
-
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A64_SERR)
-ASM_PFX(SErrorA64):
- b ASM_PFX(SErrorA64)
-
-//
-// Lower EL using AArch32 : 0x600 - 0x780
-//
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A32_SYNC)
-ASM_PFX(SynchronousExceptionA32):
- b ASM_PFX(SynchronousExceptionA32)
-
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A32_IRQ)
-ASM_PFX(IrqA32):
- b ASM_PFX(IrqA32)
-
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A32_FIQ)
-ASM_PFX(FiqA32):
- b ASM_PFX(FiqA32)
-
-VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A32_SERR)
-ASM_PFX(SErrorA32):
- b ASM_PFX(SErrorA32)
-
-VECTOR_END(DebugAgentVectorTable)
diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S b/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S deleted file mode 100644 index 2151814608..0000000000 --- a/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S +++ /dev/null @@ -1,277 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <Library/PcdLib.h>
-
-/*
-
-This is the stack constructed by the exception handler (low address to high address)
- # R0 - IFAR is EFI_SYSTEM_CONTEXT for ARM
- Reg Offset
- === ======
- R0 0x00 # stmfd SP!,{R0-R12}
- R1 0x04
- R2 0x08
- R3 0x0c
- R4 0x10
- R5 0x14
- R6 0x18
- R7 0x1c
- R8 0x20
- R9 0x24
- R10 0x28
- R11 0x2c
- R12 0x30
- SP 0x34 # reserved via adding 0x20 (32) to the SP
- LR 0x38
- PC 0x3c
- CPSR 0x40
- DFSR 0x44
- DFAR 0x48
- IFSR 0x4c
- IFAR 0x50
-
- LR 0x54 # SVC Link register (we need to restore it)
-
- LR 0x58 # pushed by srsfd
- CPSR 0x5c
-
- */
-
-GCC_ASM_EXPORT(DebugAgentVectorTable)
-GCC_ASM_IMPORT(DefaultExceptionHandler)
-
-.text
-.syntax unified
-#if !defined(__APPLE__)
-.fpu neon @ makes vpush/vpop assemble
-#endif
-.align 5
-
-
-//
-// This code gets copied to the ARM vector table
-// ExceptionHandlersStart - ExceptionHandlersEnd gets copied
-//
-ASM_PFX(DebugAgentVectorTable):
- b ASM_PFX(ResetEntry)
- b ASM_PFX(UndefinedInstructionEntry)
- b ASM_PFX(SoftwareInterruptEntry)
- b ASM_PFX(PrefetchAbortEntry)
- b ASM_PFX(DataAbortEntry)
- b ASM_PFX(ReservedExceptionEntry)
- b ASM_PFX(IrqEntry)
- b ASM_PFX(FiqEntry)
-
-ASM_PFX(ResetEntry):
- srsdb #0x13! @ Store return state on SVC stack
- @ We are already in SVC mode
-
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
-
- mov R0,#0 @ ExceptionType
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-ASM_PFX(UndefinedInstructionEntry):
- sub LR, LR, #4 @ Only -2 for Thumb, adjust in CommonExceptionEntry
- srsdb #0x13! @ Store return state on SVC stack
- cps #0x13 @ Switch to SVC for common stack
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
-
- mov R0,#1 @ ExceptionType
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-ASM_PFX(SoftwareInterruptEntry):
- sub LR, LR, #4 @ Only -2 for Thumb, adjust in CommonExceptionEntry
- srsdb #0x13! @ Store return state on SVC stack
- @ We are already in SVC mode
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
-
- mov R0,#2 @ ExceptionType
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-ASM_PFX(PrefetchAbortEntry):
- sub LR,LR,#4
- srsdb #0x13! @ Store return state on SVC stack
- cps #0x13 @ Switch to SVC for common stack
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
-
- mov R0,#3 @ ExceptionType
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-ASM_PFX(DataAbortEntry):
- sub LR,LR,#8
- srsdb #0x13! @ Store return state on SVC stack
- cps #0x13 @ Switch to SVC for common stack
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
-
- mov R0,#4
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-ASM_PFX(ReservedExceptionEntry):
- srsdb #0x13! @ Store return state on SVC stack
- cps #0x13 @ Switch to SVC for common stack
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
-
- mov R0,#5
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-ASM_PFX(IrqEntry):
- sub LR,LR,#4
- srsdb #0x13! @ Store return state on SVC stack
- cps #0x13 @ Switch to SVC for common stack
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
-
- mov R0,#6 @ ExceptionType
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-ASM_PFX(FiqEntry):
- sub LR,LR,#4
- srsdb #0x13! @ Store return state on SVC stack
- cps #0x13 @ Switch to SVC for common stack
- stmfd SP!,{LR} @ Store the link register for the current mode
- sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} @ Store the register state
- @ Since we have already switch to SVC R8_fiq - R12_fiq
- @ never get used or saved
- mov R0,#7 @ ExceptionType
- ldr R1,ASM_PFX(CommonExceptionEntry)
- bx R1
-
-//
-// This gets patched by the C code that patches in the vector table
-//
-ASM_PFX(CommonExceptionEntry):
- .word ASM_PFX(AsmCommonExceptionEntry)
-
-ASM_PFX(ExceptionHandlersEnd):
-
-//
-// This code runs from CpuDxe driver loaded address. It is patched into
-// CommonExceptionEntry.
-//
-ASM_PFX(AsmCommonExceptionEntry):
- mrc p15, 0, R1, c6, c0, 2 @ Read IFAR
- str R1, [SP, #0x50] @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR
-
- mrc p15, 0, R1, c5, c0, 1 @ Read IFSR
- str R1, [SP, #0x4c] @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFSR
-
- mrc p15, 0, R1, c6, c0, 0 @ Read DFAR
- str R1, [SP, #0x48] @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFAR
-
- mrc p15, 0, R1, c5, c0, 0 @ Read DFSR
- str R1, [SP, #0x44] @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFSR
-
- ldr R1, [SP, #0x5c] @ srsdb saved pre-exception CPSR on the stack
- str R1, [SP, #0x40] @ Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR
-
- add R2, SP, #0x38 @ Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
- and R3, R1, #0x1f @ Check CPSR to see if User or System Mode
- cmp R3, #0x1f @ if ((CPSR == 0x10) || (CPSR == 0x1df))
- cmpne R3, #0x10 @
- stmdaeq R2, {lr}^ @ save unbanked lr
- @ else
- stmdane R2, {lr} @ save SVC lr
-
-
- ldr R5, [SP, #0x58] @ PC is the LR pushed by srsfd
- @ Check to see if we have to adjust for Thumb entry
- sub r4, r0, #1 @ if (ExceptionType == 1 || ExceptionType ==2)) {
- cmp r4, #1 @ // UND & SVC have different LR adjust for Thumb
- bhi NoAdjustNeeded
-
- tst r1, #0x20 @ if ((CPSR & T)) == T) { // Thumb Mode on entry
- addne R5, R5, #2 @ PC += 2@
- str R5,[SP,#0x58] @ Update LR value pused by srsfd
-
-NoAdjustNeeded:
-
- str R5, [SP, #0x3c] @ Store it in EFI_SYSTEM_CONTEXT_ARM.PC
-
- sub R1, SP, #0x60 @ We pused 0x60 bytes on the stack
- str R1, [SP, #0x34] @ Store it in EFI_SYSTEM_CONTEXT_ARM.SP
-
- @ R0 is ExceptionType
- mov R1,SP @ R1 is SystemContext
-
-#if (FixedPcdGet32(PcdVFPEnabled))
- vpush {d0-d15} @ save vstm registers in case they are used in optimizations
-#endif
-
-/*
-VOID
-EFIAPI
-DefaultExceptionHandler (
- IN EFI_EXCEPTION_TYPE ExceptionType, R0
- IN OUT EFI_SYSTEM_CONTEXT SystemContext R1
- )
-
-*/
- blx ASM_PFX(DefaultExceptionHandler) @ Call exception handler
-
-#if (FixedPcdGet32(PcdVFPEnabled))
- vpop {d0-d15}
-#endif
-
- ldr R1, [SP, #0x4c] @ Restore EFI_SYSTEM_CONTEXT_ARM.IFSR
- mcr p15, 0, R1, c5, c0, 1 @ Write IFSR
-
- ldr R1, [SP, #0x44] @ sRestore EFI_SYSTEM_CONTEXT_ARM.DFSR
- mcr p15, 0, R1, c5, c0, 0 @ Write DFSR
-
- ldr R1,[SP,#0x3c] @ EFI_SYSTEM_CONTEXT_ARM.PC
- str R1,[SP,#0x58] @ Store it back to srsfd stack slot so it can be restored
-
- ldr R1,[SP,#0x40] @ EFI_SYSTEM_CONTEXT_ARM.CPSR
- str R1,[SP,#0x5c] @ Store it back to srsfd stack slot so it can be restored
-
- add R3, SP, #0x54 @ Make R3 point to SVC LR saved on entry
- add R2, SP, #0x38 @ Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
- and R1, R1, #0x1f @ Check to see if User or System Mode
- cmp R1, #0x1f @ if ((CPSR == 0x10) || (CPSR == 0x1f))
- cmpne R1, #0x10 @
- ldmibeq R2, {lr}^ @ restore unbanked lr
- @ else
- ldmibne R3, {lr} @ restore SVC lr, via ldmfd SP!, {LR}
-
- ldmfd SP!,{R0-R12} @ Restore general purpose registers
- @ Exception handler can not change SP
-
- add SP,SP,#0x20 @ Clear out the remaining stack space
- ldmfd SP!,{LR} @ restore the link register for this context
- rfefd SP! @ return from exception via srsfd stack slot
-
diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.asm b/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.asm deleted file mode 100644 index cf59447bed..0000000000 --- a/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.asm +++ /dev/null @@ -1,273 +0,0 @@ -//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-// Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-#include <Library/PcdLib.h>
-
-/*
-
-This is the stack constructed by the exception handler (low address to high address)
- # R0 - IFAR is EFI_SYSTEM_CONTEXT for ARM
- Reg Offset
- === ======
- R0 0x00 # stmfd SP!,{R0-R12}
- R1 0x04
- R2 0x08
- R3 0x0c
- R4 0x10
- R5 0x14
- R6 0x18
- R7 0x1c
- R8 0x20
- R9 0x24
- R10 0x28
- R11 0x2c
- R12 0x30
- SP 0x34 # reserved via adding 0x20 (32) to the SP
- LR 0x38
- PC 0x3c
- CPSR 0x40
- DFSR 0x44
- DFAR 0x48
- IFSR 0x4c
- IFAR 0x50
-
- LR 0x54 # SVC Link register (we need to restore it)
-
- LR 0x58 # pushed by srsfd
- CPSR 0x5c
-
- */
-
- EXPORT DebugAgentVectorTable
- IMPORT DefaultExceptionHandler
-
- PRESERVE8
- AREA DebugAgentException, CODE, READONLY, CODEALIGN, ALIGN=5
-
-//
-// This code gets copied to the ARM vector table
-// ExceptionHandlersStart - ExceptionHandlersEnd gets copied
-//
-DebugAgentVectorTable FUNCTION
- b ResetEntry
- b UndefinedInstructionEntry
- b SoftwareInterruptEntry
- b PrefetchAbortEntry
- b DataAbortEntry
- b ReservedExceptionEntry
- b IrqEntry
- b FiqEntry
- ENDFUNC
-
-ResetEntry
- srsfd #0x13! ; Store return state on SVC stack
- ; We are already in SVC mode
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
-
- mov R0,#0 ; ExceptionType
- ldr R1,CommonExceptionEntry
- bx R1
-
-UndefinedInstructionEntry
- sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry
- srsfd #0x13! ; Store return state on SVC stack
- cps #0x13 ; Switch to SVC for common stack
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
-
- mov R0,#1 ; ExceptionType
- ldr R1,CommonExceptionEntry;
- bx R1
-
-SoftwareInterruptEntry
- sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry
- srsfd #0x13! ; Store return state on SVC stack
- ; We are already in SVC mode
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
-
- mov R0,#2 ; ExceptionType
- ldr R1,CommonExceptionEntry
- bx R1
-
-PrefetchAbortEntry
- sub LR,LR,#4
- srsfd #0x13! ; Store return state on SVC stack
- cps #0x13 ; Switch to SVC for common stack
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
-
- mov R0,#3 ; ExceptionType
- ldr R1,CommonExceptionEntry
- bx R1
-
-DataAbortEntry
- sub LR,LR,#8
- srsfd #0x13! ; Store return state on SVC stack
- cps #0x13 ; Switch to SVC for common stack
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
-
- mov R0,#4 ; ExceptionType
- ldr R1,CommonExceptionEntry
- bx R1
-
-ReservedExceptionEntry
- srsfd #0x13! ; Store return state on SVC stack
- cps #0x13 ; Switch to SVC for common stack
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
-
- mov R0,#5 ; ExceptionType
- ldr R1,CommonExceptionEntry
- bx R1
-
-IrqEntry
- sub LR,LR,#4
- srsfd #0x13! ; Store return state on SVC stack
- cps #0x13 ; Switch to SVC for common stack
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
-
- mov R0,#6 ; ExceptionType
- ldr R1,CommonExceptionEntry
- bx R1
-
-FiqEntry
- sub LR,LR,#4
- srsfd #0x13! ; Store return state on SVC stack
- cps #0x13 ; Switch to SVC for common stack
- stmfd SP!,{LR} ; Store the link register for the current mode
- sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
- stmfd SP!,{R0-R12} ; Store the register state
- ; Since we have already switch to SVC R8_fiq - R12_fiq
- ; never get used or saved
- mov R0,#7 ; ExceptionType
- ldr R1,CommonExceptionEntry
- bx R1
-
-//
-// This gets patched by the C code that patches in the vector table
-//
-CommonExceptionEntry
- dcd AsmCommonExceptionEntry
-
-ExceptionHandlersEnd
-
-//
-// This code runs from CpuDxe driver loaded address. It is patched into
-// CommonExceptionEntry.
-//
-AsmCommonExceptionEntry
- mrc p15, 0, R1, c6, c0, 2 ; Read IFAR
- str R1, [SP, #0x50] ; Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR
-
- mrc p15, 0, R1, c5, c0, 1 ; Read IFSR
- str R1, [SP, #0x4c] ; Store it in EFI_SYSTEM_CONTEXT_ARM.IFSR
-
- mrc p15, 0, R1, c6, c0, 0 ; Read DFAR
- str R1, [SP, #0x48] ; Store it in EFI_SYSTEM_CONTEXT_ARM.DFAR
-
- mrc p15, 0, R1, c5, c0, 0 ; Read DFSR
- str R1, [SP, #0x44] ; Store it in EFI_SYSTEM_CONTEXT_ARM.DFSR
-
- ldr R1, [SP, #0x5c] ; srsfd saved pre-exception CPSR on the stack
- str R1, [SP, #0x40] ; Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR
-
- add R2, SP, #0x38 ; Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
- and R3, R1, #0x1f ; Check CPSR to see if User or System Mode
- cmp R3, #0x1f ; if ((CPSR == 0x10) || (CPSR == 0x1df))
- cmpne R3, #0x10 ;
- stmeqed R2, {lr}^ ; save unbanked lr
- ; else
- stmneed R2, {lr} ; save SVC lr
-
-
- ldr R5, [SP, #0x58] ; PC is the LR pushed by srsfd
- ; Check to see if we have to adjust for Thumb entry
- sub r4, r0, #1 ; if (ExceptionType == 1 || ExceptionType ==2)) {
- cmp r4, #1 ; // UND & SVC have different LR adjust for Thumb
- bhi NoAdjustNeeded
-
- tst r1, #0x20 ; if ((CPSR & T)) == T) { // Thumb Mode on entry
- addne R5, R5, #2 ; PC += 2;
- str R5,[SP,#0x58] ; Update LR value pused by srsfd
-
-NoAdjustNeeded
-
- str R5, [SP, #0x3c] ; Store it in EFI_SYSTEM_CONTEXT_ARM.PC
-
- sub R1, SP, #0x60 ; We pused 0x60 bytes on the stack
- str R1, [SP, #0x34] ; Store it in EFI_SYSTEM_CONTEXT_ARM.SP
-
- ; R0 is ExceptionType
- mov R1,SP ; R1 is SystemContext
-
-#if (FixedPcdGet32(PcdVFPEnabled))
- vpush {d0-d15} ; save vstm registers in case they are used in optimizations
-#endif
-
-/*
-VOID
-EFIAPI
-DefaultExceptionHandler (
- IN EFI_EXCEPTION_TYPE ExceptionType, R0
- IN OUT EFI_SYSTEM_CONTEXT SystemContext R1
- )
-
-*/
- blx DefaultExceptionHandler ; Call exception handler
-
-#if (FixedPcdGet32(PcdVFPEnabled))
- vpop {d0-d15}
-#endif
-
- ldr R1, [SP, #0x4c] ; Restore EFI_SYSTEM_CONTEXT_ARM.IFSR
- mcr p15, 0, R1, c5, c0, 1 ; Write IFSR
-
- ldr R1, [SP, #0x44] ; sRestore EFI_SYSTEM_CONTEXT_ARM.DFSR
- mcr p15, 0, R1, c5, c0, 0 ; Write DFSR
-
- ldr R1,[SP,#0x3c] ; EFI_SYSTEM_CONTEXT_ARM.PC
- str R1,[SP,#0x58] ; Store it back to srsfd stack slot so it can be restored
-
- ldr R1,[SP,#0x40] ; EFI_SYSTEM_CONTEXT_ARM.CPSR
- str R1,[SP,#0x5c] ; Store it back to srsfd stack slot so it can be restored
-
- add R3, SP, #0x54 ; Make R3 point to SVC LR saved on entry
- add R2, SP, #0x38 ; Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
- and R1, R1, #0x1f ; Check to see if User or System Mode
- cmp R1, #0x1f ; if ((CPSR == 0x10) || (CPSR == 0x1f))
- cmpne R1, #0x10 ;
- ldmeqed R2, {lr}^ ; restore unbanked lr
- ; else
- ldmneed R3, {lr} ; restore SVC lr, via ldmfd SP!, {LR}
-
- ldmfd SP!,{R0-R12} ; Restore general purpose registers
- ; Exception handler can not change SP
-
- add SP,SP,#0x20 ; Clear out the remaining stack space
- ldmfd SP!,{LR} ; restore the link register for this context
- rfefd SP! ; return from exception via srsfd stack slot
-
- END
diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c deleted file mode 100644 index 9c0cf0de38..0000000000 --- a/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c +++ /dev/null @@ -1,351 +0,0 @@ -/** @file
-* Main file supporting the SEC Phase for Versatile Express
-*
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Uefi.h>
-#include <Library/ArmLib.h>
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/DebugAgentLib.h>
-#include <Library/PcdLib.h>
-#include <Library/PeCoffExtraActionLib.h>
-#include <Library/PeCoffLib.h>
-
-#include <Pi/PiFirmwareFile.h>
-#include <Pi/PiFirmwareVolume.h>
-
-#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \
- (ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) & ((Alignment) - 1))
-
-
-// Vector Table for Sec Phase
-VOID
-DebugAgentVectorTable (
- VOID
- );
-
-/**
- Returns the highest bit set of the State field
-
- @param ErasePolarity Erase Polarity as defined by EFI_FVB2_ERASE_POLARITY
- in the Attributes field.
- @param FfsHeader Pointer to FFS File Header
-
-
- @retval the highest bit in the State field
-
-**/
-STATIC
-EFI_FFS_FILE_STATE
-GetFileState (
- IN UINT8 ErasePolarity,
- IN EFI_FFS_FILE_HEADER *FfsHeader
- )
-{
- EFI_FFS_FILE_STATE FileState;
- EFI_FFS_FILE_STATE HighestBit;
-
- FileState = FfsHeader->State;
-
- if (ErasePolarity != 0) {
- FileState = (EFI_FFS_FILE_STATE)~FileState;
- }
-
- HighestBit = 0x80;
- while (HighestBit != 0 && (HighestBit & FileState) == 0) {
- HighestBit >>= 1;
- }
-
- return HighestBit;
-}
-
-/**
- Calculates the checksum of the header of a file.
- The header is a zero byte checksum, so zero means header is good
-
- @param FfsHeader Pointer to FFS File Header
-
- @retval Checksum of the header
-
-**/
-STATIC
-UINT8
-CalculateHeaderChecksum (
- IN EFI_FFS_FILE_HEADER *FileHeader
- )
-{
- UINT8 Sum;
-
- // Calculate the sum of the header
- Sum = CalculateSum8 ((CONST VOID*)FileHeader,sizeof(EFI_FFS_FILE_HEADER));
-
- // State field (since this indicates the different state of file).
- Sum = (UINT8)(Sum - FileHeader->State);
-
- // Checksum field of the file is not part of the header checksum.
- Sum = (UINT8)(Sum - FileHeader->IntegrityCheck.Checksum.File);
-
- return Sum;
-}
-
-EFI_STATUS
-GetFfsFile (
- IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader,
- IN EFI_FV_FILETYPE FileType,
- OUT EFI_FFS_FILE_HEADER **FileHeader
- )
-{
- UINT64 FvLength;
- UINTN FileOffset;
- EFI_FFS_FILE_HEADER *FfsFileHeader;
- UINT8 ErasePolarity;
- UINT8 FileState;
- UINT32 FileLength;
- UINT32 FileOccupiedSize;
-
- ASSERT (FwVolHeader->Signature == EFI_FVH_SIGNATURE);
-
- FvLength = FwVolHeader->FvLength;
- FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FwVolHeader + FwVolHeader->HeaderLength);
- FileOffset = FwVolHeader->HeaderLength;
-
- if (FwVolHeader->Attributes & EFI_FVB2_ERASE_POLARITY) {
- ErasePolarity = 1;
- } else {
- ErasePolarity = 0;
- }
-
- while (FileOffset < (FvLength - sizeof (EFI_FFS_FILE_HEADER))) {
- // Get FileState which is the highest bit of the State
- FileState = GetFileState (ErasePolarity, FfsFileHeader);
-
- switch (FileState) {
-
- case EFI_FILE_HEADER_INVALID:
- FileOffset += sizeof(EFI_FFS_FILE_HEADER);
- FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + sizeof(EFI_FFS_FILE_HEADER));
- break;
-
- case EFI_FILE_DATA_VALID:
- case EFI_FILE_MARKED_FOR_UPDATE:
- if (CalculateHeaderChecksum (FfsFileHeader) != 0) {
- ASSERT (FALSE);
- return EFI_NOT_FOUND;
- }
-
- if (FfsFileHeader->Type == FileType) {
- *FileHeader = FfsFileHeader;
- return EFI_SUCCESS;
- }
-
- FileLength = *(UINT32 *)(FfsFileHeader->Size) & 0x00FFFFFF;
- FileOccupiedSize = GET_OCCUPIED_SIZE(FileLength, 8);
-
- FileOffset += FileOccupiedSize;
- FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + FileOccupiedSize);
- break;
-
- case EFI_FILE_DELETED:
- FileLength = *(UINT32 *)(FfsFileHeader->Size) & 0x00FFFFFF;
- FileOccupiedSize = GET_OCCUPIED_SIZE(FileLength, 8);
- FileOffset += FileOccupiedSize;
- FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + FileOccupiedSize);
- break;
-
- default:
- return EFI_NOT_FOUND;
- }
- }
- return EFI_NOT_FOUND;
-}
-
-EFI_STATUS
-GetImageContext (
- IN EFI_FFS_FILE_HEADER *FfsHeader,
- OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
- )
-{
- EFI_STATUS Status;
- UINTN ParsedLength;
- UINTN SectionSize;
- UINTN SectionLength;
- EFI_COMMON_SECTION_HEADER *Section;
- VOID *EfiImage;
- UINTN ImageAddress;
- EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *DebugEntry;
- VOID *CodeViewEntryPointer;
-
- Section = (EFI_COMMON_SECTION_HEADER *)(FfsHeader + 1);
- SectionSize = *(UINT32 *)(FfsHeader->Size) & 0x00FFFFFF;
- SectionSize -= sizeof (EFI_FFS_FILE_HEADER);
- ParsedLength = 0;
- EfiImage = NULL;
-
- while (ParsedLength < SectionSize) {
- if ((Section->Type == EFI_SECTION_PE32) || (Section->Type == EFI_SECTION_TE)) {
- EfiImage = (EFI_IMAGE_OPTIONAL_HEADER_UNION*)(Section + 1);
- break;
- }
-
- //
- // Size is 24 bits wide so mask upper 8 bits.
- // SectionLength is adjusted it is 4 byte aligned.
- // Go to the next section
- //
- SectionLength = *(UINT32 *)Section->Size & 0x00FFFFFF;
- SectionLength = GET_OCCUPIED_SIZE (SectionLength, 4);
- ASSERT (SectionLength != 0);
- ParsedLength += SectionLength;
- Section = (EFI_COMMON_SECTION_HEADER *)((UINT8 *)Section + SectionLength);
- }
-
- if (EfiImage == NULL) {
- return EFI_NOT_FOUND;
- }
-
- // Initialize the Image Context
- ZeroMem (ImageContext, sizeof (PE_COFF_LOADER_IMAGE_CONTEXT));
- ImageContext->Handle = EfiImage;
- ImageContext->ImageRead = PeCoffLoaderImageReadFromMemory;
-
- Status = PeCoffLoaderGetImageInfo (ImageContext);
- if (!EFI_ERROR(Status) && ((VOID*)(UINTN)ImageContext->DebugDirectoryEntryRva != NULL)) {
- ImageAddress = ImageContext->ImageAddress;
- if (ImageContext->IsTeImage) {
- ImageAddress += sizeof (EFI_TE_IMAGE_HEADER) - ((EFI_TE_IMAGE_HEADER*)EfiImage)->StrippedSize;
- }
-
- DebugEntry = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY*)(ImageAddress + ImageContext->DebugDirectoryEntryRva);
- if (DebugEntry->Type == EFI_IMAGE_DEBUG_TYPE_CODEVIEW) {
- CodeViewEntryPointer = (VOID *) (ImageAddress + (UINTN) DebugEntry->RVA);
- switch (* (UINT32 *) CodeViewEntryPointer) {
- case CODEVIEW_SIGNATURE_NB10:
- ImageContext->PdbPointer = (CHAR8 *)CodeViewEntryPointer + sizeof (EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY);
- break;
- case CODEVIEW_SIGNATURE_RSDS:
- ImageContext->PdbPointer = (CHAR8 *)CodeViewEntryPointer + sizeof (EFI_IMAGE_DEBUG_CODEVIEW_RSDS_ENTRY);
- break;
- case CODEVIEW_SIGNATURE_MTOC:
- ImageContext->PdbPointer = (CHAR8 *)CodeViewEntryPointer + sizeof (EFI_IMAGE_DEBUG_CODEVIEW_MTOC_ENTRY);
- break;
- default:
- break;
- }
- }
- }
-
- return Status;
-}
-
-/**
- Initialize debug agent.
-
- This function is used to set up debug environment to support source level debugging.
- If certain Debug Agent Library instance has to save some private data in the stack,
- this function must work on the mode that doesn't return to the caller, then
- the caller needs to wrap up all rest of logic after InitializeDebugAgent() into one
- function and pass it into InitializeDebugAgent(). InitializeDebugAgent() is
- responsible to invoke the passing-in function at the end of InitializeDebugAgent().
-
- If the parameter Function is not NULL, Debug Agent Library instance will invoke it by
- passing in the Context to be its parameter.
-
- If Function() is NULL, Debug Agent Library instance will return after setup debug
- environment.
-
- @param[in] InitFlag Init flag is used to decide the initialize process.
- @param[in] Context Context needed according to InitFlag; it was optional.
- @param[in] Function Continue function called by debug agent library; it was
- optional.
-
-**/
-VOID
-EFIAPI
-InitializeDebugAgent (
- IN UINT32 InitFlag,
- IN VOID *Context, OPTIONAL
- IN DEBUG_AGENT_CONTINUE Function OPTIONAL
- )
-{
- EFI_STATUS Status;
- EFI_FFS_FILE_HEADER *FfsHeader;
- PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;
-
- // Now we've got UART, check the Debug Agent Vector Table
- // Note: The AArch64 Vector table must be 2k-byte aligned - if this assertion fails ensure
- // 'Align=4K' is defined into your FDF for this module.
- ASSERT (((UINTN)DebugAgentVectorTable & ARM_VECTOR_TABLE_ALIGNMENT) == 0);
- ArmWriteVBar ((UINTN)DebugAgentVectorTable);
-
- // We use InitFlag to know if DebugAgent has been initialized from
- // Sec (DEBUG_AGENT_INIT_PREMEM_SEC) or PrePi (DEBUG_AGENT_INIT_POSTMEM_SEC)
- // modules
- if (InitFlag == DEBUG_AGENT_INIT_PREMEM_SEC) {
- //
- // Get the Sec or PrePeiCore module (defined as SEC type module)
- //
- Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdSecureFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
- if (!EFI_ERROR(Status)) {
- Status = GetImageContext (FfsHeader,&ImageContext);
- if (!EFI_ERROR(Status)) {
- PeCoffLoaderRelocateImageExtraAction (&ImageContext);
- }
- }
- } else if (InitFlag == DEBUG_AGENT_INIT_POSTMEM_SEC) {
- //
- // Get the PrePi or PrePeiCore module (defined as SEC type module)
- //
- Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
- if (!EFI_ERROR(Status)) {
- Status = GetImageContext (FfsHeader,&ImageContext);
- if (!EFI_ERROR(Status)) {
- PeCoffLoaderRelocateImageExtraAction (&ImageContext);
- }
- }
-
- //
- // Get the PeiCore module (defined as PEI_CORE type module)
- //
- Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdFvBaseAddress), EFI_FV_FILETYPE_PEI_CORE, &FfsHeader);
- if (!EFI_ERROR(Status)) {
- Status = GetImageContext (FfsHeader,&ImageContext);
- if (!EFI_ERROR(Status)) {
- PeCoffLoaderRelocateImageExtraAction (&ImageContext);
- }
- }
- }
-}
-
-/**
- Enable/Disable the interrupt of debug timer and return the interrupt state
- prior to the operation.
-
- If EnableStatus is TRUE, enable the interrupt of debug timer.
- If EnableStatus is FALSE, disable the interrupt of debug timer.
-
- @param[in] EnableStatus Enable/Disable.
-
- @return FALSE always.
-
-**/
-BOOLEAN
-EFIAPI
-SaveAndSetDebugTimerInterrupt (
- IN BOOLEAN EnableStatus
- )
-{
- return FALSE;
-}
-
diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf deleted file mode 100644 index 6b784f749b..0000000000 --- a/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf +++ /dev/null @@ -1,47 +0,0 @@ -#
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = DebugAgentSymbolsBaseLib
- FILE_GUID = 9055e2e0-9b33-11e0-a7d7-0002a5d5c51b
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = DebugAgentLib
-
-[Sources.common]
- DebugAgentSymbolsBaseLib.c
-
-[Sources.ARM]
- Arm/DebugAgentException.asm | RVCT
- Arm/DebugAgentException.S | GCC
-
-[Sources.AARCH64]
- AArch64/DebugAgentException.S
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- ArmLib
- DebugLib
- DefaultExceptionHandlerLib
- PcdLib
- PeCoffExtraActionLib
- PeCoffLib
-
-[Pcd]
- gArmTokenSpaceGuid.PcdSecureFvBaseAddress
- gArmTokenSpaceGuid.PcdFvBaseAddress
diff --git a/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.c b/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.c deleted file mode 100644 index f298e58cdf..0000000000 --- a/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.c +++ /dev/null @@ -1,141 +0,0 @@ -/**@file
-
-Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
-Portions copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-Portions copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
-
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiDxe.h>
-#include <Library/PeCoffLib.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/PeCoffExtraActionLib.h>
-#include <Library/PrintLib.h>
-
-
-/**
- If the build is done on cygwin the paths are cygpaths.
- /cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert
- them to work with RVD commands
-
- @param Name Path to convert if needed
-
-**/
-CHAR8 *
-DeCygwinPathIfNeeded (
- IN CHAR8 *Name,
- IN CHAR8 *Temp,
- IN UINTN Size
- )
-{
- CHAR8 *Ptr;
- UINTN Index;
- UINTN Index2;
-
- Ptr = AsciiStrStr (Name, "/cygdrive/");
- if (Ptr == NULL) {
- return Name;
- }
-
- for (Index = 9, Index2 = 0; (Index < (Size + 9)) && (Ptr[Index] != '\0'); Index++, Index2++) {
- Temp[Index2] = Ptr[Index];
- if (Temp[Index2] == '/') {
- Temp[Index2] = '\\' ;
- }
-
- if (Index2 == 1) {
- Temp[Index2 - 1] = Ptr[Index];
- Temp[Index2] = ':';
- }
- }
-
- return Temp;
-}
-
-
-/**
- Performs additional actions after a PE/COFF image has been loaded and relocated.
-
- If ImageContext is NULL, then ASSERT().
-
- @param ImageContext Pointer to the image context structure that describes the
- PE/COFF image that has already been loaded and relocated.
-
-**/
-VOID
-EFIAPI
-PeCoffLoaderRelocateImageExtraAction (
- IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
- )
-{
-#if !defined(MDEPKG_NDEBUG)
- CHAR8 Temp[512];
-#endif
-
- if (ImageContext->PdbPointer) {
-#ifdef __CC_ARM
-#if (__ARMCC_VERSION < 500000)
- // Print out the command for the RVD debugger to load symbols for this image
- DEBUG ((EFI_D_LOAD | EFI_D_INFO, "load /a /ni /np %a &0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
-#else
- // Print out the command for the DS-5 to load symbols for this image
- DEBUG ((EFI_D_LOAD | EFI_D_INFO, "add-symbol-file %a 0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
-#endif
-#elif __GNUC__
- // This may not work correctly if you generate PE/COFF directlyas then the Offset would not be required
- DEBUG ((EFI_D_LOAD | EFI_D_INFO, "add-symbol-file %a 0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
-#else
- DEBUG ((EFI_D_LOAD | EFI_D_INFO, "Loading driver at 0x%11p EntryPoint=0x%11p\n", (VOID *)(UINTN) ImageContext->ImageAddress, FUNCTION_ENTRY_POINT (ImageContext->EntryPoint)));
-#endif
- } else {
- DEBUG ((EFI_D_LOAD | EFI_D_INFO, "Loading driver at 0x%11p EntryPoint=0x%11p\n", (VOID *)(UINTN) ImageContext->ImageAddress, FUNCTION_ENTRY_POINT (ImageContext->EntryPoint)));
- }
-}
-
-
-
-/**
- Performs additional actions just before a PE/COFF image is unloaded. Any resources
- that were allocated by PeCoffLoaderRelocateImageExtraAction() must be freed.
-
- If ImageContext is NULL, then ASSERT().
-
- @param ImageContext Pointer to the image context structure that describes the
- PE/COFF image that is being unloaded.
-
-**/
-VOID
-EFIAPI
-PeCoffLoaderUnloadImageExtraAction (
- IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
- )
-{
-#if !defined(MDEPKG_NDEBUG)
- CHAR8 Temp[512];
-#endif
-
- if (ImageContext->PdbPointer) {
-#ifdef __CC_ARM
- // Print out the command for the RVD debugger to load symbols for this image
- DEBUG ((EFI_D_ERROR, "unload symbols_only %a\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp))));
-#elif __GNUC__
- // This may not work correctly if you generate PE/COFF directlyas then the Offset would not be required
- DEBUG ((EFI_D_ERROR, "remove-symbol-file %a 0x%08x\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
-#else
- DEBUG ((EFI_D_ERROR, "Unloading %a\n", ImageContext->PdbPointer));
-#endif
- } else {
- DEBUG ((EFI_D_ERROR, "Unloading driver at 0x%11p\n", (VOID *)(UINTN) ImageContext->ImageAddress));
- }
-}
diff --git a/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf b/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf deleted file mode 100644 index c1f717e5bd..0000000000 --- a/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf +++ /dev/null @@ -1,39 +0,0 @@ -#/** @file
-# PeCoff extra action libary for DXE phase that run Unix emulator.
-#
-# Lib to provide memory journal status code reporting Routines
-# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
-# Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = DebugUnixPeCoffExtraActionLib
- FILE_GUID = C3E9448E-1726-42fb-9368-41F75B038C0C
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = PeCoffExtraActionLib
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = ARM
-#
-
-[Sources.common]
- DebugPeCoffExtraActionLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
-
-[LibraryClasses]
- DebugLib
diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c b/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c deleted file mode 100644 index 1024bf48c6..0000000000 --- a/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c +++ /dev/null @@ -1,273 +0,0 @@ -/** @file
- Default exception handler
-
- Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Uefi.h>
-#include <Library/UefiLib.h>
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PeCoffGetEntryPointLib.h>
-#include <Library/PrintLib.h>
-#include <Library/ArmDisassemblerLib.h>
-#include <Library/SerialPortLib.h>
-
-#include <Guid/DebugImageInfoTable.h>
-#include <Protocol/DebugSupport.h>
-#include <Protocol/LoadedImage.h>
-
-STATIC CHAR8 *gExceptionTypeString[] = {
- "Synchronous",
- "IRQ",
- "FIQ",
- "SError"
-};
-
-STATIC BOOLEAN mRecursiveException;
-
-CHAR8 *
-GetImageName (
- IN UINTN FaultAddress,
- OUT UINTN *ImageBase,
- OUT UINTN *PeCoffSizeOfHeaders
- );
-
-STATIC
-VOID
-DescribeInstructionOrDataAbort (
- IN CHAR8 *AbortType,
- IN UINTN Iss
- )
-{
- CHAR8 *AbortCause;
-
- switch (Iss & 0x3f) {
- case 0x0: AbortCause = "Address size fault, zeroth level of translation or translation table base register"; break;
- case 0x1: AbortCause = "Address size fault, first level"; break;
- case 0x2: AbortCause = "Address size fault, second level"; break;
- case 0x3: AbortCause = "Address size fault, third level"; break;
- case 0x4: AbortCause = "Translation fault, zeroth level"; break;
- case 0x5: AbortCause = "Translation fault, first level"; break;
- case 0x6: AbortCause = "Translation fault, second level"; break;
- case 0x7: AbortCause = "Translation fault, third level"; break;
- case 0x9: AbortCause = "Access flag fault, first level"; break;
- case 0xa: AbortCause = "Access flag fault, second level"; break;
- case 0xb: AbortCause = "Access flag fault, third level"; break;
- case 0xd: AbortCause = "Permission fault, first level"; break;
- case 0xe: AbortCause = "Permission fault, second level"; break;
- case 0xf: AbortCause = "Permission fault, third level"; break;
- case 0x10: AbortCause = "Synchronous external abort"; break;
- case 0x18: AbortCause = "Synchronous parity error on memory access"; break;
- case 0x11: AbortCause = "Asynchronous external abort"; break;
- case 0x19: AbortCause = "Asynchronous parity error on memory access"; break;
- case 0x14: AbortCause = "Synchronous external abort on translation table walk, zeroth level"; break;
- case 0x15: AbortCause = "Synchronous external abort on translation table walk, first level"; break;
- case 0x16: AbortCause = "Synchronous external abort on translation table walk, second level"; break;
- case 0x17: AbortCause = "Synchronous external abort on translation table walk, third level"; break;
- case 0x1c: AbortCause = "Synchronous parity error on memory access on translation table walk, zeroth level"; break;
- case 0x1d: AbortCause = "Synchronous parity error on memory access on translation table walk, first level"; break;
- case 0x1e: AbortCause = "Synchronous parity error on memory access on translation table walk, second level"; break;
- case 0x1f: AbortCause = "Synchronous parity error on memory access on translation table walk, third level"; break;
- case 0x21: AbortCause = "Alignment fault"; break;
- case 0x22: AbortCause = "Debug event"; break;
- case 0x30: AbortCause = "TLB conflict abort"; break;
- case 0x33:
- case 0x34: AbortCause = "IMPLEMENTATION DEFINED"; break;
- case 0x35:
- case 0x36: AbortCause = "Domain fault"; break;
- default: AbortCause = ""; break;
- }
-
- DEBUG ((EFI_D_ERROR, "\n%a: %a\n", AbortType, AbortCause));
-}
-
-STATIC
-VOID
-DescribeExceptionSyndrome (
- IN UINT32 Esr
- )
-{
- CHAR8 *Message;
- UINTN Ec;
- UINTN Iss;
-
- Ec = Esr >> 26;
- Iss = Esr & 0x00ffffff;
-
- switch (Ec) {
- case 0x15: Message = "SVC executed in AArch64"; break;
- case 0x20:
- case 0x21: DescribeInstructionOrDataAbort ("Instruction abort", Iss); return;
- case 0x22: Message = "PC alignment fault"; break;
- case 0x23: Message = "SP alignment fault"; break;
- case 0x24:
- case 0x25: DescribeInstructionOrDataAbort ("Data abort", Iss); return;
- default: return;
- }
-
- DEBUG ((EFI_D_ERROR, "\n %a \n", Message));
-}
-
-#ifndef MDEPKG_NDEBUG
-STATIC
-CONST CHAR8 *
-BaseName (
- IN CONST CHAR8 *FullName
- )
-{
- CONST CHAR8 *Str;
-
- Str = FullName + AsciiStrLen (FullName);
-
- while (--Str > FullName) {
- if (*Str == '/' || *Str == '\\') {
- return Str + 1;
- }
- }
- return Str;
-}
-#endif
-
-/**
- This is the default action to take on an unexpected exception
-
- Since this is exception context don't do anything crazy like try to allcoate memory.
-
- @param ExceptionType Type of the exception
- @param SystemContext Register state at the time of the Exception
-
-**/
-VOID
-DefaultExceptionHandler (
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN OUT EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- CHAR8 Buffer[100];
- UINTN CharCount;
- INT32 Offset;
-
- if (mRecursiveException) {
- CharCount = AsciiSPrint (Buffer, sizeof (Buffer),"\nRecursive exception occurred while dumping the CPU state\n");
- SerialPortWrite ((UINT8 *) Buffer, CharCount);
- CpuDeadLoop ();
- }
- mRecursiveException = TRUE;
-
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"\n\n%a Exception at 0x%016lx\n", gExceptionTypeString[ExceptionType], SystemContext.SystemContextAArch64->ELR);
- SerialPortWrite ((UINT8 *) Buffer, CharCount);
-
- DEBUG_CODE_BEGIN ();
- CHAR8 *Pdb, *PrevPdb;
- UINTN ImageBase;
- UINTN PeCoffSizeOfHeader;
- UINT64 *Fp;
- UINT64 RootFp[2];
- UINTN Idx;
-
- PrevPdb = Pdb = GetImageName (SystemContext.SystemContextAArch64->ELR, &ImageBase, &PeCoffSizeOfHeader);
- if (Pdb != NULL) {
- DEBUG ((EFI_D_ERROR, "PC 0x%012lx (0x%012lx+0x%08x) [ 0] %a\n",
- SystemContext.SystemContextAArch64->ELR, ImageBase,
- SystemContext.SystemContextAArch64->ELR - ImageBase, BaseName (Pdb)));
- } else {
- DEBUG ((EFI_D_ERROR, "PC 0x%012lx\n", SystemContext.SystemContextAArch64->ELR));
- }
-
- if ((UINT64 *)SystemContext.SystemContextAArch64->FP != 0) {
- Idx = 0;
-
- RootFp[0] = ((UINT64 *)SystemContext.SystemContextAArch64->FP)[0];
- RootFp[1] = ((UINT64 *)SystemContext.SystemContextAArch64->FP)[1];
- if (RootFp[1] != SystemContext.SystemContextAArch64->LR) {
- RootFp[0] = SystemContext.SystemContextAArch64->FP;
- RootFp[1] = SystemContext.SystemContextAArch64->LR;
- }
- for (Fp = RootFp; Fp[0] != 0; Fp = (UINT64 *)Fp[0]) {
- Pdb = GetImageName (Fp[1], &ImageBase, &PeCoffSizeOfHeader);
- if (Pdb != NULL) {
- if (Pdb != PrevPdb) {
- Idx++;
- PrevPdb = Pdb;
- }
- DEBUG ((EFI_D_ERROR, "PC 0x%012lx (0x%012lx+0x%08x) [% 2d] %a\n",
- Fp[1], ImageBase, Fp[1] - ImageBase, Idx, BaseName (Pdb)));
- } else {
- DEBUG ((EFI_D_ERROR, "PC 0x%012lx\n", Fp[1]));
- }
- }
- PrevPdb = Pdb = GetImageName (SystemContext.SystemContextAArch64->ELR, &ImageBase, &PeCoffSizeOfHeader);
- if (Pdb != NULL) {
- DEBUG ((EFI_D_ERROR, "\n[ 0] %a\n", Pdb));
- }
-
- Idx = 0;
- for (Fp = RootFp; Fp[0] != 0; Fp = (UINT64 *)Fp[0]) {
- Pdb = GetImageName (Fp[1], &ImageBase, &PeCoffSizeOfHeader);
- if (Pdb != NULL && Pdb != PrevPdb) {
- DEBUG ((EFI_D_ERROR, "[% 2d] %a\n", ++Idx, Pdb));
- PrevPdb = Pdb;
- }
- }
- }
- DEBUG_CODE_END ();
-
- DEBUG ((EFI_D_ERROR, "\n X0 0x%016lx X1 0x%016lx X2 0x%016lx X3 0x%016lx\n", SystemContext.SystemContextAArch64->X0, SystemContext.SystemContextAArch64->X1, SystemContext.SystemContextAArch64->X2, SystemContext.SystemContextAArch64->X3));
- DEBUG ((EFI_D_ERROR, " X4 0x%016lx X5 0x%016lx X6 0x%016lx X7 0x%016lx\n", SystemContext.SystemContextAArch64->X4, SystemContext.SystemContextAArch64->X5, SystemContext.SystemContextAArch64->X6, SystemContext.SystemContextAArch64->X7));
- DEBUG ((EFI_D_ERROR, " X8 0x%016lx X9 0x%016lx X10 0x%016lx X11 0x%016lx\n", SystemContext.SystemContextAArch64->X8, SystemContext.SystemContextAArch64->X9, SystemContext.SystemContextAArch64->X10, SystemContext.SystemContextAArch64->X11));
- DEBUG ((EFI_D_ERROR, " X12 0x%016lx X13 0x%016lx X14 0x%016lx X15 0x%016lx\n", SystemContext.SystemContextAArch64->X12, SystemContext.SystemContextAArch64->X13, SystemContext.SystemContextAArch64->X14, SystemContext.SystemContextAArch64->X15));
- DEBUG ((EFI_D_ERROR, " X16 0x%016lx X17 0x%016lx X18 0x%016lx X19 0x%016lx\n", SystemContext.SystemContextAArch64->X16, SystemContext.SystemContextAArch64->X17, SystemContext.SystemContextAArch64->X18, SystemContext.SystemContextAArch64->X19));
- DEBUG ((EFI_D_ERROR, " X20 0x%016lx X21 0x%016lx X22 0x%016lx X23 0x%016lx\n", SystemContext.SystemContextAArch64->X20, SystemContext.SystemContextAArch64->X21, SystemContext.SystemContextAArch64->X22, SystemContext.SystemContextAArch64->X23));
- DEBUG ((EFI_D_ERROR, " X24 0x%016lx X25 0x%016lx X26 0x%016lx X27 0x%016lx\n", SystemContext.SystemContextAArch64->X24, SystemContext.SystemContextAArch64->X25, SystemContext.SystemContextAArch64->X26, SystemContext.SystemContextAArch64->X27));
- DEBUG ((EFI_D_ERROR, " X28 0x%016lx FP 0x%016lx LR 0x%016lx \n", SystemContext.SystemContextAArch64->X28, SystemContext.SystemContextAArch64->FP, SystemContext.SystemContextAArch64->LR));
-
- /* We save these as 128bit numbers, but have to print them as two 64bit numbers,
- so swap the 64bit words to correctly represent a 128bit number. */
- DEBUG ((EFI_D_ERROR, "\n V0 0x%016lx %016lx V1 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V0[1], SystemContext.SystemContextAArch64->V0[0], SystemContext.SystemContextAArch64->V1[1], SystemContext.SystemContextAArch64->V1[0]));
- DEBUG ((EFI_D_ERROR, " V2 0x%016lx %016lx V3 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V2[1], SystemContext.SystemContextAArch64->V2[0], SystemContext.SystemContextAArch64->V3[1], SystemContext.SystemContextAArch64->V3[0]));
- DEBUG ((EFI_D_ERROR, " V4 0x%016lx %016lx V5 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V4[1], SystemContext.SystemContextAArch64->V4[0], SystemContext.SystemContextAArch64->V5[1], SystemContext.SystemContextAArch64->V5[0]));
- DEBUG ((EFI_D_ERROR, " V6 0x%016lx %016lx V7 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V6[1], SystemContext.SystemContextAArch64->V6[0], SystemContext.SystemContextAArch64->V7[1], SystemContext.SystemContextAArch64->V7[0]));
- DEBUG ((EFI_D_ERROR, " V8 0x%016lx %016lx V9 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V8[1], SystemContext.SystemContextAArch64->V8[0], SystemContext.SystemContextAArch64->V9[1], SystemContext.SystemContextAArch64->V9[0]));
- DEBUG ((EFI_D_ERROR, " V10 0x%016lx %016lx V11 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V10[1], SystemContext.SystemContextAArch64->V10[0], SystemContext.SystemContextAArch64->V11[1], SystemContext.SystemContextAArch64->V11[0]));
- DEBUG ((EFI_D_ERROR, " V12 0x%016lx %016lx V13 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V12[1], SystemContext.SystemContextAArch64->V12[0], SystemContext.SystemContextAArch64->V13[1], SystemContext.SystemContextAArch64->V13[0]));
- DEBUG ((EFI_D_ERROR, " V14 0x%016lx %016lx V15 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V14[1], SystemContext.SystemContextAArch64->V14[0], SystemContext.SystemContextAArch64->V15[1], SystemContext.SystemContextAArch64->V15[0]));
- DEBUG ((EFI_D_ERROR, " V16 0x%016lx %016lx V17 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V16[1], SystemContext.SystemContextAArch64->V16[0], SystemContext.SystemContextAArch64->V17[1], SystemContext.SystemContextAArch64->V17[0]));
- DEBUG ((EFI_D_ERROR, " V18 0x%016lx %016lx V19 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V18[1], SystemContext.SystemContextAArch64->V18[0], SystemContext.SystemContextAArch64->V19[1], SystemContext.SystemContextAArch64->V19[0]));
- DEBUG ((EFI_D_ERROR, " V20 0x%016lx %016lx V21 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V20[1], SystemContext.SystemContextAArch64->V20[0], SystemContext.SystemContextAArch64->V21[1], SystemContext.SystemContextAArch64->V21[0]));
- DEBUG ((EFI_D_ERROR, " V22 0x%016lx %016lx V23 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V22[1], SystemContext.SystemContextAArch64->V22[0], SystemContext.SystemContextAArch64->V23[1], SystemContext.SystemContextAArch64->V23[0]));
- DEBUG ((EFI_D_ERROR, " V24 0x%016lx %016lx V25 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V24[1], SystemContext.SystemContextAArch64->V24[0], SystemContext.SystemContextAArch64->V25[1], SystemContext.SystemContextAArch64->V25[0]));
- DEBUG ((EFI_D_ERROR, " V26 0x%016lx %016lx V27 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V26[1], SystemContext.SystemContextAArch64->V26[0], SystemContext.SystemContextAArch64->V27[1], SystemContext.SystemContextAArch64->V27[0]));
- DEBUG ((EFI_D_ERROR, " V28 0x%016lx %016lx V29 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V28[1], SystemContext.SystemContextAArch64->V28[0], SystemContext.SystemContextAArch64->V29[1], SystemContext.SystemContextAArch64->V29[0]));
- DEBUG ((EFI_D_ERROR, " V30 0x%016lx %016lx V31 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V30[1], SystemContext.SystemContextAArch64->V30[0], SystemContext.SystemContextAArch64->V31[1], SystemContext.SystemContextAArch64->V31[0]));
-
- DEBUG ((EFI_D_ERROR, "\n SP 0x%016lx ELR 0x%016lx SPSR 0x%08lx FPSR 0x%08lx\n ESR 0x%08lx FAR 0x%016lx\n", SystemContext.SystemContextAArch64->SP, SystemContext.SystemContextAArch64->ELR, SystemContext.SystemContextAArch64->SPSR, SystemContext.SystemContextAArch64->FPSR, SystemContext.SystemContextAArch64->ESR, SystemContext.SystemContextAArch64->FAR));
-
- DEBUG ((EFI_D_ERROR, "\n ESR : EC 0x%02x IL 0x%x ISS 0x%08x\n", (SystemContext.SystemContextAArch64->ESR & 0xFC000000) >> 26, (SystemContext.SystemContextAArch64->ESR >> 25) & 0x1, SystemContext.SystemContextAArch64->ESR & 0x1FFFFFF ));
-
- DescribeExceptionSyndrome (SystemContext.SystemContextAArch64->ESR);
-
- DEBUG ((EFI_D_ERROR, "\nStack dump:\n"));
- for (Offset = -256; Offset < 256; Offset += 32) {
- DEBUG ((EFI_D_ERROR, "%c %013lx: %016lx %016lx %016lx %016lx\n",
- Offset == 0 ? '>' : ' ',
- SystemContext.SystemContextAArch64->SP + Offset,
- *(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset),
- *(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 8),
- *(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 16),
- *(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 24)));
- }
-
- ASSERT (FALSE);
- CpuDeadLoop ();
-}
diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c b/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c deleted file mode 100644 index 0b9da031b4..0000000000 --- a/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c +++ /dev/null @@ -1,276 +0,0 @@ -/** @file
- Default exception handler
-
- Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2012, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Uefi.h>
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PeCoffGetEntryPointLib.h>
-#include <Library/PrintLib.h>
-#include <Library/ArmDisassemblerLib.h>
-#include <Library/SerialPortLib.h>
-
-#include <Guid/DebugImageInfoTable.h>
-
-#include <Protocol/DebugSupport.h>
-#include <Library/DefaultExceptionHandlerLib.h>
-
-//
-// The number of elements in a CHAR8 array, including the terminating NUL, that
-// is meant to hold the string rendering of the CPSR.
-//
-#define CPSR_STRING_SIZE 32
-
-typedef struct {
- UINT32 BIT;
- CHAR8 Char;
-} CPSR_CHAR;
-
-CHAR8 *
-GetImageName (
- IN UINTN FaultAddress,
- OUT UINTN *ImageBase,
- OUT UINTN *PeCoffSizeOfHeaders
- );
-
-/**
- Convert the Current Program Status Register (CPSR) to a string. The string is
- a defacto standard in the ARM world.
-
- It is possible to add extra bits by adding them to CpsrChar array.
-
- @param Cpsr ARM CPSR register value
- @param ReturnStr CPSR_STRING_SIZE byte string that contains string
- version of CPSR
-
-**/
-VOID
-CpsrString (
- IN UINT32 Cpsr,
- OUT CHAR8 *ReturnStr
- )
-{
- UINTN Index;
- CHAR8* Str;
- CHAR8* ModeStr;
- CPSR_CHAR CpsrChar[] = {
- { 31, 'n' },
- { 30, 'z' },
- { 29, 'c' },
- { 28, 'v' },
-
- { 9, 'e' },
- { 8, 'a' },
- { 7, 'i' },
- { 6, 'f' },
- { 5, 't' },
- { 0, '?' }
- };
-
- Str = ReturnStr;
-
- for (Index = 0; CpsrChar[Index].BIT != 0; Index++, Str++) {
- *Str = CpsrChar[Index].Char;
- if ((Cpsr & (1 << CpsrChar[Index].BIT)) != 0) {
- // Concert to upper case if bit is set
- *Str &= ~0x20;
- }
- }
-
- *Str++ = '_';
- *Str = '\0';
-
- switch (Cpsr & 0x1f) {
- case 0x10:
- ModeStr = "usr";
- break;
- case 0x011:
- ModeStr = "fiq";
- break;
- case 0x12:
- ModeStr = "irq";
- break;
- case 0x13:
- ModeStr = "svc";
- break;
- case 0x16:
- ModeStr = "mon";
- break;
- case 0x17:
- ModeStr = "abt";
- break;
- case 0x1b:
- ModeStr = "und";
- break;
- case 0x1f:
- ModeStr = "sys";
- break;
-
- default:
- ModeStr = "???";
- break;
- }
-
- //
- // See the interface contract in the leading comment block.
- //
- AsciiStrCatS (Str, CPSR_STRING_SIZE - (Str - ReturnStr), ModeStr);
-}
-
-CHAR8 *
-FaultStatusToString (
- IN UINT32 Status
- )
-{
- CHAR8 *FaultSource;
-
- switch (Status) {
- case 0x01: FaultSource = "Alignment fault"; break;
- case 0x02: FaultSource = "Debug event fault"; break;
- case 0x03: FaultSource = "Access Flag fault on Section"; break;
- case 0x04: FaultSource = "Cache maintenance operation fault[2]"; break;
- case 0x05: FaultSource = "Translation fault on Section"; break;
- case 0x06: FaultSource = "Access Flag fault on Page"; break;
- case 0x07: FaultSource = "Translation fault on Page"; break;
- case 0x08: FaultSource = "Precise External Abort"; break;
- case 0x09: FaultSource = "Domain fault on Section"; break;
- case 0x0b: FaultSource = "Domain fault on Page"; break;
- case 0x0c: FaultSource = "External abort on translation, first level"; break;
- case 0x0d: FaultSource = "Permission fault on Section"; break;
- case 0x0e: FaultSource = "External abort on translation, second level"; break;
- case 0x0f: FaultSource = "Permission fault on Page"; break;
- case 0x16: FaultSource = "Imprecise External Abort"; break;
- default: FaultSource = "No function"; break;
- }
-
- return FaultSource;
-}
-
-STATIC CHAR8 *gExceptionTypeString[] = {
- "Reset",
- "Undefined OpCode",
- "SVC",
- "Prefetch Abort",
- "Data Abort",
- "Undefined",
- "IRQ",
- "FIQ"
-};
-
-/**
- This is the default action to take on an unexpected exception
-
- Since this is exception context don't do anything crazy like try to allcoate memory.
-
- @param ExceptionType Type of the exception
- @param SystemContext Register state at the time of the Exception
-
-
-**/
-VOID
-DefaultExceptionHandler (
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN OUT EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- CHAR8 Buffer[100];
- UINTN CharCount;
- UINT32 DfsrStatus;
- UINT32 IfsrStatus;
- BOOLEAN DfsrWrite;
- UINT32 PcAdjust = 0;
-
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"\n%a Exception PC at 0x%08x CPSR 0x%08x ",
- gExceptionTypeString[ExceptionType], SystemContext.SystemContextArm->PC, SystemContext.SystemContextArm->CPSR);
- SerialPortWrite ((UINT8 *) Buffer, CharCount);
-
- DEBUG_CODE_BEGIN ();
- CHAR8 *Pdb;
- UINT32 ImageBase;
- UINT32 PeCoffSizeOfHeader;
- UINT32 Offset;
- CHAR8 CpsrStr[CPSR_STRING_SIZE]; // char per bit. Lower 5-bits are mode
- // that is a 3 char string
- CHAR8 Buffer[80];
- UINT8 *DisAsm;
- UINT32 ItBlock;
-
- CpsrString (SystemContext.SystemContextArm->CPSR, CpsrStr);
- DEBUG ((EFI_D_ERROR, "%a\n", CpsrStr));
-
- Pdb = GetImageName (SystemContext.SystemContextArm->PC, &ImageBase, &PeCoffSizeOfHeader);
- Offset = SystemContext.SystemContextArm->PC - ImageBase;
- if (Pdb != NULL) {
- DEBUG ((EFI_D_ERROR, "%a\n", Pdb));
-
- //
- // A PE/COFF image loads its headers into memory so the headers are
- // included in the linked addresses. ELF and Mach-O images do not
- // include the headers so the first byte of the image is usually
- // text (code). If you look at link maps from ELF or Mach-O images
- // you need to subtract out the size of the PE/COFF header to get
- // get the offset that matches the link map.
- //
- DEBUG ((EFI_D_ERROR, "loaded at 0x%08x (PE/COFF offset) 0x%x (ELF or Mach-O offset) 0x%x", ImageBase, Offset, Offset - PeCoffSizeOfHeader));
-
- // If we come from an image it is safe to show the instruction. We know it should not fault
- DisAsm = (UINT8 *)(UINTN)SystemContext.SystemContextArm->PC;
- ItBlock = 0;
- DisassembleInstruction (&DisAsm, (SystemContext.SystemContextArm->CPSR & BIT5) == BIT5, TRUE, &ItBlock, Buffer, sizeof (Buffer));
- DEBUG ((EFI_D_ERROR, "\n%a", Buffer));
-
- switch (ExceptionType) {
- case EXCEPT_ARM_UNDEFINED_INSTRUCTION:
- case EXCEPT_ARM_SOFTWARE_INTERRUPT:
- case EXCEPT_ARM_PREFETCH_ABORT:
- case EXCEPT_ARM_DATA_ABORT:
- // advance PC past the faulting instruction
- PcAdjust = (UINTN)DisAsm - SystemContext.SystemContextArm->PC;
- break;
-
- default:
- break;
- }
-
- }
- DEBUG_CODE_END ();
- DEBUG ((EFI_D_ERROR, "\n R0 0x%08x R1 0x%08x R2 0x%08x R3 0x%08x\n", SystemContext.SystemContextArm->R0, SystemContext.SystemContextArm->R1, SystemContext.SystemContextArm->R2, SystemContext.SystemContextArm->R3));
- DEBUG ((EFI_D_ERROR, " R4 0x%08x R5 0x%08x R6 0x%08x R7 0x%08x\n", SystemContext.SystemContextArm->R4, SystemContext.SystemContextArm->R5, SystemContext.SystemContextArm->R6, SystemContext.SystemContextArm->R7));
- DEBUG ((EFI_D_ERROR, " R8 0x%08x R9 0x%08x R10 0x%08x R11 0x%08x\n", SystemContext.SystemContextArm->R8, SystemContext.SystemContextArm->R9, SystemContext.SystemContextArm->R10, SystemContext.SystemContextArm->R11));
- DEBUG ((EFI_D_ERROR, " R12 0x%08x SP 0x%08x LR 0x%08x PC 0x%08x\n", SystemContext.SystemContextArm->R12, SystemContext.SystemContextArm->SP, SystemContext.SystemContextArm->LR, SystemContext.SystemContextArm->PC));
- DEBUG ((EFI_D_ERROR, "DFSR 0x%08x DFAR 0x%08x IFSR 0x%08x IFAR 0x%08x\n", SystemContext.SystemContextArm->DFSR, SystemContext.SystemContextArm->DFAR, SystemContext.SystemContextArm->IFSR, SystemContext.SystemContextArm->IFAR));
-
- // Bit10 is Status[4] Bit3:0 is Status[3:0]
- DfsrStatus = (SystemContext.SystemContextArm->DFSR & 0xf) | ((SystemContext.SystemContextArm->DFSR >> 6) & 0x10);
- DfsrWrite = (SystemContext.SystemContextArm->DFSR & BIT11) != 0;
- if (DfsrStatus != 0x00) {
- DEBUG ((EFI_D_ERROR, " %a: %a 0x%08x\n", FaultStatusToString (DfsrStatus), DfsrWrite ? "write to" : "read from", SystemContext.SystemContextArm->DFAR));
- }
-
- IfsrStatus = (SystemContext.SystemContextArm->IFSR & 0xf) | ((SystemContext.SystemContextArm->IFSR >> 6) & 0x10);
- if (IfsrStatus != 0) {
- DEBUG ((EFI_D_ERROR, " Instruction %a at 0x%08x\n", FaultStatusToString (SystemContext.SystemContextArm->IFSR & 0xf), SystemContext.SystemContextArm->IFAR));
- }
-
- DEBUG ((EFI_D_ERROR, "\n"));
- ASSERT (FALSE);
-
- // Clear the error registers that we have already displayed incase some one wants to keep going
- SystemContext.SystemContextArm->DFSR = 0;
- SystemContext.SystemContextArm->IFSR = 0;
-
- // If some one is stepping past the exception handler adjust the PC to point to the next instruction
- SystemContext.SystemContextArm->PC += PcAdjust;
-}
diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerBase.c b/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerBase.c deleted file mode 100644 index 4a54298b11..0000000000 --- a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerBase.c +++ /dev/null @@ -1,35 +0,0 @@ -/** @file
-
- Copyright (c) 2012, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-
-/**
-
- @param FaultAddress Address to find PE/COFF image for.
- @param ImageBase Return load address of found image
- @param PeCoffSizeOfHeaders Return the size of the PE/COFF header for the image that was found
-
- @retval NULL FaultAddress not in a loaded PE/COFF image.
- @retval Path and file name of PE/COFF image.
-
-**/
-CHAR8 *
-GetImageName (
- IN UINTN FaultAddress,
- OUT UINTN *ImageBase,
- OUT UINTN *PeCoffSizeOfHeaders
- )
-{
- return NULL;
-}
diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf b/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf deleted file mode 100644 index f5421b1240..0000000000 --- a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf +++ /dev/null @@ -1,47 +0,0 @@ -#/** @file
-#
-# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = DefaultExceptionHandlerLib
- FILE_GUID = EACDB354-DF1A-4AF9-A171-499737ED818F
- MODULE_TYPE = UEFI_DRIVER
- VERSION_STRING = 1.0
- LIBRARY_CLASS = DefaultExceptionHandlerLib
-
-[Sources.common]
- DefaultExceptionHandlerUefi.c
-
-[Sources.ARM]
- Arm/DefaultExceptionHandler.c
-
-[Sources.AARCH64]
- AArch64/DefaultExceptionHandler.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- UefiLib
- BaseLib
- PrintLib
- DebugLib
- PeCoffGetEntryPointLib
- ArmDisassemblerLib
- SerialPortLib
-
-[Guids]
- gEfiDebugImageInfoTableGuid
diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf b/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf deleted file mode 100644 index b53a5e89f5..0000000000 --- a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf +++ /dev/null @@ -1,45 +0,0 @@ -#/** @file
-#
-# Copyright (c) 2012, ARM Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = DefaultExceptionHandlerBaseLib
- FILE_GUID = 3d5261d5-5eb7-4559-98e7-475aa9d0dc42
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = DefaultExceptionHandlerLib
-
-[Sources.common]
- DefaultExceptionHandlerBase.c
-
-[Sources.ARM]
- Arm/DefaultExceptionHandler.c
-
-[Sources.AARCH64]
- AArch64/DefaultExceptionHandler.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- BaseLib
- PrintLib
- DebugLib
- PeCoffGetEntryPointLib
- ArmDisassemblerLib
- SerialPortLib
-
-[Guids]
- gEfiDebugImageInfoTableGuid
diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerUefi.c b/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerUefi.c deleted file mode 100644 index 4e87a1005d..0000000000 --- a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerUefi.c +++ /dev/null @@ -1,75 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Uefi.h>
-#include <Library/PeCoffGetEntryPointLib.h>
-#include <Library/UefiLib.h>
-
-#include <Guid/DebugImageInfoTable.h>
-
-/**
- Use the EFI Debug Image Table to lookup the FaultAddress and find which PE/COFF image
- it came from. As long as the PE/COFF image contains a debug directory entry a
- string can be returned. For ELF and Mach-O images the string points to the Mach-O or ELF
- image. Microsoft tools contain a pointer to the PDB file that contains the debug information.
-
- @param FaultAddress Address to find PE/COFF image for.
- @param ImageBase Return load address of found image
- @param PeCoffSizeOfHeaders Return the size of the PE/COFF header for the image that was found
-
- @retval NULL FaultAddress not in a loaded PE/COFF image.
- @retval Path and file name of PE/COFF image.
-
-**/
-CHAR8 *
-GetImageName (
- IN UINTN FaultAddress,
- OUT UINTN *ImageBase,
- OUT UINTN *PeCoffSizeOfHeaders
- )
-{
- EFI_STATUS Status;
- EFI_DEBUG_IMAGE_INFO_TABLE_HEADER *DebugTableHeader;
- EFI_DEBUG_IMAGE_INFO *DebugTable;
- UINTN Entry;
- CHAR8 *Address;
-
- Status = EfiGetSystemConfigurationTable (&gEfiDebugImageInfoTableGuid, (VOID **)&DebugTableHeader);
- if (EFI_ERROR (Status)) {
- return NULL;
- }
-
- DebugTable = DebugTableHeader->EfiDebugImageInfoTable;
- if (DebugTable == NULL) {
- return NULL;
- }
-
- Address = (CHAR8 *)(UINTN)FaultAddress;
- for (Entry = 0; Entry < DebugTableHeader->TableSize; Entry++, DebugTable++) {
- if (DebugTable->NormalImage != NULL) {
- if ((DebugTable->NormalImage->ImageInfoType == EFI_DEBUG_IMAGE_INFO_TYPE_NORMAL) &&
- (DebugTable->NormalImage->LoadedImageProtocolInstance != NULL)) {
- if ((Address >= (CHAR8 *)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase) &&
- (Address <= ((CHAR8 *)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase + DebugTable->NormalImage->LoadedImageProtocolInstance->ImageSize))) {
- *ImageBase = (UINTN)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase;
- *PeCoffSizeOfHeaders = PeCoffGetSizeOfHeaders ((VOID *)(UINTN)*ImageBase);
- return PeCoffLoaderGetPdbPointer (DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase);
- }
- }
- }
- }
-
- return NULL;
-}
-
diff --git a/ArmPkg/Library/GccLto/liblto-aarch64.a b/ArmPkg/Library/GccLto/liblto-aarch64.a Binary files differdeleted file mode 100644 index 2ab00238f0..0000000000 --- a/ArmPkg/Library/GccLto/liblto-aarch64.a +++ /dev/null diff --git a/ArmPkg/Library/GccLto/liblto-aarch64.s b/ArmPkg/Library/GccLto/liblto-aarch64.s deleted file mode 100644 index 45000d3277..0000000000 --- a/ArmPkg/Library/GccLto/liblto-aarch64.s +++ /dev/null @@ -1,27 +0,0 @@ -// -// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR> -// -// This program and the accompanying materials are licensed and made available under -// the terms and conditions of the BSD License that accompanies this distribution. -// The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php. -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// - -// -// GCC in LTO mode interoperates poorly with non-standard libraries that -// provide implementations of compiler intrinsics such as memcpy/memset -// or the stack protector entry points. -// -// By referencing these functions from a non-LTO object that can be passed -// to the linker via the -plugin-opt=-pass-through=-lxxx options, the -// intrinsics are included in the link in a way that allows them to be -// pruned again if no other references to them exist. -// - - .long memcpy - . - .long memset - . - .long __stack_chk_fail - . - .long __stack_chk_guard - . diff --git a/ArmPkg/Library/GccLto/liblto-arm.a b/ArmPkg/Library/GccLto/liblto-arm.a Binary files differdeleted file mode 100644 index d811c09573..0000000000 --- a/ArmPkg/Library/GccLto/liblto-arm.a +++ /dev/null diff --git a/ArmPkg/Library/GccLto/liblto-arm.s b/ArmPkg/Library/GccLto/liblto-arm.s deleted file mode 100644 index bc16320a46..0000000000 --- a/ArmPkg/Library/GccLto/liblto-arm.s +++ /dev/null @@ -1,61 +0,0 @@ -// -// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR> -// -// This program and the accompanying materials are licensed and made available under -// the terms and conditions of the BSD License that accompanies this distribution. -// The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php. -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// - -// -// GCC in LTO mode interoperates poorly with non-standard libraries that -// provide implementations of compiler intrinsics such as memcpy/memset -// or the stack protector entry points. -// -// By referencing these functions from a non-LTO object that can be passed -// to the linker via the -plugin-opt=-pass-through=-lxxx options, the -// intrinsics are included in the link in a way that allows them to be -// pruned again if no other references to them exist. -// - - .long memcpy - . - .long memset - . - .long __stack_chk_fail - . - .long __stack_chk_guard - . - .long __ashrdi3 - . - .long __ashldi3 - . - .long __aeabi_idiv - . - .long __aeabi_idivmod - . - .long __aeabi_uidiv - . - .long __aeabi_uidivmod - . - .long __divdi3 - . - .long __divsi3 - . - .long __lshrdi3 - . - .long __aeabi_memcpy - . - .long __aeabi_memset - . - .long memmove - . - .long __modsi3 - . - .long __moddi3 - . - .long __muldi3 - . - .long __aeabi_lmul - . - .long __ARM_ll_mullu - . - .long __udivsi3 - . - .long __umodsi3 - . - .long __udivdi3 - . - .long __umoddi3 - . - .long __udivmoddi4 - . - .long __clzsi2 - . - .long __ctzsi2 - . - .long __ucmpdi2 - . - .long __switch8 - . - .long __switchu8 - . - .long __switch16 - . - .long __switch32 - . - .long __aeabi_ulcmp - . - .long __aeabi_uldivmod - . - .long __aeabi_ldivmod - . - .long __aeabi_llsr - . - .long __aeabi_llsl - . diff --git a/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c b/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c deleted file mode 100644 index 9320637525..0000000000 --- a/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c +++ /dev/null @@ -1,85 +0,0 @@ -/** @file
- PEI Services Table Pointer Library.
-
- This library is used for PEIM which does executed from flash device directly but
- executed in memory.
-
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
- Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-#include <Library/PeiServicesTablePointerLib.h>
-#include <Library/ArmLib.h>
-#include <Library/DebugLib.h>
-
-/**
- Caches a pointer PEI Services Table.
-
- Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer
- in a platform specific manner.
-
- If PeiServicesTablePointer is NULL, then ASSERT().
-
- @param PeiServicesTablePointer The address of PeiServices pointer.
-**/
-VOID
-EFIAPI
-SetPeiServicesTablePointer (
- IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer
- )
-{
- ArmWriteTpidrurw((UINTN)PeiServicesTablePointer);
-}
-
-/**
- Retrieves the cached value of the PEI Services Table pointer.
-
- Returns the cached value of the PEI Services Table pointer in a CPU specific manner
- as specified in the CPU binding section of the Platform Initialization Pre-EFI
- Initialization Core Interface Specification.
-
- If the cached PEI Services Table pointer is NULL, then ASSERT().
-
- @return The pointer to PeiServices.
-
-**/
-CONST EFI_PEI_SERVICES **
-EFIAPI
-GetPeiServicesTablePointer (
- VOID
- )
-{
- return (CONST EFI_PEI_SERVICES **)ArmReadTpidrurw();
-}
-
-/**
-Perform CPU specific actions required to migrate the PEI Services Table
-pointer from temporary RAM to permanent RAM.
-
-For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
-immediately preceding the Interrupt Descriptor Table (IDT) in memory.
-For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
-immediately preceding the Interrupt Descriptor Table (IDT) in memory.
-For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
-a dedicated CPU register. This means that there is no memory storage
-associated with storing the PEI Services Table pointer, so no additional
-migration actions are required for Itanium or ARM CPUs.
-
-**/
-VOID
-EFIAPI
-MigratePeiServicesTablePointer(
-VOID
-)
-{
- return;
-}
diff --git a/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf b/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf deleted file mode 100644 index fd75977769..0000000000 --- a/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf +++ /dev/null @@ -1,45 +0,0 @@ -## @file
-# Instance of PEI Services Table Pointer Library using global variable for the table pointer.
-#
-# PEI Services Table Pointer Library implementation that retrieves a pointer to the
-# PEI Services Table from a global variable. Not available to modules that execute from
-# read-only memory.
-#
-# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
-# Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = PeiServicesTablePointerLib
- FILE_GUID = C3C9C4ED-EB8A-4548-BE1B-ABB0B6F35B1E
- MODULE_TYPE = PEIM
- VERSION_STRING = 1.0
- LIBRARY_CLASS = PeiServicesTablePointerLib|PEIM PEI_CORE SEC
-
-#
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)
-#
-
-[Sources]
- PeiServicesTablePointer.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- ArmLib
- DebugLib
-
-[Pcd]
-
diff --git a/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c b/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c deleted file mode 100644 index 6c0b352ae3..0000000000 --- a/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c +++ /dev/null @@ -1,577 +0,0 @@ -/** @file
- Implementation for PlatformBootManagerLib library class interfaces.
-
- Copyright (C) 2015-2016, Red Hat, Inc.
- Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
- Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.<BR>
- Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials are licensed and made available
- under the terms and conditions of the BSD License which accompanies this
- distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
- WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <IndustryStandard/Pci22.h>
-#include <Library/BootLogoLib.h>
-#include <Library/DevicePathLib.h>
-#include <Library/PcdLib.h>
-#include <Library/UefiBootManagerLib.h>
-#include <Library/UefiLib.h>
-#include <Protocol/DevicePath.h>
-#include <Protocol/GraphicsOutput.h>
-#include <Protocol/LoadedImage.h>
-#include <Protocol/PciIo.h>
-#include <Protocol/PciRootBridgeIo.h>
-#include <Guid/EventGroup.h>
-#include <Guid/TtyTerm.h>
-
-#include "PlatformBm.h"
-
-#define DP_NODE_LEN(Type) { (UINT8)sizeof (Type), (UINT8)(sizeof (Type) >> 8) }
-
-#pragma pack (1)
-typedef struct {
- VENDOR_DEVICE_PATH SerialDxe;
- UART_DEVICE_PATH Uart;
- VENDOR_DEFINED_DEVICE_PATH TermType;
- EFI_DEVICE_PATH_PROTOCOL End;
-} PLATFORM_SERIAL_CONSOLE;
-#pragma pack ()
-
-#define SERIAL_DXE_FILE_GUID { \
- 0xD3987D4B, 0x971A, 0x435F, \
- { 0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41 } \
- }
-
-STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
- //
- // VENDOR_DEVICE_PATH SerialDxe
- //
- {
- { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) },
- SERIAL_DXE_FILE_GUID
- },
-
- //
- // UART_DEVICE_PATH Uart
- //
- {
- { MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) },
- 0, // Reserved
- FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate
- FixedPcdGet8 (PcdUartDefaultDataBits), // DataBits
- FixedPcdGet8 (PcdUartDefaultParity), // Parity
- FixedPcdGet8 (PcdUartDefaultStopBits) // StopBits
- },
-
- //
- // VENDOR_DEFINED_DEVICE_PATH TermType
- //
- {
- {
- MESSAGING_DEVICE_PATH, MSG_VENDOR_DP,
- DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH)
- }
- //
- // Guid to be filled in dynamically
- //
- },
-
- //
- // EFI_DEVICE_PATH_PROTOCOL End
- //
- {
- END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
- DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
- }
-};
-
-
-#pragma pack (1)
-typedef struct {
- USB_CLASS_DEVICE_PATH Keyboard;
- EFI_DEVICE_PATH_PROTOCOL End;
-} PLATFORM_USB_KEYBOARD;
-#pragma pack ()
-
-STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
- //
- // USB_CLASS_DEVICE_PATH Keyboard
- //
- {
- {
- MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP,
- DP_NODE_LEN (USB_CLASS_DEVICE_PATH)
- },
- 0xFFFF, // VendorId: any
- 0xFFFF, // ProductId: any
- 3, // DeviceClass: HID
- 1, // DeviceSubClass: boot
- 1 // DeviceProtocol: keyboard
- },
-
- //
- // EFI_DEVICE_PATH_PROTOCOL End
- //
- {
- END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
- DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
- }
-};
-
-
-/**
- Check if the handle satisfies a particular condition.
-
- @param[in] Handle The handle to check.
- @param[in] ReportText A caller-allocated string passed in for reporting
- purposes. It must never be NULL.
-
- @retval TRUE The condition is satisfied.
- @retval FALSE Otherwise. This includes the case when the condition could not
- be fully evaluated due to an error.
-**/
-typedef
-BOOLEAN
-(EFIAPI *FILTER_FUNCTION) (
- IN EFI_HANDLE Handle,
- IN CONST CHAR16 *ReportText
- );
-
-
-/**
- Process a handle.
-
- @param[in] Handle The handle to process.
- @param[in] ReportText A caller-allocated string passed in for reporting
- purposes. It must never be NULL.
-**/
-typedef
-VOID
-(EFIAPI *CALLBACK_FUNCTION) (
- IN EFI_HANDLE Handle,
- IN CONST CHAR16 *ReportText
- );
-
-/**
- Locate all handles that carry the specified protocol, filter them with a
- callback function, and pass each handle that passes the filter to another
- callback.
-
- @param[in] ProtocolGuid The protocol to look for.
-
- @param[in] Filter The filter function to pass each handle to. If this
- parameter is NULL, then all handles are processed.
-
- @param[in] Process The callback function to pass each handle to that
- clears the filter.
-**/
-STATIC
-VOID
-FilterAndProcess (
- IN EFI_GUID *ProtocolGuid,
- IN FILTER_FUNCTION Filter OPTIONAL,
- IN CALLBACK_FUNCTION Process
- )
-{
- EFI_STATUS Status;
- EFI_HANDLE *Handles;
- UINTN NoHandles;
- UINTN Idx;
-
- Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid,
- NULL /* SearchKey */, &NoHandles, &Handles);
- if (EFI_ERROR (Status)) {
- //
- // This is not an error, just an informative condition.
- //
- DEBUG ((EFI_D_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid,
- Status));
- return;
- }
-
- ASSERT (NoHandles > 0);
- for (Idx = 0; Idx < NoHandles; ++Idx) {
- CHAR16 *DevicePathText;
- STATIC CHAR16 Fallback[] = L"<device path unavailable>";
-
- //
- // The ConvertDevicePathToText() function handles NULL input transparently.
- //
- DevicePathText = ConvertDevicePathToText (
- DevicePathFromHandle (Handles[Idx]),
- FALSE, // DisplayOnly
- FALSE // AllowShortcuts
- );
- if (DevicePathText == NULL) {
- DevicePathText = Fallback;
- }
-
- if (Filter == NULL || Filter (Handles[Idx], DevicePathText)) {
- Process (Handles[Idx], DevicePathText);
- }
-
- if (DevicePathText != Fallback) {
- FreePool (DevicePathText);
- }
- }
- gBS->FreePool (Handles);
-}
-
-
-/**
- This FILTER_FUNCTION checks if a handle corresponds to a PCI display device.
-**/
-STATIC
-BOOLEAN
-EFIAPI
-IsPciDisplay (
- IN EFI_HANDLE Handle,
- IN CONST CHAR16 *ReportText
- )
-{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- PCI_TYPE00 Pci;
-
- Status = gBS->HandleProtocol (Handle, &gEfiPciIoProtocolGuid,
- (VOID**)&PciIo);
- if (EFI_ERROR (Status)) {
- //
- // This is not an error worth reporting.
- //
- return FALSE;
- }
-
- Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, 0 /* Offset */,
- sizeof Pci / sizeof (UINT32), &Pci);
- if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status));
- return FALSE;
- }
-
- return IS_PCI_DISPLAY (&Pci);
-}
-
-
-/**
- This CALLBACK_FUNCTION attempts to connect a handle non-recursively, asking
- the matching driver to produce all first-level child handles.
-**/
-STATIC
-VOID
-EFIAPI
-Connect (
- IN EFI_HANDLE Handle,
- IN CONST CHAR16 *ReportText
- )
-{
- EFI_STATUS Status;
-
- Status = gBS->ConnectController (
- Handle, // ControllerHandle
- NULL, // DriverImageHandle
- NULL, // RemainingDevicePath -- produce all children
- FALSE // Recursive
- );
- DEBUG ((EFI_ERROR (Status) ? EFI_D_ERROR : EFI_D_VERBOSE, "%a: %s: %r\n",
- __FUNCTION__, ReportText, Status));
-}
-
-
-/**
- This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from the
- handle, and adds it to ConOut and ErrOut.
-**/
-STATIC
-VOID
-EFIAPI
-AddOutput (
- IN EFI_HANDLE Handle,
- IN CONST CHAR16 *ReportText
- )
-{
- EFI_STATUS Status;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
-
- DevicePath = DevicePathFromHandle (Handle);
- if (DevicePath == NULL) {
- DEBUG ((EFI_D_ERROR, "%a: %s: handle %p: device path not found\n",
- __FUNCTION__, ReportText, Handle));
- return;
- }
-
- Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);
- if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__,
- ReportText, Status));
- return;
- }
-
- Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);
- if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__,
- ReportText, Status));
- return;
- }
-
- DEBUG ((EFI_D_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__,
- ReportText));
-}
-
-STATIC
-VOID
-PlatformRegisterFvBootOption (
- CONST EFI_GUID *FileGuid,
- CHAR16 *Description,
- UINT32 Attributes
- )
-{
- EFI_STATUS Status;
- INTN OptionIndex;
- EFI_BOOT_MANAGER_LOAD_OPTION NewOption;
- EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
- UINTN BootOptionCount;
- MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;
- EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
-
- Status = gBS->HandleProtocol (
- gImageHandle,
- &gEfiLoadedImageProtocolGuid,
- (VOID **) &LoadedImage
- );
- ASSERT_EFI_ERROR (Status);
-
- EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid);
- DevicePath = DevicePathFromHandle (LoadedImage->DeviceHandle);
- ASSERT (DevicePath != NULL);
- DevicePath = AppendDevicePathNode (
- DevicePath,
- (EFI_DEVICE_PATH_PROTOCOL *) &FileNode
- );
- ASSERT (DevicePath != NULL);
-
- Status = EfiBootManagerInitializeLoadOption (
- &NewOption,
- LoadOptionNumberUnassigned,
- LoadOptionTypeBoot,
- Attributes,
- Description,
- DevicePath,
- NULL,
- 0
- );
- ASSERT_EFI_ERROR (Status);
- FreePool (DevicePath);
-
- BootOptions = EfiBootManagerGetLoadOptions (
- &BootOptionCount, LoadOptionTypeBoot
- );
-
- OptionIndex = EfiBootManagerFindLoadOption (
- &NewOption, BootOptions, BootOptionCount
- );
-
- if (OptionIndex == -1) {
- Status = EfiBootManagerAddLoadOptionVariable (&NewOption, MAX_UINTN);
- ASSERT_EFI_ERROR (Status);
- }
- EfiBootManagerFreeLoadOption (&NewOption);
- EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
-}
-
-
-STATIC
-VOID
-PlatformRegisterOptionsAndKeys (
- VOID
- )
-{
- EFI_STATUS Status;
- EFI_INPUT_KEY Enter;
- EFI_INPUT_KEY F2;
- EFI_INPUT_KEY Esc;
- EFI_BOOT_MANAGER_LOAD_OPTION BootOption;
-
- //
- // Register ENTER as CONTINUE key
- //
- Enter.ScanCode = SCAN_NULL;
- Enter.UnicodeChar = CHAR_CARRIAGE_RETURN;
- Status = EfiBootManagerRegisterContinueKeyOption (0, &Enter, NULL);
- ASSERT_EFI_ERROR (Status);
-
- //
- // Map F2 and ESC to Boot Manager Menu
- //
- F2.ScanCode = SCAN_F2;
- F2.UnicodeChar = CHAR_NULL;
- Esc.ScanCode = SCAN_ESC;
- Esc.UnicodeChar = CHAR_NULL;
- Status = EfiBootManagerGetBootManagerMenu (&BootOption);
- ASSERT_EFI_ERROR (Status);
- Status = EfiBootManagerAddKeyOptionVariable (
- NULL, (UINT16) BootOption.OptionNumber, 0, &F2, NULL
- );
- ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
- Status = EfiBootManagerAddKeyOptionVariable (
- NULL, (UINT16) BootOption.OptionNumber, 0, &Esc, NULL
- );
- ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
-}
-
-
-//
-// BDS Platform Functions
-//
-/**
- Do the platform init, can be customized by OEM/IBV
- Possible things that can be done in PlatformBootManagerBeforeConsole:
- > Update console variable: 1. include hot-plug devices;
- > 2. Clear ConIn and add SOL for AMT
- > Register new Driver#### or Boot####
- > Register new Key####: e.g.: F12
- > Signal ReadyToLock event
- > Authentication action: 1. connect Auth devices;
- > 2. Identify auto logon user.
-**/
-VOID
-EFIAPI
-PlatformBootManagerBeforeConsole (
- VOID
- )
-{
- //
- // Signal EndOfDxe PI Event
- //
- EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);
-
- //
- // Locate the PCI root bridges and make the PCI bus driver connect each,
- // non-recursively. This will produce a number of child handles with PciIo on
- // them.
- //
- FilterAndProcess (&gEfiPciRootBridgeIoProtocolGuid, NULL, Connect);
-
- //
- // Find all display class PCI devices (using the handles from the previous
- // step), and connect them non-recursively. This should produce a number of
- // child handles with GOPs on them.
- //
- FilterAndProcess (&gEfiPciIoProtocolGuid, IsPciDisplay, Connect);
-
- //
- // Now add the device path of all handles with GOP on them to ConOut and
- // ErrOut.
- //
- FilterAndProcess (&gEfiGraphicsOutputProtocolGuid, NULL, AddOutput);
-
- //
- // Add the hardcoded short-form USB keyboard device path to ConIn.
- //
- EfiBootManagerUpdateConsoleVariable (ConIn,
- (EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard, NULL);
-
- //
- // Add the hardcoded serial console device path to ConIn, ConOut, ErrOut.
- //
- ASSERT (FixedPcdGet8 (PcdDefaultTerminalType) == 4);
- CopyGuid (&mSerialConsole.TermType.Guid, &gEfiTtyTermGuid);
-
- EfiBootManagerUpdateConsoleVariable (ConIn,
- (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
- EfiBootManagerUpdateConsoleVariable (ConOut,
- (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
- EfiBootManagerUpdateConsoleVariable (ErrOut,
- (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
-
- //
- // Register platform-specific boot options and keyboard shortcuts.
- //
- PlatformRegisterOptionsAndKeys ();
-}
-
-/**
- Do the platform specific action after the console is ready
- Possible things that can be done in PlatformBootManagerAfterConsole:
- > Console post action:
- > Dynamically switch output mode from 100x31 to 80x25 for certain senarino
- > Signal console ready platform customized event
- > Run diagnostics like memory testing
- > Connect certain devices
- > Dispatch aditional option roms
- > Special boot: e.g.: USB boot, enter UI
-**/
-VOID
-EFIAPI
-PlatformBootManagerAfterConsole (
- VOID
- )
-{
- EFI_STATUS Status;
-
- //
- // Show the splash screen.
- //
- Status = BootLogoEnableLogo ();
- if (EFI_ERROR (Status)) {
- Print (L"Press ESCAPE for boot options ");
- }
- //
- // Connect the rest of the devices.
- //
- EfiBootManagerConnectAll ();
-
- //
- // Enumerate all possible boot options.
- //
- EfiBootManagerRefreshAllBootOption ();
-
- //
- // Register UEFI Shell
- //
- PlatformRegisterFvBootOption (
- &gUefiShellFileGuid, L"UEFI Shell", LOAD_OPTION_ACTIVE
- );
-}
-
-/**
- This function is called each second during the boot manager waits the
- timeout.
-
- @param TimeoutRemain The remaining timeout.
-**/
-VOID
-EFIAPI
-PlatformBootManagerWaitCallback (
- UINT16 TimeoutRemain
- )
-{
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION Black;
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION White;
- UINT16 Timeout;
- EFI_STATUS Status;
-
- Timeout = PcdGet16 (PcdPlatformBootTimeOut);
-
- Black.Raw = 0x00000000;
- White.Raw = 0x00FFFFFF;
-
- Status = BootLogoUpdateProgress (
- White.Pixel,
- Black.Pixel,
- L"Press ESCAPE for boot options",
- White.Pixel,
- (Timeout - TimeoutRemain) * 100 / Timeout,
- 0
- );
- if (EFI_ERROR (Status)) {
- Print (L".");
- }
-}
diff --git a/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.h b/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.h deleted file mode 100644 index 0a3c626cd8..0000000000 --- a/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.h +++ /dev/null @@ -1,59 +0,0 @@ -/** @file
- Head file for BDS Platform specific code
-
- Copyright (C) 2015-2016, Red Hat, Inc.
- Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
- Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials are licensed and made available
- under the terms and conditions of the BSD License which accompanies this
- distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
- WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _PLATFORM_BM_H_
-#define _PLATFORM_BM_H_
-
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/DevicePathLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiLib.h>
-#include <Library/UefiRuntimeServicesTableLib.h>
-
-/**
- Use SystemTable Conout to stop video based Simple Text Out consoles from
- going to the video device. Put up LogoFile on every video device that is a
- console.
-
- @param[in] LogoFile File name of logo to display on the center of the
- screen.
-
- @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo
- displayed.
- @retval EFI_UNSUPPORTED Logo not found
-**/
-EFI_STATUS
-EnableQuietBoot (
- IN EFI_GUID *LogoFile
- );
-
-/**
- Use SystemTable Conout to turn on video based Simple Text Out consoles. The
- Simple Text Out screens will now be synced up with all non video output
- devices
-
- @retval EFI_SUCCESS UGA devices are back in text mode and synced up.
-**/
-EFI_STATUS
-DisableQuietBoot (
- VOID
- );
-
-#endif // _PLATFORM_BM_H_
diff --git a/ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf deleted file mode 100644 index e5ffd5db42..0000000000 --- a/ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf +++ /dev/null @@ -1,82 +0,0 @@ -## @file
-# Implementation for PlatformBootManagerLib library class interfaces.
-#
-# Copyright (C) 2015-2016, Red Hat, Inc.
-# Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
-# Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials are licensed and made available
-# under the terms and conditions of the BSD License which accompanies this
-# distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
-# IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = PlatformBootManagerLib
- FILE_GUID = 92FD2DE3-B9CB-4B35-8141-42AD34D73C9F
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
- LIBRARY_CLASS = PlatformBootManagerLib|DXE_DRIVER
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = ARM AARCH64
-#
-
-[Sources]
- PlatformBm.c
-
-[Packages]
- MdeModulePkg/MdeModulePkg.dec
- MdePkg/MdePkg.dec
- ShellPkg/ShellPkg.dec
-
-[LibraryClasses]
- BaseLib
- BaseMemoryLib
- BootLogoLib
- DebugLib
- DevicePathLib
- DxeServicesLib
- MemoryAllocationLib
- PcdLib
- PrintLib
- UefiBootManagerLib
- UefiBootServicesTableLib
- UefiLib
-
-[FeaturePcd]
- gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport
-
-[FixedPcd]
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
- gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType
-
-[Pcd]
- gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
-
-[Guids]
- gEfiFileInfoGuid
- gEfiFileSystemInfoGuid
- gEfiFileSystemVolumeLabelInfoIdGuid
- gEfiEndOfDxeEventGroupGuid
- gEfiTtyTermGuid
- gUefiShellFileGuid
-
-[Protocols]
- gEfiDevicePathProtocolGuid
- gEfiGraphicsOutputProtocolGuid
- gEfiLoadedImageProtocolGuid
- gEfiPciRootBridgeIoProtocolGuid
- gEfiSimpleFileSystemProtocolGuid
diff --git a/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c b/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c deleted file mode 100644 index abe3c378d7..0000000000 --- a/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c +++ /dev/null @@ -1,156 +0,0 @@ -/**@file
-
-Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
-Portions copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-Portions copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
-
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiDxe.h>
-#include <Library/PeCoffLib.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/PeCoffExtraActionLib.h>
-#include <Library/SemihostLib.h>
-#include <Library/PrintLib.h>
-
-/**
- Append string to debugger script file, create file if needed.
-
- This library can show up in mulitple places so we need to append the file every time we write to it.
- For example Sec can use this to load the DXE core, and the DXE core would use this to load all the
- other modules. So we have two instances of the library in the system.
-
- @param Buffer Buffer to write to file.
- @param Length Length of Buffer in bytes.
-**/
-VOID
-WriteStringToFile (
- IN VOID *Buffer,
- IN UINT32 Length
- )
-{
- // Working around and issue with the code that is commented out. For now send it to the console.
- // You can copy the console into a file and source the file as a script and you get symbols.
- // This gets you all the symbols except for SEC. To get SEC symbols you need to copy the
- // debug print in the SEC into the debugger manually
- SemihostWriteString (Buffer);
-/*
- I'm currently having issues with this code crashing the debugger. Seems like it should work.
-
- UINT32 SemihostHandle;
- UINT32 SemihostMode = SEMIHOST_FILE_MODE_WRITE | SEMIHOST_FILE_MODE_BINARY | SEMIHOST_FILE_MODE_UPDATE;
-
- SemihostFileOpen ("c:\rvi_symbols.inc", SemihostMode, &SemihostHandle);
- SemihostFileWrite (SemihostHandle, &Length, Buffer);
- SemihostFileClose (SemihostHandle);
- */
-}
-
-
-/**
- If the build is done on cygwin the paths are cygpaths.
- /cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert
- them to work with RVD commands
-
- @param Name Path to convert if needed
-
-**/
-CHAR8 *
-DeCygwinPathIfNeeded (
- IN CHAR8 *Name
- )
-{
- CHAR8 *Ptr;
- UINTN Index;
- UINTN Len;
-
- Ptr = AsciiStrStr (Name, "/cygdrive/");
- if (Ptr == NULL) {
- return Name;
- }
-
- Len = AsciiStrLen (Ptr);
-
- // convert "/cygdrive" to spaces
- for (Index = 0; Index < 9; Index++) {
- Ptr[Index] = ' ';
- }
-
- // convert /c to c:
- Ptr[9] = Ptr[10];
- Ptr[10] = ':';
-
- // switch path separators
- for (Index = 11; Index < Len; Index++) {
- if (Ptr[Index] == '/') {
- Ptr[Index] = '\\' ;
- }
- }
-
- return Name;
-}
-
-
-/**
- Performs additional actions after a PE/COFF image has been loaded and relocated.
-
- If ImageContext is NULL, then ASSERT().
-
- @param ImageContext Pointer to the image context structure that describes the
- PE/COFF image that has already been loaded and relocated.
-
-**/
-VOID
-EFIAPI
-PeCoffLoaderRelocateImageExtraAction (
- IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
- )
-{
- CHAR8 Buffer[256];
-
-#if (__ARMCC_VERSION < 500000)
- AsciiSPrint (Buffer, sizeof(Buffer), "load /a /ni /np \"%a\" &0x%08x\n", ImageContext->PdbPointer, (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders));
-#else
- AsciiSPrint (Buffer, sizeof(Buffer), "add-symbol-file %a 0x%08x\n", ImageContext->PdbPointer, (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders));
-#endif
- DeCygwinPathIfNeeded (&Buffer[16]);
-
- WriteStringToFile (Buffer, AsciiStrSize (Buffer));
-}
-
-
-
-/**
- Performs additional actions just before a PE/COFF image is unloaded. Any resources
- that were allocated by PeCoffLoaderRelocateImageExtraAction() must be freed.
-
- If ImageContext is NULL, then ASSERT().
-
- @param ImageContext Pointer to the image context structure that describes the
- PE/COFF image that is being unloaded.
-
-**/
-VOID
-EFIAPI
-PeCoffLoaderUnloadImageExtraAction (
- IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
- )
-{
- CHAR8 Buffer[256];
-
- AsciiSPrint (Buffer, sizeof(Buffer), "unload symbols_only \"%a\"\n", ImageContext->PdbPointer);
- DeCygwinPathIfNeeded (Buffer);
-
- WriteStringToFile (Buffer, AsciiStrSize (Buffer));
-}
diff --git a/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf b/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf deleted file mode 100644 index 3be0237a36..0000000000 --- a/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf +++ /dev/null @@ -1,41 +0,0 @@ -#/** @file
-# PeCoff extra action libary for DXE phase that run Unix emulator.
-#
-# Lib to provide memory journal status code reporting Routines
-# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
-# Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = RvdUnixPeCoffExtraActionLib
- FILE_GUID = 5EDEB7E7-EA55-4E92-8216-335AC98A3B11
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = PeCoffExtraActionLib
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = ARM
-#
-
-[Sources.common]
- RvdPeCoffExtraActionLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- DebugLib
- SemihostLib
diff --git a/ArmPkg/Library/SemiHostingDebugLib/DebugLib.c b/ArmPkg/Library/SemiHostingDebugLib/DebugLib.c deleted file mode 100644 index ec03edb774..0000000000 --- a/ArmPkg/Library/SemiHostingDebugLib/DebugLib.c +++ /dev/null @@ -1,246 +0,0 @@ -/** @file
- UEFI Debug Library that uses PrintLib to send messages to STDERR.
-
- Copyright (c) 2006 - 2007, Intel Corporation. All rights reserved.<BR>
- Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-
-#include <Uefi.h>
-#include <Library/DebugLib.h>
-#include <Library/PrintLib.h>
-#include <Library/PcdLib.h>
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/SemihostLib.h>
-
-//
-// Define the maximum debug and assert message length that this library supports
-//
-#define MAX_DEBUG_MESSAGE_LENGTH 0x100
-
-/**
-
- Prints a debug message to the debug output device if the specified error level is enabled.
-
- If any bit in ErrorLevel is also set in PcdDebugPrintErrorLevel, then print
- the message specified by Format and the associated variable argument list to
- the debug output device.
-
- If Format is NULL, then ASSERT().
-
- @param ErrorLevel The error level of the debug message.
- @param Format Format string for the debug message to print.
-
-**/
-VOID
-EFIAPI
-DebugPrint (
- IN UINTN ErrorLevel,
- IN CONST CHAR8 *Format,
- ...
- )
-{
- CHAR8 AsciiBuffer[MAX_DEBUG_MESSAGE_LENGTH];
- VA_LIST Marker;
-
- //
- // If Format is NULL, then ASSERT().
- //
- ASSERT (Format != NULL);
-
- //
- // Check driver debug mask value and global mask
- //
- if ((ErrorLevel & PcdGet32(PcdDebugPrintErrorLevel)) == 0) {
- return;
- }
-
- //
- // Convert the DEBUG() message to a Unicode String
- //
- VA_START (Marker, Format);
- AsciiVSPrint (AsciiBuffer, sizeof (AsciiBuffer), Format, Marker);
- VA_END (Marker);
-
- SemihostWriteString (AsciiBuffer);
-}
-
-
-/**
-
- Prints an assert message containing a filename, line number, and description.
- This may be followed by a breakpoint or a dead loop.
-
- Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n"
- to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
- PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
- DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
- CpuDeadLoop() is called. If neither of these bits are set, then this function
- returns immediately after the message is printed to the debug output device.
- DebugAssert() must actively prevent recusrsion. If DebugAssert() is called while
- processing another DebugAssert(), then DebugAssert() must return immediately.
-
- If FileName is NULL, then a <FileName> string of "(NULL) Filename" is printed.
-
- If Description is NULL, then a <Description> string of "(NULL) Description" is printed.
-
- @param FileName Pointer to the name of the source file that generated the assert condition.
- @param LineNumber The line number in the source file that generated the assert condition
- @param Description Pointer to the description of the assert condition.
-
-**/
-VOID
-EFIAPI
-DebugAssert (
- IN CONST CHAR8 *FileName,
- IN UINTN LineNumber,
- IN CONST CHAR8 *Description
- )
-{
- CHAR8 AsciiBuffer[MAX_DEBUG_MESSAGE_LENGTH];
-
- //
- // Generate the ASSERT() message in Unicode format
- //
- AsciiSPrint (AsciiBuffer, sizeof (AsciiBuffer), "ASSERT %a(%d): %a\n", FileName, LineNumber, Description);
-
- SemihostWriteString (AsciiBuffer);
-
- //
- // Generate a Breakpoint, DeadLoop, or NOP based on PCD settings
- //
- if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED) != 0) {
- CpuBreakpoint ();
- } else if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED) != 0) {
- CpuDeadLoop ();
- }
-}
-
-
-/**
-
- Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.
-
- This function fills Length bytes of Buffer with the value specified by
- PcdDebugClearMemoryValue, and returns Buffer.
-
- If Buffer is NULL, then ASSERT().
-
- If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
-
- @param Buffer Pointer to the target buffer to fill with PcdDebugClearMemoryValue.
- @param Length Number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue.
-
- @return Buffer
-
-**/
-VOID *
-EFIAPI
-DebugClearMemory (
- OUT VOID *Buffer,
- IN UINTN Length
- )
-{
- //
- // If Buffer is NULL, then ASSERT().
- //
- ASSERT (Buffer != NULL);
-
- //
- // SetMem() checks for the the ASSERT() condition on Length and returns Buffer
- //
- return SetMem (Buffer, Length, PcdGet8(PcdDebugClearMemoryValue));
-}
-
-
-/**
-
- Returns TRUE if ASSERT() macros are enabled.
-
- This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
- PcdDebugProperyMask is set. Otherwise FALSE is returned.
-
- @retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set.
- @retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear.
-
-**/
-BOOLEAN
-EFIAPI
-DebugAssertEnabled (
- VOID
- )
-{
- return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED) != 0);
-}
-
-
-/**
-
- Returns TRUE if DEBUG()macros are enabled.
-
- This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
- PcdDebugProperyMask is set. Otherwise FALSE is returned.
-
- @retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set.
- @retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is clear.
-
-**/
-BOOLEAN
-EFIAPI
-DebugPrintEnabled (
- VOID
- )
-{
- return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_PRINT_ENABLED) != 0);
-}
-
-
-/**
-
- Returns TRUE if DEBUG_CODE()macros are enabled.
-
- This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
- PcdDebugProperyMask is set. Otherwise FALSE is returned.
-
- @retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set.
- @retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is clear.
-
-**/
-BOOLEAN
-EFIAPI
-DebugCodeEnabled (
- VOID
- )
-{
- return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_CODE_ENABLED) != 0);
-}
-
-
-/**
-
- Returns TRUE if DEBUG_CLEAR_MEMORY()macro is enabled.
-
- This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of
- PcdDebugProperyMask is set. Otherwise FALSE is returned.
-
- @retval TRUE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set.
- @retval FALSE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is clear.
-
-**/
-BOOLEAN
-EFIAPI
-DebugClearMemoryEnabled (
- VOID
- )
-{
- return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED) != 0);
-}
diff --git a/ArmPkg/Library/SemiHostingDebugLib/SemiHostingDebugLib.inf b/ArmPkg/Library/SemiHostingDebugLib/SemiHostingDebugLib.inf deleted file mode 100644 index 4c2c5ff383..0000000000 --- a/ArmPkg/Library/SemiHostingDebugLib/SemiHostingDebugLib.inf +++ /dev/null @@ -1,47 +0,0 @@ -
-#/** @file
-# Debug Library for UEFI drivers
-#
-# Library to abstract Framework extensions that conflict with UEFI 2.0 Specification
-# Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = SemiHostingDebugLib
- FILE_GUID = 2A8D3FC4-8DB1-4D27-A3F3-780AF03CF848
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = DebugLib|BASE SEC DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER
-
-
-[Sources.common]
- DebugLib.c
-
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- BaseMemoryLib
- BaseLib
- PcdLib
- PrintLib
- SemihostLib
- DebugLib
-
-[Pcd.common]
- gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel
- gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue
- gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask
-
diff --git a/ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf b/ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf deleted file mode 100644 index fedf3896ad..0000000000 --- a/ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf +++ /dev/null @@ -1,34 +0,0 @@ -#/** @file
-# Semihosting serail port lib
-#
-# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = SemiHostingSerialPortLib
- FILE_GUID = E9FB2D1E-05D9-421C-8C35-6100BB0093B7
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = SerialPortLib
-
-
-[Sources.common]
- SerialPortLib.c
-
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- SemihostLib
diff --git a/ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c b/ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c deleted file mode 100644 index bc4d691523..0000000000 --- a/ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c +++ /dev/null @@ -1,144 +0,0 @@ -/** @file
- Serial I/O Port library functions with no library constructor/destructor
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Uefi.h>
-#include <Library/DebugLib.h>
-#include <Library/SemihostLib.h>
-#include <Library/SerialPortLib.h>
-
-
-/*
-
- Programmed hardware of Serial port.
-
- @return Always return EFI_UNSUPPORTED.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortInitialize (
- VOID
- )
-{
- if (SemihostConnectionSupported ()) {
- return RETURN_SUCCESS;
- } else {
- return RETURN_UNSUPPORTED;
- }
-}
-
-/**
- Write data to serial device.
-
- @param Buffer Point of data buffer which need to be writed.
- @param NumberOfBytes Number of output bytes which are cached in Buffer.
-
- @retval 0 Write data failed.
- @retval !0 Actual number of bytes writed to serial device.
-
-**/
-
-#define PRINT_BUFFER_SIZE 512
-#define PRINT_BUFFER_THRESHOLD (PRINT_BUFFER_SIZE - 4)
-
-UINTN
-EFIAPI
-SerialPortWrite (
- IN UINT8 *Buffer,
- IN UINTN NumberOfBytes
-)
-{
- UINT8 PrintBuffer[PRINT_BUFFER_SIZE];
- UINTN SourceIndex = 0;
- UINTN DestinationIndex = 0;
- UINT8 CurrentCharacter;
-
- while (SourceIndex < NumberOfBytes)
- {
- CurrentCharacter = Buffer[SourceIndex++];
-
- switch (CurrentCharacter)
- {
- case '\r':
- continue;
-
- case '\n':
- PrintBuffer[DestinationIndex++] = ' ';
- // fall through
-
- default:
- PrintBuffer[DestinationIndex++] = CurrentCharacter;
- break;
- }
-
- if (DestinationIndex > PRINT_BUFFER_THRESHOLD)
- {
- PrintBuffer[DestinationIndex] = '\0';
- SemihostWriteString ((CHAR8 *) PrintBuffer);
-
- DestinationIndex = 0;
- }
- }
-
- if (DestinationIndex > 0)
- {
- PrintBuffer[DestinationIndex] = '\0';
- SemihostWriteString ((CHAR8 *) PrintBuffer);
- }
-
- return NumberOfBytes;
-}
-
-
-/**
- Read data from serial device and save the datas in buffer.
-
- @param Buffer Point of data buffer which need to be writed.
- @param NumberOfBytes Number of output bytes which are cached in Buffer.
-
- @retval 0 Read data failed.
- @retval !0 Aactual number of bytes read from serial device.
-
-**/
-UINTN
-EFIAPI
-SerialPortRead (
- OUT UINT8 *Buffer,
- IN UINTN NumberOfBytes
-)
-{
- *Buffer = SemihostReadCharacter ();
- return 1;
-}
-
-
-
-/**
- Check to see if any data is avaiable to be read from the debug device.
-
- @retval TRUE At least one byte of data is avaiable to be read
- @retval FALSE No data is avaiable to be read
-
-**/
-BOOLEAN
-EFIAPI
-SerialPortPoll (
- VOID
- )
-{
- // Since SemiHosting read character is blocking always say we have a char ready?
- return SemihostConnectionSupported ();
-}
-
diff --git a/ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S b/ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S deleted file mode 100644 index 43a780c9ed..0000000000 --- a/ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S +++ /dev/null @@ -1,20 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLibV8.h>
-
-ASM_FUNC(GccSemihostCall)
- hlt #0xf000
- ret
diff --git a/ArmPkg/Library/SemihostLib/Arm/GccSemihost.S b/ArmPkg/Library/SemihostLib/Arm/GccSemihost.S deleted file mode 100644 index 770e512cfb..0000000000 --- a/ArmPkg/Library/SemihostLib/Arm/GccSemihost.S +++ /dev/null @@ -1,37 +0,0 @@ -#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-
-/*
- Semihosting operation request mechanism
-
- SVC 0x123456 in ARM state (for all architectures)
- SVC 0xAB in Thumb state (excluding ARMv7-M)
- BKPT 0xAB for ARMv7-M (Thumb-2 only)
-
- R0 - operation type
- R1 - block containing all other parametes
-
- lr - must be saved as svc instruction will cause an svc exception and write
- the svc lr register. That happens to be the one we are using, so we must
- save it or we will not be able to return.
- */
-ASM_FUNC(GccSemihostCall)
- stmfd sp!, {lr}
- svc #0x123456
- ldmfd sp!, {lr}
- bx lr
-
-
diff --git a/ArmPkg/Library/SemihostLib/SemihostLib.c b/ArmPkg/Library/SemihostLib/SemihostLib.c deleted file mode 100644 index b1bbcbb392..0000000000 --- a/ArmPkg/Library/SemihostLib/SemihostLib.c +++ /dev/null @@ -1,313 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-#include <Base.h>
-
-#include <Library/BaseLib.h>
-#include <Library/SemihostLib.h>
-
-#include "SemihostPrivate.h"
-
-BOOLEAN
-SemihostConnectionSupported (
- VOID
- )
-{
- return SEMIHOST_SUPPORTED;
-}
-
-RETURN_STATUS
-SemihostFileOpen (
- IN CHAR8 *FileName,
- IN UINT32 Mode,
- OUT UINTN *FileHandle
- )
-{
- SEMIHOST_FILE_OPEN_BLOCK OpenBlock;
- INT32 Result;
-
- if (FileHandle == NULL) {
- return RETURN_INVALID_PARAMETER;
- }
-
- // Remove any leading separator (e.g.: '\'). EFI Shell adds one.
- if (*FileName == '\\') {
- FileName++;
- }
-
- OpenBlock.FileName = FileName;
- OpenBlock.Mode = Mode;
- OpenBlock.NameLength = AsciiStrLen(FileName);
-
- Result = Semihost_SYS_OPEN(&OpenBlock);
-
- if (Result == -1) {
- return RETURN_NOT_FOUND;
- } else {
- *FileHandle = Result;
- return RETURN_SUCCESS;
- }
-}
-
-RETURN_STATUS
-SemihostFileSeek (
- IN UINTN FileHandle,
- IN UINTN Offset
- )
-{
- SEMIHOST_FILE_SEEK_BLOCK SeekBlock;
- INT32 Result;
-
- SeekBlock.Handle = FileHandle;
- SeekBlock.Location = Offset;
-
- Result = Semihost_SYS_SEEK(&SeekBlock);
-
- // Semihosting does not behave as documented. It returns the offset on
- // success.
- if (Result < 0) {
- return RETURN_ABORTED;
- } else {
- return RETURN_SUCCESS;
- }
-}
-
-RETURN_STATUS
-SemihostFileRead (
- IN UINTN FileHandle,
- IN OUT UINTN *Length,
- OUT VOID *Buffer
- )
-{
- SEMIHOST_FILE_READ_WRITE_BLOCK ReadBlock;
- UINT32 Result;
-
- if ((Length == NULL) || (Buffer == NULL)) {
- return RETURN_INVALID_PARAMETER;
- }
-
- ReadBlock.Handle = FileHandle;
- ReadBlock.Buffer = Buffer;
- ReadBlock.Length = *Length;
-
- Result = Semihost_SYS_READ(&ReadBlock);
-
- if ((*Length != 0) && (Result == *Length)) {
- return RETURN_ABORTED;
- } else {
- *Length -= Result;
- return RETURN_SUCCESS;
- }
-}
-
-RETURN_STATUS
-SemihostFileWrite (
- IN UINTN FileHandle,
- IN OUT UINTN *Length,
- IN VOID *Buffer
- )
-{
- SEMIHOST_FILE_READ_WRITE_BLOCK WriteBlock;
-
- if ((Length == NULL) || (Buffer == NULL)) {
- return RETURN_INVALID_PARAMETER;
- }
-
- WriteBlock.Handle = FileHandle;
- WriteBlock.Buffer = Buffer;
- WriteBlock.Length = *Length;
-
- *Length = Semihost_SYS_WRITE(&WriteBlock);
-
- if (*Length != 0)
- return RETURN_ABORTED;
- else
- return RETURN_SUCCESS;
-}
-
-RETURN_STATUS
-SemihostFileClose (
- IN UINTN FileHandle
- )
-{
- INT32 Result = Semihost_SYS_CLOSE(&FileHandle);
-
- if (Result == -1) {
- return RETURN_INVALID_PARAMETER;
- } else {
- return RETURN_SUCCESS;
- }
-}
-
-RETURN_STATUS
-SemihostFileLength (
- IN UINTN FileHandle,
- OUT UINTN *Length
- )
-{
- INT32 Result;
-
- if (Length == NULL) {
- return RETURN_INVALID_PARAMETER;
- }
-
- Result = Semihost_SYS_FLEN(&FileHandle);
-
- if (Result == -1) {
- return RETURN_ABORTED;
- } else {
- *Length = Result;
- return RETURN_SUCCESS;
- }
-}
-
-/**
- Get a temporary name for a file from the host running the debug agent.
-
- @param[out] Buffer Pointer to the buffer where the temporary name has to
- be stored
- @param[in] Identifier File name identifier (integer in the range 0 to 255)
- @param[in] Length Length of the buffer to store the temporary name
-
- @retval RETURN_SUCCESS Temporary name returned
- @retval RETURN_INVALID_PARAMETER Invalid buffer address
- @retval RETURN_ABORTED Temporary name not returned
-
-**/
-RETURN_STATUS
-SemihostFileTmpName(
- OUT VOID *Buffer,
- IN UINT8 Identifier,
- IN UINTN Length
- )
-{
- SEMIHOST_FILE_TMPNAME_BLOCK TmpNameBlock;
- INT32 Result;
-
- if (Buffer == NULL) {
- return RETURN_INVALID_PARAMETER;
- }
-
- TmpNameBlock.Buffer = Buffer;
- TmpNameBlock.Identifier = Identifier;
- TmpNameBlock.Length = Length;
-
- Result = Semihost_SYS_TMPNAME (&TmpNameBlock);
-
- if (Result != 0) {
- return RETURN_ABORTED;
- } else {
- return RETURN_SUCCESS;
- }
-}
-
-RETURN_STATUS
-SemihostFileRemove (
- IN CHAR8 *FileName
- )
-{
- SEMIHOST_FILE_REMOVE_BLOCK RemoveBlock;
- UINT32 Result;
-
- // Remove any leading separator (e.g.: '\'). EFI Shell adds one.
- if (*FileName == '\\') {
- FileName++;
- }
-
- RemoveBlock.FileName = FileName;
- RemoveBlock.NameLength = AsciiStrLen(FileName);
-
- Result = Semihost_SYS_REMOVE(&RemoveBlock);
-
- if (Result == 0) {
- return RETURN_SUCCESS;
- } else {
- return RETURN_ABORTED;
- }
-}
-
-/**
- Rename a specified file.
-
- @param[in] FileName Name of the file to rename.
- @param[in] NewFileName The new name of the file.
-
- @retval RETURN_SUCCESS File Renamed
- @retval RETURN_INVALID_PARAMETER Either the current or the new name is not specified
- @retval RETURN_ABORTED Rename failed
-
-**/
-RETURN_STATUS
-SemihostFileRename(
- IN CHAR8 *FileName,
- IN CHAR8 *NewFileName
- )
-{
- SEMIHOST_FILE_RENAME_BLOCK RenameBlock;
- INT32 Result;
-
- if ((FileName == NULL) || (NewFileName == NULL)) {
- return RETURN_INVALID_PARAMETER;
- }
-
- RenameBlock.FileName = FileName;
- RenameBlock.FileNameLength = AsciiStrLen (FileName);
- RenameBlock.NewFileName = NewFileName;
- RenameBlock.NewFileNameLength = AsciiStrLen (NewFileName);
-
- Result = Semihost_SYS_RENAME (&RenameBlock);
-
- if (Result != 0) {
- return RETURN_ABORTED;
- } else {
- return RETURN_SUCCESS;
- }
-}
-
-CHAR8
-SemihostReadCharacter (
- VOID
- )
-{
- return Semihost_SYS_READC();
-}
-
-VOID
-SemihostWriteCharacter (
- IN CHAR8 Character
- )
-{
- Semihost_SYS_WRITEC(&Character);
-}
-
-VOID
-SemihostWriteString (
- IN CHAR8 *String
- )
-{
- Semihost_SYS_WRITE0(String);
-}
-
-UINT32
-SemihostSystem (
- IN CHAR8 *CommandLine
- )
-{
- SEMIHOST_SYSTEM_BLOCK SystemBlock;
-
- SystemBlock.CommandLine = CommandLine;
- SystemBlock.CommandLength = AsciiStrLen(CommandLine);
-
- return Semihost_SYS_SYSTEM(&SystemBlock);
-}
diff --git a/ArmPkg/Library/SemihostLib/SemihostLib.inf b/ArmPkg/Library/SemihostLib/SemihostLib.inf deleted file mode 100644 index 460f4cd71a..0000000000 --- a/ArmPkg/Library/SemihostLib/SemihostLib.inf +++ /dev/null @@ -1,46 +0,0 @@ -#/** @file
-# Semihosting JTAG lib
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = SemihostLib
- FILE_GUID = C40D08BA-DB7B-4F07-905A-C5FE4B5AF987
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = SemihostLib
-
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = ARM AARCH64
-#
-[Sources.common]
- SemihostLib.c
-
-[Sources.ARM]
- Arm/GccSemihost.S | GCC
-
-[Sources.AARCH64]
- AArch64/GccSemihost.S
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
-
-[LibraryClasses]
- BaseLib
-
diff --git a/ArmPkg/Library/SemihostLib/SemihostPrivate.h b/ArmPkg/Library/SemihostLib/SemihostPrivate.h deleted file mode 100644 index afc53274b0..0000000000 --- a/ArmPkg/Library/SemihostLib/SemihostPrivate.h +++ /dev/null @@ -1,218 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __SEMIHOST_PRIVATE_H__
-#define __SEMIHOST_PRIVATE_H__
-
-typedef struct {
- CHAR8 *FileName;
- UINTN Mode;
- UINTN NameLength;
-} SEMIHOST_FILE_OPEN_BLOCK;
-
-typedef struct {
- UINTN Handle;
- VOID *Buffer;
- UINTN Length;
-} SEMIHOST_FILE_READ_WRITE_BLOCK;
-
-typedef struct {
- UINTN Handle;
- UINTN Location;
-} SEMIHOST_FILE_SEEK_BLOCK;
-
-typedef struct {
- VOID *Buffer;
- UINTN Identifier;
- UINTN Length;
-} SEMIHOST_FILE_TMPNAME_BLOCK;
-
-typedef struct {
- CHAR8 *FileName;
- UINTN NameLength;
-} SEMIHOST_FILE_REMOVE_BLOCK;
-
-typedef struct {
- CHAR8 *FileName;
- UINTN FileNameLength;
- CHAR8 *NewFileName;
- UINTN NewFileNameLength;
-} SEMIHOST_FILE_RENAME_BLOCK;
-
-typedef struct {
- CHAR8 *CommandLine;
- UINTN CommandLength;
-} SEMIHOST_SYSTEM_BLOCK;
-
-#if defined(__CC_ARM)
-
-#if defined(__thumb__)
-#define SWI 0xAB
-#else
-#define SWI 0x123456
-#endif
-
-#define SEMIHOST_SUPPORTED TRUE
-
-__swi(SWI)
-INT32
-_Semihost_SYS_OPEN(
- IN UINTN SWI_0x01,
- IN SEMIHOST_FILE_OPEN_BLOCK *OpenBlock
- );
-
-__swi(SWI)
-INT32
-_Semihost_SYS_CLOSE(
- IN UINTN SWI_0x02,
- IN UINT32 *Handle
- );
-
-__swi(SWI)
-VOID
-_Semihost_SYS_WRITEC(
- IN UINTN SWI_0x03,
- IN CHAR8 *Character
- );
-
-__swi(SWI)
-VOID
-_Semihost_SYS_WRITE0(
- IN UINTN SWI_0x04,
- IN CHAR8 *String
- );
-
-__swi(SWI)
-UINT32
-_Semihost_SYS_WRITE(
- IN UINTN SWI_0x05,
- IN OUT SEMIHOST_FILE_READ_WRITE_BLOCK *WriteBlock
- );
-
-__swi(SWI)
-UINT32
-_Semihost_SYS_READ(
- IN UINTN SWI_0x06,
- IN OUT SEMIHOST_FILE_READ_WRITE_BLOCK *ReadBlock
- );
-
-__swi(SWI)
-CHAR8
-_Semihost_SYS_READC(
- IN UINTN SWI_0x07,
- IN UINTN Zero
- );
-
-__swi(SWI)
-INT32
-_Semihost_SYS_SEEK(
- IN UINTN SWI_0x0A,
- IN SEMIHOST_FILE_SEEK_BLOCK *SeekBlock
- );
-
-__swi(SWI)
-INT32
-_Semihost_SYS_FLEN(
- IN UINTN SWI_0x0C,
- IN UINT32 *Handle
- );
-
-__swi(SWI)
-UINT32
-_Semihost_SYS_TMPNAME(
- IN UINTN SWI_0x0D,
- IN SEMIHOST_FILE_TMPNAME_BLOCK *TmpNameBlock
- );
-
-__swi(SWI)
-UINT32
-_Semihost_SYS_REMOVE(
- IN UINTN SWI_0x0E,
- IN SEMIHOST_FILE_REMOVE_BLOCK *RemoveBlock
- );
-
-__swi(SWI)
-UINT32
-_Semihost_SYS_RENAME(
- IN UINTN SWI_0x0F,
- IN SEMIHOST_FILE_RENAME_BLOCK *RenameBlock
- );
-
-__swi(SWI)
-UINT32
-_Semihost_SYS_SYSTEM(
- IN UINTN SWI_0x12,
- IN SEMIHOST_SYSTEM_BLOCK *SystemBlock
- );
-
-#define Semihost_SYS_OPEN(OpenBlock) _Semihost_SYS_OPEN(0x01, OpenBlock)
-#define Semihost_SYS_CLOSE(Handle) _Semihost_SYS_CLOSE(0x02, Handle)
-#define Semihost_SYS_WRITE0(String) _Semihost_SYS_WRITE0(0x04, String)
-#define Semihost_SYS_WRITEC(Character) _Semihost_SYS_WRITEC(0x03, Character)
-#define Semihost_SYS_WRITE(WriteBlock) _Semihost_SYS_WRITE(0x05, WriteBlock)
-#define Semihost_SYS_READ(ReadBlock) _Semihost_SYS_READ(0x06, ReadBlock)
-#define Semihost_SYS_READC() _Semihost_SYS_READC(0x07, 0)
-#define Semihost_SYS_SEEK(SeekBlock) _Semihost_SYS_SEEK(0x0A, SeekBlock)
-#define Semihost_SYS_FLEN(Handle) _Semihost_SYS_FLEN(0x0C, Handle)
-#define Semihost_SYS_TMPNAME(TmpNameBlock) _Semihost_SYS_TMPNAME(0x0D, TmpNameBlock)
-#define Semihost_SYS_REMOVE(RemoveBlock) _Semihost_SYS_REMOVE(0x0E, RemoveBlock)
-#define Semihost_SYS_RENAME(RenameBlock) _Semihost_SYS_RENAME(0x0F, RenameBlock)
-#define Semihost_SYS_SYSTEM(SystemBlock) _Semihost_SYS_SYSTEM(0x12, SystemBlock)
-
-#elif defined(__GNUC__) // __CC_ARM
-
-#define SEMIHOST_SUPPORTED TRUE
-
-UINT32
-GccSemihostCall (
- IN UINT32 Operation,
- IN UINTN SystemBlockAddress
- ); // __attribute__ ((interrupt ("SVC")));
-
-#define Semihost_SYS_OPEN(OpenBlock) GccSemihostCall(0x01, (UINTN)(OpenBlock))
-#define Semihost_SYS_CLOSE(Handle) GccSemihostCall(0x02, (UINTN)(Handle))
-#define Semihost_SYS_WRITE0(String) GccSemihostCall(0x04, (UINTN)(String))
-#define Semihost_SYS_WRITEC(Character) GccSemihostCall(0x03, (UINTN)(Character))
-#define Semihost_SYS_WRITE(WriteBlock) GccSemihostCall(0x05, (UINTN)(WriteBlock))
-#define Semihost_SYS_READ(ReadBlock) GccSemihostCall(0x06, (UINTN)(ReadBlock))
-#define Semihost_SYS_READC() GccSemihostCall(0x07, (UINTN)(0))
-#define Semihost_SYS_SEEK(SeekBlock) GccSemihostCall(0x0A, (UINTN)(SeekBlock))
-#define Semihost_SYS_FLEN(Handle) GccSemihostCall(0x0C, (UINTN)(Handle))
-#define Semihost_SYS_TMPNAME(TmpNameBlock) GccSemihostCall(0x0D, (UINTN)(TmpNameBlock))
-#define Semihost_SYS_REMOVE(RemoveBlock) GccSemihostCall(0x0E, (UINTN)(RemoveBlock))
-#define Semihost_SYS_RENAME(RenameBlock) GccSemihostCall(0x0F, (UINTN)(RenameBlock))
-#define Semihost_SYS_SYSTEM(SystemBlock) GccSemihostCall(0x12, (UINTN)(SystemBlock))
-
-#else // __CC_ARM
-
-#define SEMIHOST_SUPPORTED FALSE
-
-#define Semihost_SYS_OPEN(OpenBlock) (-1)
-#define Semihost_SYS_CLOSE(Handle) (-1)
-#define Semihost_SYS_WRITE0(String)
-#define Semihost_SYS_WRITEC(Character)
-#define Semihost_SYS_WRITE(WriteBlock) (0)
-#define Semihost_SYS_READ(ReadBlock) ((ReadBlock)->Length)
-#define Semihost_SYS_READC() ('x')
-#define Semihost_SYS_SEEK(SeekBlock) (-1)
-#define Semihost_SYS_FLEN(Handle) (-1)
-#define Semihost_SYS_TMPNAME(TmpNameBlock) (-1)
-#define Semihost_SYS_REMOVE(RemoveBlock) (-1)
-#define Semihost_SYS_RENAME(RenameBlock) (-1)
-#define Semihost_SYS_SYSTEM(SystemBlock) (-1)
-
-#endif // __CC_ARM
-
-#endif //__SEMIHOST_PRIVATE_H__
diff --git a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c b/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c deleted file mode 100644 index fdaaf2d706..0000000000 --- a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c +++ /dev/null @@ -1,719 +0,0 @@ -/** @file
- UncachedMemoryAllocation lib that uses DXE Service to change cachability for
- a buffer.
-
- Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2014, AMR Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/DebugLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UncachedMemoryAllocationLib.h>
-#include <Library/PcdLib.h>
-#include <Library/ArmLib.h>
-#include <Library/DxeServicesTableLib.h>
-#include <Library/CacheMaintenanceLib.h>
-
-#include <Protocol/Cpu.h>
-
-STATIC EFI_CPU_ARCH_PROTOCOL *mCpu;
-
-VOID *
-UncachedInternalAllocatePages (
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages
- );
-
-VOID *
-UncachedInternalAllocateAlignedPages (
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages,
- IN UINTN Alignment
- );
-
-
-
-typedef struct {
- EFI_PHYSICAL_ADDRESS Base;
- VOID *Allocation;
- UINTN Pages;
- EFI_MEMORY_TYPE MemoryType;
- BOOLEAN Allocated;
- LIST_ENTRY Link;
- UINT64 Attributes;
-} FREE_PAGE_NODE;
-
-STATIC LIST_ENTRY mPageList = INITIALIZE_LIST_HEAD_VARIABLE (mPageList);
-// Track the size of the non-allocated buffer in the linked-list
-STATIC UINTN mFreedBufferSize = 0;
-
-/**
- * This function firstly checks if the requested allocation can fit into one
- * of the previously allocated buffer.
- * If the requested allocation does not fit in the existing pool then
- * the function makes a new allocation.
- *
- * @param MemoryType Type of memory requested for the new allocation
- * @param Pages Number of requested page
- * @param Alignment Required alignment
- * @param Allocation Address of the newly allocated buffer
- *
- * @return EFI_SUCCESS If the function manage to allocate a buffer
- * @return !EFI_SUCCESS If the function did not manage to allocate a buffer
- */
-STATIC
-EFI_STATUS
-AllocatePagesFromList (
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages,
- IN UINTN Alignment,
- OUT VOID **Allocation
- )
-{
- EFI_STATUS Status;
- LIST_ENTRY *Link;
- FREE_PAGE_NODE *Node;
- FREE_PAGE_NODE *NewNode;
- UINTN AlignmentMask;
- EFI_PHYSICAL_ADDRESS Memory;
- EFI_GCD_MEMORY_SPACE_DESCRIPTOR Descriptor;
-
- // Alignment must be a power of two or zero.
- ASSERT ((Alignment & (Alignment - 1)) == 0);
-
- //
- // Look in our list for the smallest page that could satisfy the new allocation
- //
- Node = NULL;
- NewNode = NULL;
- for (Link = mPageList.ForwardLink; Link != &mPageList; Link = Link->ForwardLink) {
- Node = BASE_CR (Link, FREE_PAGE_NODE, Link);
- if ((Node->Allocated == FALSE) && (Node->MemoryType == MemoryType)) {
- // We have a node that fits our requirements
- if (((UINTN)Node->Base & (Alignment - 1)) == 0) {
- // We found a page that matches the page size
- if (Node->Pages == Pages) {
- Node->Allocated = TRUE;
- Node->Allocation = (VOID*)(UINTN)Node->Base;
- *Allocation = Node->Allocation;
-
- // Update the size of the freed buffer
- mFreedBufferSize -= Pages * EFI_PAGE_SIZE;
- return EFI_SUCCESS;
- } else if (Node->Pages > Pages) {
- if (NewNode == NULL) {
- // It is the first node that could contain our new allocation
- NewNode = Node;
- } else if (NewNode->Pages > Node->Pages) {
- // This node offers a smaller number of page.
- NewNode = Node;
- }
- }
- }
- }
- }
- // Check if we have found a node that could contain our new allocation
- if (NewNode != NULL) {
- NewNode->Allocated = TRUE;
- NewNode->Allocation = (VOID*)(UINTN)NewNode->Base;
- *Allocation = NewNode->Allocation;
- mFreedBufferSize -= NewNode->Pages * EFI_PAGE_SIZE;
- return EFI_SUCCESS;
- }
-
- //
- // Otherwise, we need to allocate a new buffer
- //
-
- // We do not want to over-allocate in case the alignment requirement does not
- // require extra pages
- if (Alignment > EFI_PAGE_SIZE) {
- AlignmentMask = Alignment - 1;
- Pages += EFI_SIZE_TO_PAGES (Alignment);
- } else {
- AlignmentMask = 0;
- }
-
- Status = gBS->AllocatePages (AllocateAnyPages, MemoryType, Pages, &Memory);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Status = gDS->GetMemorySpaceDescriptor (Memory, &Descriptor);
- if (EFI_ERROR (Status)) {
- goto FreePages;
- }
-
- Status = gDS->SetMemorySpaceAttributes (Memory, EFI_PAGES_TO_SIZE (Pages),
- EFI_MEMORY_WC);
- if (EFI_ERROR (Status)) {
- goto FreePages;
- }
-
- //
- // EFI_CPU_ARCH_PROTOCOL::SetMemoryAttributes() will preserve the original
- // memory type attribute if no memory type is passed. Permission attributes
- // will be replaced, so EFI_MEMORY_RO will be removed if present (although
- // it would be a bug if that were the case for an AllocatePages() allocation)
- //
- Status = mCpu->SetMemoryAttributes (mCpu, Memory, EFI_PAGES_TO_SIZE (Pages),
- EFI_MEMORY_XP);
- if (EFI_ERROR (Status)) {
- goto FreePages;
- }
-
- InvalidateDataCacheRange ((VOID *)(UINTN)Memory, EFI_PAGES_TO_SIZE (Pages));
-
- NewNode = AllocatePool (sizeof (FREE_PAGE_NODE));
- if (NewNode == NULL) {
- ASSERT (FALSE);
- Status = EFI_OUT_OF_RESOURCES;
- goto FreePages;
- }
-
- NewNode->Base = Memory;
- NewNode->Allocation = (VOID*)(((UINTN)Memory + AlignmentMask) & ~AlignmentMask);
- NewNode->Pages = Pages;
- NewNode->Allocated = TRUE;
- NewNode->MemoryType = MemoryType;
- NewNode->Attributes = Descriptor.Attributes;
-
- InsertTailList (&mPageList, &NewNode->Link);
-
- *Allocation = NewNode->Allocation;
- return EFI_SUCCESS;
-
-FreePages:
- gBS->FreePages (Memory, Pages);
- return Status;
-}
-
-/**
- * Free the memory allocation
- *
- * This function will actually try to find the allocation in the linked list.
- * And it will then mark the entry as freed.
- *
- * @param Allocation Base address of the buffer to free
- *
- * @return EFI_SUCCESS The allocation has been freed
- * @return EFI_NOT_FOUND The allocation was not found in the pool.
- * @return EFI_INVALID_PARAMETER If Allocation is NULL
- *
- */
-STATIC
-EFI_STATUS
-FreePagesFromList (
- IN VOID *Allocation
- )
-{
- LIST_ENTRY *Link;
- FREE_PAGE_NODE *Node;
-
- if (Allocation == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- for (Link = mPageList.ForwardLink; Link != &mPageList; Link = Link->ForwardLink) {
- Node = BASE_CR (Link, FREE_PAGE_NODE, Link);
- if ((UINTN)Node->Allocation == (UINTN)Allocation) {
- Node->Allocated = FALSE;
-
- // Update the size of the freed buffer
- mFreedBufferSize += Node->Pages * EFI_PAGE_SIZE;
-
- // If the size of the non-allocated reaches the threshold we raise a warning.
- // It might be an expected behaviour in some cases.
- // We might device to free some of these buffers later on.
- if (mFreedBufferSize > PcdGet64 (PcdArmFreeUncachedMemorySizeThreshold)) {
- DEBUG ((EFI_D_WARN, "Warning: The list of non-allocated buffer has reach the threshold.\n"));
- }
- return EFI_SUCCESS;
- }
- }
-
- return EFI_NOT_FOUND;
-}
-
-/**
- * This function is automatically invoked when the driver exits
- * It frees all the non-allocated memory buffer.
- * This function is not responsible to free allocated buffer (eg: case of memory leak,
- * runtime allocation).
- */
-EFI_STATUS
-EFIAPI
-UncachedMemoryAllocationLibConstructor (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- return gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu);
-}
-
-EFI_STATUS
-EFIAPI
-UncachedMemoryAllocationLibDestructor (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- LIST_ENTRY *Link;
- FREE_PAGE_NODE *OldNode;
-
- // Test if the list is empty
- Link = mPageList.ForwardLink;
- if (Link == &mPageList) {
- return EFI_SUCCESS;
- }
-
- // Free all the pages and nodes
- do {
- OldNode = BASE_CR (Link, FREE_PAGE_NODE, Link);
- // Point to the next entry
- Link = Link->ForwardLink;
-
- // We only free the non-allocated buffer
- if (OldNode->Allocated == FALSE) {
- gBS->FreePages ((EFI_PHYSICAL_ADDRESS)(UINTN)OldNode->Base, OldNode->Pages);
-
- gDS->SetMemorySpaceAttributes ((EFI_PHYSICAL_ADDRESS)(UINTN)OldNode->Base,
- EFI_PAGES_TO_SIZE (OldNode->Pages), OldNode->Attributes);
-
- RemoveEntryList (&OldNode->Link);
- FreePool (OldNode);
- }
- } while (Link != &mPageList);
-
- return EFI_SUCCESS;
-}
-
-/**
- Converts a cached or uncached address to a physical address suitable for use in SoC registers.
-
- @param VirtualAddress The pointer to convert.
-
- @return The physical address of the supplied virtual pointer.
-
-**/
-EFI_PHYSICAL_ADDRESS
-ConvertToPhysicalAddress (
- IN VOID *VirtualAddress
- )
-{
- return (EFI_PHYSICAL_ADDRESS)(UINTN)VirtualAddress;
-}
-
-
-VOID *
-UncachedInternalAllocatePages (
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages
- )
-{
- return UncachedInternalAllocateAlignedPages (MemoryType, Pages, EFI_PAGE_SIZE);
-}
-
-
-VOID *
-EFIAPI
-UncachedAllocatePages (
- IN UINTN Pages
- )
-{
- return UncachedInternalAllocatePages (EfiBootServicesData, Pages);
-}
-
-VOID *
-EFIAPI
-UncachedAllocateRuntimePages (
- IN UINTN Pages
- )
-{
- return UncachedInternalAllocatePages (EfiRuntimeServicesData, Pages);
-}
-
-VOID *
-EFIAPI
-UncachedAllocateReservedPages (
- IN UINTN Pages
- )
-{
- return UncachedInternalAllocatePages (EfiReservedMemoryType, Pages);
-}
-
-
-
-VOID
-EFIAPI
-UncachedFreePages (
- IN VOID *Buffer,
- IN UINTN Pages
- )
-{
- UncachedFreeAlignedPages (Buffer, Pages);
- return;
-}
-
-
-VOID *
-UncachedInternalAllocateAlignedPages (
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages,
- IN UINTN Alignment
- )
-{
- EFI_STATUS Status;
- VOID *Allocation;
-
- if (Pages == 0) {
- return NULL;
- }
-
- Allocation = NULL;
- Status = AllocatePagesFromList (MemoryType, Pages, Alignment, &Allocation);
- if (EFI_ERROR (Status)) {
- ASSERT_EFI_ERROR (Status);
- return NULL;
- } else {
- return Allocation;
- }
-}
-
-
-VOID
-EFIAPI
-UncachedFreeAlignedPages (
- IN VOID *Buffer,
- IN UINTN Pages
- )
-{
- FreePagesFromList (Buffer);
-}
-
-
-VOID *
-UncachedInternalAllocateAlignedPool (
- IN EFI_MEMORY_TYPE PoolType,
- IN UINTN AllocationSize,
- IN UINTN Alignment
- )
-{
- VOID *AlignedAddress;
-
- //
- // Alignment must be a power of two or zero.
- //
- ASSERT ((Alignment & (Alignment - 1)) == 0);
-
- if (Alignment < EFI_PAGE_SIZE) {
- Alignment = EFI_PAGE_SIZE;
- }
-
- AlignedAddress = UncachedInternalAllocateAlignedPages (PoolType, EFI_SIZE_TO_PAGES (AllocationSize), Alignment);
- if (AlignedAddress == NULL) {
- return NULL;
- }
-
- return (VOID *) AlignedAddress;
-}
-
-VOID *
-EFIAPI
-UncachedAllocateAlignedPool (
- IN UINTN AllocationSize,
- IN UINTN Alignment
- )
-{
- return UncachedInternalAllocateAlignedPool (EfiBootServicesData, AllocationSize, Alignment);
-}
-
-VOID *
-EFIAPI
-UncachedAllocateAlignedRuntimePool (
- IN UINTN AllocationSize,
- IN UINTN Alignment
- )
-{
- return UncachedInternalAllocateAlignedPool (EfiRuntimeServicesData, AllocationSize, Alignment);
-}
-
-VOID *
-EFIAPI
-UncachedAllocateAlignedReservedPool (
- IN UINTN AllocationSize,
- IN UINTN Alignment
- )
-{
- return UncachedInternalAllocateAlignedPool (EfiReservedMemoryType, AllocationSize, Alignment);
-}
-
-VOID *
-UncachedInternalAllocateAlignedZeroPool (
- IN EFI_MEMORY_TYPE PoolType,
- IN UINTN AllocationSize,
- IN UINTN Alignment
- )
-{
- VOID *Memory;
- Memory = UncachedInternalAllocateAlignedPool (PoolType, AllocationSize, Alignment);
- if (Memory != NULL) {
- Memory = ZeroMem (Memory, AllocationSize);
- }
- return Memory;
-}
-
-VOID *
-EFIAPI
-UncachedAllocateAlignedZeroPool (
- IN UINTN AllocationSize,
- IN UINTN Alignment
- )
-{
- return UncachedInternalAllocateAlignedZeroPool (EfiBootServicesData, AllocationSize, Alignment);
-}
-
-VOID *
-EFIAPI
-UncachedAllocateAlignedRuntimeZeroPool (
- IN UINTN AllocationSize,
- IN UINTN Alignment
- )
-{
- return UncachedInternalAllocateAlignedZeroPool (EfiRuntimeServicesData, AllocationSize, Alignment);
-}
-
-VOID *
-EFIAPI
-UncachedAllocateAlignedReservedZeroPool (
- IN UINTN AllocationSize,
- IN UINTN Alignment
- )
-{
- return UncachedInternalAllocateAlignedZeroPool (EfiReservedMemoryType, AllocationSize, Alignment);
-}
-
-VOID *
-UncachedInternalAllocateAlignedCopyPool (
- IN EFI_MEMORY_TYPE PoolType,
- IN UINTN AllocationSize,
- IN CONST VOID *Buffer,
- IN UINTN Alignment
- )
-{
- VOID *Memory;
-
- ASSERT (Buffer != NULL);
- ASSERT (AllocationSize <= (MAX_ADDRESS - (UINTN) Buffer + 1));
-
- Memory = UncachedInternalAllocateAlignedPool (PoolType, AllocationSize, Alignment);
- if (Memory != NULL) {
- Memory = CopyMem (Memory, Buffer, AllocationSize);
- }
- return Memory;
-}
-
-VOID *
-EFIAPI
-UncachedAllocateAlignedCopyPool (
- IN UINTN AllocationSize,
- IN CONST VOID *Buffer,
- IN UINTN Alignment
- )
-{
- return UncachedInternalAllocateAlignedCopyPool (EfiBootServicesData, AllocationSize, Buffer, Alignment);
-}
-
-VOID *
-EFIAPI
-UncachedAllocateAlignedRuntimeCopyPool (
- IN UINTN AllocationSize,
- IN CONST VOID *Buffer,
- IN UINTN Alignment
- )
-{
- return UncachedInternalAllocateAlignedCopyPool (EfiRuntimeServicesData, AllocationSize, Buffer, Alignment);
-}
-
-VOID *
-EFIAPI
-UncachedAllocateAlignedReservedCopyPool (
- IN UINTN AllocationSize,
- IN CONST VOID *Buffer,
- IN UINTN Alignment
- )
-{
- return UncachedInternalAllocateAlignedCopyPool (EfiReservedMemoryType, AllocationSize, Buffer, Alignment);
-}
-
-VOID
-EFIAPI
-UncachedFreeAlignedPool (
- IN VOID *Allocation
- )
-{
- UncachedFreePages (Allocation, 0);
-}
-
-VOID *
-UncachedInternalAllocatePool (
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN AllocationSize
- )
-{
- UINTN CacheLineLength = ArmCacheWritebackGranule ();
- return UncachedInternalAllocateAlignedPool (MemoryType, AllocationSize, CacheLineLength);
-}
-
-VOID *
-EFIAPI
-UncachedAllocatePool (
- IN UINTN AllocationSize
- )
-{
- return UncachedInternalAllocatePool (EfiBootServicesData, AllocationSize);
-}
-
-VOID *
-EFIAPI
-UncachedAllocateRuntimePool (
- IN UINTN AllocationSize
- )
-{
- return UncachedInternalAllocatePool (EfiRuntimeServicesData, AllocationSize);
-}
-
-VOID *
-EFIAPI
-UncachedAllocateReservedPool (
- IN UINTN AllocationSize
- )
-{
- return UncachedInternalAllocatePool (EfiReservedMemoryType, AllocationSize);
-}
-
-VOID *
-UncachedInternalAllocateZeroPool (
- IN EFI_MEMORY_TYPE PoolType,
- IN UINTN AllocationSize
- )
-{
- VOID *Memory;
-
- Memory = UncachedInternalAllocatePool (PoolType, AllocationSize);
- if (Memory != NULL) {
- Memory = ZeroMem (Memory, AllocationSize);
- }
- return Memory;
-}
-
-VOID *
-EFIAPI
-UncachedAllocateZeroPool (
- IN UINTN AllocationSize
- )
-{
- return UncachedInternalAllocateZeroPool (EfiBootServicesData, AllocationSize);
-}
-
-VOID *
-EFIAPI
-UncachedAllocateRuntimeZeroPool (
- IN UINTN AllocationSize
- )
-{
- return UncachedInternalAllocateZeroPool (EfiRuntimeServicesData, AllocationSize);
-}
-
-VOID *
-EFIAPI
-UncachedAllocateReservedZeroPool (
- IN UINTN AllocationSize
- )
-{
- return UncachedInternalAllocateZeroPool (EfiReservedMemoryType, AllocationSize);
-}
-
-VOID *
-UncachedInternalAllocateCopyPool (
- IN EFI_MEMORY_TYPE PoolType,
- IN UINTN AllocationSize,
- IN CONST VOID *Buffer
- )
-{
- VOID *Memory;
-
- ASSERT (Buffer != NULL);
- ASSERT (AllocationSize <= (MAX_ADDRESS - (UINTN) Buffer + 1));
-
- Memory = UncachedInternalAllocatePool (PoolType, AllocationSize);
- if (Memory != NULL) {
- Memory = CopyMem (Memory, Buffer, AllocationSize);
- }
- return Memory;
-}
-
-VOID *
-EFIAPI
-UncachedAllocateCopyPool (
- IN UINTN AllocationSize,
- IN CONST VOID *Buffer
- )
-{
- return UncachedInternalAllocateCopyPool (EfiBootServicesData, AllocationSize, Buffer);
-}
-
-VOID *
-EFIAPI
-UncachedAllocateRuntimeCopyPool (
- IN UINTN AllocationSize,
- IN CONST VOID *Buffer
- )
-{
- return UncachedInternalAllocateCopyPool (EfiRuntimeServicesData, AllocationSize, Buffer);
-}
-
-VOID *
-EFIAPI
-UncachedAllocateReservedCopyPool (
- IN UINTN AllocationSize,
- IN CONST VOID *Buffer
- )
-{
- return UncachedInternalAllocateCopyPool (EfiReservedMemoryType, AllocationSize, Buffer);
-}
-
-VOID
-EFIAPI
-UncachedFreePool (
- IN VOID *Buffer
- )
-{
- UncachedFreeAlignedPool (Buffer);
-}
-
-VOID
-EFIAPI
-UncachedSafeFreePool (
- IN VOID *Buffer
- )
-{
- if (Buffer != NULL) {
- UncachedFreePool (Buffer);
- Buffer = NULL;
- }
-}
-
diff --git a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf b/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf deleted file mode 100644 index c637430c90..0000000000 --- a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf +++ /dev/null @@ -1,50 +0,0 @@ -#/** @file
-#
-# UncachedMemoryAllocation lib that uses DXE Service to change cachability for
-# a buffer.
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = UncachedMemoryAllocationLib
- FILE_GUID = DC101A1A-7525-429B-84AF-EEAA630E576C
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
- LIBRARY_CLASS = UncachedMemoryAllocationLib
- CONSTRUCTOR = UncachedMemoryAllocationLibConstructor
- DESTRUCTOR = UncachedMemoryAllocationLibDestructor
-
-[Sources.common]
- UncachedMemoryAllocationLib.c
-
-[Packages]
- ArmPkg/ArmPkg.dec
- MdePkg/MdePkg.dec
-
-[LibraryClasses]
- BaseLib
- ArmLib
- MemoryAllocationLib
- PcdLib
- DxeServicesTableLib
- CacheMaintenanceLib
-
-[Pcd]
- gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold
-
-[Protocols]
- gEfiCpuArchProtocolGuid
-
-[Depex]
- gEfiCpuArchProtocolGuid
diff --git a/ArmPkg/License.txt b/ArmPkg/License.txt deleted file mode 100644 index 05dbd3606d..0000000000 --- a/ArmPkg/License.txt +++ /dev/null @@ -1,26 +0,0 @@ -Copyright (c) 2009-2010, Apple Inc. All rights reserved.
-Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-
-* Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in
- the documentation and/or other materials provided with the
- distribution.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGE.
|