Arm Packages: Fixed coding style/Line endings to follow EDK2 coding convention

Arm Packages: Fixed mispelling

Arm Packages: Reduced warnings all over the code




git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12407 6f19259b-4bc3-4df7-8a09-765794883524

9 files changed, 112 insertions, 274 deletions

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index e037f9f97a..7801b98928 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -35,7 +35,7 @@
   ArmLib|Include/Library/ArmLib.h

   SemihostLib|Include/Library/Semihosting.h

   UncachedMemoryAllocationLib|Include/Library/UncachedMemoryAllocationLib.h

-  DefaultExceptioHandlerLib|Include/Library/DefaultExceptioHandlerLib.h

+  DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h

   ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h

   

 [Guids.common]

diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 56fdeec750..e3c1d6f757 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -62,7 +62,7 @@
   SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf
   UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
   DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
-  DefaultExceptioHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
+  DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
 
   ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
   CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.inf b/ArmPkg/Drivers/CpuDxe/CpuDxe.inf
index 3cf4036cfb..231257cc1a 100644
--- a/ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.inf
@@ -52,14 +52,12 @@
 [LibraryClasses]

   BaseMemoryLib

   CacheMaintenanceLib

-  UefiDriverEntryPoint

-  ArmLib

+  CpuLib

+  DebugLib

+  DefaultExceptionHandlerLib

   DxeServicesTableLib

   PeCoffGetEntryPointLib

   UefiLib

-  CpuLib

-  DefaultExceptioHandlerLib

-  DebugLib

 

 [Protocols]

   gEfiCpuArchProtocolGuid

diff --git a/ArmPkg/Drivers/CpuDxe/Mmu.c b/ArmPkg/Drivers/CpuDxe/Mmu.c
index 681ffdeb1e..74794eb945 100644
--- a/ArmPkg/Drivers/CpuDxe/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/Mmu.c
@@ -543,49 +543,49 @@ UpdatePageEntries (
       return EFI_UNSUPPORTED;

   }

 

-  // obtain page table base

+  // Obtain page table base

   FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();

 

-  // calculate number of 4KB page table entries to change

+  // Calculate number of 4KB page table entries to change

   NumPageEntries = Length / TT_DESCRIPTOR_PAGE_SIZE;

   

-  // iterate for the number of 4KB pages to change

+  // Iterate for the number of 4KB pages to change

   Offset = 0;

-  for(p=0; p<NumPageEntries; p++) {

-    // calculate index into first level translation table for page table value

+  for(p = 0; p < NumPageEntries; p++) {

+    // Calculate index into first level translation table for page table value

     

     FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress + Offset) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;

     ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);

 

-    // read the descriptor from the first level page table

+    // Read the descriptor from the first level page table

     Descriptor = FirstLevelTable[FirstLevelIdx];

 

-    // does this descriptor need to be converted from section entry to 4K pages?

+    // Does this descriptor need to be converted from section entry to 4K pages?

     if (!TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Descriptor)) {

       Status = ConvertSectionToPages (FirstLevelIdx << TT_DESCRIPTOR_SECTION_BASE_SHIFT);

       if (EFI_ERROR(Status)) {

-        // exit for loop

+        // Exit for loop

         break; 

       } 

       

-      // re-read descriptor

+      // Re-read descriptor

       Descriptor = FirstLevelTable[FirstLevelIdx];

     }

 

-    // obtain page table base address

+    // Obtain page table base address

     PageTable = (ARM_PAGE_TABLE_ENTRY *)TT_DESCRIPTOR_PAGE_BASE_ADDRESS(Descriptor);

 

-    // calculate index into the page table

+    // Calculate index into the page table

     PageTableIndex = ((BaseAddress + Offset) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;

     ASSERT (PageTableIndex < TRANSLATION_TABLE_PAGE_COUNT);

 

-    // get the entry

+    // Get the entry

     CurrentPageTableEntry = PageTable[PageTableIndex];

 

-    // mask off appropriate fields

+    // Mask off appropriate fields

     PageTableEntry = CurrentPageTableEntry & ~EntryMask;

 

-    // mask in new attributes and/or permissions

+    // Mask in new attributes and/or permissions

     PageTableEntry |= EntryValue;

 

     if (VirtualMask != 0) {

@@ -609,7 +609,7 @@ UpdatePageEntries (
     Status = EFI_SUCCESS;

     Offset += TT_DESCRIPTOR_PAGE_SIZE;

     

-  } // end first level translation table loop

+  } // End first level translation table loop

 

   return Status;

 }

@@ -815,23 +815,24 @@ SetMemoryAttributes (
   EFI_STATUS    Status;

   

   if(((BaseAddress & 0xFFFFF) == 0) && ((Length & 0xFFFFF) == 0)) {

-    // is the base and length a multiple of 1 MB?

+    // Is the base and length a multiple of 1 MB?

     DEBUG ((EFI_D_PAGE, "SetMemoryAttributes(): MMU section 0x%x length 0x%x to %lx\n", (UINTN)BaseAddress, (UINTN)Length, Attributes));

     Status = UpdateSectionEntries (BaseAddress, Length, Attributes, VirtualMask);

   } else {

-    // base and/or length is not a multiple of 1 MB

+    // Base and/or length is not a multiple of 1 MB

     DEBUG ((EFI_D_PAGE, "SetMemoryAttributes(): MMU page 0x%x length 0x%x to %lx\n", (UINTN)BaseAddress, (UINTN)Length, Attributes));

     Status = UpdatePageEntries (BaseAddress, Length, Attributes, VirtualMask);

   }

 

-  // flush d-cache so descriptors make it back to uncached memory for subsequent table walks

+  // Flush d-cache so descriptors make it back to uncached memory for subsequent table walks

   // flush and invalidate pages

+  //TODO: Do we really need to invalidate the caches everytime we change the memory attributes ?

   ArmCleanInvalidateDataCache ();

-  

+

   ArmInvalidateInstructionCache ();

 

-  // invalidate all TLB entries so changes are synced

-  ArmInvalidateTlb (); 

+  // Invalidate all TLB entries so changes are synced

+  ArmInvalidateTlb ();

 

   return Status;

 }

diff --git a/ArmPkg/Include/Chipset/ArmV7.h b/ArmPkg/Include/Chipset/ArmV7.h
index e986ae7407..5fab7eddbe 100644
--- a/ArmPkg/Include/Chipset/ArmV7.h
+++ b/ArmPkg/Include/Chipset/ArmV7.h
@@ -15,6 +15,8 @@
 #ifndef __ARM_V7_H__

 #define __ARM_V7_H__

 

+#include <Chipset/ArmV7Mmu.h>

+

 // Domain Access Control Register

 #define DOMAIN_ACCESS_CONTROL_MASK(a)     (3UL << (2 * (a)))

 #define DOMAIN_ACCESS_CONTROL_NONE(a)     (0UL << (2 * (a)))

@@ -22,207 +24,6 @@
 #define DOMAIN_ACCESS_CONTROL_RESERVED(a) (2UL << (2 * (a)))

 #define DOMAIN_ACCESS_CONTROL_MANAGER(a)  (3UL << (2 * (a)))

 

-#define TTBR_NOT_OUTER_SHAREABLE             BIT5

-#define TTBR_RGN_OUTER_NON_CACHEABLE         0

-#define TTBR_RGN_OUTER_WRITE_BACK_ALLOC      BIT3

-#define TTBR_RGN_OUTER_WRITE_THROUGH         BIT4

-#define TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC   (BIT3|BIT4)

-#define TTBR_SHAREABLE                       BIT1

-#define TTBR_NON_SHAREABLE                   0

-#define TTBR_INNER_CACHEABLE                 BIT0

-#define TTBR_NON_INNER_CACHEABLE             BIT0

-#define TTBR_RGN_INNER_NON_CACHEABLE         0

-#define TTBR_RGN_INNER_WRITE_BACK_ALLOC      BIT6

-#define TTBR_RGN_INNER_WRITE_THROUGH         BIT0

-#define TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC   (BIT0|BIT6)

-

-#define TTBR_WRITE_THROUGH_NO_ALLOC     ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC )

-#define TTBR_WRITE_BACK_NO_ALLOC        ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC )

-#define TTBR_NON_CACHEABLE              ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_RGN_INNER_NON_CACHEABLE )

-#define TTBR_WRITE_BACK_ALLOC           ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC )

-

-

-#define TRANSLATION_TABLE_SECTION_COUNT                 4096

-#define TRANSLATION_TABLE_SECTION_SIZE                  (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)

-#define TRANSLATION_TABLE_SECTION_ALIGNMENT             (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)

-#define TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK        (TRANSLATION_TABLE_SECTION_ALIGNMENT - 1)

-

-#define TRANSLATION_TABLE_PAGE_COUNT                 256

-#define TRANSLATION_TABLE_PAGE_SIZE                  (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)

-#define TRANSLATION_TABLE_PAGE_ALIGNMENT             (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)

-#define TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK        (TRANSLATION_TABLE_PAGE_ALIGNMENT - 1)

-

-#define TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(table, address) ((UINT32 *)(table) + (((UINTN)(address)) >> 20))

-

-// Translation table descriptor types

-#define TT_DESCRIPTOR_SECTION_TYPE_MASK         ((1UL << 18) | (3UL << 0))

-#define TT_DESCRIPTOR_SECTION_TYPE_FAULT        (0UL << 0)

-#define TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE   (1UL << 0)

-#define TT_DESCRIPTOR_SECTION_TYPE_SECTION      ((0UL << 18) | (2UL << 0))

-#define TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION ((1UL << 18) | (2UL << 0))

-#define TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Desc) (((Desc) & 3UL) == TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE)

-

-// Translation table descriptor types

-#define TT_DESCRIPTOR_PAGE_TYPE_MASK         (3UL << 0)

-#define TT_DESCRIPTOR_PAGE_TYPE_FAULT        (0UL << 0)

-#define TT_DESCRIPTOR_PAGE_TYPE_PAGE         (2UL << 0)

-#define TT_DESCRIPTOR_PAGE_TYPE_PAGE_XN      (3UL << 0)

-#define TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE    (1UL << 0)

-

-// Section descriptor definitions

-#define TT_DESCRIPTOR_SECTION_SIZE                              (0x00100000)

-

-#define TT_DESCRIPTOR_SECTION_NS_MASK                           (1UL << 19)

-#define TT_DESCRIPTOR_SECTION_NS_SECURE                         (0UL << 19)

-#define TT_DESCRIPTOR_SECTION_NS_NON_SECURE                     (1UL << 19)

-

-#define TT_DESCRIPTOR_SECTION_NG_MASK                           (1UL << 17)

-#define TT_DESCRIPTOR_SECTION_NG_GLOBAL                         (0UL << 17)

-#define TT_DESCRIPTOR_SECTION_NG_LOCAL                          (1UL << 17)

-

-#define TT_DESCRIPTOR_PAGE_NG_MASK                              (1UL << 11)

-#define TT_DESCRIPTOR_PAGE_NG_GLOBAL                            (0UL << 11)

-#define TT_DESCRIPTOR_PAGE_NG_LOCAL                             (1UL << 11)

-

-#define TT_DESCRIPTOR_SECTION_S_MASK                            (1UL << 16)

-#define TT_DESCRIPTOR_SECTION_S_NOT_SHARED                      (0UL << 16)

-#define TT_DESCRIPTOR_SECTION_S_SHARED                          (1UL << 16)

-

-#define TT_DESCRIPTOR_PAGE_S_MASK                               (1UL << 10)

-#define TT_DESCRIPTOR_PAGE_S_NOT_SHARED                         (0UL << 10)

-#define TT_DESCRIPTOR_PAGE_S_SHARED                             (1UL << 10)

-

-#define TT_DESCRIPTOR_SECTION_AP_MASK                           ((1UL << 15) | (3UL << 10))

-#define TT_DESCRIPTOR_SECTION_AP_NO_NO                          ((0UL << 15) | (0UL << 10))

-#define TT_DESCRIPTOR_SECTION_AP_RW_NO                          ((0UL << 15) | (1UL << 10))

-#define TT_DESCRIPTOR_SECTION_AP_RW_RO                          ((0UL << 15) | (2UL << 10))

-#define TT_DESCRIPTOR_SECTION_AP_RW_RW                          ((0UL << 15) | (3UL << 10))

-#define TT_DESCRIPTOR_SECTION_AP_RO_NO                          ((1UL << 15) | (1UL << 10))

-#define TT_DESCRIPTOR_SECTION_AP_RO_RO                          ((1UL << 15) | (3UL << 10))

-

-#define TT_DESCRIPTOR_PAGE_AP_MASK                              ((1UL << 9) | (3UL << 4))

-#define TT_DESCRIPTOR_PAGE_AP_NO_NO                             ((0UL << 9) | (0UL << 4))

-#define TT_DESCRIPTOR_PAGE_AP_RW_NO                             ((0UL << 9) | (1UL << 4))

-#define TT_DESCRIPTOR_PAGE_AP_RW_RO                             ((0UL << 9) | (2UL << 4))

-#define TT_DESCRIPTOR_PAGE_AP_RW_RW                             ((0UL << 9) | (3UL << 4))

-#define TT_DESCRIPTOR_PAGE_AP_RO_NO                             ((1UL << 9) | (1UL << 4))

-#define TT_DESCRIPTOR_PAGE_AP_RO_RO                             ((1UL << 9) | (3UL << 4))

-

-#define TT_DESCRIPTOR_SECTION_XN_MASK                           (0x1UL << 4)

-#define TT_DESCRIPTOR_PAGE_XN_MASK                              (0x1UL << 0)

-#define TT_DESCRIPTOR_LARGEPAGE_XN_MASK                         (0x1UL << 15)

-

-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK                   ((3UL << 12) | (1UL << 3) | (1UL << 2))

-#define TT_DESCRIPTOR_SECTION_CACHEABLE_MASK                      (1UL << 3)

-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED       ((0UL << 12) | (0UL << 3) | (0UL << 2))

-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE       ((0UL << 12) | (0UL << 3) | (1UL << 2))

-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2))

-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC    ((0UL << 12) | (1UL << 3) | (1UL << 2))

-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE          ((1UL << 12) | (0UL << 3) | (0UL << 2))

-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC       ((1UL << 12) | (1UL << 3) | (1UL << 2))

-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE   ((2UL << 12) | (0UL << 3) | (0UL << 2))

-

-#define TT_DESCRIPTOR_PAGE_SIZE                               (0x00001000)

-

-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK                   ((3UL << 6) | (1UL << 3) | (1UL << 2))

-#define TT_DESCRIPTOR_PAGE_CACHEABLE_MASK                       (1UL << 3)

-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED       ((0UL << 6) | (0UL << 3) | (0UL << 2))

-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE       ((0UL << 6) | (0UL << 3) | (1UL << 2))

-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 6) | (1UL << 3) | (0UL << 2))

-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC    ((0UL << 6) | (1UL << 3) | (1UL << 2))

-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE          ((1UL << 6) | (0UL << 3) | (0UL << 2))

-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC       ((1UL << 6) | (1UL << 3) | (1UL << 2))

-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE   ((2UL << 6) | (0UL << 3) | (0UL << 2))

-

-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK                   ((3UL << 12) | (1UL << 3) | (1UL << 2))

-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_STRONGLY_ORDERED       ((0UL << 12) | (0UL << 3) | (0UL << 2))

-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_SHAREABLE_DEVICE       ((0UL << 12) | (0UL << 3) | (1UL << 2))

-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2))

-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC    ((0UL << 12) | (1UL << 3) | (1UL << 2))

-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_NON_CACHEABLE          ((1UL << 12) | (0UL << 3) | (0UL << 2))

-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_BACK_ALLOC       ((1UL << 12) | (1UL << 3) | (1UL << 2))

-#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE   ((2UL << 12) | (0UL << 3) | (0UL << 2))

-

-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(Desc)                  ((((Desc) & TT_DESCRIPTOR_SECTION_AP_MASK) >> 6) & TT_DESCRIPTOR_PAGE_AP_MASK)

-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_NG(Desc)                  ((((Desc) & TT_DESCRIPTOR_SECTION_NG_MASK) >> 6) & TT_DESCRIPTOR_PAGE_NG_MASK)

-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_S(Desc)                  ((((Desc) & TT_DESCRIPTOR_SECTION_S_MASK) >> 6) & TT_DESCRIPTOR_PAGE_S_MASK)

-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_XN(Desc,IsLargePage)      ((IsLargePage)? \

-                                                                    ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) >> 4) & TT_DESCRIPTOR_LARGEPAGE_XN_MASK):    \

-                                                                    ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) << 11) & TT_DESCRIPTOR_PAGE_XN_MASK))

-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(Desc,IsLargePage)      (IsLargePage? \

-                                                                    (((Desc) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK): \

-                                                                    (((((Desc) & (0x3 << 12)) >> 6) | (Desc & (0x3 << 2)))))

-

-#define TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(Desc)                  ((((Desc) & TT_DESCRIPTOR_PAGE_AP_MASK) << 6) & TT_DESCRIPTOR_SECTION_AP_MASK)

-

-#define TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(Desc,IsLargePage)      (IsLargePage? \

-                                                                    (((Desc) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK): \

-                                                                    (((((Desc) & (0x3 << 6)) << 6) | (Desc & (0x3 << 2)))))

-

-

-#define TT_DESCRIPTOR_SECTION_DOMAIN_MASK                       (0x0FUL << 5)

-#define TT_DESCRIPTOR_SECTION_DOMAIN(a)                         (((a) & 0x0FUL) << 5)

-

-#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK                 (0xFFF00000)

-#define TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK            (0xFFFFFC00)

-#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS(a)                   ((a) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK)

-#define TT_DESCRIPTOR_SECTION_BASE_SHIFT                        20

-

-#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK                 (0xFFFFF000)

-#define TT_DESCRIPTOR_PAGE_INDEX_MASK                        (0x000FF000)

-#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS(a)                   ((a) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK)

-#define TT_DESCRIPTOR_PAGE_BASE_SHIFT                        12

-

-#define TT_DESCRIPTOR_SECTION_WRITE_BACK(Secure)       (TT_DESCRIPTOR_SECTION_TYPE_SECTION                                                           | \

-                                                        ((Secure) ?  TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE )    | \

-                                                                     TT_DESCRIPTOR_SECTION_NG_GLOBAL                         | \

-                                                                     TT_DESCRIPTOR_SECTION_S_NOT_SHARED                      | \

-                                                                     TT_DESCRIPTOR_SECTION_DOMAIN(0)                         | \

-                                                                     TT_DESCRIPTOR_SECTION_AP_RW_RW                          | \

-                                                                     TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC)

-#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH(Secure)    (TT_DESCRIPTOR_SECTION_TYPE_SECTION                                                           | \

-                                                        ((Secure) ?  TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE )    | \

-                                                                     TT_DESCRIPTOR_SECTION_NG_GLOBAL                         | \

-                                                                     TT_DESCRIPTOR_SECTION_S_NOT_SHARED                      | \

-                                                                     TT_DESCRIPTOR_SECTION_DOMAIN(0)                         | \

-                                                                     TT_DESCRIPTOR_SECTION_AP_RW_RW                          | \

-                                                                     TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)

-#define TT_DESCRIPTOR_SECTION_DEVICE(Secure)           (TT_DESCRIPTOR_SECTION_TYPE_SECTION                                                           | \

-                                                        ((Secure) ?  TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE )    | \

-                                                                     TT_DESCRIPTOR_SECTION_NG_GLOBAL                         | \

-                                                                     TT_DESCRIPTOR_SECTION_S_NOT_SHARED                      | \

-                                                                     TT_DESCRIPTOR_SECTION_DOMAIN(0)                         | \

-                                                                     TT_DESCRIPTOR_SECTION_AP_RW_RW                          | \

-                                                                     TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE)

-#define TT_DESCRIPTOR_SECTION_UNCACHED(Secure)         (TT_DESCRIPTOR_SECTION_TYPE_SECTION                                                           | \

-                                                        ((Secure) ?  TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE )    | \

-                                                                     TT_DESCRIPTOR_SECTION_NG_GLOBAL                         | \

-                                                                     TT_DESCRIPTOR_SECTION_S_NOT_SHARED                      | \

-                                                                     TT_DESCRIPTOR_SECTION_DOMAIN(0)                         | \

-                                                                     TT_DESCRIPTOR_SECTION_AP_RW_RW                          | \

-                                                                     TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE)

-

-#define TT_DESCRIPTOR_PAGE_WRITE_BACK              (TT_DESCRIPTOR_PAGE_TYPE_PAGE                                                           | \

-                                                        TT_DESCRIPTOR_PAGE_NG_GLOBAL                                                      | \

-                                                        TT_DESCRIPTOR_PAGE_S_NOT_SHARED                                                   | \

-                                                        TT_DESCRIPTOR_PAGE_AP_RW_RW                                                       | \

-                                                        TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC)

-#define TT_DESCRIPTOR_PAGE_WRITE_THROUGH           (TT_DESCRIPTOR_PAGE_TYPE_PAGE                                                           | \

-                                                        TT_DESCRIPTOR_PAGE_NG_GLOBAL                                                      | \

-                                                        TT_DESCRIPTOR_PAGE_S_NOT_SHARED                                                   | \

-                                                        TT_DESCRIPTOR_PAGE_AP_RW_RW                                                       | \

-                                                        TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)

-#define TT_DESCRIPTOR_PAGE_DEVICE                  (TT_DESCRIPTOR_PAGE_TYPE_PAGE                                                           | \

-                                                        TT_DESCRIPTOR_PAGE_NG_GLOBAL                                                      | \

-                                                        TT_DESCRIPTOR_PAGE_S_NOT_SHARED                                                   | \

-                                                        TT_DESCRIPTOR_PAGE_AP_RW_RW                                                       | \

-                                                        TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE)

-#define TT_DESCRIPTOR_PAGE_UNCACHED                (TT_DESCRIPTOR_PAGE_TYPE_PAGE                                                           | \

-                                                        TT_DESCRIPTOR_PAGE_NG_GLOBAL                                                      | \

-                                                        TT_DESCRIPTOR_PAGE_S_NOT_SHARED                                                   | \

-                                                        TT_DESCRIPTOR_PAGE_AP_RW_RW                                                       | \

-                                                        TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE)

-

 // Cortex A9 feature bit definitions

 #define A9_FEATURE_PARITY  (1<<9)

 #define A9_FEATURE_AOW     (1<<8)

@@ -245,7 +46,7 @@
 #define SMP_GIC_CPUIF_BASE       0x100

 #define SMP_GIC_DIST_BASE        0x1000

 

-// CPACR - Coprocessor Access Control Register defintions

+// CPACR - Coprocessor Access Control Register definitions

 #define CPACR_CP_DENIED(cp)     0x00

 #define CPACR_CP_PRIV(cp)       ((0x1 << ((cp) << 1)) & 0x0FFFFFFF)

 #define CPACR_CP_FULL(cp)       ((0x3 << ((cp) << 1)) & 0x0FFFFFFF)

@@ -253,7 +54,7 @@
 #define CPACR_D32DIS            (1 << 30)

 #define CPACR_CP_FULL_ACCESS    0x0FFFFFFF

 

-// NSACR - Non-Secure Access Control Register defintions

+// NSACR - Non-Secure Access Control Register definitions

 #define NSACR_CP(cp)            ((1 << (cp)) & 0x3FFF)

 #define NSACR_NSD32DIS          (1 << 14)

 #define NSACR_NSASEDIS          (1 << 15)

@@ -262,7 +63,7 @@
 #define NSACR_NS_SMP            (1 << 18)

 #define NSACR_RFR               (1 << 19)

 

-// SCR - Secure Configuration Register defintions

+// SCR - Secure Configuration Register definitions

 #define SCR_NS                  (1 << 0)

 #define SCR_IRQ                 (1 << 1)

 #define SCR_FIQ                 (1 << 2)

@@ -330,7 +131,6 @@ ArmInvalidScu (
   VOID

   );

 

-

 UINTN

 EFIAPI

 ArmGetScuBaseAddress (

@@ -367,7 +167,6 @@ ArmSetupSmpNonSecure (
   IN  UINTN                     CoreId

   );

 

-

 UINTN 

 EFIAPI

 ArmReadCbar (

@@ -387,14 +186,12 @@ ArmReadMpidr (
   VOID

   );

 

-

 UINTN

 EFIAPI

 ArmReadTpidrurw (

   VOID

   );

 

-

 VOID

 EFIAPI

 ArmWriteTpidrurw (

diff --git a/ArmPkg/Include/Library/ArmTrustZoneLib.h b/ArmPkg/Include/Library/ArmTrustZoneLib.h
index 8eeb6a2fee..bcc875495a 100644
--- a/ArmPkg/Include/Library/ArmTrustZoneLib.h
+++ b/ArmPkg/Include/Library/ArmTrustZoneLib.h
@@ -26,12 +26,22 @@
 /**

     FIXME: Need documentation

 **/

-EFI_STATUS TZPCSetDecProtBits(UINTN tzpc_base, UINTN tzpc_id, UINTN bits);

+EFI_STATUS

+TZPCSetDecProtBits (

+  IN  UINTN TzpcBase,

+  IN  UINTN TzpcId,

+  IN  UINTN Bits

+  );

 

 /**

     FIXME: Need documentation

 **/

-EFI_STATUS TZPCClearDecProtBits(UINTN tzpc_base, UINTN tzpc_id, UINTN bits);

+EFI_STATUS

+TZPCClearDecProtBits (

+  IN  UINTN TzpcBase,

+  IN  UINTN TzpcId,

+  IN  UINTN Bits

+  );

 

 // Setup TZ Address Space Controller

 #define TZASC_REGION_ENABLED        1

@@ -64,6 +74,15 @@ EFI_STATUS TZPCClearDecProtBits(UINTN tzpc_base, UINTN tzpc_id, UINTN bits);
 /**

     FIXME: Need documentation

 **/

-EFI_STATUS TZASCSetRegion(UINTN tzasc_base, UINTN region_id, UINTN enabled, UINTN low_address, UINTN high_address, UINTN size, UINTN security);

+EFI_STATUS

+TZASCSetRegion (

+  IN  INTN  TzascBase,

+  IN  UINTN RegionId,

+  IN  UINTN Enabled,

+  IN  UINTN LowAddress,

+  IN  UINTN HighAddress,

+  IN  UINTN Size,

+  IN  UINTN Security

+  );

 

 #endif

diff --git a/ArmPkg/Library/ArmTrustZoneLib/ArmTrustZone.c b/ArmPkg/Library/ArmTrustZoneLib/ArmTrustZone.c
index 56d1311f84..8319441f29 100644
--- a/ArmPkg/Library/ArmTrustZoneLib/ArmTrustZone.c
+++ b/ArmPkg/Library/ArmTrustZoneLib/ArmTrustZone.c
@@ -29,51 +29,77 @@
 /**

     FIXME: Need documentation

 **/

-EFI_STATUS TZPCSetDecProtBits(UINTN TzpcBase, UINTN TzpcId, UINTN Bits) {

-    if (TzpcId > TZPC_DECPROT_MAX) {

-        return EFI_INVALID_PARAMETER;

-    }

+EFI_STATUS

+TZPCSetDecProtBits (

+  IN  UINTN TzpcBase,

+  IN  UINTN TzpcId,

+  IN  UINTN Bits

+  )

+{

+  if (TzpcId > TZPC_DECPROT_MAX) {

+    return EFI_INVALID_PARAMETER;

+  }

 

-    MmioWrite32((UINTN)TzpcBase + TZPC_DECPROT0_SET_REG + (TzpcId * 0x0C), Bits);

+  MmioWrite32 ((UINTN)TzpcBase + TZPC_DECPROT0_SET_REG + (TzpcId * 0x0C), Bits);

 

-    return EFI_SUCCESS;

+  return EFI_SUCCESS;

 }

 

 /**

     FIXME: Need documentation

 **/

-EFI_STATUS TZPCClearDecProtBits(UINTN TzpcBase, UINTN TzpcId, UINTN Bits) {

-    if (TzpcId> TZPC_DECPROT_MAX) {

-        return EFI_INVALID_PARAMETER;

-    }

+EFI_STATUS

+TZPCClearDecProtBits (

+  IN  UINTN TzpcBase,

+  IN  UINTN TzpcId,

+  IN  UINTN Bits

+  )

+{

+  if (TzpcId> TZPC_DECPROT_MAX) {

+    return EFI_INVALID_PARAMETER;

+  }

 

-    MmioWrite32((UINTN)TzpcBase + TZPC_DECPROT0_CLEAR_REG + (TzpcId * 0x0C), Bits);

+  MmioWrite32 ((UINTN)TzpcBase + TZPC_DECPROT0_CLEAR_REG + (TzpcId * 0x0C), Bits);

 

-    return EFI_SUCCESS;

+  return EFI_SUCCESS;

 }

 

 /**

     FIXME: Need documentation

 **/

-UINT32 TZASCGetNumRegions(UINTN TzascBase) {

-    return (MmioRead32((UINTN)TzascBase + TZASC_CONFIGURATION_REG) & 0xF);

+UINT32

+TZASCGetNumRegions (

+  IN UINTN TzascBase

+  )

+{

+  return (MmioRead32 ((UINTN)TzascBase + TZASC_CONFIGURATION_REG) & 0xF);

 }

 

 /**

     FIXME: Need documentation

 **/

-EFI_STATUS TZASCSetRegion(UINTN TzascBase, UINTN RegionId, UINTN Enabled, UINTN LowAddress, UINTN HighAddress, UINTN Size, UINTN Security) {

-    UINT32*     Region;

+EFI_STATUS

+TZASCSetRegion (

+  IN  INTN  TzascBase,

+  IN  UINTN RegionId,

+  IN  UINTN Enabled,

+  IN  UINTN LowAddress,

+  IN  UINTN HighAddress,

+  IN  UINTN Size,

+  IN  UINTN Security

+  )

+{

+  UINT32*     Region;

 

-    if (RegionId > TZASCGetNumRegions(TzascBase)) {

-        return EFI_INVALID_PARAMETER;

-    }

+  if (RegionId > TZASCGetNumRegions(TzascBase)) {

+    return EFI_INVALID_PARAMETER;

+  }

 

-    Region = (UINT32*)((UINTN)TzascBase + TZASC_REGIONS_REG + (RegionId * 0x10));

+  Region = (UINT32*)((UINTN)TzascBase + TZASC_REGIONS_REG + (RegionId * 0x10));

 

-    MmioWrite32((UINTN)(Region), LowAddress&0xFFFF8000);

+  MmioWrite32((UINTN)(Region), LowAddress&0xFFFF8000);

   MmioWrite32((UINTN)(Region+1), HighAddress);

   MmioWrite32((UINTN)(Region+2), ((Security & 0xF) <<28) | ((Size & 0x3F) << 1) | (Enabled & 0x1));

 

-    return EFI_SUCCESS;

+  return EFI_SUCCESS;

 }

diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandler.c b/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandler.c
index e969dfa763..07e31ea597 100644
--- a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandler.c
+++ b/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandler.c
@@ -33,8 +33,6 @@ typedef struct {
   CHAR8   Char;

 } CPSR_CHAR;

 

-

-

  

 /**

   Use the EFI Debug Image Table to lookup the FaultAddress and find which PE/COFF image 

@@ -61,7 +59,6 @@ GetImageName (
   UINTN                 Entry;

   CHAR8                 *Address;

 

-  

   DebugTable = gDebugImageTableHeader->EfiDebugImageInfoTable;

   if (DebugTable == NULL) {

     return NULL;

@@ -102,9 +99,9 @@ CpsrString (
   OUT CHAR8   *ReturnStr

   )

 {

-  UINTN Index;

-  CHAR8 *Str = ReturnStr;

-  CHAR8 *ModeStr;

+  UINTN     Index;

+  CHAR8*    Str;

+  CHAR8*    ModeStr;

   CPSR_CHAR CpsrChar[] = {

     { 31, 'n' },

     { 30, 'z' },

@@ -119,6 +116,8 @@ CpsrString (
     { 0,  '?' }

   };

   

+  Str = ReturnStr;

+

   for (Index = 0; CpsrChar[Index].BIT != 0; Index++, Str++) {

     *Str = CpsrChar[Index].Char;

     if ((Cpsr & (1 << CpsrChar[Index].BIT)) != 0) {

@@ -194,8 +193,7 @@ FaultStatusToString (
   return FaultSource;

 }

 

-

-CHAR8 *gExceptionTypeString[] = {

+STATIC CHAR8 *gExceptionTypeString[] = {

   "Reset",

   "Undefined OpCode",

   "SWI",

@@ -206,7 +204,6 @@ CHAR8 *gExceptionTypeString[] = {
   "FIQ"

 };

 

-

 /**

   This is the default action to take on an unexpected exception

   

@@ -228,7 +225,7 @@ DefaultExceptionHandler (
   BOOLEAN   DfsrWrite;

   UINT32    PcAdjust = 0;

 

-  DEBUG ((EFI_D_ERROR, "\n%a Exception PC at 0x%08x  CPSR 0x%08x ", gExceptionTypeString[ExceptionType], SystemContext.SystemContextArm->PC, SystemContext.SystemContextArm->CPSR));

+  Print(L"\n%a Exception PC at 0x%08x  CPSR 0x%08x ", gExceptionTypeString[ExceptionType], SystemContext.SystemContextArm->PC, SystemContext.SystemContextArm->CPSR);

   DEBUG_CODE_BEGIN ();

     CHAR8   *Pdb;

     UINT32  ImageBase;

@@ -249,10 +246,10 @@ DefaultExceptionHandler (
 

       //

       // A PE/COFF image loads its headers into memory so the headers are 

-      // included in the linked addressess. ELF and Mach-O images do not

+      // included in the linked addresses. ELF and Mach-O images do not

       // include the headers so the first byte of the image is usually

       // text (code). If you look at link maps from ELF or Mach-O images

-      // you need to subtact out the size of the PE/COFF header to get

+      // you need to subtract out the size of the PE/COFF header to get

       // get the offset that matches the link map. 

       //

       DEBUG ((EFI_D_ERROR, "loaded at 0x%08x (PE/COFF offset) 0x%x (ELF or Mach-O offset) 0x%x", ImageBase, Offset, Offset - PeCoffSizeOfHeader));

diff --git a/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c b/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c
index 531cfa1e7b..161ac2dfb2 100644
--- a/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c
+++ b/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c
@@ -89,7 +89,7 @@ DeCygwinPathIfNeeded (
   Ptr[9]  = Ptr[10];

   Ptr[10] = ':';

   

-  // switch path seperators

+  // switch path separators

   for (Index = 11; Index < Len; Index++) {

     if (Ptr[Index] == '/') {

       Ptr[Index] = '\\' ;