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authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-06-03 09:32:39 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-06-03 09:32:39 +0000
commit23792dea0ca521e8696c7994e9cc6d04581f0b2c (patch)
treecd16c0d235bfa0bce9c957150ce883e325f55d10 /ArmPlatformPkg/ArmVExpressPkg/Library
parent9dcfb8e5c8edb262a8e941d119af553205d38b2e (diff)
downloadedk2-platforms-23792dea0ca521e8696c7994e9cc6d04581f0b2c.tar.xz
ArmPlatformPkg/SP804Timer: Remove the SP810 System Controller dependency
The SP804 drivers must not consider the presence of the SP810 System Controller on the platform. The SP810 was used to enable the SP804 Dual Timers on ArmVExpress. It is the role of the Platform specific driver to enable to the SP804 dual timers if required. The former SP810 initialization code has moved to ArmPlatformLib for ArmRealViewEb and ArmVersatileExpress. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11744 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/ArmVExpressPkg/Library')
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
index c2783bbca2..3acb713f3a 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
@@ -17,10 +17,12 @@
#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
+#include <Library/SerialPortLib.h>
+
#include <Drivers/PL341Dmc.h>
#include <Drivers/PL301Axi.h>
#include <Drivers/PL310L2Cache.h>
-#include <Library/SerialPortLib.h>
+#include <Drivers/SP804Timer.h>
#define SerialPrint(txt) SerialPortWrite (txt, AsciiStrLen(txt)+1);
@@ -212,7 +214,14 @@ ArmPlatformNormalInitialize (
VOID
)
{
- // Nothing to do here
+ // Configure periodic timer (TIMER0) for 1MHz operation
+ MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
+ // Configure 1MHz clock
+ MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
+ // configure SP810 to use 1MHz clock and disable
+ MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
+ // Configure SP810 to use 1MHz clock and disable
+ MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
}
/**