ArmPlatformPkg/PL111LcdArmVExpressLib: use write-combine mapping for VRAM

Replace the uncached memory mapping of the framebuffer with a write-
combining one. This improves performance, and avoids issues with
unaligned accesses and DC ZVA instructions performed by the accelerated
memcpy/memset routines.

Instead of manipulating the memory attributes directly, use the
SetMemorySpaceAttributes() DXE services, which validates the attributes
against the capabilities of the region before making the actual change.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jeremy Linton <jeremy.linton@arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

2 files changed, 6 insertions, 9 deletions

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c b/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
index a8125e81da..3f3ceb3d2f 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
@@ -17,10 +17,10 @@
 #include <Library/IoLib.h>

 #include <Library/PcdLib.h>

 #include <Library/DebugLib.h>

+#include <Library/DxeServicesTableLib.h>

 #include <Library/LcdPlatformLib.h>

 #include <Library/UefiBootServicesTableLib.h>

 

-#include <Protocol/Cpu.h>

 #include <Protocol/EdidDiscovered.h>

 #include <Protocol/EdidActive.h>

 

@@ -165,7 +165,6 @@ LcdPlatformGetVram (
   )

 {

   EFI_STATUS              Status;

-  EFI_CPU_ARCH_PROTOCOL  *Cpu;

 

   Status = EFI_SUCCESS;

 

@@ -187,12 +186,9 @@ LcdPlatformGetVram (
       return Status;

     }

 

-    // Ensure the Cpu architectural protocol is already installed

-    Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);

-    ASSERT_EFI_ERROR(Status);

-

-    // Mark the VRAM as un-cachable. The VRAM is inside the DRAM, which is cachable.

-    Status = Cpu->SetMemoryAttributes(Cpu, *VramBaseAddress, *VramSize, EFI_MEMORY_UC);

+    // Mark the VRAM as write-combining. The VRAM is inside the DRAM, which is cacheable.

+    Status = gDS->SetMemorySpaceAttributes (*VramBaseAddress, *VramSize,

+                    EFI_MEMORY_WC);

     ASSERT_EFI_ERROR(Status);

     if (EFI_ERROR(Status)) {

       gBS->FreePages (*VramBaseAddress, EFI_SIZE_TO_PAGES(*VramSize));

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
index d1978e7110..658558ab15 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
@@ -31,8 +31,9 @@
   ArmPlatformPkg/ArmPlatformPkg.dec

 

 [LibraryClasses]

-  BaseLib

   ArmPlatformSysConfigLib

+  BaseLib

+  DxeServicesTableLib

 

 [Protocols]

   gEfiEdidDiscoveredProtocolGuid                # Produced