diff options
| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-09-22 23:02:13 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-09-22 23:02:13 +0000 |
| commit | 44e272fd6ab9d7b859588eeffc02b8cd78d3c76b (patch) | |
| tree | 15902212232da6b49e36cbf5888d21b1efe03c9f /ArmPlatformPkg/Sec/SecEntryPoint.S | |
| parent | 0787bc6184631f20f8bf3b4abd61630a4a9bc672 (diff) | |
| download | edk2-platforms-44e272fd6ab9d7b859588eeffc02b8cd78d3c76b.tar.xz | |
ArmPlatformPkg/ArmPlatformLib: Introduce ArmPlatformSecBootAction function
This function is called at the initial stage of the Secure boot process to allow
platform vendors to add early actions.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12413 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/Sec/SecEntryPoint.S')
| -rw-r--r-- | ArmPlatformPkg/Sec/SecEntryPoint.S | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/ArmPlatformPkg/Sec/SecEntryPoint.S b/ArmPlatformPkg/Sec/SecEntryPoint.S index 909f7fafbc..f8599393cb 100644 --- a/ArmPlatformPkg/Sec/SecEntryPoint.S +++ b/ArmPlatformPkg/Sec/SecEntryPoint.S @@ -30,6 +30,7 @@ GCC_ASM_EXPORT(_ModuleEntryPoint) #global functions referenced by this module
GCC_ASM_IMPORT(CEntryPoint)
+GCC_ASM_IMPORT(ArmPlatformSecBootAction)
GCC_ASM_IMPORT(ArmPlatformIsMemoryInitialized)
GCC_ASM_IMPORT(ArmPlatformInitializeBootMemory)
GCC_ASM_IMPORT(ArmDisableInterrupts)
@@ -46,16 +47,19 @@ StartupAddr: .word ASM_PFX(CEntryPoint) SecVectorTableAddr: .word ASM_PFX(SecVectorTable)
ASM_PFX(_ModuleEntryPoint):
- #Set VBAR to the start of the exception vectors in Secure Mode
- ldr r0, SecVectorTableAddr
- bl ASM_PFX(ArmWriteVBar)
-
# First ensure all interrupts are disabled
bl ASM_PFX(ArmDisableInterrupts)
# Ensure that the MMU and caches are off
bl ASM_PFX(ArmDisableCachesAndMmu)
+ # Jump to Platform Specific Boot Action function
+ blx ASM_PFX(ArmPlatformSecBootAction)
+
+ # Set VBAR to the start of the exception vectors in Secure Mode
+ ldr r0, =SecVectorTable
+ bl ASM_PFX(ArmWriteVBar)
+
_IdentifyCpu:
# Identify CPU ID
bl ASM_PFX(ArmReadMpidr)
|