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author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-07-01 14:33:26 +0000 |
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committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-07-01 14:33:26 +0000 |
commit | 64e03133cc76cd6d55e3b21e010abb0b232bd504 (patch) | |
tree | aad739babb7fe54530bdaced7743d2bdecc11472 /ArmPlatformPkg/Sec | |
parent | bf72cf3381c20703042c5a574ec4ba689abd4430 (diff) | |
download | edk2-platforms-64e03133cc76cd6d55e3b21e010abb0b232bd504.tar.xz |
ArmPlatformPkg: Add support for PrePi module
This module is enabled for ArmRealViewEb and ArmvExpress builds
when the macro EDK2_SKIP_PEICORE is passed to the build system.
The PrePi module can be used when the DRAM has already been initialized
by the SEC phase/1st stage boot loader and no call to external PEIM is
required.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11953 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/Sec')
-rw-r--r-- | ArmPlatformPkg/Sec/Sec.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c index faa012ab40..8ddc654c24 100644 --- a/ArmPlatformPkg/Sec/Sec.c +++ b/ArmPlatformPkg/Sec/Sec.c @@ -227,6 +227,18 @@ CEntryPoint ( // Enter Secondary Cores into non Secure State. To enter into Non Secure state, we need to make a return from exception return_from_exception((UINTN)NonSecureWaitForFirmware); } + } else if (FeaturePcdGet(PcdSkipPeiCore)) { + if (CoreId == ARM_PRIMARY_CORE) { + // Signal the secondary cores they can jump to PEI phase + PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E); + + // To enter into Non Secure state, we need to make a return from exception + return_from_exception(PcdGet32(PcdNormalFvBaseAddress)); + } else { + // We wait for the primary core to finish to initialize the System Memory. When we skip PEI Core, we could set the stack in DRAM + // Without this synchronization the secondary cores will complete the SEC before the primary core has finished to intitialize the DRAM. + return_from_exception((UINTN)NonSecureWaitForFirmware); + } } else { // To enter into Non Secure state, we need to make a return from exception return_from_exception(PcdGet32(PcdNormalFvBaseAddress)); |