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authorYao, Jiewen <jiewen.yao@intel.com>2015-11-30 19:57:40 +0000
committerlersek <lersek@Edk2>2015-11-30 19:57:40 +0000
commit881520ea6778953c57d975ca2a9cf3f2114f99c4 (patch)
treebd5c851c7c701bf60af72b036c80477964aec561 /BaseTools/Source/Python/Common/FdfParserLite.py
parent5e04f4b7e1a48cfa9e6b045f953e84becced2e9e (diff)
downloadedk2-platforms-881520ea6778953c57d975ca2a9cf3f2114f99c4.tar.xz
UefiCpuPkg/PiSmmCpu: Always set RW+P bit for page table by default
So that we can use write-protection for code later. This is REPOST. It includes the bug fix from "Paolo Bonzini" <pbonzini@redhat.com>: Title: fix generation of 32-bit PAE page tables "Bits 1 and 2 are reserved in 32-bit PAE Page Directory Pointer Table Entries (PDPTEs); see Table 4-8 in the SDM. With VMX extended page tables, the processor notices and fails the VM entry as soon as CR0.PG is set to 1." And thanks "Laszlo Ersek" <lersek@redhat.com> to validate the fix. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Signed-off-by: "Paolo Bonzini" <pbonzini@redhat.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Cc: "Fan, Jeff" <jeff.fan@intel.com> Cc: "Kinney, Michael D" <michael.d.kinney@intel.com> Cc: "Laszlo Ersek" <lersek@redhat.com> Cc: "Paolo Bonzini" <pbonzini@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19067 6f19259b-4bc3-4df7-8a09-765794883524
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