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authorMichael Kinney <michael.d.kinney@intel.com>2016-03-08 14:00:31 -0800
committerMichael Kinney <michael.d.kinney@intel.com>2016-03-13 11:58:13 -0700
commit84ada87c6b1f40a5f24af8fb9acb2d032d33674c (patch)
tree92b24c805417d087006dda57150f435b8550add3 /BaseTools/Source/Python/UPT/UnitTest/InfBinarySectionTest.py
parentdc5d621c60f29cedf382f7ae4c91cf268aaa7176 (diff)
downloadedk2-platforms-84ada87c6b1f40a5f24af8fb9acb2d032d33674c.tar.xz
UefiCpuPkg/Include: Add Ivy Bridge MSR include file
Add Ivy Bridge MSRs from: Intel(R) 64 and IA-32 Architectures Software Developer's Manual, Volume 3, December 2015, Chapter 35 Model-Specific-Registers (MSR), Section 35-9. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
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