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author | Michael Kinney <michael.d.kinney@intel.com> | 2016-11-29 01:05:05 -0800 |
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committer | Michael Kinney <michael.d.kinney@intel.com> | 2016-11-29 08:17:50 -0800 |
commit | 890f11d4286b29f008a0deecd2bf01b4d767c118 (patch) | |
tree | 31d051a409750734002fb729e40056e5f59b2c70 /BaseTools/Source/Python | |
parent | eadc05bd9237a716dc4c7cbe86806c2e27205ea7 (diff) | |
download | edk2-platforms-890f11d4286b29f008a0deecd2bf01b4d767c118.tar.xz |
Vlv2TbltDevicePkg/PlatformInitPei: Workaround unaligned SMRAM size
https://bugzilla.tianocore.org/show_bug.cgi?id=260
The PiSmmCPuDxeSmm module requires the SMRR base address and length
to be aligned. The memory initialization for Vlv2TbltDevicePkg
produces an SMRAM base address that is on a 16MB boundary and an
SMRAM length of 12MB. The SMRAM length is rounded up to 16MB.
This is a workaround until the binary module that produces the
gEfiSmmPeiSmramMemoryReserveGuid HOB is updated
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: David Wei <david.wei@intel.com>
Cc: Mang Guo <mang.guo@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'BaseTools/Source/Python')
0 files changed, 0 insertions, 0 deletions