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author | AJFISH <AJFISH@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-01-08 21:07:58 +0000 |
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committer | AJFISH <AJFISH@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-01-08 21:07:58 +0000 |
commit | db5c4f9e1523964ff1dd4139513d84e58d3f1d80 (patch) | |
tree | d433111347881037d7586b03f54f6d3209d15dd7 /BeagleBoardPkg/Sec | |
parent | cc726b9ffd38771454660d5bd6b4f197707e40d7 (diff) | |
download | edk2-platforms-db5c4f9e1523964ff1dd4139513d84e58d3f1d80.tar.xz |
Update to support a single stack. GCC update will follow.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9695 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'BeagleBoardPkg/Sec')
-rwxr-xr-x | BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm | 24 | ||||
-rwxr-xr-x | BeagleBoardPkg/Sec/Cache.c | 2 |
2 files changed, 1 insertions, 25 deletions
diff --git a/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm b/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm index fb30e4dd59..411e3c13ce 100755 --- a/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm +++ b/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm @@ -53,33 +53,9 @@ stack_pointer_setup LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) /* stack size arg3 */
add r4, r2, r3
- //Enter IRQ mode and set up IRQ stack pointer
- mov r0,#0x12|0x80|0x40
- msr CPSR_c,r0
- mov r13,r4
-
- //Enter Abort mode and set up Abort stack pointer
- mov r0,#0x17|0x80|0x40
- msr CPSR_c,r0
- sub r4, r4, #0x400
- mov r13,r4
-
- //Enter Undefined mode and set up Undefined stack pointer
- mov r0,#0x1b|0x80|0x40
- msr CPSR_c,r0
- sub r4, r4, #0x400
- mov r13,r4
-
//Enter SVC mode and set up SVC stack pointer
mov r0,#0x13|0x80|0x40
msr CPSR_c,r0
- sub r4, r4, #0x400
- mov r13,r4
-
- //Enter System mode and set up System stack pointer
- mov r0,#0x1f|0x80|0x40
- msr CPSR_c,r0
- sub r4, r4, #0x400
mov r13,r4
// Call C entry point
diff --git a/BeagleBoardPkg/Sec/Cache.c b/BeagleBoardPkg/Sec/Cache.c index 12bf990812..facc5deae4 100755 --- a/BeagleBoardPkg/Sec/Cache.c +++ b/BeagleBoardPkg/Sec/Cache.c @@ -82,7 +82,7 @@ InitCache ( MemoryTable[4].Length = 0;
MemoryTable[4].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
- ArmConfigureMmu(MemoryTable, &TranslationTableBase, &TranslationTableSize);
+ ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
}
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