diff options
author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-07-06 20:08:28 +0000 |
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committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-07-06 20:08:28 +0000 |
commit | 7f21c4a2276901c3bfc8712eabd170a41501aa12 (patch) | |
tree | 1cd9334fa1cb07fa2d8f748866daf58491c2bf4d /BeagleBoardPkg | |
parent | 803f94eef966dd952c4616106b17b5e54eb266a1 (diff) | |
download | edk2-platforms-7f21c4a2276901c3bfc8712eabd170a41501aa12.tar.xz |
BeagleBoardPkg: Implement ArmPlatformLib and the ARM PCDs to reuse ARM common components on the BeagleBoard.
To build the UEFI BeagleBoard firmware using this ARM framework either use ./build-next.sh
or directly call the EDK2 BaseTools with BeagleBoardPkg-next.dsc.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11998 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'BeagleBoardPkg')
-rwxr-xr-x | BeagleBoardPkg/BeagleBoardPkg-next.dsc | 503 | ||||
-rwxr-xr-x | BeagleBoardPkg/BeagleBoardPkg-next.fdf | 294 | ||||
-rwxr-xr-x | BeagleBoardPkg/Include/BeagleBoard.h | 168 | ||||
-rwxr-xr-x | BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c | 124 | ||||
-rwxr-xr-x | BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.S | 57 | ||||
-rwxr-xr-x | BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.asm | 58 | ||||
-rwxr-xr-x | BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardLib.inf | 55 | ||||
-rwxr-xr-x | BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardMem.c | 102 | ||||
-rwxr-xr-x | BeagleBoardPkg/Library/BeagleBoardLib/Clock.c | 70 | ||||
-rwxr-xr-x | BeagleBoardPkg/Library/BeagleBoardLib/PadConfiguration.c | 282 | ||||
-rwxr-xr-x | BeagleBoardPkg/build-next.sh | 144 |
11 files changed, 1857 insertions, 0 deletions
diff --git a/BeagleBoardPkg/BeagleBoardPkg-next.dsc b/BeagleBoardPkg/BeagleBoardPkg-next.dsc new file mode 100755 index 0000000000..696825c69a --- /dev/null +++ b/BeagleBoardPkg/BeagleBoardPkg-next.dsc @@ -0,0 +1,503 @@ +#/** @file +# Beagle board package. +# +# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR> +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +################################################################################ +# +# Defines Section - statements that will be processed to create a Makefile. +# +################################################################################ +[Defines] + PLATFORM_NAME = BeagleBoardPkg + PLATFORM_GUID = 91fa6c28-33df-46ac-aee6-292d6811ea31 + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010005 + OUTPUT_DIRECTORY = Build/BeagleBoard + SUPPORTED_ARCHITECTURES = ARM + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = BeagleBoardPkg/BeagleBoardPkg-next.fdf + + +[LibraryClasses.common] + BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf + UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf + +!if $(TARGET) == RELEASE + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf + UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf +!else + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf + UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf +# UncachedMemoryAllocationLib|ArmPkg/Library/DebugUncachedMemoryAllocationLib/DebugUncachedMemoryAllocationLib.inf +!endif + DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf + + ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf + ArmPlatformLib|BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardLib.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf + BaseMemoryLib|ArmPkg/Library/BaseMemoryLibStm/BaseMemoryLibStm.inf + + EfiResetSystemLib|BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.inf + + PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf + PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf + + EblCmdLib|BeagleBoardPkg/Library/EblCmdLib/EblCmdLib.inf + + EfiFileLib|EmbeddedPkg/Library/EfiFileLib/EfiFileLib.inf + + + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf + + # + # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window + # in the debugger will show load and unload commands for symbols. You can cut and paste this + # into the command window to load symbols. We should be able to use a script to do this, but + # the version of RVD I have does not support scipts accessing system memory. + # +# PeCoffExtraActionLib|ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf + PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf +# PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf + + + CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf + DefaultExceptioHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf + + SerialPortLib|Omap35xxPkg/Library/SerialPortLib/SerialPortLib.inf + SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf + + RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf + + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf + + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + UefiLib|MdePkg/Library/UefiLib/UefiLib.inf + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf + UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf + UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf + + DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf + UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf + UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf + +# +# Assume everything is fixed at build +# + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + + UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf + + UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf + EblAddExternalCommandLib|EmbeddedPkg/Library/EblAddExternalCommandLib/EblAddExternalCommandLib.inf + + + CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf + + TimerLib|Omap35xxPkg/Library/Omap35xxTimerLib/Omap35xxTimerLib.inf + OmapLib|Omap35xxPkg/Library/OmapLib/OmapLib.inf + OmapDmaLib|Omap35xxPkg/Library/OmapDmaLib/OmapDmaLib.inf + EblNetworkLib|EmbeddedPkg/Library/EblNetworkLib/EblNetworkLib.inf + DebugAgentTimerLib|Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf
+ + GdbSerialLib|Omap35xxPkg/Library/GdbSerialLib/GdbSerialLib.inf + ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf + DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf + DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf + +[LibraryClasses.common.SEC] + ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf + ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf + LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf + + # Temp work around for Movt relocation issue. + #PeCoffLib|ArmPkg/Library/BasePeCoffLib/BasePeCoffLib.inf + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf + PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf + MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf + PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf + PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf + MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf + + # 1/123 faster than Stm or Vstm version + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + + # Uncomment to turn on GDB stub in SEC.
+ #DebugAgentLib|EmbeddedPkg/Library/GdbDebugAgent/GdbDebugAgent.inf
+ +[LibraryClasses.common.PEI_CORE] + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf + +[LibraryClasses.common.DXE_CORE] + HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf + MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf + DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf +# PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + PeCoffLib|EmbeddedPkg/Library/DxeHobPeCoffLib/DxeHobPeCoffLib.inf + + PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf + + +[LibraryClasses.common.DXE_DRIVER] + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf + + +[LibraryClasses.common.UEFI_APPLICATION] + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf + +[LibraryClasses.common.UEFI_DRIVER] + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf + ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf + +[LibraryClasses.common.DXE_RUNTIME_DRIVER] + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf +# PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + PeCoffLib|EmbeddedPkg/Library/DxeHobPeCoffLib/DxeHobPeCoffLib.inf + + +[LibraryClasses.ARM] + # + # It is not possible to prevent the ARM compiler for generic intrinsic functions. + # This library provides the instrinsic functions generate by a given compiler. + # [LibraryClasses.ARM] and NULL mean link this library into all ARM images. + # + NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf + + +[BuildOptions] + XCODE:*_*_ARM_ARCHCC_FLAGS == -arch armv7 -march=armv7 + XCODE:*_*_ARM_ARCHASM_FLAGS == -arch armv7 + XCODE:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7 + XCODE:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + + GCC:*_*_ARM_ARCHCC_FLAGS == -march=armv7-a -mthumb + GCC:*_*_ARM_ARCHASM_FLAGS == -march=armv7-a + GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + + RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A8 --thumb + RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A8 + RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + +################################################################################ +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# +################################################################################ + +[PcdsFeatureFlag.common] + gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE + gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE + + # + # Control what commands are supported from the UI + # Turn these on and off to add features or save size + # + gEmbeddedTokenSpaceGuid.PcdEmbeddedMacBoot|TRUE + gEmbeddedTokenSpaceGuid.PcdEmbeddedDirCmd|TRUE + gEmbeddedTokenSpaceGuid.PcdEmbeddedHobCmd|TRUE + gEmbeddedTokenSpaceGuid.PcdEmbeddedHwDebugCmd|TRUE + gEmbeddedTokenSpaceGuid.PcdEmbeddedPciDebugCmd|TRUE + gEmbeddedTokenSpaceGuid.PcdEmbeddedIoEnable|FALSE + gEmbeddedTokenSpaceGuid.PcdEmbeddedScriptCmd|FALSE + + gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE + + # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress + gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE + + gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob|TRUE + gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE + + gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE + +[PcdsFixedAtBuild.common] + gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"Beagle Board" + + gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"BeagleEdk2" + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32 + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0 + gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 + gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 + gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000 + gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000 + gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF + gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1 + gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 + +# DEBUG_ASSERT_ENABLED 0x01 +# DEBUG_PRINT_ENABLED 0x02 +# DEBUG_CODE_ENABLED 0x04 +# CLEAR_MEMORY_ENABLED 0x08 +# ASSERT_BREAKPOINT_ENABLED 0x10 +# ASSERT_DEADLOOP_ENABLED 0x20 +!if $(TARGET) == RELEASE + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x21 +!else + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f +!endif + +# DEBUG_INIT 0x00000001 // Initialization +# DEBUG_WARN 0x00000002 // Warnings +# DEBUG_LOAD 0x00000004 // Load events +# DEBUG_FS 0x00000008 // EFI File system +# DEBUG_POOL 0x00000010 // Alloc & Free's +# DEBUG_PAGE 0x00000020 // Alloc & Free's +# DEBUG_INFO 0x00000040 // Verbose +# DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers +# DEBUG_VARIABLE 0x00000100 // Variable +# DEBUG_BM 0x00000400 // Boot Manager +# DEBUG_BLKIO 0x00001000 // BlkIo Driver +# DEBUG_NET 0x00004000 // SNI Driver +# DEBUG_UNDI 0x00010000 // UNDI Driver +# DEBUG_LOADFILE 0x00020000 // UNDI Driver +# DEBUG_EVENT 0x00080000 // Event messages +# DEBUG_ERROR 0x80000000 // Error + + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F + + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 + + gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|"" + gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07 + gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000 + + gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase|0 + gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize|0 + +# +# Optional feature to help prevent EFI memory map fragments +# Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob +# Values are in EFI Pages (4K). DXE Core will make sure that +# at least this much of each type of memory can be allocated +# from a single memory range. This way you only end up with +# maximum of two fragements for each type in the memory map +# (the memory used, and the free memory that was prereserved +# but not used). +# + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|80 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|40 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|3000 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|10 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0 + + +# +# Beagle board Specific PCDs +# + gArmTokenSpaceGuid.PcdVFPEnabled|1 + + gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase|0x87FE0000 # stack at top of memory + gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize|0x20000 # 128K stack + + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000 + gArmTokenSpaceGuid.PcdSystemMemorySize|0x08000000 + + # Size of the region used by UEFI in permanent memory (Reserved 16MB) + gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x01000000 + + # Size of the region reserved for fixed address allocations (Reserved 32MB) + gArmTokenSpaceGuid.PcdArmLinuxKernelMaxOffset|0x02000000 + + # Reserved to store the HobBase address (top of UEFI Memory Region) + # = (PcdSystemMemoryBase + PcdSystemMemorySize) - sizeof(UINT32) + gEmbeddedTokenSpaceGuid.PcdPrePiHobBase|0x87FFFFFC + + #gEmbeddedTokenSpaceGuid.PcdPrePiHobBase|0x80001000 + gEmbeddedTokenSpaceGuid.PcdPrePiStackBase|0x87FE0000 # stack at top of memory + gEmbeddedTokenSpaceGuid.PcdPrePiStackSize|0x20000 # 128K stack + + gEmbeddedTokenSpaceGuid.PcdMemoryBase|0x80000000 + gEmbeddedTokenSpaceGuid.PcdMemorySize|0x10000000 + + + gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x80008000 + gArmTokenSpaceGuid.PcdCpuResetAddress|0x80008000 + + gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000 + gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterPeriodInNanoseconds|77 + gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterFrequencyInHz|13000000 + + # + # ARM Pcds + # + gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000 + + gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"Linux from SD" + gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"VenHw(B615F1F5-5088-43CD-809C-A16E52487D00)/HD(1,MBR,0x00000000,0x3F,0x19FC0)/zImage" + gArmPlatformTokenSpaceGuid.PcdDefaultBootType|1 + gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut|10 + gArmPlatformTokenSpaceGuid.PcdFdtDevicePath|L"VenHw(B615F1F5-5088-43CD-809C-A16E52487D00)/HD(1,MBR,0x00000000,0x3F,0x19FC0)/omap3-beagle.dtb" + + gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(6696936D-3637-467C-87CB-14EA8248948C)/Uart(115200,8,N,1)/VenPcAnsi()" + gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(6696936D-3637-467C-87CB-14EA8248948C)/Uart(115200,8,N,1)/VenPcAnsi()" + + # + # ARM OS Loader + # + # BeagleBoard machine type (OMAP3_BEAGLE = 1546) required for ARM Linux: + gArmTokenSpaceGuid.PcdArmMachineType|1546 + +################################################################################ +# +# Components Section - list of all EDK II Modules needed by this Platform +# +################################################################################ +[Components.common] + +# +# SEC +# + ArmPlatformPkg/PrePi/PeiUniCore.inf + +# +# DXE +# + MdeModulePkg/Core/Dxe/DxeMain.inf { + <LibraryClasses> + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf +# NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf + NULL|EmbeddedPkg/Library/LzmaHobCustomDecompressLib/LzmaHobCustomDecompressLib.inf + } + + ArmPkg/Drivers/CpuDxe/CpuDxe.inf + + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf + EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + + EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf +# +# This version uses semi-hosting console +# EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf { +# <LibraryClasses> +# SerialPortLib|ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf +# } + + EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf + EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + # + # Semi-hosting filesystem + # + ArmPkg/Filesystem/SemihostFs/SemihostFs.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + FatPkg/EnhancedFatDxe/Fat.inf + MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + + # + # USB + # + Omap35xxPkg/PciEmulation/PciEmulation.inf + + #NOTE: Open source EHCI stack doesn't work on Beagleboard. + #NOTE: UsbBus and UsbMassStorage don't work using iPhone SDK tool chain. + MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf { + <PcdsFixedAtBuild> + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x800fffff + } + + MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + + # + # Nand Flash + # + Omap35xxPkg/Flash/Flash.inf + + # + # MMC/SD + # + Omap35xxPkg/MMCHSDxe/MMCHS.inf { + <PcdsFixedAtBuild> + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x800fffff + } + + # + # I2C + # + Omap35xxPkg/SmbusDxe/Smbus.inf + + # + # SoC Drivers + # + Omap35xxPkg/Gpio/Gpio.inf + Omap35xxPkg/InterruptDxe/InterruptDxe.inf + Omap35xxPkg/TimerDxe/TimerDxe.inf + + # + # Power IC + # + Omap35xxPkg/TPS65950Dxe/TPS65950.inf + + # + # Application + # + EmbeddedPkg/Ebl/Ebl.inf + + # + # Bds + # + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + ArmPlatformPkg/Bds/Bds.inf + + # + # Example Application + # + MdeModulePkg/Application/HelloWorld/HelloWorld.inf + diff --git a/BeagleBoardPkg/BeagleBoardPkg-next.fdf b/BeagleBoardPkg/BeagleBoardPkg-next.fdf new file mode 100755 index 0000000000..a3695bbe7b --- /dev/null +++ b/BeagleBoardPkg/BeagleBoardPkg-next.fdf @@ -0,0 +1,294 @@ +# FLASH layout file for Beagle board. +# +# Copyright (c) 2009, Apple Inc. All rights reserved.<BR> +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################ + + +[FD.BeagleBoard_EFI] +BaseAddress = 0x80008000|gArmTokenSpaceGuid.PcdNormalFdBaseAddress #The base address of the FLASH Device. +Size = 0x00080000|gArmTokenSpaceGuid.PcdNormalFdSize #The size in bytes of the FLASH Device +ErasePolarity = 1 +BlockSize = 0x1 +NumBlocks = 0x80000 + +################################################################################ +# +# Following are lists of FD Region layout which correspond to the locations of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by +# the pipe "|" character, followed by the size of the region, also in hex with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType <FV, DATA, or FILE> +# +################################################################################ +!if $(EDK2_SECOND_STAGE_BOOTOLADER) == 1 +0x00000000|0x00080000 +!else +# 512 bytes of configuration header & 8 bytes of image header +0x00000000|0x00000208 + +0x00000208|0x0007FDF8 +!endif +gArmTokenSpaceGuid.PcdNormalFvBaseAddress|gArmTokenSpaceGuid.PcdNormalFvBaseSize +FV = FVMAIN_COMPACT + +################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################ + +[FV.FvMain] +BlockSize = 0x1 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 8 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF MdeModulePkg/Core/Dxe/DxeMain.inf + + # + # PI DXE Drivers producing Architectural Protocols (EFI Services) + # + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf + INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + + INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf + + INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + # + # Semi-hosting filesystem + # + INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf + + # + # Nand Flash + # + INF Omap35xxPkg/Flash/Flash.inf + + # + # MMC/SD + # + INF Omap35xxPkg/MMCHSDxe/MMCHS.inf + + # + # I2C + # + INF Omap35xxPkg/SmbusDxe/Smbus.inf + + # + # SoC Drivers + # + INF Omap35xxPkg/Gpio/Gpio.inf + INF Omap35xxPkg/InterruptDxe/InterruptDxe.inf + INF Omap35xxPkg/TimerDxe/TimerDxe.inf + + # + # Power IC + # + INF Omap35xxPkg/TPS65950Dxe/TPS65950.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + + # + # USB Support + # + + INF Omap35xxPkg/PciEmulation/PciEmulation.inf + + #NOTE: Open source EHCI stack doesn't work on Beagleboard. + #NOTE: UsbBus and UsbMassStorage don't work using iPhond SDK tool chain. + INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf + INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + + # + # UEFI application (Shell Embedded Boot Loader) + # + INF EmbeddedPkg/Ebl/Ebl.inf + + # + # Bds + # + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + INF ArmPlatformPkg/Bds/Bds.inf + + + +[FV.FVMAIN_COMPACT] +FvAlignment = 8 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF ArmPlatformPkg/PrePi/PeiUniCore.inf + + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { + SECTION FV_IMAGE = FVMAIN + } + } + + +################################################################################ +# +# Rules are use with the [FV] section's module INF type to define +# how an FFS file is created for a given INF file. The following Rule are the default +# rules for the different module type. User can add the customized rules to define the +# content of the FFS file. +# +################################################################################ + + +############################################################################ +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # +############################################################################ +# +#[Rule.Common.DXE_DRIVER] +# FILE DRIVER = $(NAMED_GUID) { +# DXE_DEPEX DXE_DEPEX Optional |.depex +# COMPRESS PI_STD { +# GUIDED { +# PE32 PE32 |.efi +# UI STRING="$(MODULE_NAME)" Optional +# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) +# } +# } +# } +# +############################################################################ + +[Rule.Common.SEC] + FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { + TE TE Align = 32 |.efi + } + +[Rule.Common.PEI_CORE] + FILE PEI_CORE = $(NAMED_GUID) { + TE TE |.efi + UI STRING ="$(MODULE_NAME)" Optional + } + +[Rule.Common.PEIM] + FILE PEIM = $(NAMED_GUID) { + PEI_DEPEX PEI_DEPEX Optional |.depex + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.PEIM.TIANOCOMPRESSED] + FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { + PEI_DEPEX PEI_DEPEX Optional |.depex + GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + } + +[Rule.Common.DXE_CORE] + FILE DXE_CORE = $(NAMED_GUID) { + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + + +[Rule.Common.UEFI_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional |.depex + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.DXE_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional |.depex + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.DXE_RUNTIME_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional |.depex + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + + +[Rule.Common.UEFI_APPLICATION] + FILE APPLICATION = $(NAMED_GUID) { + UI STRING ="$(MODULE_NAME)" Optional + PE32 PE32 |.efi + } diff --git a/BeagleBoardPkg/Include/BeagleBoard.h b/BeagleBoardPkg/Include/BeagleBoard.h new file mode 100755 index 0000000000..532d6e4ca6 --- /dev/null +++ b/BeagleBoardPkg/Include/BeagleBoard.h @@ -0,0 +1,168 @@ +/** @file
+* Header defining the BeagleBoard constants (Base addresses, sizes, flags)
+*
+* Copyright (c) 2011, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef __BEAGLEBOARD_PLATFORM_H__
+#define __BEAGLEBOARD_PLATFORM_H__
+
+// DDR attributes
+#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
+#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
+
+// SoC registers. L3 interconnects
+#define SOC_REGISTERS_L3_PHYSICAL_BASE 0x68000000
+#define SOC_REGISTERS_L3_PHYSICAL_LENGTH 0x08000000
+#define SOC_REGISTERS_L3_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
+
+// SoC registers. L4 interconnects
+#define SOC_REGISTERS_L4_PHYSICAL_BASE 0x48000000
+#define SOC_REGISTERS_L4_PHYSICAL_LENGTH 0x08000000
+#define SOC_REGISTERS_L4_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
+
+
+#if 0
+/*******************************************
+// Platform Memory Map
+*******************************************/
+
+// Can be NOR, DOC, DRAM, SRAM
+#define ARM_EB_REMAP_BASE 0x00000000
+#define ARM_EB_REMAP_SZ 0x04000000
+
+// Motherboard Peripheral and On-chip peripheral
+#define ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE 0x10000000
+#define ARM_EB_SMB_MB_ON_CHIP_PERIPH_SZ 0x00100000
+#define ARM_EB_BOARD_PERIPH_BASE 0x10000000
+//#define ARM_EB_CHIP_PERIPH_BASE 0x10020000
+
+// SMC
+#define ARM_EB_SMC_BASE 0x40000000
+#define ARM_EB_SMC_SZ 0x20000000
+
+// NOR Flash 1
+#define ARM_EB_SMB_NOR_BASE 0x40000000
+#define ARM_EB_SMB_NOR_SZ 0x04000000 /* 64 MB */
+// DOC Flash
+#define ARM_EB_SMB_DOC_BASE 0x44000000
+#define ARM_EB_SMB_DOC_SZ 0x04000000 /* 64 MB */
+// SRAM
+#define ARM_EB_SMB_SRAM_BASE 0x48000000
+#define ARM_EB_SMB_SRAM_SZ 0x02000000 /* 32 MB */
+// USB, Ethernet, VRAM
+#define ARM_EB_SMB_PERIPH_BASE 0x4E000000
+//#define ARM_EB_SMB_PERIPH_VRAM 0x4C000000
+#define ARM_EB_SMB_PERIPH_SZ 0x02000000 /* 32 MB */
+
+// DRAM
+#define ARM_EB_DRAM_BASE 0x70000000
+#define ARM_EB_DRAM_SZ 0x10000000
+
+// Logic Tile
+#define ARM_EB_LOGIC_TILE_BASE 0xC0000000
+#define ARM_EB_LOGIC_TILE_SZ 0x40000000
+
+/*******************************************
+// Motherboard peripherals
+*******************************************/
+
+// Define MotherBoard SYS flags offsets (from ARM_EB_BOARD_PERIPH_BASE)
+#define ARM_EB_SYS_FLAGS_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00030)
+#define ARM_EB_SYS_FLAGS_SET_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00030)
+#define ARM_EB_SYS_FLAGS_CLR_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00034)
+#define ARM_EB_SYS_FLAGS_NV_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00038)
+#define ARM_EB_SYS_FLAGS_NV_SET_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00038)
+#define ARM_EB_SYS_FLAGS_NV_CLR_REG (ARM_EB_BOARD_PERIPH_BASE + 0x0003C)
+#define ARM_EB_SYS_CLCD (ARM_EB_BOARD_PERIPH_BASE + 0x00050)
+#define ARM_EB_SYS_PROCID0_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00084)
+#define ARM_EB_SYS_PROCID1_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00088)
+#define ARM_EB_SYS_CFGDATA_REG (ARM_EB_BOARD_PERIPH_BASE + 0x000A0)
+#define ARM_EB_SYS_CFGCTRL_REG (ARM_EB_BOARD_PERIPH_BASE + 0x000A4)
+#define ARM_EB_SYS_CFGSTAT_REG (ARM_EB_BOARD_PERIPH_BASE + 0x000A8)
+
+// SP810 Controller
+#define SP810_CTRL_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x01000)
+
+// SYSTRCL Register
+#define ARM_EB_SYSCTRL 0x10001000
+
+// Uart0
+#define PL011_CONSOLE_UART_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x09000)
+#define PL011_CONSOLE_UART_SPEED 115200
+
+// SP804 Timer Bases
+#define SP804_TIMER0_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x11000)
+#define SP804_TIMER1_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x11020)
+#define SP804_TIMER2_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x12000)
+#define SP804_TIMER3_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x12020)
+
+// PL301 RTC
+#define PL031_RTC_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x17000)
+
+// Dynamic Memory Controller Base
+#define ARM_EB_DMC_BASE 0x10018000
+
+// Static Memory Controller Base
+#define ARM_EB_SMC_CTRL_BASE 0x10080000
+
+#define PL111_CLCD_BASE 0x10020000
+//TODO: FIXME ... Reserved the memory in UEFI !!! Otherwise risk of corruption
+#define PL111_CLCD_VRAM_BASE 0x78000000
+
+#define ARM_EB_SYS_OSCCLK4 0x1000001C
+
+
+/*// System Configuration Controller register Base addresses
+//#define ARM_EB_SYS_CFG_CTRL_BASE 0x100E2000
+#define ARM_EB_SYS_CFGRW0_REG 0x100E2000
+#define ARM_EB_SYS_CFGRW1_REG 0x100E2004
+#define ARM_EB_SYS_CFGRW2_REG 0x100E2008
+
+#define ARM_EB_CFGRW1_REMAP_NOR0 0
+#define ARM_EB_CFGRW1_REMAP_NOR1 (1 << 28)
+#define ARM_EB_CFGRW1_REMAP_EXT_AXI (1 << 29)
+#define ARM_EB_CFGRW1_REMAP_DRAM (1 << 30)
+
+// PL301 Fast AXI Base Address
+#define ARM_EB_FAXI_BASE 0x100E9000
+
+// L2x0 Cache Controller Base Address
+//#define ARM_EB_L2x0_CTLR_BASE 0x1E00A000*/
+
+
+// PL031 RTC - Other settings
+#define PL031_PPM_ACCURACY 300000000
+
+/*******************************************
+// Interrupt Map
+*******************************************/
+
+// Timer Interrupts
+#define TIMER01_INTERRUPT_NUM 34
+#define TIMER23_INTERRUPT_NUM 35
+
+
+/*******************************************
+// EFI Memory Map in Permanent Memory (DRAM)
+*******************************************/
+
+// This region is allocated at the bottom of the DRAM. It will be used
+// for fixed address allocations such as Vector Table
+#define ARM_EB_EFI_FIX_ADDRESS_REGION_SZ SIZE_8MB
+
+// This region is the memory declared to PEI as permanent memory for PEI
+// and DXE. EFI stacks and heaps will be declared in this region.
+#define ARM_EB_EFI_MEMORY_REGION_SZ 0x1000000
+#endif
+
+#endif
diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c new file mode 100755 index 0000000000..a74b60d91a --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c @@ -0,0 +1,124 @@ +/** @file +* +* Copyright (c) 2011, ARM Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include <Library/IoLib.h> +#include <Library/ArmPlatformLib.h> +#include <Library/DebugLib.h> +#include <Library/PcdLib.h> + +VOID +PadConfiguration ( + VOID + ); + +VOID +ClockInit ( + VOID + ); + +/** + Return if Trustzone is supported by your platform + + A non-zero value must be returned if you want to support a Secure World on your platform. + ArmPlatformTrustzoneInit() will later set up the secure regions. + This function can return 0 even if Trustzone is supported by your processor. In this case, + the platform will continue to run in Secure World. + + @return A non-zero value if Trustzone supported. + +**/ +UINTN +ArmPlatformTrustzoneSupported ( + VOID + ) +{ + // The BeagleBoard starts in Normal World (Non Secure World) + return FALSE; +} + +/** + Initialize the Secure peripherals and memory regions + + If Trustzone is supported by your platform then this function makes the required initialization + of the secure peripherals and memory regions. + +**/ +VOID +ArmPlatformTrustzoneInit ( + VOID + ) +{ + ASSERT(FALSE); +} + +/** + Remap the memory at 0x0 + + Some platform requires or gives the ability to remap the memory at the address 0x0. + This function can do nothing if this feature is not relevant to your platform. + +**/ +VOID +ArmPlatformBootRemapping ( + VOID + ) +{ + // Do nothing for the BeagleBoard +} + +/** + Return the current Boot Mode + + This function returns the boot reason on the platform + +**/ +EFI_BOOT_MODE +ArmPlatformGetBootMode ( + VOID + ) +{ + return BOOT_WITH_FULL_CONFIGURATION; +} + +/** + Initialize controllers that must setup at the early stage + + Some peripherals must be initialized in Secure World. + For example, some L2x0 requires to be initialized in Secure World + +**/ +VOID +ArmPlatformNormalInitialize ( + VOID + ) { + //Set up Pin muxing. + PadConfiguration (); + + // Set up system clocking + ClockInit (); +} + +/** + Initialize the system (or sometimes called permanent) memory + + This memory is generally represented by the DRAM. + +**/ +VOID +ArmPlatformInitializeSystemMemory ( + VOID + ) +{ + // We do not need to initialize the System Memory on RTSM +} diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.S b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.S new file mode 100755 index 0000000000..36044aaa62 --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.S @@ -0,0 +1,57 @@ +// +// Copyright (c) 2011, ARM Limited. All rights reserved. +// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// +// + +#include <AsmMacroIoLib.h> +#include <Base.h> +#include <Library/PcdLib.h> +#include <ArmPlatform.h> +#include <AutoGen.h> + +.text +.align 3 + +GCC_ASM_EXPORT(ArmPlatformIsBootMemoryInitialized) +GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory) + +/** + Called at the early stage of the Boot phase to know if the memory has already been initialized + + Running the code from the reset vector does not mean we start from cold boot. In some case, we + can go through this code with the memory already initialized. + Because this function is called at the early stage, the implementation must not use the stack. + Its implementation must probably done in assembly to ensure this requirement. + + @return Return a non zero value if initialized + +**/ +ASM_PFX(ArmPlatformIsBootMemoryInitialized): + // The system memory is initialized by the BeagleBoard firmware + mov r0, #1 + bx lr + + +/** + Initialize the memory where the initial stacks will reside + + This memory can contain the initial stacks (Secure and Secure Monitor stacks). + In some platform, this region is already initialized and the implementation of this function can + do nothing. This memory can also represent the Secure RAM. + This function is called before the satck has been set up. Its implementation must ensure the stack + pointer is not used (probably required to use assembly language) + +**/ +ASM_PFX(ArmPlatformInitializeBootMemory): + // We must need to go into this function + bx lr + +ASM_FUNCTION_REMOVE_IF_UNREFERENCED diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.asm b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.asm new file mode 100755 index 0000000000..9d08cd648d --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.asm @@ -0,0 +1,58 @@ +//
+// Copyright (c) 2011, ARM Limited. All rights reserved.
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <ArmPlatform.h>
+#include <AutoGen.h>
+
+ INCLUDE AsmMacroIoLib.inc
+
+ EXPORT ArmPlatformIsBootMemoryInitialized
+ EXPORT ArmPlatformInitializeBootMemory
+
+ PRESERVE8
+ AREA BeagleBoardHelper, CODE, READONLY
+
+/**
+ Called at the early stage of the Boot phase to know if the memory has already been initialized
+
+ Running the code from the reset vector does not mean we start from cold boot. In some case, we
+ can go through this code with the memory already initialized.
+ Because this function is called at the early stage, the implementation must not use the stack.
+ Its implementation must probably done in assembly to ensure this requirement.
+
+ @return Return a non zero value if initialized
+
+**/
+ArmPlatformIsBootMemoryInitialized
+ // The system memory is initialized by the BeagleBoard firmware
+ mov r0, #1
+ bx lr
+
+/**
+ Initialize the memory where the initial stacks will reside
+
+ This memory can contain the initial stacks (Secure and Secure Monitor stacks).
+ In some platform, this region is already initialized and the implementation of this function can
+ do nothing. This memory can also represent the Secure RAM.
+ This function is called before the satck has been set up. Its implementation must ensure the stack
+ pointer is not used (probably required to use assembly language)
+
+**/
+ArmPlatformInitializeBootMemory
+ // We must need to go into this function
+ bx lr
+
+ END
diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardLib.inf b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardLib.inf new file mode 100755 index 0000000000..d9188ad160 --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardLib.inf @@ -0,0 +1,55 @@ +#/* @file +# Copyright (c) 2011, ARM Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#*/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = BeagleBoardLib + FILE_GUID = 736343a0-1d96-11e0-aaaa-0002a5d5c51b + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmPlatformLib + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + Omap35xxPkg/Omap35xxPkg.dec + BeagleBoardPkg/BeagleBoardPkg.dec + +[LibraryClasses] + IoLib + ArmLib +# OmapLib + MemoryAllocationLib + +[Sources.common] + BeagleBoard.c + BeagleBoardMem.c + BeagleBoardHelper.asm | RVCT + BeagleBoardHelper.S | GCC + PadConfiguration.c + Clock.c + +[Protocols] + +[FeaturePcd] + gEmbeddedTokenSpaceGuid.PcdCacheEnable + +[FixedPcd] + gArmTokenSpaceGuid.PcdNormalFdBaseAddress + gArmTokenSpaceGuid.PcdNormalFdSize + + gArmTokenSpaceGuid.PcdSystemMemoryBase + gArmTokenSpaceGuid.PcdSystemMemorySize diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardMem.c b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardMem.c new file mode 100755 index 0000000000..6af30730ed --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardMem.c @@ -0,0 +1,102 @@ +/** @file
+*
+* Copyright (c) 2011, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/IoLib.h>
+
+#include <BeagleBoard.h>
+
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 4
+
+/**
+ Return the Virtual Memory Map of your platform
+
+ This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
+
+ @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
+ Virtual Memory mapping. This array must be ended by a zero-filled
+ entry
+
+**/
+VOID
+ArmPlatformGetVirtualMemoryMap (
+ IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
+ )
+{
+ ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
+ UINTN Index = 0;
+ ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
+
+ ASSERT(VirtualMemoryMap != NULL);
+
+ VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
+ if (VirtualMemoryTable == NULL) {
+ return;
+ }
+
+ if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
+ CacheAttributes = DDR_ATTRIBUTES_CACHED;
+ } else {
+ CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
+ }
+
+ // ReMap (Either NOR Flash or DRAM)
+ VirtualMemoryTable[Index].PhysicalBase = PcdGet32(PcdSystemMemoryBase);
+ VirtualMemoryTable[Index].VirtualBase = PcdGet32(PcdSystemMemoryBase);
+ VirtualMemoryTable[Index].Length = PcdGet32(PcdSystemMemorySize);
+ VirtualMemoryTable[Index].Attributes = CacheAttributes;
+
+ // SOC Registers. L3 interconnects
+ VirtualMemoryTable[++Index].PhysicalBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
+ VirtualMemoryTable[Index].VirtualBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
+ VirtualMemoryTable[Index].Length = SOC_REGISTERS_L3_PHYSICAL_LENGTH;
+ VirtualMemoryTable[Index].Attributes = SOC_REGISTERS_L3_ATTRIBUTES;
+
+ // SOC Registers. L4 interconnects
+ VirtualMemoryTable[++Index].PhysicalBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
+ VirtualMemoryTable[Index].VirtualBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
+ VirtualMemoryTable[Index].Length = SOC_REGISTERS_L4_PHYSICAL_LENGTH;
+ VirtualMemoryTable[Index].Attributes = SOC_REGISTERS_L4_ATTRIBUTES;
+
+ // End of Table
+ VirtualMemoryTable[++Index].PhysicalBase = 0;
+ VirtualMemoryTable[Index].VirtualBase = 0;
+ VirtualMemoryTable[Index].Length = 0;
+ VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
+
+ ASSERT((Index + 1) == MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
+
+ *VirtualMemoryMap = VirtualMemoryTable;
+}
+
+/**
+ Return the EFI Memory Map of your platform
+
+ This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource
+ Descriptor HOBs used by DXE core.
+
+ @param[out] EfiMemoryMap Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an
+ EFI Memory region. This array must be ended by a zero-filled entry
+
+**/
+EFI_STATUS
+ArmPlatformGetAdditionalSystemMemory (
+ OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap
+ )
+{
+ return EFI_UNSUPPORTED;
+}
diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/Clock.c b/BeagleBoardPkg/Library/BeagleBoardLib/Clock.c new file mode 100755 index 0000000000..8de24f851c --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/Clock.c @@ -0,0 +1,70 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/IoLib.h>
+#include <Library/DebugLib.h>
+
+#include <Omap3530/Omap3530.h>
+
+VOID
+ClockInit (
+ VOID
+ )
+{
+ //DPLL1 - DPLL4 are configured part of Configuration header which OMAP3 ROM parses.
+
+ // Enable PLL5 and set to 120 MHz as a reference clock.
+ MmioWrite32 (CM_CLKSEL4_PLL, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13));
+ MmioWrite32 (CM_CLKSEL5_PLL, CM_CLKSEL_DIV_120M(1));
+ MmioWrite32 (CM_CLKEN2_PLL, CM_CLKEN_FREQSEL_075_100 | CM_CLKEN_ENABLE);
+
+ // Turn on functional & interface clocks to the USBHOST power domain
+ MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE
+ | CM_FCLKEN_USBHOST_EN_USBHOST1_ENABLE);
+ MmioOr32(CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE);
+
+ // Turn on functional & interface clocks to the USBTLL block.
+ MmioOr32(CM_FCLKEN3_CORE, CM_FCLKEN3_CORE_EN_USBTLL_ENABLE);
+ MmioOr32(CM_ICLKEN3_CORE, CM_ICLKEN3_CORE_EN_USBTLL_ENABLE);
+
+ // Turn on functional & interface clocks to MMC1 and I2C1 modules.
+ MmioOr32(CM_FCLKEN1_CORE, CM_FCLKEN1_CORE_EN_MMC1_ENABLE
+ | CM_FCLKEN1_CORE_EN_I2C1_ENABLE);
+ MmioOr32(CM_ICLKEN1_CORE, CM_ICLKEN1_CORE_EN_MMC1_ENABLE
+ | CM_ICLKEN1_CORE_EN_I2C1_ENABLE);
+
+ // Turn on functional & interface clocks to various Peripherals.
+ MmioOr32(CM_FCLKEN_PER, CM_FCLKEN_PER_EN_UART3_ENABLE
+ | CM_FCLKEN_PER_EN_GPT3_ENABLE
+ | CM_FCLKEN_PER_EN_GPT4_ENABLE
+ | CM_FCLKEN_PER_EN_GPIO2_ENABLE
+ | CM_FCLKEN_PER_EN_GPIO3_ENABLE
+ | CM_FCLKEN_PER_EN_GPIO4_ENABLE
+ | CM_FCLKEN_PER_EN_GPIO5_ENABLE
+ | CM_FCLKEN_PER_EN_GPIO6_ENABLE);
+ MmioOr32(CM_ICLKEN_PER, CM_ICLKEN_PER_EN_UART3_ENABLE
+ | CM_ICLKEN_PER_EN_GPT3_ENABLE
+ | CM_ICLKEN_PER_EN_GPT4_ENABLE
+ | CM_ICLKEN_PER_EN_GPIO2_ENABLE
+ | CM_ICLKEN_PER_EN_GPIO3_ENABLE
+ | CM_ICLKEN_PER_EN_GPIO4_ENABLE
+ | CM_ICLKEN_PER_EN_GPIO5_ENABLE
+ | CM_ICLKEN_PER_EN_GPIO6_ENABLE);
+
+ // Turn on functional & inteface clocks to various wakeup modules.
+ MmioOr32(CM_FCLKEN_WKUP, CM_FCLKEN_WKUP_EN_GPIO1_ENABLE
+ | CM_FCLKEN_WKUP_EN_WDT2_ENABLE);
+ MmioOr32(CM_ICLKEN_WKUP, CM_ICLKEN_WKUP_EN_GPIO1_ENABLE
+ | CM_ICLKEN_WKUP_EN_WDT2_ENABLE);
+}
diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/PadConfiguration.c b/BeagleBoardPkg/Library/BeagleBoardLib/PadConfiguration.c new file mode 100755 index 0000000000..ddd9296120 --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/PadConfiguration.c @@ -0,0 +1,282 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+#include <Library/IoLib.h>
+#include <Library/DebugLib.h>
+#include <Omap3530/Omap3530.h>
+
+#define NUM_PINS 238
+
+PAD_CONFIGURATION PadConfigurationTable[NUM_PINS] = {
+ //Pin, MuxMode, PullConfig, InputEnable
+ { SDRC_D0, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D1, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D2, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D3, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D4, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D5, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D6, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D7, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D8, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D9, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D10, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D11, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D12, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D13, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D14, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D15, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D16, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D17, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D18, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D19, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D20, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D21, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D22, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D23, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D24, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D25, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D26, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D27, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D28, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D29, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D30, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D31, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_CLK, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_DQS0, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_CKE0, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { SDRC_CKE1, MUXMODE7, PULL_DISABLED, INPUT },
+ { SDRC_DQS1, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_DQS2, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_DQS3, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_A1, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A2, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A3, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A4, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A5, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A6, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A7, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A8, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A9, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A10, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_D0, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D1, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D2, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D3, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D4, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D5, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D6, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D7, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D8, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D9, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D10, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D11, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D12, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D13, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D14, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D15, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_NCS0, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_NCS1, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
+ { GPMC_NCS2, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
+ { GPMC_NCS3, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
+ { GPMC_NCS4, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
+ { GPMC_NCS5, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_NCS6, MUXMODE1, PULL_DISABLED, INPUT },
+ { GPMC_NCS7, MUXMODE1, PULL_UP_SELECTED, INPUT },
+ { GPMC_CLK, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_NADV_ALE, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_NOE, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_NWE, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_NBE0_CLE, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_NBE1, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_NWP, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_WAIT0, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { GPMC_WAIT1, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { GPMC_WAIT2, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { GPMC_WAIT3, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { DSS_PCLK, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_HSYNC, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_PSYNC, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_ACBIAS, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA0, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA1, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA2, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA3, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA4, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA5, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA6, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA7, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA8, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA9, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA10, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA11, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA12, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA13, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA14, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA15, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA16, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA17, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA18, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA19, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA20, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA21, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA22, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA23, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { CAM_HS, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { CAM_VS, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { CAM_XCLKA, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { CAM_PCLK, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { CAM_FLD, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { CAM_D0, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D1, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D2, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D3, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D4, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D5, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D6, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D7, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D8, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D9, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D10, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D11, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_XCLKB, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { CAM_WEN, MUXMODE4, PULL_DISABLED, INPUT },
+ { CAM_STROBE, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { CSI2_DX0, MUXMODE0, PULL_DISABLED, INPUT },
+ { CSI2_DY0, MUXMODE0, PULL_DISABLED, INPUT },
+ { CSI2_DX1, MUXMODE0, PULL_DISABLED, INPUT },
+ { CSI2_DY1, MUXMODE0, PULL_DISABLED, INPUT },
+ { MCBSP2_FSX, MUXMODE0, PULL_DISABLED, INPUT },
+ { MCBSP2_CLKX, MUXMODE0, PULL_DISABLED, INPUT },
+ { MCBSP2_DR, MUXMODE0, PULL_DISABLED, INPUT },
+ { MCBSP2_DX, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { MMC1_CLK, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
+ { MMC1_CMD, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT0, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT1, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT2, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT3, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT4, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT5, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT6, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT7, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC2_CLK, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_CMD, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT0, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT1, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT2, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT3, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT4, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT5, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT6, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT7, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MCBSP3_DX, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCBSP3_DR, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCBSP3_CLKX, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCBSP3_FSX, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { UART2_CTS, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { UART2_RTS, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { UART2_TX, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { UART2_RX, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { UART1_TX, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { UART1_RTS, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { UART1_CTS, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { UART1_RX, MUXMODE0, PULL_DISABLED, INPUT },
+ { MCBSP4_CLKX, MUXMODE1, PULL_DISABLED, INPUT },
+ { MCBSP4_DR, MUXMODE1, PULL_DISABLED, INPUT },
+ { MCBSP4_DX, MUXMODE1, PULL_DISABLED, INPUT },
+ { MCBSP4_FSX, MUXMODE1, PULL_DISABLED, INPUT },
+ { MCBSP1_CLKR, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCBSP1_FSR, MUXMODE4, PULL_UP_SELECTED, OUTPUT },
+ { MCBSP1_DX, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCBSP1_DR, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCBSP1_CLKS, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MCBSP1_FSX, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCBSP1_CLKX, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { UART3_CTS_RCTX,MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { UART3_RTS_SD, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { UART3_RX_IRRX, MUXMODE0, PULL_DISABLED, INPUT },
+ { UART3_TX_IRTX, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { HSUSB0_CLK, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_STP, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
+ { HSUSB0_DIR, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_NXT, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA0, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA1, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA2, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA3, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA4, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA5, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA6, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA7, MUXMODE0, PULL_DISABLED, INPUT },
+ { I2C1_SCL, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { I2C1_SDA, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { I2C2_SCL, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { I2C2_SDA, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { I2C3_SCL, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { I2C3_SDA, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { HDQ_SIO, MUXMODE4, PULL_UP_SELECTED, OUTPUT },
+ { MCSPI1_CLK, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MCSPI1_SIMO, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MCSPI1_SOMI, MUXMODE0, PULL_DISABLED, INPUT },
+ { MCSPI1_CS0, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MCSPI1_CS1, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
+ { MCSPI1_CS2, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCSPI1_CS3, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { MCSPI2_CLK, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { MCSPI2_SIMO, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { MCSPI2_SOMI, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { MCSPI2_CS0, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { MCSPI2_CS1, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { SYS_NIRQ, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { SYS_CLKOUT2, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { ETK_CLK, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
+ { ETK_CTL, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
+ { ETK_D0, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D1, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D2, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D3, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D4, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D5, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D6, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D7, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D8, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D9, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { ETK_D10, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
+ { ETK_D11, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
+ { ETK_D12, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D13, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D14, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D15, MUXMODE3, PULL_UP_SELECTED, INPUT }
+};
+
+VOID
+PadConfiguration (
+ VOID
+ )
+{
+ UINTN Index;
+ UINT16 PadConfiguration;
+ UINTN NumPinsToConfigure = sizeof(PadConfigurationTable)/sizeof(PAD_CONFIGURATION);
+
+ for (Index = 0; Index < NumPinsToConfigure; Index++) {
+ //Set up Pad configuration for particular pin.
+ PadConfiguration = (PadConfigurationTable[Index].MuxMode << MUXMODE_OFFSET);
+ PadConfiguration |= (PadConfigurationTable[Index].PullConfig << PULL_CONFIG_OFFSET);
+ PadConfiguration |= (PadConfigurationTable[Index].InputEnable << INPUTENABLE_OFFSET);
+
+ //Configure the pin with specific Pad configuration.
+ MmioWrite16(PadConfigurationTable[Index].Pin, PadConfiguration);
+ }
+}
diff --git a/BeagleBoardPkg/build-next.sh b/BeagleBoardPkg/build-next.sh new file mode 100755 index 0000000000..ab09284c70 --- /dev/null +++ b/BeagleBoardPkg/build-next.sh @@ -0,0 +1,144 @@ +#!/bin/bash +# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +set -e +shopt -s nocasematch + +function process_debug_scripts { + if [[ -d $1 ]]; then + for filename in `ls $1` + do + sed -e "s@ZZZZZZ@$BUILD_ROOT@g" -e "s@WWWWWW@$WORKSPACE@g" \ + "$1/$filename" \ + > "$BUILD_ROOT/$filename" + + #For ARMCYGWIN, we have to change /cygdrive/c to c: + if [[ $TARGET_TOOLS == RVCT31CYGWIN ]] + then + mv "$BUILD_ROOT/$filename" "$BUILD_ROOT/$filename"_temp + sed -e "s@/cygdrive/\(.\)@\1:@g" \ + "$BUILD_ROOT/$filename"_temp \ + > "$BUILD_ROOT/$filename" + rm -f "$BUILD_ROOT/$filename"_temp + fi + done + fi +} + + +# +# Setup workspace if it is not set +# +if [ -z "$WORKSPACE" ] +then + echo Initializing workspace + cd .. +# Uses an external BaseTools project +# export EDK_TOOLS_PATH=`pwd`/../BaseTools +# Uses the BaseTools in edk2 + export EDK_TOOLS_PATH=`pwd`/BaseTools + source edksetup.sh BaseTools +else + echo Building from: $WORKSPACE +fi + +# +# Pick a default tool type for a given OS +# +case `uname` in + CYGWIN*) + TARGET_TOOLS=RVCT31CYGWIN + ;; + Linux*) + # Not tested + TARGET_TOOLS=ARMGCC + ;; + Darwin*) + Major=$(uname -r | cut -f 1 -d '.') + if [[ $Major == 9 ]] + then + # Not supported by this open source project + TARGET_TOOLS=XCODE31 + else + TARGET_TOOLS=XCODE32 + fi + ;; +esac + +TARGET=DEBUG +for arg in "$@" +do + if [[ $arg == RELEASE ]]; + then + TARGET=RELEASE + fi +done + +BUILD_ROOT=$WORKSPACE/Build/BeagleBoard/"$TARGET"_"$TARGET_TOOLS" +GENERATE_IMAGE=$WORKSPACE/BeagleBoardPkg/Tools/generate_image +FLASH_BOOT=$BUILD_ROOT/FV/BeagleBoard_EFI_flashboot.fd + +if [[ ! -e $EDK_TOOLS_PATH/Source/C/bin ]]; +then + # build the tools if they don't yet exist + echo Building tools: $EDK_TOOLS_PATH + make -C $EDK_TOOLS_PATH +else + echo using prebuilt tools +fi + +# +# Build the edk2 BeagleBoard code +# +if [[ $TARGET == RELEASE ]]; then + build -p $WORKSPACE/BeagleBoardPkg/BeagleBoardPkg-next.dsc -a ARM -t $TARGET_TOOLS -b $TARGET -D DEBUG_TARGET=RELEASE $2 $3 $4 $5 $6 $7 $8 +else + build -p $WORKSPACE/BeagleBoardPkg/BeagleBoardPkg-next.dsc -a ARM -t $TARGET_TOOLS -b $TARGET $1 $2 $3 $4 $5 $6 $7 $8 +fi + + +for arg in "$@" +do + if [[ $arg == clean ]]; then + # no need to post process if we are doing a clean + exit + elif [[ $arg == cleanall ]]; then + make -C $EDK_TOOLS_PATH clean + make -C $WORKSPACE/BeagleBoardPkg/Tools clean + exit + + fi +done + + +# +# Build the tool used to patch the FLASH image to work with the Beagle board ROM +# +if [[ ! -e $GENERATE_IMAGE ]]; +then + make -C $WORKSPACE/BeagleBoardPkg/Tools +fi + +echo Patching FD to work with BeagleBoard ROM +rm -f $FLASH_BOOT + +# +# Ram starts at 0x80000000 +# OMAP 3530 TRM defines 0x80008208 as the entry point +# The reset vector is caught by the mask ROM in the OMAP 3530 so that is why this entry +# point looks so strange. +# OMAP 3430 TRM section 26.4.8 has Image header information. (missing in OMAP 3530 TRM) +# +$GENERATE_IMAGE -D $WORKSPACE/BeagleBoardPkg/ConfigurationHeader.dat -E 0x80008208 -I $BUILD_ROOT/FV/BEAGLEBOARD_EFI.fd -O $FLASH_BOOT + +echo Creating debugger scripts +process_debug_scripts $WORKSPACE/BeagleBoardPkg/Debugger_scripts + |