diff options
| author | Guo Mang <mang.guo@intel.com> | 2016-12-22 15:57:14 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2016-12-26 19:14:41 +0800 |
| commit | 1760cf81e4b1847c6823ea3514a78dd120e19b6e (patch) | |
| tree | 64a874b14050fe24d3bbc1bc13cd293abf8ae018 /Core/MdePkg/Library/BaseCpuLib/AArch64 | |
| parent | 7f05fa00f73038b425002566d3afe6c3ade2ccdb (diff) | |
| download | edk2-platforms-1760cf81e4b1847c6823ea3514a78dd120e19b6e.tar.xz | |
MdePkg: Move to new location
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'Core/MdePkg/Library/BaseCpuLib/AArch64')
| -rw-r--r-- | Core/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.S | 38 | ||||
| -rw-r--r-- | Core/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.S | 39 |
2 files changed, 77 insertions, 0 deletions
diff --git a/Core/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.S b/Core/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.S new file mode 100644 index 0000000000..ea01a5ddb8 --- /dev/null +++ b/Core/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.S @@ -0,0 +1,38 @@ +#------------------------------------------------------------------------------
+#
+# CpuFlushTlb() for ARM
+#
+# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+.text
+.p2align 2
+GCC_ASM_EXPORT(CpuFlushTlb)
+
+#/**
+# Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+#
+# Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+#
+#**/
+#VOID
+#EFIAPI
+#CpuFlushTlb (
+# VOID
+# )#
+#
+ASM_PFX(CpuFlushTlb):
+ tlbi vmalle1 // Invalidate Inst TLB and Data TLB
+ dsb sy
+ isb
+ ret
diff --git a/Core/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.S b/Core/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.S new file mode 100644 index 0000000000..316ac656e0 --- /dev/null +++ b/Core/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# CpuSleep() for AArch64
+#
+# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Portions copyright (c) 2011 - 2013, ARM LTD. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+.text
+.align 3
+GCC_ASM_EXPORT(CpuSleep)
+
+#/**
+# Places the CPU in a sleep state until an interrupt is received.
+#
+# Places the CPU in a sleep state until an interrupt is received. If interrupts
+# are disabled prior to calling this function, then the CPU will be placed in a
+# sleep state indefinitely.
+#
+#**/
+#VOID
+#EFIAPI
+#CpuSleep (
+# VOID
+# );
+#
+
+ASM_PFX(CpuSleep):
+ wfi
+ ret
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