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authorgdong1 <guo.dong@intel.com>2016-10-26 16:48:40 -0700
committerMaurice Ma <maurice.ma@intel.com>2016-10-26 17:11:54 -0700
commit2d90b74d027b457615c0739ac9114a976be9eaed (patch)
tree329c5e2ede4a6bd69c83218932c8f3492ccf727a /CorebootModulePkg/Library/CbParseLib
parentc46bf81d2d966d51b07f7bf16c202f8fc1c4d50b (diff)
downloadedk2-platforms-2d90b74d027b457615c0739ac9114a976be9eaed.tar.xz
CorebootModulePkg: Fix memmap issue
Some reserved memory (e.g. CSE reserved memory) might be in the middle of usable physical memory. The current memory map caculation could not handle this case. This patch fixed this issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: gdong1 <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Diffstat (limited to 'CorebootModulePkg/Library/CbParseLib')
-rw-r--r--CorebootModulePkg/Library/CbParseLib/CbParseLib.c102
1 files changed, 42 insertions, 60 deletions
diff --git a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c b/CorebootModulePkg/Library/CbParseLib/CbParseLib.c
index 7c81a51054..305e38fa47 100644
--- a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c
+++ b/CorebootModulePkg/Library/CbParseLib/CbParseLib.c
@@ -2,7 +2,7 @@
This library will parse the coreboot table in memory and extract those required
information.
- Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -33,7 +33,7 @@
@return the UNIT64 value after convertion.
**/
-UINT64
+UINT64
cb_unpack64 (
IN struct cbuint64 val
)
@@ -216,8 +216,8 @@ FindCbMemTable (
*pMemTableSize = Entries[Idx].size;
}
- DEBUG ((EFI_D_INFO, "Find CbMemTable Id 0x%x, base %p, size 0x%x\n",
- TableId, *pMemTable, Entries[Idx].size));
+ DEBUG ((EFI_D_INFO, "Find CbMemTable Id 0x%x, base %p, size 0x%x\n",
+ TableId, *pMemTable, Entries[Idx].size));
return RETURN_SUCCESS;
}
}
@@ -229,18 +229,17 @@ FindCbMemTable (
/**
Acquire the memory information from the coreboot table in memory.
- @param pLowMemorySize Pointer to the variable of low memory size
- @param pHighMemorySize Pointer to the variable of high memory size
+ @param MemInfoCallback The callback routine
+ @param pParam Pointer to the callback routine parameter
@retval RETURN_SUCCESS Successfully find out the memory information.
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.
@retval RETURN_NOT_FOUND Failed to find the memory information.
**/
RETURN_STATUS
CbParseMemoryInfo (
- OUT UINT64 *pLowMemorySize,
- OUT UINT64 *pHighMemorySize
+ IN CB_MEM_INFO_CALLBACK MemInfoCallback,
+ IN VOID *pParam
)
{
struct cb_memory *rec;
@@ -249,10 +248,6 @@ CbParseMemoryInfo (
UINT64 Size;
UINTN Index;
- if ((pLowMemorySize == NULL) || (pHighMemorySize == NULL)) {
- return RETURN_INVALID_PARAMETER;
- }
-
//
// Get the coreboot memory table
//
@@ -265,9 +260,6 @@ CbParseMemoryInfo (
return RETURN_NOT_FOUND;
}
- *pLowMemorySize = 0;
- *pHighMemorySize = 0;
-
for (Index = 0; Index < MEM_RANGE_COUNT(rec); Index++) {
Range = MEM_RANGE_PTR(rec, Index);
Start = cb_unpack64(Range->start);
@@ -275,19 +267,9 @@ CbParseMemoryInfo (
DEBUG ((EFI_D_INFO, "%d. %016lx - %016lx [%02x]\n",
Index, Start, Start + Size - 1, Range->type));
- if (Range->type != CB_MEM_RAM) {
- continue;
- }
-
- if (Start + Size < 0x100000000ULL) {
- *pLowMemorySize = Start + Size;
- } else {
- *pHighMemorySize = Start + Size - 0x100000000ULL;
- }
+ MemInfoCallback (Start, Size, Range->type, pParam);
}
- DEBUG ((EFI_D_INFO, "Low memory 0x%lx, High Memory 0x%lx\n", *pLowMemorySize, *pHighMemorySize));
-
return RETURN_SUCCESS;
}
@@ -469,25 +451,25 @@ CbParseFadtInfo (
}
DEBUG ((EFI_D_INFO, "Reset Value 0x%x\n", Fadt->ResetValue));
- if (pPmEvtReg != NULL) {
+ if (pPmEvtReg != NULL) {
*pPmEvtReg = Fadt->Pm1aEvtBlk;
DEBUG ((EFI_D_INFO, "PmEvt Reg 0x%x\n", Fadt->Pm1aEvtBlk));
}
- if (pPmGpeEnReg != NULL) {
+ if (pPmGpeEnReg != NULL) {
*pPmGpeEnReg = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;
DEBUG ((EFI_D_INFO, "PmGpeEn Reg 0x%x\n", *pPmGpeEnReg));
}
- //
- // Verify values for proper operation
- //
- ASSERT(Fadt->Pm1aCntBlk != 0);
- ASSERT(Fadt->PmTmrBlk != 0);
- ASSERT(Fadt->ResetReg.Address != 0);
- ASSERT(Fadt->Pm1aEvtBlk != 0);
- ASSERT(Fadt->Gpe0Blk != 0);
-
+ //
+ // Verify values for proper operation
+ //
+ ASSERT(Fadt->Pm1aCntBlk != 0);
+ ASSERT(Fadt->PmTmrBlk != 0);
+ ASSERT(Fadt->ResetReg.Address != 0);
+ ASSERT(Fadt->Pm1aEvtBlk != 0);
+ ASSERT(Fadt->Gpe0Blk != 0);
+
return RETURN_SUCCESS;
}
}
@@ -519,15 +501,15 @@ CbParseFadtInfo (
*pResetValue = Fadt->ResetValue;
DEBUG ((EFI_D_ERROR, "Reset Value 0x%x\n", Fadt->ResetValue));
- if (pPmEvtReg != NULL) {
+ if (pPmEvtReg != NULL) {
*pPmEvtReg = Fadt->Pm1aEvtBlk;
DEBUG ((EFI_D_INFO, "PmEvt Reg 0x%x\n", Fadt->Pm1aEvtBlk));
}
- if (pPmGpeEnReg != NULL) {
+ if (pPmGpeEnReg != NULL) {
*pPmGpeEnReg = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;
DEBUG ((EFI_D_INFO, "PmGpeEn Reg 0x%x\n", *pPmGpeEnReg));
- }
+ }
return RETURN_SUCCESS;
}
}
@@ -541,10 +523,10 @@ CbParseFadtInfo (
@param pRegBase Pointer to the base address of serial port registers
@param pRegAccessType Pointer to the access type of serial port registers
- @param pRegWidth Pointer to the register width in bytes
+ @param pRegWidth Pointer to the register width in bytes
@param pBaudrate Pointer to the serial port baudrate
- @param pInputHertz Pointer to the input clock frequency
- @param pUartPciAddr Pointer to the UART PCI bus, dev and func address
+ @param pInputHertz Pointer to the input clock frequency
+ @param pUartPciAddr Pointer to the UART PCI bus, dev and func address
@retval RETURN_SUCCESS Successfully find the serial port information.
@retval RETURN_NOT_FOUND Failed to find the serial port information .
@@ -554,10 +536,10 @@ RETURN_STATUS
CbParseSerialInfo (
OUT UINT32 *pRegBase,
OUT UINT32 *pRegAccessType,
- OUT UINT32 *pRegWidth,
- OUT UINT32 *pBaudrate,
- OUT UINT32 *pInputHertz,
- OUT UINT32 *pUartPciAddr
+ OUT UINT32 *pRegWidth,
+ OUT UINT32 *pBaudrate,
+ OUT UINT32 *pInputHertz,
+ OUT UINT32 *pUartPciAddr
)
{
struct cb_serial *CbSerial;
@@ -575,10 +557,10 @@ CbParseSerialInfo (
*pRegBase = CbSerial->baseaddr;
}
- if (pRegWidth != NULL) {
- *pRegWidth = CbSerial->regwidth;
- }
-
+ if (pRegWidth != NULL) {
+ *pRegWidth = CbSerial->regwidth;
+ }
+
if (pRegAccessType != NULL) {
*pRegAccessType = CbSerial->type;
}
@@ -587,14 +569,14 @@ CbParseSerialInfo (
*pBaudrate = CbSerial->baud;
}
- if (pInputHertz != NULL) {
- *pInputHertz = CbSerial->input_hertz;
- }
-
- if (pUartPciAddr != NULL) {
- *pUartPciAddr = CbSerial->uart_pci_addr;
- }
-
+ if (pInputHertz != NULL) {
+ *pInputHertz = CbSerial->input_hertz;
+ }
+
+ if (pUartPciAddr != NULL) {
+ *pUartPciAddr = CbSerial->uart_pci_addr;
+ }
+
return RETURN_SUCCESS;
}