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| author | Ruiyu Ni <ruiyu.ni@intel.com> | 2014-05-19 06:08:26 +0000 |
|---|---|---|
| committer | niruiyu <niruiyu@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-05-19 06:08:26 +0000 |
| commit | 6b5f577faf259dcb0955eb2263d34e7ebe773ff8 (patch) | |
| tree | e198016cb68073b640280b3ec8ebf0fff52fcd49 /DuetPkg/PciBusNoEnumerationDxe | |
| parent | 36d6448c1ea7c32a45b719cdf04200227ae1ebb9 (diff) | |
| download | edk2-platforms-6b5f577faf259dcb0955eb2263d34e7ebe773ff8.tar.xz | |
Change PciIo::GetBarAttributes() to return unsupported for a unsupported bar even it's below 6 to follow the UEFI Spec.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15538 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'DuetPkg/PciBusNoEnumerationDxe')
| -rw-r--r-- | DuetPkg/PciBusNoEnumerationDxe/PciIo.c | 165 |
1 files changed, 74 insertions, 91 deletions
diff --git a/DuetPkg/PciBusNoEnumerationDxe/PciIo.c b/DuetPkg/PciBusNoEnumerationDxe/PciIo.c index ffaaaf342b..9f47373743 100644 --- a/DuetPkg/PciBusNoEnumerationDxe/PciIo.c +++ b/DuetPkg/PciBusNoEnumerationDxe/PciIo.c @@ -1,6 +1,6 @@ /*++
-Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2005 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -1600,14 +1600,10 @@ Returns: --*/
{
-
UINT8 *Configuration;
- UINT8 NumConfig;
PCI_IO_DEVICE *PciIoDevice;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
- EFI_ACPI_END_TAG_DESCRIPTOR *PtrEnd;
-
- NumConfig = 0;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *AddressSpace;
+ EFI_ACPI_END_TAG_DESCRIPTOR *End;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
@@ -1615,7 +1611,7 @@ Returns: return EFI_INVALID_PARAMETER;
}
- if (BarIndex >= PCI_MAX_BAR) {
+ if ((BarIndex >= PCI_MAX_BAR) || (PciIoDevice->PciBar[BarIndex].BarType == PciBarTypeUnknown)) {
return EFI_UNSUPPORTED;
}
@@ -1628,106 +1624,93 @@ Returns: }
if (Resources != NULL) {
-
- if (PciIoDevice->PciBar[BarIndex].BarType != PciBarTypeUnknown) {
- NumConfig = 1;
- }
-
- Configuration = AllocatePool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) * NumConfig + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR));
+ Configuration = AllocateZeroPool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR));
if (Configuration == NULL) {
return EFI_OUT_OF_RESOURCES;
}
- ZeroMem (
- Configuration,
- sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) * NumConfig + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR)
- );
-
- Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
+ AddressSpace = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
- if (NumConfig == 1) {
- Ptr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
- Ptr->Len = sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3;
+ AddressSpace->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
+ AddressSpace->Len = (UINT16) (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);
- Ptr->AddrRangeMin = PciIoDevice->PciBar[BarIndex].BaseAddress;
- Ptr->AddrLen = PciIoDevice->PciBar[BarIndex].Length;
- Ptr->AddrRangeMax = PciIoDevice->PciBar[BarIndex].Alignment;
+ AddressSpace->AddrRangeMin = PciIoDevice->PciBar[BarIndex].BaseAddress;
+ AddressSpace->AddrLen = PciIoDevice->PciBar[BarIndex].Length;
+ AddressSpace->AddrRangeMax = PciIoDevice->PciBar[BarIndex].Alignment;
- switch (PciIoDevice->PciBar[BarIndex].BarType) {
- case PciBarTypeIo16:
- case PciBarTypeIo32:
- //
- // Io
- //
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
- break;
+ switch (PciIoDevice->PciBar[BarIndex].BarType) {
+ case PciBarTypeIo16:
+ case PciBarTypeIo32:
+ //
+ // Io
+ //
+ AddressSpace->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
+ break;
- case PciBarTypeMem32:
- //
- // Mem
- //
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- //
- // 32 bit
- //
- Ptr->AddrSpaceGranularity = 32;
- break;
+ case PciBarTypeMem32:
+ //
+ // Mem
+ //
+ AddressSpace->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ //
+ // 32 bit
+ //
+ AddressSpace->AddrSpaceGranularity = 32;
+ break;
- case PciBarTypePMem32:
- //
- // Mem
- //
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- //
- // prefechable
- //
- Ptr->SpecificFlag = 0x6;
- //
- // 32 bit
- //
- Ptr->AddrSpaceGranularity = 32;
- break;
+ case PciBarTypePMem32:
+ //
+ // Mem
+ //
+ AddressSpace->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ //
+ // prefechable
+ //
+ AddressSpace->SpecificFlag = 0x6;
+ //
+ // 32 bit
+ //
+ AddressSpace->AddrSpaceGranularity = 32;
+ break;
- case PciBarTypeMem64:
- //
- // Mem
- //
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- //
- // 64 bit
- //
- Ptr->AddrSpaceGranularity = 64;
- break;
+ case PciBarTypeMem64:
+ //
+ // Mem
+ //
+ AddressSpace->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ //
+ // 64 bit
+ //
+ AddressSpace->AddrSpaceGranularity = 64;
+ break;
- case PciBarTypePMem64:
- //
- // Mem
- //
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- //
- // prefechable
- //
- Ptr->SpecificFlag = 0x6;
- //
- // 64 bit
- //
- Ptr->AddrSpaceGranularity = 64;
- break;
- default:
- break;
- }
+ case PciBarTypePMem64:
+ //
+ // Mem
+ //
+ AddressSpace->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ //
+ // prefechable
+ //
+ AddressSpace->SpecificFlag = 0x6;
+ //
+ // 64 bit
+ //
+ AddressSpace->AddrSpaceGranularity = 64;
+ break;
- Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) ((UINT8 *) Ptr + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR));
+ default:
+ break;
}
-
+
//
// put the checksum
//
- PtrEnd = (EFI_ACPI_END_TAG_DESCRIPTOR *) ((UINT8 *) Ptr);
- PtrEnd->Desc = ACPI_END_TAG_DESCRIPTOR;
- PtrEnd->Checksum = 0;
+ End = (EFI_ACPI_END_TAG_DESCRIPTOR *) (AddressSpace + 1);
+ End->Desc = ACPI_END_TAG_DESCRIPTOR;
+ End->Checksum = 0;
- *Resources = Configuration;
+ *Resources = Configuration;
}
return EFI_SUCCESS;
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