Retiring the ANT/JAVA build and removing the older EDK II packages that required ANT/JAVA.

Last Ant/Java build was r7166
Developers requiring the Java/Ant packages should checkout the branch from:
https://edk2.tianocore.org/svn/edk2/branches/AntJava


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7168 6f19259b-4bc3-4df7-8a09-765794883524

1 files changed, 0 insertions, 107 deletions

diff --git a/EdkModulePkg/Core/DxeIplPeim/Ia32/VirtualMemory.h b/EdkModulePkg/Core/DxeIplPeim/Ia32/VirtualMemory.h
deleted file mode 100644
index 89a7f2eceb..0000000000
--- a/EdkModulePkg/Core/DxeIplPeim/Ia32/VirtualMemory.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/*++ 

-

-Copyright (c) 2006, Intel Corporation                                                         

-All rights reserved. This program and the accompanying materials                          

-are licensed and made available under the terms and conditions of the BSD License         

-which accompanies this distribution.  The full text of the license may be found at        

-http://opensource.org/licenses/bsd-license.php                                            

-                                                                                          

-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     

-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             

-

-Module Name:

-  VirtualMemory.h

-  

-Abstract:

-

-  x64 Long Mode Virtual Memory Management Definitions  

-

-  References:

-    1) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 1:Basic Architecture, Intel

-    2) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel

-    3) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel

-    4) AMD64 Architecture Programmer's Manual Volume 2: System Programming

---*/  

-#ifndef _VIRTUAL_MEMORY_H_

-#define _VIRTUAL_MEMORY_H_

-

-

-#define SYS_CODE64_SEL 0x38

-

-#pragma pack(1)

-

-typedef union {

-  struct {

-    UINT32  LimitLow    : 16;

-    UINT32  BaseLow     : 16;

-    UINT32  BaseMid     : 8;

-    UINT32  Type        : 4;

-    UINT32  System      : 1;

-    UINT32  Dpl         : 2;

-    UINT32  Present     : 1;

-    UINT32  LimitHigh   : 4;

-    UINT32  Software    : 1;

-    UINT32  Reserved    : 1;

-    UINT32  DefaultSize : 1;

-    UINT32  Granularity : 1;

-    UINT32  BaseHigh    : 8;

-  } Bits;

-  UINT64  Uint64;

-} IA32_GDT;

-

-//

-// Page-Map Level-4 Offset (PML4) and

-// Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB

-//

-

-typedef union {

-  struct {

-    UINT64  Present:1;                // 0 = Not present in memory, 1 = Present in memory

-    UINT64  ReadWrite:1;              // 0 = Read-Only, 1= Read/Write

-    UINT64  UserSupervisor:1;         // 0 = Supervisor, 1=User

-    UINT64  WriteThrough:1;           // 0 = Write-Back caching, 1=Write-Through caching

-    UINT64  CacheDisabled:1;          // 0 = Cached, 1=Non-Cached

-    UINT64  Accessed:1;               // 0 = Not accessed, 1 = Accessed (set by CPU)

-    UINT64  Reserved:1;               // Reserved

-    UINT64  MustBeZero:2;             // Must Be Zero

-    UINT64  Available:3;              // Available for use by system software

-    UINT64  PageTableBaseAddress:40;  // Page Table Base Address

-    UINT64  AvabilableHigh:11;        // Available for use by system software

-    UINT64  Nx:1;                     // No Execute bit

-  } Bits;

-  UINT64    Uint64;

-} PAGE_MAP_AND_DIRECTORY_POINTER;

-

-//

-// Page Table Entry 2MB

-//

-typedef union {

-  struct {

-    UINT64  Present:1;                // 0 = Not present in memory, 1 = Present in memory

-    UINT64  ReadWrite:1;              // 0 = Read-Only, 1= Read/Write

-    UINT64  UserSupervisor:1;         // 0 = Supervisor, 1=User

-    UINT64  WriteThrough:1;           // 0 = Write-Back caching, 1=Write-Through caching

-    UINT64  CacheDisabled:1;          // 0 = Cached, 1=Non-Cached

-    UINT64  Accessed:1;               // 0 = Not accessed, 1 = Accessed (set by CPU)

-    UINT64  Dirty:1;                  // 0 = Not Dirty, 1 = written by processor on access to page

-    UINT64  MustBe1:1;                // Must be 1 

-    UINT64  Global:1;                 // 0 = Not global page, 1 = global page TLB not cleared on CR3 write

-    UINT64  Available:3;              // Available for use by system software

-    UINT64  PAT:1;                    //

-    UINT64  MustBeZero:8;             // Must be zero;

-    UINT64  PageTableBaseAddress:31;  // Page Table Base Address

-    UINT64  AvabilableHigh:11;        // Available for use by system software

-    UINT64  Nx:1;                     // 0 = Execute Code, 1 = No Code Execution

-  } Bits;

-  UINT64    Uint64;

-} PAGE_TABLE_ENTRY;

-

-#pragma pack()

-

-UINTN

-CreateIdentityMappingPageTables (

-  VOID

-  )

-;

-

-#endif