diff options
| author | vanjeff <vanjeff@6f19259b-4bc3-4df7-8a09-765794883524> | 2009-07-07 04:00:44 +0000 |
|---|---|---|
| committer | vanjeff <vanjeff@6f19259b-4bc3-4df7-8a09-765794883524> | 2009-07-07 04:00:44 +0000 |
| commit | 9eb130ff8cd00411d5b84a7950bf03fa93ed267c (patch) | |
| tree | 12820a3b135f6bb70c4a26595c78bc41813057f7 /IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c | |
| parent | 7bfed576b0f351ac62c280f0f040060d14788dc3 (diff) | |
| download | edk2-platforms-9eb130ff8cd00411d5b84a7950bf03fa93ed267c.tar.xz | |
Retired PciIncompatibleDeviceSupportLib from IntelFrameworkModulePkg.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8773 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c')
| -rw-r--r-- | IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c | 70 |
1 files changed, 35 insertions, 35 deletions
diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c index ab9d3a0025..39f5271e9b 100644 --- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c +++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c @@ -43,13 +43,13 @@ PciOperateRegister ( PciIo = &PciIoDevice->PciIo;
if (Operation != EFI_SET_REGISTER) {
- Status = PciIoRead (
- PciIo,
- EfiPciIoWidthUint16,
- Offset,
- 1,
- &OldCommand
- );
+ Status = PciIo->Pci.Read (
+ PciIo,
+ EfiPciIoWidthUint16,
+ Offset,
+ 1,
+ &OldCommand
+ );
if (Operation == EFI_GET_REGISTER) {
*PtrCommand = OldCommand;
@@ -65,13 +65,13 @@ PciOperateRegister ( OldCommand = Command;
}
- return PciIoWrite (
- PciIo,
- EfiPciIoWidthUint16,
- Offset,
- 1,
- &OldCommand
- );
+ return PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint16,
+ Offset,
+ 1,
+ &OldCommand
+ );
}
/**
@@ -134,33 +134,33 @@ LocateCapabilityRegBlock ( CapabilityPtr = 0;
if (IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {
- PciIoRead (
- &PciIoDevice->PciIo,
- EfiPciIoWidthUint8,
- EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,
- 1,
- &CapabilityPtr
- );
+ PciIoDevice->PciIo.Pci.Read (
+ &PciIoDevice->PciIo,
+ EfiPciIoWidthUint8,
+ EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,
+ 1,
+ &CapabilityPtr
+ );
} else {
- PciIoRead (
- &PciIoDevice->PciIo,
- EfiPciIoWidthUint8,
- PCI_CAPBILITY_POINTER_OFFSET,
- 1,
- &CapabilityPtr
- );
+ PciIoDevice->PciIo.Pci.Read (
+ &PciIoDevice->PciIo,
+ EfiPciIoWidthUint8,
+ PCI_CAPBILITY_POINTER_OFFSET,
+ 1,
+ &CapabilityPtr
+ );
}
}
while ((CapabilityPtr >= 0x40) && ((CapabilityPtr & 0x03) == 0x00)) {
- PciIoRead (
- &PciIoDevice->PciIo,
- EfiPciIoWidthUint16,
- CapabilityPtr,
- 1,
- &CapabilityEntry
- );
+ PciIoDevice->PciIo.Pci.Read (
+ &PciIoDevice->PciIo,
+ EfiPciIoWidthUint16,
+ CapabilityPtr,
+ 1,
+ &CapabilityEntry
+ );
CapabilityID = (UINT8) CapabilityEntry;
|