Just reserve memory space for page table, but not create it, and allocate the memory with ReservedMemory instead of ACPIMemoryNVS.

Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13952 6f19259b-4bc3-4df7-8a09-765794883524

4 files changed, 25 insertions, 189 deletions

diff --git a/IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec b/IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
index 1625fd5cc3..b4083bc5f4 100644
--- a/IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
+++ b/IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
@@ -199,7 +199,7 @@
   ## The value should be a multiple of 4KB.

   gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x8000|UINT32|0x30000005

 

-  ## The PCD is used to specify memory size with page number for a pre-allocated ACPI NVS memory to be used

+  ## The PCD is used to specify memory size with page number for a pre-allocated reserved memory to be used

   #  by PEI in S3 phase. The default size 32K. When changing the value of this PCD, the platform

   #  developer should make sure the memory size is large enough to meet PEI requiremnt in S3 phase.

   gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdS3AcpiReservedMemorySize|0x8000|UINT32|0x30000006

diff --git a/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3Save.c b/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3Save.c
index afdfbf536c..bcd1882d7f 100644
--- a/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3Save.c
+++ b/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3Save.c
@@ -62,18 +62,20 @@ EFI_GUID              mAcpiS3IdtrProfileGuid = {
 };

 

 /**

-  Allocate EfiACPIMemoryNVS below 4G memory address.

+  Allocate memory below 4G memory address.

 

-  This function allocates EfiACPIMemoryNVS below 4G memory address.

+  This function allocates memory below 4G memory address.

 

+  @param  MemoryType   Memory type of memory to allocate.

   @param  Size         Size of memory to allocate.

   

   @return Allocated address for output.

 

 **/

 VOID*

-AllocateAcpiNvsMemoryBelow4G (

-  IN   UINTN   Size

+AllocateMemoryBelow4G (

+  IN UINTN      MemoryType,

+  IN UINTN      Size

   )

 {

   UINTN                 Pages;

@@ -86,7 +88,7 @@ AllocateAcpiNvsMemoryBelow4G (
 

   Status  = gBS->AllocatePages (

                    AllocateMaxAddress,

-                   EfiACPIMemoryNVS,

+                   MemoryType,

                    Pages,

                    &Address

                    );

@@ -204,21 +206,12 @@ S3CreateIdentityMappingPageTables (
     UINT32                                        RegEax;

     UINT32                                        RegEdx;

     UINT8                                         PhysicalAddressBits;

-    EFI_PHYSICAL_ADDRESS                          PageAddress;

-    UINTN                                         IndexOfPml4Entries;

-    UINTN                                         IndexOfPdpEntries;

-    UINTN                                         IndexOfPageDirectoryEntries;

     UINT32                                        NumberOfPml4EntriesNeeded;

     UINT32                                        NumberOfPdpEntriesNeeded;

-    PAGE_MAP_AND_DIRECTORY_POINTER                *PageMapLevel4Entry;

-    PAGE_MAP_AND_DIRECTORY_POINTER                *PageMap;

-    PAGE_MAP_AND_DIRECTORY_POINTER                *PageDirectoryPointerEntry;

-    PAGE_TABLE_ENTRY                              *PageDirectoryEntry;

     EFI_PHYSICAL_ADDRESS                          S3NvsPageTableAddress;

     UINTN                                         TotalPageTableSize;

     VOID                                          *Hob;

     BOOLEAN                                       Page1GSupport;

-    PAGE_TABLE_1G_ENTRY                           *PageDirectory1GEntry;

 

     Page1GSupport = FALSE;

     if (PcdGetBool(PcdUse1GPageTable)) {

@@ -277,70 +270,11 @@ S3CreateIdentityMappingPageTables (
     DEBUG ((EFI_D_ERROR, "TotalPageTableSize - %x pages\n", TotalPageTableSize));

 

     //

-    // By architecture only one PageMapLevel4 exists - so lets allocate storgage for it.

+    // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.

     //

-    S3NvsPageTableAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateAcpiNvsMemoryBelow4G (EFI_PAGES_TO_SIZE(TotalPageTableSize));

+    S3NvsPageTableAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateMemoryBelow4G (EfiReservedMemoryType, EFI_PAGES_TO_SIZE(TotalPageTableSize));

     ASSERT (S3NvsPageTableAddress != 0);

-    PageMap = (PAGE_MAP_AND_DIRECTORY_POINTER *)(UINTN)S3NvsPageTableAddress;

-    S3NvsPageTableAddress += SIZE_4KB;

-

-    PageMapLevel4Entry = PageMap;

-    PageAddress        = 0;

-    for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {

-      //

-      // Each PML4 entry points to a page of Page Directory Pointer entires.

-      // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.

-      //

-      PageDirectoryPointerEntry = (PAGE_MAP_AND_DIRECTORY_POINTER *)(UINTN)S3NvsPageTableAddress;

-      S3NvsPageTableAddress += SIZE_4KB;

-      //

-      // Make a PML4 Entry

-      //

-      PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry;

-      PageMapLevel4Entry->Bits.ReadWrite = 1;

-      PageMapLevel4Entry->Bits.Present = 1;

-    

-      if (Page1GSupport) {

-        PageDirectory1GEntry = (PAGE_TABLE_1G_ENTRY *)(UINTN)PageDirectoryPointerEntry;

-    

-        for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {

-          //

-          // Fill in the Page Directory entries

-          //

-          PageDirectory1GEntry->Uint64 = (UINT64)PageAddress;

-          PageDirectory1GEntry->Bits.ReadWrite = 1;

-          PageDirectory1GEntry->Bits.Present = 1;

-          PageDirectory1GEntry->Bits.MustBe1 = 1;

-        }

-      } else {

-        for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {

-          //

-          // Each Directory Pointer entries points to a page of Page Directory entires.

-          // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.

-          //       

-          PageDirectoryEntry = (PAGE_TABLE_ENTRY *)(UINTN)S3NvsPageTableAddress;

-          S3NvsPageTableAddress += SIZE_4KB;

-      

-          //

-          // Fill in a Page Directory Pointer Entries

-          //

-          PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry;

-          PageDirectoryPointerEntry->Bits.ReadWrite = 1;

-          PageDirectoryPointerEntry->Bits.Present = 1;

-      

-          for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {

-            //

-            // Fill in the Page Directory entries

-            //

-            PageDirectoryEntry->Uint64 = (UINT64)PageAddress;

-            PageDirectoryEntry->Bits.ReadWrite = 1;

-            PageDirectoryEntry->Bits.Present = 1;

-            PageDirectoryEntry->Bits.MustBe1 = 1;

-          }

-        }

-      }

-    }

-    return (EFI_PHYSICAL_ADDRESS) (UINTN) PageMap;

+    return S3NvsPageTableAddress;

   } else {

     //

     // If DXE is running 32-bit mode, no need to establish page table.

@@ -414,7 +348,7 @@ S3Ready (
   }

   AlreadyEntered = TRUE;

 

-  AcpiS3Context = AllocateAcpiNvsMemoryBelow4G (sizeof(*AcpiS3Context));

+  AcpiS3Context = AllocateMemoryBelow4G (EfiReservedMemoryType, sizeof(*AcpiS3Context));

   ASSERT (AcpiS3Context != NULL);

   AcpiS3ContextBuffer = (EFI_PHYSICAL_ADDRESS)(UINTN)AcpiS3Context;

 

@@ -424,7 +358,7 @@ S3Ready (
   AcpiS3Context->AcpiFacsTable = (EFI_PHYSICAL_ADDRESS)(UINTN)FindAcpiFacsTable ();

   ASSERT (AcpiS3Context->AcpiFacsTable != 0);

 

-  IdtGate = AllocateAcpiNvsMemoryBelow4G (sizeof(IA32_IDT_GATE_DESCRIPTOR) * 0x100 + sizeof(IA32_DESCRIPTOR));

+  IdtGate = AllocateMemoryBelow4G (EfiReservedMemoryType, sizeof(IA32_IDT_GATE_DESCRIPTOR) * 0x100 + sizeof(IA32_DESCRIPTOR));

   Idtr = (IA32_DESCRIPTOR *)(IdtGate + 0x100);

   Idtr->Base  = (UINTN)IdtGate;

   Idtr->Limit = (UINT16)(sizeof(IA32_IDT_GATE_DESCRIPTOR) * 0x100 - 1);

@@ -449,13 +383,13 @@ S3Ready (
   // Allocate stack

   //

   AcpiS3Context->BootScriptStackSize = PcdGet32 (PcdS3BootScriptStackSize);

-  AcpiS3Context->BootScriptStackBase = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateAcpiNvsMemoryBelow4G (PcdGet32 (PcdS3BootScriptStackSize));

+  AcpiS3Context->BootScriptStackBase = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateMemoryBelow4G (EfiReservedMemoryType, PcdGet32 (PcdS3BootScriptStackSize));

   ASSERT (AcpiS3Context->BootScriptStackBase != 0);

 

   //

   // Allocate a code buffer < 4G for S3 debug to load external code, set invalid code instructions in it.

   //

-  AcpiS3Context->S3DebugBufferAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateAcpiNvsMemoryBelow4G (EFI_PAGE_SIZE);

+  AcpiS3Context->S3DebugBufferAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateMemoryBelow4G (EfiReservedMemoryType, EFI_PAGE_SIZE);

   SetMem ((VOID *)(UINTN)AcpiS3Context->S3DebugBufferAddress, EFI_PAGE_SIZE, 0xff);

 

   DEBUG((EFI_D_INFO, "AcpiS3Context: AcpiFacsTable is 0x%8x\n", AcpiS3Context->AcpiFacsTable));

diff --git a/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3Save.h b/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3Save.h
index c2e8b41650..65974a3402 100644
--- a/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3Save.h
+++ b/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3Save.h
@@ -2,7 +2,7 @@
   This is an implementation of the ACPI S3 Save protocol.  This is defined in 

   S3 boot path specification 0.9.

 

-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>

 

 This program and the accompanying materials

 are licensed and made available under the terms and conditions

@@ -18,106 +18,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #ifndef _ACPI_S3_SAVE_H_

 #define _ACPI_S3_SAVE_H_

 

-#pragma pack(1)

-

-typedef union {

-  struct {

-    UINT32  LimitLow    : 16;

-    UINT32  BaseLow     : 16;

-    UINT32  BaseMid     : 8;

-    UINT32  Type        : 4;

-    UINT32  System      : 1;

-    UINT32  Dpl         : 2;

-    UINT32  Present     : 1;

-    UINT32  LimitHigh   : 4;

-    UINT32  Software    : 1;

-    UINT32  Reserved    : 1;

-    UINT32  DefaultSize : 1;

-    UINT32  Granularity : 1;

-    UINT32  BaseHigh    : 8;

-  } Bits;

-  UINT64  Uint64;

-} IA32_GDT;

-

-typedef struct {

-  IA32_IDT_GATE_DESCRIPTOR  Ia32IdtEntry;

-  UINT32                    Offset32To63;

-  UINT32                    Reserved;

-} X64_IDT_GATE_DESCRIPTOR;

-

-//

-// Page-Map Level-4 Offset (PML4) and

-// Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB

-//

-

-typedef union {

-  struct {

-    UINT64  Present:1;                // 0 = Not present in memory, 1 = Present in memory

-    UINT64  ReadWrite:1;              // 0 = Read-Only, 1= Read/Write

-    UINT64  UserSupervisor:1;         // 0 = Supervisor, 1=User

-    UINT64  WriteThrough:1;           // 0 = Write-Back caching, 1=Write-Through caching

-    UINT64  CacheDisabled:1;          // 0 = Cached, 1=Non-Cached

-    UINT64  Accessed:1;               // 0 = Not accessed, 1 = Accessed (set by CPU)

-    UINT64  Reserved:1;               // Reserved

-    UINT64  MustBeZero:2;             // Must Be Zero

-    UINT64  Available:3;              // Available for use by system software

-    UINT64  PageTableBaseAddress:40;  // Page Table Base Address

-    UINT64  AvabilableHigh:11;        // Available for use by system software

-    UINT64  Nx:1;                     // No Execute bit

-  } Bits;

-  UINT64    Uint64;

-} PAGE_MAP_AND_DIRECTORY_POINTER;

-

-//

-// Page Table Entry 2MB

-//

-typedef union {

-  struct {

-    UINT64  Present:1;                // 0 = Not present in memory, 1 = Present in memory

-    UINT64  ReadWrite:1;              // 0 = Read-Only, 1= Read/Write

-    UINT64  UserSupervisor:1;         // 0 = Supervisor, 1=User

-    UINT64  WriteThrough:1;           // 0 = Write-Back caching, 1=Write-Through caching

-    UINT64  CacheDisabled:1;          // 0 = Cached, 1=Non-Cached

-    UINT64  Accessed:1;               // 0 = Not accessed, 1 = Accessed (set by CPU)

-    UINT64  Dirty:1;                  // 0 = Not Dirty, 1 = written by processor on access to page

-    UINT64  MustBe1:1;                // Must be 1 

-    UINT64  Global:1;                 // 0 = Not global page, 1 = global page TLB not cleared on CR3 write

-    UINT64  Available:3;              // Available for use by system software

-    UINT64  PAT:1;                    //

-    UINT64  MustBeZero:8;             // Must be zero;

-    UINT64  PageTableBaseAddress:31;  // Page Table Base Address

-    UINT64  AvabilableHigh:11;        // Available for use by system software

-    UINT64  Nx:1;                     // 0 = Execute Code, 1 = No Code Execution

-  } Bits;

-  UINT64    Uint64;

-} PAGE_TABLE_ENTRY;

-

-//

-// Page Table Entry 1GB

-//

-typedef union {

-  struct {

-    UINT64  Present:1;                // 0 = Not present in memory, 1 = Present in memory

-    UINT64  ReadWrite:1;              // 0 = Read-Only, 1= Read/Write

-    UINT64  UserSupervisor:1;         // 0 = Supervisor, 1=User

-    UINT64  WriteThrough:1;           // 0 = Write-Back caching, 1=Write-Through caching

-    UINT64  CacheDisabled:1;          // 0 = Cached, 1=Non-Cached

-    UINT64  Accessed:1;               // 0 = Not accessed, 1 = Accessed (set by CPU)

-    UINT64  Dirty:1;                  // 0 = Not Dirty, 1 = written by processor on access to page

-    UINT64  MustBe1:1;                // Must be 1 

-    UINT64  Global:1;                 // 0 = Not global page, 1 = global page TLB not cleared on CR3 write

-    UINT64  Available:3;              // Available for use by system software

-    UINT64  PAT:1;                    //

-    UINT64  MustBeZero:17;            // Must be zero;

-    UINT64  PageTableBaseAddress:22;  // Page Table Base Address

-    UINT64  AvabilableHigh:11;        // Available for use by system software

-    UINT64  Nx:1;                     // 0 = Execute Code, 1 = No Code Execution

-  } Bits;

-  UINT64    Uint64;

-} PAGE_TABLE_1G_ENTRY;

-

-#pragma pack()

-

 /**

   Gets the buffer of legacy memory below 1 MB 

   This function is to get the buffer in legacy memory below 1MB that is required during S3 resume.

diff --git a/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiVariableThunkPlatform.c b/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiVariableThunkPlatform.c
index 883b79035f..e2cfdbcb61 100644
--- a/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiVariableThunkPlatform.c
+++ b/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiVariableThunkPlatform.c
@@ -1,7 +1,7 @@
 /** @file

   This is an implementation of the AcpiVariable platform field for ECP platform.

 

-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>

 

 This program and the accompanying materials

 are licensed and made available under the terms and conditions

@@ -47,18 +47,20 @@ GLOBAL_REMOVE_IF_UNREFERENCED
 ACPI_VARIABLE_SET_COMPATIBILITY               *mAcpiVariableSetCompatibility = NULL;

 

 /**

-  Allocate EfiACPIMemoryNVS below 4G memory address.

+  Allocate memory below 4G memory address.

 

-  This function allocates EfiACPIMemoryNVS below 4G memory address.

+  This function allocates memory below 4G memory address.

 

+  @param  MemoryType   Memory type of memory to allocate.

   @param  Size         Size of memory to allocate.

   

   @return Allocated address for output.

 

 **/

 VOID*

-AllocateAcpiNvsMemoryBelow4G (

-  IN   UINTN   Size

+AllocateMemoryBelow4G (

+  IN UINTN      MemoryType,

+  IN UINTN      Size

   );

 

 /**

@@ -81,7 +83,7 @@ S3ReadyThunkPlatform (
   //

   // Allocate ACPI reserved memory under 4G

   //

-  AcpiMemoryBase = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateAcpiNvsMemoryBelow4G (PcdGet32 (PcdS3AcpiReservedMemorySize));

+  AcpiMemoryBase = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateMemoryBelow4G (EfiReservedMemoryType, PcdGet32 (PcdS3AcpiReservedMemorySize));

   ASSERT (AcpiMemoryBase != 0);

   AcpiMemorySize = PcdGet32 (PcdS3AcpiReservedMemorySize);

 

@@ -151,7 +153,7 @@ InstallAcpiS3SaveThunk (
     // Allocate/initialize the compatible version of Acpi Variable Set since Framework chipset/platform 

     // driver need this variable

     //

-    mAcpiVariableSetCompatibility = AllocateAcpiNvsMemoryBelow4G (sizeof(ACPI_VARIABLE_SET_COMPATIBILITY));

+    mAcpiVariableSetCompatibility = AllocateMemoryBelow4G (EfiACPIMemoryNVS, sizeof(ACPI_VARIABLE_SET_COMPATIBILITY));

     Status = gRT->SetVariable (

                     ACPI_GLOBAL_VARIABLE,

                     &gEfiAcpiVariableCompatiblityGuid,