diff options
| author | bxing <bxing@6f19259b-4bc3-4df7-8a09-765794883524> | 2007-06-15 10:02:42 +0000 |
|---|---|---|
| committer | bxing <bxing@6f19259b-4bc3-4df7-8a09-765794883524> | 2007-06-15 10:02:42 +0000 |
| commit | 79964ac84ea0ca6c68d0dea38245fa83ff1945d1 (patch) | |
| tree | 1789b660ac3ff9c9b3378ab1ac362028eccd4704 /IntelFrameworkPkg | |
| parent | 5879b8754ac3c2e7a141bac79f6b2391e6ac0441 (diff) | |
| download | edk2-platforms-79964ac84ea0ca6c68d0dea38245fa83ff1945d1.tar.xz | |
Initial directory structure of IntelFrameworkPkg.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2657 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'IntelFrameworkPkg')
67 files changed, 17948 insertions, 0 deletions
diff --git a/IntelFrameworkPkg/Include/Common/DataHubRecords.h b/IntelFrameworkPkg/Include/Common/DataHubRecords.h new file mode 100644 index 0000000000..29bc8a7e00 --- /dev/null +++ b/IntelFrameworkPkg/Include/Common/DataHubRecords.h @@ -0,0 +1,1908 @@ +/** @file
+ This file defines GUIDs and associated data structures for records posted to the Data Hub.
+ The producers of these records use these definitions to construct records.
+ The consumers of these records use these definitions to retrieve, filter and parse records.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DataHubRecords.h
+
+ @par Revision Reference:
+ DataHubRecord.h include all data hub sub class defitions from Cache subclass
+ spec 0.9, DataHub SubClass spec 0.9, Memory SubClass Spec 0.9, Processor
+ Subclass spec 0.9,Misc SubClass spec 0.9.
+
+**/
+
+#ifndef _DATAHUB_RECORDS_H_
+#define _DATAHUB_RECORDS_H_
+
+#define EFI_PROCESSOR_SUBCLASS_VERSION 0x00010000
+
+
+#pragma pack(1)
+
+typedef struct _USB_PORT_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} USB_PORT_DEVICE_PATH;
+
+//
+// IDE
+//
+typedef struct _IDE_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} IDE_DEVICE_PATH;
+
+//
+// RMC Connector
+//
+typedef struct _RMC_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} RMC_CONN_DEVICE_PATH;
+
+//
+// RIDE
+//
+typedef struct _RIDE_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} RIDE_DEVICE_PATH;
+
+//
+// Gigabit NIC
+//
+typedef struct _GB_NIC_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciXBridgeDevicePath;
+ PCI_DEVICE_PATH PciXBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} GB_NIC_DEVICE_PATH;
+
+//
+// P/S2 Connector
+//
+typedef struct _PS2_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} PS2_CONN_DEVICE_PATH;
+
+//
+// Serial Port Connector
+//
+typedef struct _SERIAL_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} SERIAL_CONN_DEVICE_PATH;
+
+//
+// Parallel Port Connector
+//
+typedef struct _PARALLEL_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} PARALLEL_CONN_DEVICE_PATH;
+
+//
+// Floopy Connector
+//
+typedef struct _FLOOPY_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} FLOOPY_CONN_DEVICE_PATH;
+
+typedef union _EFI_MISC_PORT_DEVICE_PATH {
+ USB_PORT_DEVICE_PATH UsbDevicePath;
+ IDE_DEVICE_PATH IdeDevicePath;
+ RMC_CONN_DEVICE_PATH RmcConnDevicePath;
+ RIDE_DEVICE_PATH RideDevicePath;
+ GB_NIC_DEVICE_PATH GbNicDevicePath;
+ PS2_CONN_DEVICE_PATH Ps2ConnDevicePath;
+ SERIAL_CONN_DEVICE_PATH SerialConnDevicePath;
+ PARALLEL_CONN_DEVICE_PATH ParallelConnDevicePath;
+ FLOOPY_CONN_DEVICE_PATH FloppyConnDevicePath;
+} EFI_MISC_PORT_DEVICE_PATH;
+
+#pragma pack()
+
+//
+// String Token Definition
+//
+#define EFI_STRING_TOKEN UINT16
+
+typedef struct {
+ UINT32 Version;
+ UINT32 HeaderSize;
+ UINT16 Instance;
+ UINT16 SubInstance;
+ UINT32 RecordType;
+} EFI_SUBCLASS_TYPE1_HEADER;
+
+typedef struct {
+ EFI_GUID ProducerName;
+ UINT16 Instance;
+ UINT16 SubInstance;
+} EFI_INTER_LINK_DATA;
+
+
+//
+// EXP data
+//
+
+typedef struct {
+ UINT16 Value;
+ UINT16 Exponent;
+} EFI_EXP_BASE2_DATA;
+
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_CORE_FREQUENCY_DATA;
+
+typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA;
+
+typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_FSB_FREQUENCY_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_VERSION_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_MANUFACTURER_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_SERIAL_NUMBER_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_ASSET_TAG_DATA;
+
+typedef struct {
+ UINT32 ProcessorSteppingId:4;
+ UINT32 ProcessorModel: 4;
+ UINT32 ProcessorFamily: 4;
+ UINT32 ProcessorType: 2;
+ UINT32 ProcessorReserved1: 2;
+ UINT32 ProcessorXModel: 4;
+ UINT32 ProcessorXFamily: 8;
+ UINT32 ProcessorReserved2: 4;
+} EFI_PROCESSOR_SIGNATURE;
+
+typedef struct {
+ UINT32 ProcessorBrandIndex :8;
+ UINT32 ProcessorClflush :8;
+ UINT32 ProcessorReserved :8;
+ UINT32 ProcessorDfltApicId :8;
+} EFI_PROCESSOR_MISC_INFO;
+
+typedef struct {
+ UINT32 ProcessorFpu: 1;
+ UINT32 ProcessorVme: 1;
+ UINT32 ProcessorDe: 1;
+ UINT32 ProcessorPse: 1;
+ UINT32 ProcessorTsc: 1;
+ UINT32 ProcessorMsr: 1;
+ UINT32 ProcessorPae: 1;
+ UINT32 ProcessorMce: 1;
+ UINT32 ProcessorCx8: 1;
+ UINT32 ProcessorApic: 1;
+ UINT32 ProcessorReserved1: 1;
+ UINT32 ProcessorSep: 1;
+ UINT32 ProcessorMtrr: 1;
+ UINT32 ProcessorPge: 1;
+ UINT32 ProcessorMca: 1;
+ UINT32 ProcessorCmov: 1;
+ UINT32 ProcessorPat: 1;
+ UINT32 ProcessorPse36: 1;
+ UINT32 ProcessorPsn: 1;
+ UINT32 ProcessorClfsh: 1;
+ UINT32 ProcessorReserved2: 1;
+ UINT32 ProcessorDs: 1;
+ UINT32 ProcessorAcpi: 1;
+ UINT32 ProcessorMmx: 1;
+ UINT32 ProcessorFxsr: 1;
+ UINT32 ProcessorSse: 1;
+ UINT32 ProcessorSse2: 1;
+ UINT32 ProcessorSs: 1;
+ UINT32 ProcessorReserved3: 1;
+ UINT32 ProcessorTm: 1;
+ UINT32 ProcessorReserved4: 2;
+} EFI_PROCESSOR_FEATURE_FLAGS;
+
+typedef struct {
+ EFI_PROCESSOR_SIGNATURE Signature;
+ EFI_PROCESSOR_MISC_INFO MiscInfo;
+ UINT32 Reserved;
+ EFI_PROCESSOR_FEATURE_FLAGS FeatureFlags;
+} EFI_PROCESSOR_ID_DATA;
+
+typedef enum {
+ EfiProcessorOther = 1,
+ EfiProcessorUnknown = 2,
+ EfiCentralProcessor = 3,
+ EfiMathProcessor = 4,
+ EfiDspProcessor = 5,
+ EfiVideoProcessor = 6
+} EFI_PROCESSOR_TYPE_DATA;
+
+typedef enum {
+ EfiProcessorFamilyOther = 1,
+ EfiProcessorFamilyUnknown = 2,
+ EfiProcessorFamily8086 = 3,
+ EfiProcessorFamily80286 = 4,
+ EfiProcessorFamilyIntel386 = 5,
+ EfiProcessorFamilyIntel486 = 6,
+ EfiProcessorFamily8087 = 7,
+ EfiProcessorFamily80287 = 8,
+ EfiProcessorFamily80387 = 9,
+ EfiProcessorFamily80487 = 0x0A,
+ EfiProcessorFamilyPentium = 0x0B,
+ EfiProcessorFamilyPentiumPro = 0x0C,
+ EfiProcessorFamilyPentiumII = 0x0D,
+ EfiProcessorFamilyPentiumMMX = 0x0E,
+ EfiProcessorFamilyCeleron = 0x0F,
+ EfiProcessorFamilyPentiumIIXeon = 0x10,
+ EfiProcessorFamilyPentiumIII = 0x11,
+ EfiProcessorFamilyM1 = 0x12,
+ EfiProcessorFamilyM1Reserved1 = 0x13,
+ EfiProcessorFamilyM1Reserved2 = 0x14,
+ EfiProcessorFamilyM1Reserved3 = 0x15,
+ EfiProcessorFamilyM1Reserved4 = 0x16,
+ EfiProcessorFamilyM1Reserved5 = 0x17,
+ EfiProcessorFamilyM1Reserved6 = 0x18,
+ EfiProcessorFamilyK5 = 0x19,
+ EfiProcessorFamilyK5Reserved1 = 0x1A,
+ EfiProcessorFamilyK5Reserved2 = 0x1B,
+ EfiProcessorFamilyK5Reserved3 = 0x1C,
+ EfiProcessorFamilyK5Reserved4 = 0x1D,
+ EfiProcessorFamilyK5Reserved5 = 0x1E,
+ EfiProcessorFamilyK5Reserved6 = 0x1F,
+ EfiProcessorFamilyPowerPC = 0x20,
+ EfiProcessorFamilyPowerPC601 = 0x21,
+ EfiProcessorFamilyPowerPC603 = 0x22,
+ EfiProcessorFamilyPowerPC603Plus = 0x23,
+ EfiProcessorFamilyPowerPC604 = 0x24,
+ EfiProcessorFamilyAlpha2 = 0x30,
+ EfiProcessorFamilyMips = 0x40,
+ EfiProcessorFamilySparc = 0x50,
+ EfiProcessorFamily68040 = 0x60,
+ EfiProcessorFamily68xxx = 0x61,
+ EfiProcessorFamily68000 = 0x62,
+ EfiProcessorFamily68010 = 0x63,
+ EfiProcessorFamily68020 = 0x64,
+ EfiProcessorFamily68030 = 0x65,
+ EfiProcessorFamilyHobbit = 0x70,
+ EfiProcessorFamilyWeitek = 0x80,
+ EfiProcessorFamilyPARISC = 0x90,
+ EfiProcessorFamilyV30 = 0xA0,
+ EfiProcessorFamilyPentiumIIIXeon = 0xB0,
+ EfiProcessorFamilyPentiumIIISpeedStep = 0xB1,
+ EfiProcessorFamilyPentium4 = 0xB2,
+ EfiProcessorFamilyIntelXeon = 0xB3,
+ EfiProcessorFamilyAS400 = 0xB4,
+ EfiProcessorFamilyIntelXeonMP = 0xB5,
+ EfiProcessorFamilyAMDAthlonXP = 0xB6,
+ EfiProcessorFamilyAMDAthlonMP = 0xB7,
+ EfiProcessorFamilyIntelPentiumM = 0xB9,
+ EfiProcessorFamilyIntelCeleronD = 0xBA,
+ EfiProcessorFamilyIntelPentiumD = 0xBB,
+ EfiProcessorFamilyIntelPentiumEx = 0xBC,
+ EfiProcessorFamilyIBM390 = 0xC8,
+ EfiProcessorFamilyG4 = 0xC9,
+ EfiProcessorFamilyG5 = 0xCA,
+ EfiProcessorFamilyi860 = 0xFA,
+ EfiProcessorFamilyi960 = 0xFB
+} EFI_PROCESSOR_FAMILY_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_VOLTAGE_DATA;
+
+typedef EFI_PHYSICAL_ADDRESS EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA;
+
+typedef UINT32 EFI_PROCESSOR_APIC_ID_DATA;
+
+typedef UINT32 EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA;
+
+typedef enum {
+ EfiProcessorIa32Microcode = 1,
+ EfiProcessorIpfPalAMicrocode = 2,
+ EfiProcessorIpfPalBMicrocode = 3
+} EFI_PROCESSOR_MICROCODE_TYPE;
+
+typedef struct {
+ EFI_PROCESSOR_MICROCODE_TYPE ProcessorMicrocodeType;
+ UINT32 ProcessorMicrocodeRevisionNumber;
+} EFI_PROCESSOR_MICROCODE_REVISION_DATA;
+
+typedef struct {
+ UINT32 CpuStatus :3;
+ UINT32 Reserved1 :3;
+ UINT32 SocketPopulated :1;
+ UINT32 Reserved2 :1;
+ UINT32 ApicEnable :1;
+ UINT32 BootApplicationProcessor :1;
+ UINT32 Reserved3 :22;
+} EFI_PROCESSOR_STATUS_DATA;
+
+typedef enum {
+ EfiCpuStatusUnknown = 0,
+ EfiCpuStatusEnabled = 1,
+ EfiCpuStatusDisabledByUser = 2,
+ EfiCpuStatusDisabledbyBios = 3,
+ EfiCpuStatusIdle = 4,
+ EfiCpuStatusOther = 7
+} EFI_CPU_STATUS;
+
+typedef enum {
+ EfiProcessorSocketOther = 1,
+ EfiProcessorSocketUnknown = 2,
+ EfiProcessorSocketDaughterBoard = 3,
+ EfiProcessorSocketZIF = 4,
+ EfiProcessorSocketReplacePiggyBack = 5,
+ EfiProcessorSocketNone = 6,
+ EfiProcessorSocketLIF = 7,
+ EfiProcessorSocketSlot1 = 8,
+ EfiProcessorSocketSlot2 = 9,
+ EfiProcessorSocket370Pin = 0xA,
+ EfiProcessorSocketSlotA = 0xB,
+ EfiProcessorSocketSlotM = 0xC,
+ EfiProcessorSocket423 = 0xD,
+ EfiProcessorSocketA462 = 0xE,
+ EfiProcessorSocket478 = 0xF,
+ EfiProcessorSocket754 = 0x10,
+ EfiProcessorSocket940 = 0x11,
+ EfiProcessorSocket939 = 0x12,
+ EfiProcessorSocketmPGA604 = 0x13,
+ EfiProcessorSocketLGA771 = 0x14,
+ EfiProcessorSocketLGA775 = 0x15
+
+} EFI_PROCESSOR_SOCKET_TYPE_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_SOCKET_NAME_DATA;
+
+typedef EFI_INTER_LINK_DATA EFI_CACHE_ASSOCIATION_DATA;
+
+typedef enum {
+ EfiProcessorHealthy = 1,
+ EfiProcessorPerfRestricted = 2,
+ EfiProcessorFuncRestricted = 3
+} EFI_PROCESSOR_HEALTH_STATUS;
+
+typedef UINTN EFI_PROCESSOR_PACKAGE_NUMBER_DATA;
+
+
+typedef enum {
+ ProcessorCoreFrequencyRecordType = 1,
+ ProcessorFsbFrequencyRecordType = 2,
+ ProcessorVersionRecordType = 3,
+ ProcessorManufacturerRecordType = 4,
+ ProcessorSerialNumberRecordType = 5,
+ ProcessorIdRecordType = 6,
+ ProcessorTypeRecordType = 7,
+ ProcessorFamilyRecordType = 8,
+ ProcessorVoltageRecordType = 9,
+ ProcessorApicBaseAddressRecordType = 10,
+ ProcessorApicIdRecordType = 11,
+ ProcessorApicVersionNumberRecordType = 12,
+ CpuUcodeRevisionDataRecordType = 13,
+ ProcessorStatusRecordType = 14,
+ ProcessorSocketTypeRecordType = 15,
+ ProcessorSocketNameRecordType = 16,
+ CacheAssociationRecordType = 17,
+ ProcessorMaxCoreFrequencyRecordType = 18,
+ ProcessorAssetTagRecordType = 19,
+ ProcessorMaxFsbFrequencyRecordType = 20,
+ ProcessorPackageNumberRecordType = 21,
+ ProcessorCoreFrequencyListRecordType = 22,
+ ProcessorFsbFrequencyListRecordType = 23,
+ ProcessorHealthStatusRecordType = 24
+} EFI_CPU_VARIABLE_RECORD_TYPE;
+
+typedef union {
+ EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA ProcessorCoreFrequencyList;
+ EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA ProcessorFsbFrequencyList;
+ EFI_PROCESSOR_SERIAL_NUMBER_DATA ProcessorSerialNumber;
+ EFI_PROCESSOR_CORE_FREQUENCY_DATA ProcessorCoreFrequency;
+ EFI_PROCESSOR_FSB_FREQUENCY_DATA ProcessorFsbFrequency;
+ EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA ProcessorMaxCoreFrequency;
+ EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA ProcessorMaxFsbFrequency;
+ EFI_PROCESSOR_VERSION_DATA ProcessorVersion;
+ EFI_PROCESSOR_MANUFACTURER_DATA ProcessorManufacturer;
+ EFI_PROCESSOR_ID_DATA ProcessorId;
+ EFI_PROCESSOR_TYPE_DATA ProcessorType;
+ EFI_PROCESSOR_FAMILY_DATA ProcessorFamily;
+ EFI_PROCESSOR_VOLTAGE_DATA ProcessorVoltage;
+ EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA ProcessorApicBase;
+ EFI_PROCESSOR_APIC_ID_DATA ProcessorApicId;
+ EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA ProcessorApicVersionNumber;
+ EFI_PROCESSOR_MICROCODE_REVISION_DATA CpuUcodeRevisionData;
+ EFI_PROCESSOR_STATUS_DATA ProcessorStatus;
+ EFI_PROCESSOR_SOCKET_TYPE_DATA ProcessorSocketType;
+ EFI_PROCESSOR_SOCKET_NAME_DATA ProcessorSocketName;
+ EFI_PROCESSOR_ASSET_TAG_DATA ProcessorAssetTag;
+ EFI_PROCESSOR_HEALTH_STATUS ProcessorHealthStatus;
+ EFI_PROCESSOR_PACKAGE_NUMBER_DATA ProcessorPackageNumber;
+} EFI_CPU_VARIABLE_RECORD;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;
+ EFI_CPU_VARIABLE_RECORD VariableRecord;
+} EFI_CPU_DATA_RECORD;
+
+#define EFI_CACHE_SUBCLASS_VERSION 0x00010000
+
+
+typedef EFI_EXP_BASE2_DATA EFI_CACHE_SIZE_DATA;
+
+typedef EFI_EXP_BASE2_DATA EFI_MAXIMUM_CACHE_SIZE_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_CACHE_SPEED_DATA;
+
+typedef STRING_REF EFI_CACHE_SOCKET_DATA;
+
+typedef struct {
+ UINT32 Other :1;
+ UINT32 Unknown :1;
+ UINT32 NonBurst :1;
+ UINT32 Burst :1;
+ UINT32 PipelineBurst :1;
+ UINT32 Asynchronous :1;
+ UINT32 Synchronous :1;
+ UINT32 Reserved :25;
+} EFI_CACHE_SRAM_TYPE_DATA;
+
+typedef enum {
+ EfiCacheErrorOther = 1,
+ EfiCacheErrorUnknown = 2,
+ EfiCacheErrorNone = 3,
+ EfiCacheErrorParity = 4,
+ EfiCacheErrorSingleBit = 5,
+ EfiCacheErrorMultiBit = 6
+} EFI_CACHE_ERROR_TYPE_DATA;
+
+typedef enum {
+ EfiCacheTypeOther = 1,
+ EfiCacheTypeUnknown = 2,
+ EfiCacheTypeInstruction = 3,
+ EfiCacheTypeData = 4,
+ EfiCacheTypeUnified = 5
+} EFI_CACHE_TYPE_DATA;
+
+typedef enum {
+ EfiCacheAssociativityOther = 1,
+ EfiCacheAssociativityUnknown = 2,
+ EfiCacheAssociativityDirectMapped = 3,
+ EfiCacheAssociativity2Way = 4,
+ EfiCacheAssociativity4Way = 5,
+ EfiCacheAssociativityFully = 6,
+ EfiCacheAssociativity8Way = 7,
+ EfiCacheAssociativity16Way = 8
+} EFI_CACHE_ASSOCIATIVITY_DATA;
+
+typedef struct {
+ UINT32 Level :3;
+ UINT32 Socketed :1;
+ UINT32 Reserved2 :1;
+ UINT32 Location :2;
+ UINT32 Enable :1;
+ UINT32 OperationalMode :2;
+ UINT32 Reserved1 :22;
+} EFI_CACHE_CONFIGURATION_DATA;
+
+#define EFI_CACHE_L1 1
+#define EFI_CACHE_L2 2
+#define EFI_CACHE_L3 3
+#define EFI_CACHE_L4 4
+#define EFI_CACHE_LMAX EFI_CACHE_L4
+
+#define EFI_CACHE_SOCKETED 1
+#define EFI_CACHE_NOT_SOCKETED 0
+
+typedef enum {
+ EfiCacheInternal = 0,
+ EfiCacheExternal = 1,
+ EfiCacheReserved = 2,
+ EfiCacheUnknown = 3
+} EFI_CACHE_LOCATION;
+
+#define EFI_CACHE_ENABLED 1
+#define EFI_CACHE_DISABLED 0
+
+typedef enum {
+ EfiCacheWriteThrough = 0,
+ EfiCacheWriteBack = 1,
+ EfiCacheDynamicMode = 2,
+ EfiCacheUnknownMode = 3
+} EFI_CACHE_OPERATIONAL_MODE;
+
+
+
+typedef enum {
+ CacheSizeRecordType = 1,
+ MaximumSizeCacheRecordType = 2,
+ CacheSpeedRecordType = 3,
+ CacheSocketRecordType = 4,
+ CacheSramTypeRecordType = 5,
+ CacheInstalledSramTypeRecordType = 6,
+ CacheErrorTypeRecordType = 7,
+ CacheTypeRecordType = 8,
+ CacheAssociativityRecordType = 9,
+ CacheConfigRecordType = 10
+} EFI_CACHE_VARIABLE_RECORD_TYPE;
+
+
+typedef union {
+ EFI_CACHE_SIZE_DATA CacheSize;
+ EFI_MAXIMUM_CACHE_SIZE_DATA MaximumCacheSize;
+ EFI_CACHE_SPEED_DATA CacheSpeed;
+ EFI_CACHE_SOCKET_DATA CacheSocket;
+ EFI_CACHE_SRAM_TYPE_DATA CacheSramType;
+ EFI_CACHE_SRAM_TYPE_DATA CacheInstalledSramType;
+ EFI_CACHE_ERROR_TYPE_DATA CacheErrorType;
+ EFI_CACHE_TYPE_DATA CacheType;
+ EFI_CACHE_ASSOCIATIVITY_DATA CacheAssociativity;
+ EFI_CACHE_CONFIGURATION_DATA CacheConfig;
+ EFI_CACHE_ASSOCIATION_DATA CacheAssociation;
+} EFI_CACHE_VARIABLE_RECORD;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;
+ EFI_CACHE_VARIABLE_RECORD VariableRecord;
+} EFI_CACHE_DATA_RECORD;
+
+#define EFI_MEMORY_SUBCLASS_VERSION 0x0100
+
+
+#define EFI_MEMORY_SIZE_RECORD_NUMBER 0x00000001
+
+typedef enum _EFI_MEMORY_REGION_TYPE {
+ EfiMemoryRegionMemory = 0x01,
+ EfiMemoryRegionReserved = 0x02,
+ EfiMemoryRegionAcpi = 0x03,
+ EfiMemoryRegionNvs = 0x04
+} EFI_MEMORY_REGION_TYPE;
+
+typedef struct {
+ UINT32 ProcessorNumber;
+ UINT16 StartBusNumber;
+ UINT16 EndBusNumber;
+ EFI_MEMORY_REGION_TYPE MemoryRegionType;
+ EFI_EXP_BASE2_DATA MemorySize;
+ EFI_PHYSICAL_ADDRESS MemoryStartAddress;
+} EFI_MEMORY_SIZE_DATA;
+
+
+#define EFI_MEMORY_ARRAY_LOCATION_RECORD_NUMBER 0x00000002
+
+typedef enum _EFI_MEMORY_ARRAY_LOCATION {
+ EfiMemoryArrayLocationOther = 0x01,
+ EfiMemoryArrayLocationUnknown = 0x02,
+ EfiMemoryArrayLocationSystemBoard = 0x03,
+ EfiMemoryArrayLocationIsaAddonCard = 0x04,
+ EfiMemoryArrayLocationEisaAddonCard = 0x05,
+ EfiMemoryArrayLocationPciAddonCard = 0x06,
+ EfiMemoryArrayLocationMcaAddonCard = 0x07,
+ EfiMemoryArrayLocationPcmciaAddonCard = 0x08,
+ EfiMemoryArrayLocationProprietaryAddonCard = 0x09,
+ EfiMemoryArrayLocationNuBus = 0x0A,
+ EfiMemoryArrayLocationPc98C20AddonCard = 0xA0,
+ EfiMemoryArrayLocationPc98C24AddonCard = 0xA1,
+ EfiMemoryArrayLocationPc98EAddonCard = 0xA2,
+ EfiMemoryArrayLocationPc98LocalBusAddonCard = 0xA3
+} EFI_MEMORY_ARRAY_LOCATION;
+
+typedef enum _EFI_MEMORY_ARRAY_USE {
+ EfiMemoryArrayUseOther = 0x01,
+ EfiMemoryArrayUseUnknown = 0x02,
+ EfiMemoryArrayUseSystemMemory = 0x03,
+ EfiMemoryArrayUseVideoMemory = 0x04,
+ EfiMemoryArrayUseFlashMemory = 0x05,
+ EfiMemoryArrayUseNonVolatileRam = 0x06,
+ EfiMemoryArrayUseCacheMemory = 0x07,
+} EFI_MEMORY_ARRAY_USE;
+
+typedef enum _EFI_MEMORY_ERROR_CORRECTION {
+ EfiMemoryErrorCorrectionOther = 0x01,
+ EfiMemoryErrorCorrectionUnknown = 0x02,
+ EfiMemoryErrorCorrectionNone = 0x03,
+ EfiMemoryErrorCorrectionParity = 0x04,
+ EfiMemoryErrorCorrectionSingleBitEcc = 0x05,
+ EfiMemoryErrorCorrectionMultiBitEcc = 0x06,
+ EfiMemoryErrorCorrectionCrc = 0x07,
+} EFI_MEMORY_ERROR_CORRECTION;
+
+typedef struct {
+ EFI_MEMORY_ARRAY_LOCATION MemoryArrayLocation;
+ EFI_MEMORY_ARRAY_USE MemoryArrayUse;
+ EFI_MEMORY_ERROR_CORRECTION MemoryErrorCorrection;
+ EFI_EXP_BASE2_DATA MaximumMemoryCapacity;
+ UINT16 NumberMemoryDevices;
+} EFI_MEMORY_ARRAY_LOCATION_DATA;
+
+
+#define EFI_MEMORY_ARRAY_LINK_RECORD_NUMBER 0x00000003
+
+typedef enum _EFI_MEMORY_FORM_FACTOR {
+ EfiMemoryFormFactorOther = 0x01,
+ EfiMemoryFormFactorUnknown = 0x02,
+ EfiMemoryFormFactorSimm = 0x03,
+ EfiMemoryFormFactorSip = 0x04,
+ EfiMemoryFormFactorChip = 0x05,
+ EfiMemoryFormFactorDip = 0x06,
+ EfiMemoryFormFactorZip = 0x07,
+ EfiMemoryFormFactorProprietaryCard = 0x08,
+ EfiMemoryFormFactorDimm = 0x09,
+ EfiMemoryFormFactorTsop = 0x0A,
+ EfiMemoryFormFactorRowOfChips = 0x0B,
+ EfiMemoryFormFactorRimm = 0x0C,
+ EfiMemoryFormFactorSodimm = 0x0D,
+ EfiMemoryFormFactorSrimm = 0x0E,
+ EfiMemoryFormFactorFbDimm = 0x0F
+} EFI_MEMORY_FORM_FACTOR;
+
+typedef enum _EFI_MEMORY_ARRAY_TYPE {
+ EfiMemoryTypeOther = 0x01,
+ EfiMemoryTypeUnknown = 0x02,
+ EfiMemoryTypeDram = 0x03,
+ EfiMemoryTypeEdram = 0x04,
+ EfiMemoryTypeVram = 0x05,
+ EfiMemoryTypeSram = 0x06,
+ EfiMemoryTypeRam = 0x07,
+ EfiMemoryTypeRom = 0x08,
+ EfiMemoryTypeFlash = 0x09,
+ EfiMemoryTypeEeprom = 0x0A,
+ EfiMemoryTypeFeprom = 0x0B,
+ EfiMemoryTypeEprom = 0x0C,
+ EfiMemoryTypeCdram = 0x0D,
+ EfiMemoryType3Dram = 0x0E,
+ EfiMemoryTypeSdram = 0x0F,
+ EfiMemoryTypeSgram = 0x10,
+ EfiMemoryTypeRdram = 0x11,
+ EfiMemoryTypeDdr = 0x12,
+ EfiMemoryTypeDdr2 = 0x13,
+ EfiMemoryTypeDdr2FbDimm = 0x14
+} EFI_MEMORY_ARRAY_TYPE;
+
+typedef struct {
+ UINT32 Reserved :1;
+ UINT32 Other :1;
+ UINT32 Unknown :1;
+ UINT32 FastPaged :1;
+ UINT32 StaticColumn :1;
+ UINT32 PseudoStatic :1;
+ UINT32 Rambus :1;
+ UINT32 Synchronous :1;
+ UINT32 Cmos :1;
+ UINT32 Edo :1;
+ UINT32 WindowDram :1;
+ UINT32 CacheDram :1;
+ UINT32 Nonvolatile :1;
+ UINT32 Reserved1 :19;
+} EFI_MEMORY_TYPE_DETAIL;
+
+typedef enum {
+ EfiMemoryStateEnabled = 0,
+ EfiMemoryStateUnknown = 1,
+ EfiMemoryStateUnsupported = 2,
+ EfiMemoryStateError = 3,
+ EfiMemoryStateAbsent = 4,
+ EfiMemoryStateDisabled = 5,
+ EfiMemoryStatePartial = 6
+} EFI_MEMORY_STATE;
+
+typedef struct {
+ STRING_REF MemoryDeviceLocator;
+ STRING_REF MemoryBankLocator;
+ STRING_REF MemoryManufacturer;
+ STRING_REF MemorySerialNumber;
+ STRING_REF MemoryAssetTag;
+ STRING_REF MemoryPartNumber;
+ EFI_INTER_LINK_DATA MemoryArrayLink;
+ EFI_INTER_LINK_DATA MemorySubArrayLink;
+ UINT16 MemoryTotalWidth;
+ UINT16 MemoryDataWidth;
+ EFI_EXP_BASE2_DATA MemoryDeviceSize;
+ EFI_MEMORY_FORM_FACTOR MemoryFormFactor;
+ UINT8 MemoryDeviceSet;
+ EFI_MEMORY_ARRAY_TYPE MemoryType;
+ EFI_MEMORY_TYPE_DETAIL MemoryTypeDetail;
+ EFI_EXP_BASE10_DATA MemorySpeed;
+ EFI_MEMORY_STATE MemoryState;
+} EFI_MEMORY_ARRAY_LINK_DATA;
+
+
+#define EFI_MEMORY_ARRAY_START_ADDRESS_RECORD_NUMBER 0x00000004
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS MemoryArrayStartAddress;
+ EFI_PHYSICAL_ADDRESS MemoryArrayEndAddress;
+ EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;
+ UINT16 MemoryArrayPartitionWidth;
+} EFI_MEMORY_ARRAY_START_ADDRESS_DATA;
+
+
+#define EFI_MEMORY_DEVICE_START_ADDRESS_RECORD_NUMBER 0x00000005
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS MemoryDeviceStartAddress;
+ EFI_PHYSICAL_ADDRESS MemoryDeviceEndAddress;
+ EFI_INTER_LINK_DATA PhysicalMemoryDeviceLink;
+ EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;
+ UINT8 MemoryDevicePartitionRowPosition;
+ UINT8 MemoryDeviceInterleavePosition;
+ UINT8 MemoryDeviceInterleaveDataDepth;
+} EFI_MEMORY_DEVICE_START_ADDRESS_DATA;
+
+
+//
+// Memory. Channel Device Type - SMBIOS Type 37
+//
+
+#define EFI_MEMORY_CHANNEL_TYPE_RECORD_NUMBER 0x00000006
+
+typedef enum _EFI_MEMORY_CHANNEL_TYPE {
+ EfiMemoryChannelTypeOther = 1,
+ EfiMemoryChannelTypeUnknown = 2,
+ EfiMemoryChannelTypeRambus = 3,
+ EfiMemoryChannelTypeSyncLink = 4
+} EFI_MEMORY_CHANNEL_TYPE;
+
+typedef struct {
+ EFI_MEMORY_CHANNEL_TYPE MemoryChannelType;
+ UINT8 MemoryChannelMaximumLoad;
+ UINT8 MemoryChannelDeviceCount;
+} EFI_MEMORY_CHANNEL_TYPE_DATA;
+
+#define EFI_MEMORY_CHANNEL_DEVICE_RECORD_NUMBER 0x00000007
+
+typedef struct {
+ UINT8 DeviceId;
+ EFI_INTER_LINK_DATA DeviceLink;
+ UINT8 MemoryChannelDeviceLoad;
+} EFI_MEMORY_CHANNEL_DEVICE_DATA;
+
+
+
+typedef union _EFI_MEMORY_SUBCLASS_RECORDS {
+ EFI_MEMORY_SIZE_DATA SizeData;
+ EFI_MEMORY_ARRAY_LOCATION_DATA ArrayLocationData;
+ EFI_MEMORY_ARRAY_LINK_DATA ArrayLink;
+ EFI_MEMORY_ARRAY_START_ADDRESS_DATA ArrayStartAddress;
+ EFI_MEMORY_DEVICE_START_ADDRESS_DATA DeviceStartAddress;
+ EFI_MEMORY_CHANNEL_TYPE_DATA ChannelTypeData;
+ EFI_MEMORY_CHANNEL_DEVICE_DATA ChannelDeviceData;
+} EFI_MEMORY_SUBCLASS_RECORDS;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER Header;
+ EFI_MEMORY_SUBCLASS_RECORDS Record;
+} EFI_MEMORY_SUBCLASS_DRIVER_DATA;
+
+#define EFI_MISC_SUBCLASS_VERSION 0x0100
+
+#pragma pack(1)
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Last PCI Bus Number
+//
+#define EFI_MISC_LAST_PCI_BUS_RECORD_NUMBER 0x00000001
+
+typedef struct {
+ UINT8 LastPciBus;
+} EFI_MISC_LAST_PCI_BUS_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. BIOS Vendor - SMBIOS Type 0
+//
+#define EFI_MISC_BIOS_VENDOR_RECORD_NUMBER 0x00000002
+
+typedef struct {
+ UINT64 Reserved1 :2;
+ UINT64 Unknown :1;
+ UINT64 BiosCharacteristicsNotSupported :1;
+ UINT64 IsaIsSupported :1;
+ UINT64 McaIsSupported :1;
+ UINT64 EisaIsSupported :1;
+ UINT64 PciIsSupported :1;
+ UINT64 PcmciaIsSupported :1;
+ UINT64 PlugAndPlayIsSupported :1;
+ UINT64 ApmIsSupported :1;
+ UINT64 BiosIsUpgradable :1;
+ UINT64 BiosShadowingAllowed :1;
+ UINT64 VlVesaIsSupported :1;
+ UINT64 EscdSupportIsAvailable :1;
+ UINT64 BootFromCdIsSupported :1;
+ UINT64 SelectableBootIsSupported :1;
+ UINT64 RomBiosIsSocketed :1;
+ UINT64 BootFromPcmciaIsSupported :1;
+ UINT64 EDDSpecificationIsSupported :1;
+ UINT64 JapaneseNecFloppyIsSupported :1;
+ UINT64 JapaneseToshibaFloppyIsSupported :1;
+ UINT64 Floppy525_360IsSupported :1;
+ UINT64 Floppy525_12IsSupported :1;
+ UINT64 Floppy35_720IsSupported :1;
+ UINT64 Floppy35_288IsSupported :1;
+ UINT64 PrintScreenIsSupported :1;
+ UINT64 Keyboard8042IsSupported :1;
+ UINT64 SerialIsSupported :1;
+ UINT64 PrinterIsSupported :1;
+ UINT64 CgaMonoIsSupported :1;
+ UINT64 NecPc98 :1;
+ UINT64 AcpiIsSupported :1;
+ UINT64 UsbLegacyIsSupported :1;
+ UINT64 AgpIsSupported :1;
+ UINT64 I20BootIsSupported :1;
+ UINT64 Ls120BootIsSupported :1;
+ UINT64 AtapiZipDriveBootIsSupported :1;
+ UINT64 Boot1394IsSupported :1;
+ UINT64 SmartBatteryIsSupported :1;
+ UINT64 BiosBootSpecIsSupported :1;
+ UINT64 FunctionKeyNetworkBootIsSupported :1;
+ UINT64 Reserved :22;
+} EFI_MISC_BIOS_CHARACTERISTICS;
+
+typedef struct {
+ UINT64 BiosReserved :16;
+ UINT64 SystemReserved :16;
+ UINT64 Reserved :32;
+} EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION;
+
+typedef struct {
+ STRING_REF BiosVendor;
+ STRING_REF BiosVersion;
+ STRING_REF BiosReleaseDate;
+ EFI_PHYSICAL_ADDRESS BiosStartingAddress;
+ EFI_EXP_BASE2_DATA BiosPhysicalDeviceSize;
+ EFI_MISC_BIOS_CHARACTERISTICS BiosCharacteristics1;
+ EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION BiosCharacteristics2;
+ UINT8 BiosMajorRelease;
+ UINT8 BiosMinorRelease;
+ UINT8 BiosEmbeddedFirmwareMajorRelease;
+ UINT8 BiosEmbeddedFirmwareMinorRelease;
+} EFI_MISC_BIOS_VENDOR_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System Manufacturer - SMBIOS Type 1
+//
+#define EFI_MISC_SYSTEM_MANUFACTURER_RECORD_NUMBER 0x00000003
+
+typedef enum {
+ EfiSystemWakeupTypeReserved = 0,
+ EfiSystemWakeupTypeOther = 1,
+ EfiSystemWakeupTypeUnknown = 2,
+ EfiSystemWakeupTypeApmTimer = 3,
+ EfiSystemWakeupTypeModemRing = 4,
+ EfiSystemWakeupTypeLanRemote = 5,
+ EfiSystemWakeupTypePowerSwitch = 6,
+ EfiSystemWakeupTypePciPme = 7,
+ EfiSystemWakeupTypeAcPowerRestored = 8,
+} EFI_MISC_SYSTEM_WAKEUP_TYPE;
+
+typedef struct {
+ STRING_REF SystemManufacturer;
+ STRING_REF SystemProductName;
+ STRING_REF SystemVersion;
+ STRING_REF SystemSerialNumber;
+ EFI_GUID SystemUuid;
+ EFI_MISC_SYSTEM_WAKEUP_TYPE SystemWakeupType;
+ STRING_REF SystemSKUNumber;
+ STRING_REF SystemFamily;
+} EFI_MISC_SYSTEM_MANUFACTURER_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Base Board Manufacturer - SMBIOS Type 2
+//
+#define EFI_MISC_BASE_BOARD_MANUFACTURER_RECORD_NUMBER 0x00000004
+
+typedef struct {
+ UINT32 Motherboard :1;
+ UINT32 RequiresDaughterCard :1;
+ UINT32 Removable :1;
+ UINT32 Replaceable :1;
+ UINT32 HotSwappable :1;
+ UINT32 Reserved :27;
+} EFI_BASE_BOARD_FEATURE_FLAGS;
+
+typedef enum {
+ EfiBaseBoardTypeUnknown = 1,
+ EfiBaseBoardTypeOther = 2,
+ EfiBaseBoardTypeServerBlade = 3,
+ EfiBaseBoardTypeConnectivitySwitch = 4,
+ EfiBaseBoardTypeSystemManagementModule = 5,
+ EfiBaseBoardTypeProcessorModule = 6,
+ EfiBaseBoardTypeIOModule = 7,
+ EfiBaseBoardTypeMemoryModule = 8,
+ EfiBaseBoardTypeDaughterBoard = 9,
+ EfiBaseBoardTypeMotherBoard = 0xA,
+ EfiBaseBoardTypeProcessorMemoryModule = 0xB,
+ EfiBaseBoardTypeProcessorIOModule = 0xC,
+ EfiBaseBoardTypeInterconnectBoard = 0xD,
+} EFI_BASE_BOARD_TYPE;
+
+typedef struct {
+ STRING_REF BaseBoardManufacturer;
+ STRING_REF BaseBoardProductName;
+ STRING_REF BaseBoardVersion;
+ STRING_REF BaseBoardSerialNumber;
+ STRING_REF BaseBoardAssetTag;
+ STRING_REF BaseBoardChassisLocation;
+ EFI_BASE_BOARD_FEATURE_FLAGS BaseBoardFeatureFlags;
+ EFI_BASE_BOARD_TYPE BaseBoardType;
+ EFI_INTER_LINK_DATA BaseBoardChassisLink;
+ UINT32 BaseBoardNumberLinks;
+ EFI_INTER_LINK_DATA LinkN;
+} EFI_MISC_BASE_BOARD_MANUFACTURER_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System/Chassis Enclosure - SMBIOS Type 3
+//
+#define EFI_MISC_CHASSIS_MANUFACTURER_RECORD_NUMBER 0x00000005
+
+typedef enum {
+ EfiMiscChassisTypeOther = 0x1,
+ EfiMiscChassisTypeUnknown = 0x2,
+ EfiMiscChassisTypeDeskTop = 0x3,
+ EfiMiscChassisTypeLowProfileDesktop = 0x4,
+ EfiMiscChassisTypePizzaBox = 0x5,
+ EfiMiscChassisTypeMiniTower = 0x6,
+ EfiMiscChassisTypeTower = 0x7,
+ EfiMiscChassisTypePortable = 0x8,
+ EfiMiscChassisTypeLapTop = 0x9,
+ EfiMiscChassisTypeNotebook = 0xA,
+ EfiMiscChassisTypeHandHeld = 0xB,
+ EfiMiscChassisTypeDockingStation = 0xC,
+ EfiMiscChassisTypeAllInOne = 0xD,
+ EfiMiscChassisTypeSubNotebook = 0xE,
+ EfiMiscChassisTypeSpaceSaving = 0xF,
+ EfiMiscChassisTypeLunchBox = 0x10,
+ EfiMiscChassisTypeMainServerChassis = 0x11,
+ EfiMiscChassisTypeExpansionChassis = 0x12,
+ EfiMiscChassisTypeSubChassis = 0x13,
+ EfiMiscChassisTypeBusExpansionChassis = 0x14,
+ EfiMiscChassisTypePeripheralChassis = 0x15,
+ EfiMiscChassisTypeRaidChassis = 0x16,
+ EfiMiscChassisTypeRackMountChassis = 0x17,
+ EfiMiscChassisTypeSealedCasePc = 0x18,
+ EfiMiscChassisMultiSystemChassis = 0x19,
+} EFI_MISC_CHASSIS_TYPE;
+
+typedef struct {
+ UINT32 ChassisType :16;
+ UINT32 ChassisLockPresent:1;
+ UINT32 Reserved :15;
+} EFI_MISC_CHASSIS_STATUS;
+
+typedef enum {
+ EfiChassisStateOther = 0x01,
+ EfiChassisStateUnknown = 0x02,
+ EfiChassisStateSafe = 0x03,
+ EfiChassisStateWarning = 0x04,
+ EfiChassisStateCritical = 0x05,
+ EfiChassisStateNonRecoverable = 0x06,
+} EFI_MISC_CHASSIS_STATE;
+
+typedef enum {
+ EfiChassisSecurityStatusOther = 0x01,
+ EfiChassisSecurityStatusUnknown = 0x02,
+ EfiChassisSecurityStatusNone = 0x03,
+ EfiChassisSecurityStatusExternalInterfaceLockedOut = 0x04,
+ EfiChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05,
+} EFI_MISC_CHASSIS_SECURITY_STATE;
+
+typedef struct {
+ UINT32 RecordType :1;
+ UINT32 Reserved :24;
+} EFI_MISC_ELEMENT_TYPE;
+
+typedef struct {
+ EFI_MISC_ELEMENT_TYPE ChassisElementType;
+ EFI_INTER_LINK_DATA ChassisElementStructure;
+ EFI_BASE_BOARD_TYPE ChassisBaseBoard;
+ UINT32 ChassisElementMinimum;
+ UINT32 ChassisElementMaximum;
+} EFI_MISC_ELEMENTS;
+
+typedef struct {
+ STRING_REF ChassisManufacturer;
+ STRING_REF ChassisVersion;
+ STRING_REF ChassisSerialNumber;
+ STRING_REF ChassisAssetTag;
+ EFI_MISC_CHASSIS_STATUS ChassisType;
+ EFI_MISC_CHASSIS_STATE ChassisBootupState;
+ EFI_MISC_CHASSIS_STATE ChassisPowerSupplyState;
+ EFI_MISC_CHASSIS_STATE ChassisThermalState;
+ EFI_MISC_CHASSIS_SECURITY_STATE ChassisSecurityState;
+ UINT32 ChassisOemDefined;
+ UINT32 ChassisHeight;
+ UINT32 ChassisNumberPowerCords;
+ UINT32 ChassisElementCount;
+ UINT32 ChassisElementRecordLength;//
+ EFI_MISC_ELEMENTS ChassisElements;
+} EFI_MISC_CHASSIS_MANUFACTURER_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Port Connector Information - SMBIOS Type 8
+//
+#define EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_RECORD_NUMBER 0x00000006
+
+typedef enum {
+ EfiPortConnectorTypeNone = 0x00,
+ EfiPortConnectorTypeCentronics = 0x01,
+ EfiPortConnectorTypeMiniCentronics = 0x02,
+ EfiPortConnectorTypeProprietary = 0x03,
+ EfiPortConnectorTypeDB25Male = 0x04,
+ EfiPortConnectorTypeDB25Female = 0x05,
+ EfiPortConnectorTypeDB15Male = 0x06,
+ EfiPortConnectorTypeDB15Female = 0x07,
+ EfiPortConnectorTypeDB9Male = 0x08,
+ EfiPortConnectorTypeDB9Female = 0x09,
+ EfiPortConnectorTypeRJ11 = 0x0A,
+ EfiPortConnectorTypeRJ45 = 0x0B,
+ EfiPortConnectorType50PinMiniScsi = 0x0C,
+ EfiPortConnectorTypeMiniDin = 0x0D,
+ EfiPortConnectorTypeMicriDin = 0x0E,
+ EfiPortConnectorTypePS2 = 0x0F,
+ EfiPortConnectorTypeInfrared = 0x10,
+ EfiPortConnectorTypeHpHil = 0x11,
+ EfiPortConnectorTypeUsb = 0x12,
+ EfiPortConnectorTypeSsaScsi = 0x13,
+ EfiPortConnectorTypeCircularDin8Male = 0x14,
+ EfiPortConnectorTypeCircularDin8Female = 0x15,
+ EfiPortConnectorTypeOnboardIde = 0x16,
+ EfiPortConnectorTypeOnboardFloppy = 0x17,
+ EfiPortConnectorType9PinDualInline = 0x18,
+ EfiPortConnectorType25PinDualInline = 0x19,
+ EfiPortConnectorType50PinDualInline = 0x1A,
+ EfiPortConnectorType68PinDualInline = 0x1B,
+ EfiPortConnectorTypeOnboardSoundInput = 0x1C,
+ EfiPortConnectorTypeMiniCentronicsType14 = 0x1D,
+ EfiPortConnectorTypeMiniCentronicsType26 = 0x1E,
+ EfiPortConnectorTypeHeadPhoneMiniJack = 0x1F,
+ EfiPortConnectorTypeBNC = 0x20,
+ EfiPortConnectorType1394 = 0x21,
+ EfiPortConnectorTypePC98 = 0xA0,
+ EfiPortConnectorTypePC98Hireso = 0xA1,
+ EfiPortConnectorTypePCH98 = 0xA2,
+ EfiPortConnectorTypePC98Note = 0xA3,
+ EfiPortConnectorTypePC98Full = 0xA4,
+ EfiPortConnectorTypeOther = 0xFF,
+} EFI_MISC_PORT_CONNECTOR_TYPE;
+
+typedef enum {
+ EfiPortTypeNone = 0x00,
+ EfiPortTypeParallelXtAtCompatible = 0x01,
+ EfiPortTypeParallelPortPs2 = 0x02,
+ EfiPortTypeParallelPortEcp = 0x03,
+ EfiPortTypeParallelPortEpp = 0x04,
+ EfiPortTypeParallelPortEcpEpp = 0x05,
+ EfiPortTypeSerialXtAtCompatible = 0x06,
+ EfiPortTypeSerial16450Compatible = 0x07,
+ EfiPortTypeSerial16550Compatible = 0x08,
+ EfiPortTypeSerial16550ACompatible = 0x09,
+ EfiPortTypeScsi = 0x0A,
+ EfiPortTypeMidi = 0x0B,
+ EfiPortTypeJoyStick = 0x0C,
+ EfiPortTypeKeyboard = 0x0D,
+ EfiPortTypeMouse = 0x0E,
+ EfiPortTypeSsaScsi = 0x0F,
+ EfiPortTypeUsb = 0x10,
+ EfiPortTypeFireWire = 0x11,
+ EfiPortTypePcmciaTypeI = 0x12,
+ EfiPortTypePcmciaTypeII = 0x13,
+ EfiPortTypePcmciaTypeIII = 0x14,
+ EfiPortTypeCardBus = 0x15,
+ EfiPortTypeAccessBusPort = 0x16,
+ EfiPortTypeScsiII = 0x17,
+ EfiPortTypeScsiWide = 0x18,
+ EfiPortTypePC98 = 0x19,
+ EfiPortTypePC98Hireso = 0x1A,
+ EfiPortTypePCH98 = 0x1B,
+ EfiPortTypeVideoPort = 0x1C,
+ EfiPortTypeAudioPort = 0x1D,
+ EfiPortTypeModemPort = 0x1E,
+ EfiPortTypeNetworkPort = 0x1F,
+ EfiPortType8251Compatible = 0xA0,
+ EfiPortType8251FifoCompatible = 0xA1,
+ EfiPortTypeOther = 0xFF,
+} EFI_MISC_PORT_TYPE;
+
+typedef struct {
+ STRING_REF PortInternalConnectorDesignator;
+ STRING_REF PortExternalConnectorDesignator;
+ EFI_MISC_PORT_CONNECTOR_TYPE PortInternalConnectorType;
+ EFI_MISC_PORT_CONNECTOR_TYPE PortExternalConnectorType;
+ EFI_MISC_PORT_TYPE PortType;
+ EFI_MISC_PORT_DEVICE_PATH PortPath;
+} EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System Slots - SMBIOS Type 9
+//
+#define EFI_MISC_SYSTEM_SLOT_DESIGNATION_RECORD_NUMBER 0x00000007
+
+typedef enum {
+ EfiSlotTypeOther = 0x01,
+ EfiSlotTypeUnknown = 0x02,
+ EfiSlotTypeIsa = 0x03,
+ EfiSlotTypeMca = 0x04,
+ EfiSlotTypeEisa = 0x05,
+ EfiSlotTypePci = 0x06,
+ EfiSlotTypePcmcia = 0x07,
+ EfiSlotTypeVlVesa = 0x08,
+ EfiSlotTypeProprietary = 0x09,
+ EfiSlotTypeProcessorCardSlot = 0x0A,
+ EfiSlotTypeProprietaryMemoryCardSlot = 0x0B,
+ EfiSlotTypeIORiserCardSlot = 0x0C,
+ EfiSlotTypeNuBus = 0x0D,
+ EfiSlotTypePci66MhzCapable = 0x0E,
+ EfiSlotTypeAgp = 0x0F,
+ EfiSlotTypeApg2X = 0x10,
+ EfiSlotTypeAgp4X = 0x11,
+ EfiSlotTypePciX = 0x12,
+ EfiSlotTypeAgp4x = 0x13,
+ EfiSlotTypePC98C20 = 0xA0,
+ EfiSlotTypePC98C24 = 0xA1,
+ EfiSlotTypePC98E = 0xA2,
+ EfiSlotTypePC98LocalBus = 0xA3,
+ EfiSlotTypePC98Card = 0xA4,
+ EfiSlotTypePciExpress = 0xA5
+} EFI_MISC_SLOT_TYPE;
+
+typedef enum {
+ EfiSlotDataBusWidthOther = 0x01,
+ EfiSlotDataBusWidthUnknown = 0x02,
+ EfiSlotDataBusWidth8Bit = 0x03,
+ EfiSlotDataBusWidth16Bit = 0x04,
+ EfiSlotDataBusWidth32Bit = 0x05,
+ EfiSlotDataBusWidth64Bit = 0x06,
+ EfiSlotDataBusWidth128Bit = 0x07,
+} EFI_MISC_SLOT_DATA_BUS_WIDTH;
+
+typedef enum {
+ EfiSlotUsageOther = 1,
+ EfiSlotUsageUnknown = 2,
+ EfiSlotUsageAvailable = 3,
+ EfiSlotUsageInUse = 4,
+} EFI_MISC_SLOT_USAGE;
+
+typedef enum {
+ EfiSlotLengthOther = 1,
+ EfiSlotLengthUnknown = 2,
+ EfiSlotLengthShort = 3,
+ EfiSlotLengthLong = 4
+} EFI_MISC_SLOT_LENGTH;
+
+typedef struct {
+ UINT32 CharacteristicsUnknown :1;
+ UINT32 Provides50Volts :1;
+ UINT32 Provides33Volts :1;
+ UINT32 SharedSlot :1;
+ UINT32 PcCard16Supported :1;
+ UINT32 CardBusSupported :1;
+ UINT32 ZoomVideoSupported :1;
+ UINT32 ModemRingResumeSupported:1;
+ UINT32 PmeSignalSupported :1;
+ UINT32 HotPlugDevicesSupported :1;
+ UINT32 SmbusSignalSupported :1;
+ UINT32 Reserved :21;
+} EFI_MISC_SLOT_CHARACTERISTICS;
+
+typedef struct {
+ STRING_REF SlotDesignation;
+ EFI_MISC_SLOT_TYPE SlotType;
+ EFI_MISC_SLOT_DATA_BUS_WIDTH SlotDataBusWidth;
+ EFI_MISC_SLOT_USAGE SlotUsage;
+ EFI_MISC_SLOT_LENGTH SlotLength;
+ UINT16 SlotId;
+ EFI_MISC_SLOT_CHARACTERISTICS SlotCharacteristics;
+ EFI_DEVICE_PATH_PROTOCOL SlotDevicePath;
+} EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Onboard Device - SMBIOS Type 10
+//
+#define EFI_MISC_ONBOARD_DEVICE_RECORD_NUMBER 0x00000008
+
+typedef enum {
+ EfiOnBoardDeviceTypeOther = 1,
+ EfiOnBoardDeviceTypeUnknown = 2,
+ EfiOnBoardDeviceTypeVideo = 3,
+ EfiOnBoardDeviceTypeScsiController = 4,
+ EfiOnBoardDeviceTypeEthernet = 5,
+ EfiOnBoardDeviceTypeTokenRing = 6,
+ EfiOnBoardDeviceTypeSound = 7,
+} EFI_MISC_ONBOARD_DEVICE_TYPE;
+
+typedef struct {
+ UINT32 DeviceType :16;
+ UINT32 DeviceEnabled :1;
+ UINT32 Reserved :15;
+} EFI_MISC_ONBOARD_DEVICE_STATUS;
+
+typedef struct {
+ STRING_REF OnBoardDeviceDescription;
+ EFI_MISC_ONBOARD_DEVICE_STATUS OnBoardDeviceStatus;
+ EFI_DEVICE_PATH_PROTOCOL OnBoardDevicePath;
+} EFI_MISC_ONBOARD_DEVICE_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. BIOS Language Information - SMBIOS Type 11
+//
+#define EFI_MISC_OEM_STRING_RECORD_NUMBER 0x00000009
+
+typedef struct {
+ STRING_REF OemStringRef[1];
+} EFI_MISC_OEM_STRING_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System Options - SMBIOS Type 12
+//
+typedef struct {
+ STRING_REF SystemOptionStringRef[1];
+} EFI_MISC_SYSTEM_OPTION_STRING_DATA;
+
+#define EFI_MISC_SYSTEM_OPTION_STRING_RECORD_NUMBER 0x0000000A
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Number of Installable Languages - SMBIOS Type 13
+//
+#define EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_RECORD_NUMBER 0x0000000B
+
+typedef struct {
+ UINT32 AbbreviatedLanguageFormat :1;
+ UINT32 Reserved :31;
+} EFI_MISC_LANGUAGE_FLAGS;
+
+typedef struct {
+ UINT16 NumberOfInstallableLanguages;
+ EFI_MISC_LANGUAGE_FLAGS LanguageFlags;
+ UINT16 CurrentLanguageNumber;
+} EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System Language String
+//
+#define EFI_MISC_SYSTEM_LANGUAGE_STRING_RECORD_NUMBER 0x0000000C
+
+typedef struct {
+ UINT16 LanguageId;
+ STRING_REF SystemLanguageString;
+} EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Group Associations - SMBIOS Type 14
+//
+#define EFI_MISC_GROUP_NAME_RECORD_NUMBER 0x0000000D
+
+typedef struct {
+ STRING_REF GroupName;
+ UINT16 NumberGroupItems;
+ UINT16 GroupId;
+} EFI_MISC_GROUP_NAME_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Group Item Set Element
+//
+#define EFI_MISC_GROUP_ITEM_SET_RECORD_NUMBER 0x0000000E
+
+typedef struct {
+ EFI_GUID SubClass;
+ EFI_INTER_LINK_DATA GroupLink;
+ UINT16 GroupId;
+ UINT16 GroupElementId;
+} EFI_MISC_GROUP_ITEM_SET_DATA;
+
+// Misc. System Event Log - SMBIOS Type 15
+//
+#define EFI_MISC_SYSTEM_EVENT_LOG_RECORD_NUMBER 0x0000000D
+typedef struct {
+ UINT16 LogAreaLength;
+ UINT16 LogHeaderStartOffset;
+ UINT16 LogDataStartOffset;
+ UINT8 AccessMethod;
+ UINT8 LogStatus;
+ UINT32 LogChangeToken;
+ UINT32 AccessMethodAddress;
+ UINT8 LogHeaderFormat;
+ UINT8 NumberOfSupportedLogType;
+ UINT8 LengthOfLogDescriptor;
+} EFI_MISC_SYSTEM_EVENT_LOG_DATA;
+
+//
+// Access Method.
+// 0x00~0x04: as following definition
+// 0x05~0x7f: Available for future assignment.
+// 0x80~0xff: BIOS Vendor/OEM-specific.
+//
+#define ACCESS_INDEXIO_1INDEX8BIT_DATA8BIT 0x00
+#define ACCESS_INDEXIO_2INDEX8BIT_DATA8BIT 0X01
+#define ACCESS_INDEXIO_1INDEX16BIT_DATA8BIT 0X02
+#define ACCESS_MEMORY_MAPPED 0x03
+#define ACCESS_GPNV 0x04
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Pointing Device Type - SMBIOS Type 21
+//
+#define EFI_MISC_POINTING_DEVICE_TYPE_RECORD_NUMBER 0x0000000F
+
+typedef enum {
+ EfiPointingDeviceTypeOther = 0x01,
+ EfiPointingDeviceTypeUnknown = 0x02,
+ EfiPointingDeviceTypeMouse = 0x03,
+ EfiPointingDeviceTypeTrackBall = 0x04,
+ EfiPointingDeviceTypeTrackPoint = 0x05,
+ EfiPointingDeviceTypeGlidePoint = 0x06,
+ EfiPointingDeviceTouchPad = 0x07,
+ EfiPointingDeviceTouchScreen = 0x08,
+ EfiPointingDeviceOpticalSensor = 0x09,
+} EFI_MISC_POINTING_DEVICE_TYPE;
+
+typedef enum {
+ EfiPointingDeviceInterfaceOther = 0x01,
+ EfiPointingDeviceInterfaceUnknown = 0x02,
+ EfiPointingDeviceInterfaceSerial = 0x03,
+ EfiPointingDeviceInterfacePs2 = 0x04,
+ EfiPointingDeviceInterfaceInfrared = 0x05,
+ EfiPointingDeviceInterfaceHpHil = 0x06,
+ EfiPointingDeviceInterfaceBusMouse = 0x07,
+ EfiPointingDeviceInterfaceADB = 0x08,
+ EfiPointingDeviceInterfaceBusMouseDB9 = 0xA0,
+ EfiPointingDeviceInterfaceBusMouseMicroDin = 0xA1,
+ EfiPointingDeviceInterfaceUsb = 0xA2,
+} EFI_MISC_POINTING_DEVICE_INTERFACE;
+
+typedef struct {
+ EFI_MISC_POINTING_DEVICE_TYPE PointingDeviceType;
+ EFI_MISC_POINTING_DEVICE_INTERFACE PointingDeviceInterface;
+ UINT16 NumberPointingDeviceButtons;
+ EFI_DEVICE_PATH_PROTOCOL PointingDevicePath;
+} EFI_MISC_PORTING_DEVICE_TYPE_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Portable Battery - SMBIOS Type 22
+//
+#define EFI_MISC_BATTERY_LOCATION_RECORD_NUMBER 0x00000010
+
+typedef enum {
+ EfiBatteryDeviceChemistryTypeOther = 0x01,
+ EfiBatteryDeviceChemistryTypeUnknown = 0x02,
+ EfiBatteryDeviceChemistryTypeLeadAcid = 0x03,
+ EfiBatteryDeviceChemistryTypeNickelCadmium = 0x04,
+ EfiBatteryDeviceChemistryTypeNickelMetalHydride = 0x05,
+ EfiBatteryDeviceChemistryTypeLithiumIon = 0x06,
+ EfiBatteryDeviceChemistryTypeZincAir = 0x07,
+ EfiBatteryDeviceChemistryTypeLithiumPolymer = 0x08,
+} EFI_MISC_BATTERY_DEVICE_CHEMISTRY;
+
+typedef struct {
+ UINT32 Date :5;
+ UINT32 Month :4;
+ UINT32 Year :7;
+ UINT32 Reserved :16;
+} EFI_MISC_BATTERY_SBDS_MANUFACTURE_DATE;
+
+typedef struct {
+ STRING_REF BatteryLocation;
+ STRING_REF BatteryManufacturer;
+ STRING_REF BatteryManufactureDate;
+ STRING_REF BatterySerialNumber;
+ STRING_REF BatteryDeviceName;
+ STRING_REF BatterySbdsVersionNumber;
+ STRING_REF BatterySbdsDeviceChemistry;
+ EFI_MISC_BATTERY_DEVICE_CHEMISTRY BatteryDeviceChemistry;
+ EFI_EXP_BASE10_DATA BatteryDesignCapacity;
+ EFI_EXP_BASE10_DATA BatteryDesignVoltage;
+ UINT16 BatteryMaximumError;
+ UINT16 BatterySbdsSerialNumber;
+ EFI_MISC_BATTERY_SBDS_MANUFACTURE_DATE
+ BatterySbdsManufacturingDate;
+ UINT32 BatteryOemSpecific;
+} EFI_MISC_BATTERY_LOCATION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Reset Capabilities - SMBIOS Type 23
+//
+#define EFI_MISC_RESET_CAPABILITIES_RECORD_NUMBER 0x00000011
+
+typedef struct {
+ UINT32 Status :1;
+ UINT32 BootOption :2;
+ UINT32 BootOptionOnLimit :2;
+ UINT32 WatchdogTimerPresent:1;
+ UINT32 Reserved :26;
+} EFI_MISC_RESET_CAPABILITIES_TYPE;
+
+typedef struct {
+ EFI_MISC_RESET_CAPABILITIES_TYPE ResetCapabilities;
+ UINT16 ResetCount;
+ UINT16 ResetLimit;
+ UINT16 ResetTimerInterval;
+ UINT16 ResetTimeout;
+} EFI_MISC_RESET_CAPABILITIES;
+
+typedef struct {
+ EFI_MISC_RESET_CAPABILITIES ResetCapabilities;
+ UINT16 ResetCount;
+ UINT16 ResetLimit;
+ UINT16 ResetTimerInterval;
+ UINT16 ResetTimeout;
+} EFI_MISC_RESET_CAPABILITIES_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Hardware Security - SMBIOS Type 24
+//
+#define EFI_MISC_HARDWARE_SECURITY_RECORD_NUMBER 0x00000012
+
+typedef enum {
+ EfiHardwareSecurityStatusDisabled = 0,
+ EfiHardwareSecurityStatusEnabled = 1,
+ EfiHardwareSecurityStatusNotImplemented = 2,
+ EfiHardwareSecurityStatusUnknown = 3
+} EFI_MISC_HARDWARE_SECURITY_STATUS;
+
+typedef struct {
+ EFI_MISC_HARDWARE_SECURITY_STATUS FrontPanelResetStatus :2;
+ EFI_MISC_HARDWARE_SECURITY_STATUS AdministratorPasswordStatus :2;
+ EFI_MISC_HARDWARE_SECURITY_STATUS KeyboardPasswordStatus :2;
+ EFI_MISC_HARDWARE_SECURITY_STATUS PowerOnPasswordStatus :2;
+ EFI_MISC_HARDWARE_SECURITY_STATUS Reserved :24;
+} EFI_MISC_HARDWARE_SECURITY_SETTINGS;
+
+typedef struct {
+ EFI_MISC_HARDWARE_SECURITY_SETTINGS HardwareSecuritySettings;
+} EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// System Power Controls - SMBIOS Type 25
+//
+#define EFI_MISC_SCHEDULED_POWER_ON_MONTH_RECORD_NUMBER 0x00000013
+
+typedef struct {
+ UINT16 ScheduledPoweronMonth;
+ UINT16 ScheduledPoweronDayOfMonth;
+ UINT16 ScheduledPoweronHour;
+ UINT16 ScheduledPoweronMinute;
+ UINT16 ScheduledPoweronSecond;
+} EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Voltage Probe - SMBIOS Type 26
+//
+#define EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000014
+
+typedef struct {
+ UINT32 VoltageProbeSite :5;
+ UINT32 VoltageProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_VOLTAGE_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF VoltageProbeDescription;
+ EFI_MISC_VOLTAGE_PROBE_LOCATION VoltageProbeLocation;
+ EFI_EXP_BASE10_DATA VoltageProbeMaximumValue;
+ EFI_EXP_BASE10_DATA VoltageProbeMinimumValue;
+ EFI_EXP_BASE10_DATA VoltageProbeResolution;
+ EFI_EXP_BASE10_DATA VoltageProbeTolerance;
+ EFI_EXP_BASE10_DATA VoltageProbeAccuracy;
+ EFI_EXP_BASE10_DATA VoltageProbeNominalValue;
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;
+ UINT32 VoltageProbeOemDefined;
+} EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Cooling Device - SMBIOS Type 27
+//
+#define EFI_MISC_COOLING_DEVICE_TEMP_LINK_RECORD_NUMBER 0x00000015
+
+typedef struct {
+ UINT32 CoolingDevice :5;
+ UINT32 CoolingDeviceStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_COOLING_DEVICE_TYPE;
+
+typedef struct {
+ EFI_MISC_COOLING_DEVICE_TYPE CoolingDeviceType;
+ EFI_INTER_LINK_DATA CoolingDeviceTemperatureLink;
+ UINT16 CoolingDeviceUnitGroup;
+ EFI_EXP_BASE10_DATA CoolingDeviceNominalSpeed;
+ UINT32 CoolingDeviceOemDefined;
+} EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Temperature Probe - SMBIOS Type 28
+//
+#define EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000016
+
+typedef struct {
+ UINT32 TemperatureProbeSite :5;
+ UINT32 TemperatureProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_TEMPERATURE_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF TemperatureProbeDescription;
+ EFI_MISC_TEMPERATURE_PROBE_LOCATION
+ TemperatureProbeLocation;
+ EFI_EXP_BASE10_DATA TemperatureProbeMaximumValue;
+ EFI_EXP_BASE10_DATA TemperatureProbeMinimumValue;
+ EFI_EXP_BASE10_DATA TemperatureProbeResolution;
+ EFI_EXP_BASE10_DATA TemperatureProbeTolerance;
+ EFI_EXP_BASE10_DATA TemperatureProbeAccuracy;
+ EFI_EXP_BASE10_DATA TemperatureProbeNominalValue;
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;
+ UINT32 TemperatureProbeOemDefined;
+} EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Electrical Current Probe - SMBIOS Type 29
+//
+
+#define EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000017
+
+typedef struct {
+ UINT32 ElectricalCurrentProbeSite :5;
+ UINT32 ElectricalCurrentProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF ElectricalCurrentProbeDescription;
+ EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION
+ ElectricalCurrentProbeLocation;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeMaximumValue;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeMinimumValue;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeResolution;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeTolerance;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeAccuracy;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeNominalValue;
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;
+ UINT32 ElectricalCurrentProbeOemDefined;
+} EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Out-of-Band Remote Access - SMBIOS Type 30
+//
+
+#define EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_RECORD_NUMBER 0x00000018
+
+typedef struct {
+ UINT32 InboundConnectionEnabled :1;
+ UINT32 OutboundConnectionEnabled :1;
+ UINT32 Reserved :30;
+} EFI_MISC_REMOTE_ACCESS_CONNECTIONS;
+
+typedef struct {
+ STRING_REF RemoteAccessManufacturerNameDescription;
+ EFI_MISC_REMOTE_ACCESS_CONNECTIONS RemoteAccessConnections;
+} EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. BIS Entry Point - SMBIOS Type 31
+//
+#define EFI_MISC_BIS_ENTRY_POINT_RECORD_NUMBER 0x00000019
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS BisEntryPoint;
+} EFI_MISC_BIS_ENTRY_POINT_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Boot Information - SMBIOS Type 32
+//
+#define EFI_MISC_BOOT_INFORMATION_STATUS_RECORD_NUMBER 0x0000001A
+
+typedef enum {
+ EfiBootInformationStatusNoError = 0x00,
+ EfiBootInformationStatusNoBootableMedia = 0x01,
+ EfiBootInformationStatusNormalOSFailedLoading = 0x02,
+ EfiBootInformationStatusFirmwareDetectedFailure = 0x03,
+ EfiBootInformationStatusOSDetectedFailure = 0x04,
+ EfiBootInformationStatusUserRequestedBoot = 0x05,
+ EfiBootInformationStatusSystemSecurityViolation = 0x06,
+ EfiBootInformationStatusPreviousRequestedImage = 0x07,
+ EfiBootInformationStatusWatchdogTimerExpired = 0x08,
+ EfiBootInformationStatusStartReserved = 0x09,
+ EfiBootInformationStatusStartOemSpecific = 0x80,
+ EfiBootInformationStatusStartProductSpecific = 0xC0,
+} EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
+
+typedef struct {
+ EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE BootInformationStatus;
+ UINT8 BootInformationData[9];
+} EFI_MISC_BOOT_INFORMATION_STATUS_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Management Device - SMBIOS Type 34
+//
+#define EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_RECORD_NUMBER 0x0000001B
+
+typedef enum {
+ EfiManagementDeviceTypeOther = 0x01,
+ EfiManagementDeviceTypeUnknown = 0x02,
+ EfiManagementDeviceTypeLm75 = 0x03,
+ EfiManagementDeviceTypeLm78 = 0x04,
+ EfiManagementDeviceTypeLm79 = 0x05,
+ EfiManagementDeviceTypeLm80 = 0x06,
+ EfiManagementDeviceTypeLm81 = 0x07,
+ EfiManagementDeviceTypeAdm9240 = 0x08,
+ EfiManagementDeviceTypeDs1780 = 0x09,
+ EfiManagementDeviceTypeMaxim1617 = 0x0A,
+ EfiManagementDeviceTypeGl518Sm = 0x0B,
+ EfiManagementDeviceTypeW83781D = 0x0C,
+ EfiManagementDeviceTypeHt82H791 = 0x0D,
+} EFI_MISC_MANAGEMENT_DEVICE_TYPE;
+
+typedef enum {
+ EfiManagementDeviceAddressTypeOther = 1,
+ EfiManagementDeviceAddressTypeUnknown = 2,
+ EfiManagementDeviceAddressTypeIOPort = 3,
+ EfiManagementDeviceAddressTypeMemory = 4,
+ EfiManagementDeviceAddressTypeSmbus = 5
+} EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;
+
+typedef struct {
+ STRING_REF ManagementDeviceDescription;
+ EFI_MISC_MANAGEMENT_DEVICE_TYPE ManagementDeviceType;
+ UINTN ManagementDeviceAddress;
+ EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE
+ ManagementDeviceAddressType;
+} EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Management Device Component - SMBIOS Type 35
+//
+
+#define EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_RECORD_NUMBER 0x0000001C
+
+typedef struct {
+ STRING_REF ManagementDeviceComponentDescription;
+ EFI_INTER_LINK_DATA ManagementDeviceLink;
+ EFI_INTER_LINK_DATA ManagementDeviceComponentLink;
+} EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// IPMI Data Record - SMBIOS Type 38
+//
+typedef enum {
+ EfiIpmiOther = 0,
+ EfiIpmiKcs = 1,
+ EfiIpmiSmic = 2,
+ EfiIpmiBt = 3,
+} EFI_MISC_IPMI_INTERFACE_TYPE;
+
+typedef struct {
+ UINT16 IpmiSpecLeastSignificantDigit:4;
+ UINT16 IpmiSpecMostSignificantDigit: 4;
+ UINT16 Reserved: 8;
+} EFI_MISC_IPMI_SPECIFICATION_REVISION;
+
+typedef struct {
+ EFI_MISC_IPMI_INTERFACE_TYPE IpmiInterfaceType;
+ EFI_MISC_IPMI_SPECIFICATION_REVISION IpmiSpecificationRevision;
+ UINT16 IpmiI2CSlaveAddress;
+ UINT16 IpmiNvDeviceAddress;
+ UINT64 IpmiBaseAddress;
+ EFI_DEVICE_PATH_PROTOCOL IpmiDevicePath;
+} EFI_MISC_IPMI_INTERFACE_TYPE_DATA;
+
+#define EFI_MISC_IPMI_INTERFACE_TYPE_RECORD_NUMBER 0x0000001D
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+//System Power supply Record - SMBIOS Type 39
+//
+typedef struct {
+ UINT16 PowerSupplyHotReplaceable :1;
+ UINT16 PowerSupplyPresent :1;
+ UINT16 PowerSupplyUnplugged :1;
+ UINT16 InputVoltageRangeSwitch :4;
+ UINT16 PowerSupplyStatus :3;
+ UINT16 PowerSupplyType :4;
+ UINT16 Reserved :2;
+} POWER_SUPPLY_CHARACTERISTICS;
+
+typedef struct {
+ UINT16 PowerUnitGroup;
+ STRING_REF PowerSupplyLocation;
+ STRING_REF PowerSupplyDeviceName;
+ STRING_REF PowerSupplyManufacturer;
+ STRING_REF PowerSupplySerialNumber;
+ STRING_REF PowerSupplyAssetTagNumber;
+ STRING_REF PowerSupplyModelPartNumber;
+ STRING_REF PowerSupplyRevisionLevel;
+ UINT16 PowerSupplyMaxPowerCapacity;
+ POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;
+ EFI_INTER_LINK_DATA PowerSupplyInputVoltageProbeLink;
+ EFI_INTER_LINK_DATA PowerSupplyCoolingDeviceLink;
+ EFI_INTER_LINK_DATA PowerSupplyInputCurrentProbeLink;
+} EFI_MISC_SYSTEM_POWER_SUPPLY_DATA;
+
+#define EFI_MISC_SYSTEM_POWER_SUPPLY_RECORD_NUMBER 0x0000001E
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// OEM Data Record - SMBIOS Type 0x80-0xFF
+//
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Handle;
+} SMBIOS_STRUCTURE_HDR;
+
+typedef struct {
+ SMBIOS_STRUCTURE_HDR Header;
+ UINT8 RawData[1];
+} EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA;
+
+#define EFI_MISC_SMBIOS_STRUCT_ENCAP_RECORD_NUMBER 0x0000001F
+
+//
+// Declare the following strutures alias to use them more conviniently.
+//
+typedef EFI_MISC_LAST_PCI_BUS_DATA EFI_MISC_LAST_PCI_BUS;
+typedef EFI_MISC_BIOS_VENDOR_DATA EFI_MISC_BIOS_VENDOR;
+typedef EFI_MISC_SYSTEM_MANUFACTURER_DATA EFI_MISC_SYSTEM_MANUFACTURER;
+typedef EFI_MISC_BASE_BOARD_MANUFACTURER_DATA EFI_MISC_BASE_BOARD_MANUFACTURER;
+typedef EFI_MISC_CHASSIS_MANUFACTURER_DATA EFI_MISC_CHASSIS_MANUFACTURER;
+typedef EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR;
+typedef EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA EFI_MISC_SYSTEM_SLOT_DESIGNATION;
+typedef EFI_MISC_ONBOARD_DEVICE_DATA EFI_MISC_ONBOARD_DEVICE;
+typedef EFI_MISC_PORTING_DEVICE_TYPE_DATA EFI_MISC_ONBOARD_DEVICE_TYPE_DATA;
+typedef EFI_MISC_OEM_STRING_DATA EFI_MISC_OEM_STRING;
+typedef EFI_MISC_SYSTEM_OPTION_STRING_DATA EFI_MISC_SYSTEM_OPTION_STRING;
+typedef EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES;
+typedef EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA EFI_MISC_SYSTEM_LANGUAGE_STRING;
+typedef EFI_MISC_SYSTEM_EVENT_LOG_DATA EFI_MISC_SYSTEM_EVENT_LOG;
+typedef EFI_MISC_BIS_ENTRY_POINT_DATA EFI_MISC_BIS_ENTRY_POINT;
+typedef EFI_MISC_BOOT_INFORMATION_STATUS_DATA EFI_MISC_BOOT_INFORMATION_STATUS;
+typedef EFI_MISC_SYSTEM_POWER_SUPPLY_DATA EFI_MISC_SYSTEM_POWER_SUPPLY;
+typedef EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION;
+
+typedef union {
+ EFI_MISC_LAST_PCI_BUS_DATA LastPciBus;
+ EFI_MISC_BIOS_VENDOR_DATA MiscBiosVendor;
+ EFI_MISC_SYSTEM_MANUFACTURER_DATA MiscSystemManufacturer;
+ EFI_MISC_BASE_BOARD_MANUFACTURER_DATA MiscBaseBoardManufacturer;
+ EFI_MISC_CHASSIS_MANUFACTURER_DATA MiscChassisManufacturer;
+ EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA MiscPortInternalConnectorDesignator;
+ EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA MiscSystemSlotDesignation;
+ EFI_MISC_ONBOARD_DEVICE_DATA MiscOnboardDevice;
+ EFI_MISC_OEM_STRING_DATA MiscOemString;
+ EFI_MISC_SYSTEM_OPTION_STRING_DATA MiscOptionString;
+ EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA NumberOfInstallableLanguages;
+ EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA MiscSystemLanguageString;
+ EFI_MISC_SYSTEM_EVENT_LOG_DATA MiscSystemEventLog;
+ EFI_MISC_GROUP_NAME_DATA MiscGroupNameData;
+ EFI_MISC_GROUP_ITEM_SET_DATA MiscGroupItemSetData;
+ EFI_MISC_PORTING_DEVICE_TYPE_DATA MiscPortingDeviceTypeData;
+ EFI_MISC_RESET_CAPABILITIES_DATA MiscResetCapablilitiesData;
+ EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA MiscHardwareSecuritySettingsData;
+ EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA MiscScheduledPowerOnMonthData;
+ EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA MiscVoltagePorbeDescriptionData;
+ EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA MiscCoolingDeviceTempLinkData;
+ EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA MiscTemperatureProbeDescriptionData;
+ EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA MiscElectricalCurrentProbeDescriptionData;
+ EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA
+ MiscRemoteAccessManufacturerDescriptionData;
+ EFI_MISC_BIS_ENTRY_POINT_DATA MiscBisEntryPoint;
+ EFI_MISC_BOOT_INFORMATION_STATUS_DATA MiscBootInformationStatus;
+ EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA MiscMangementDeviceDescriptionData;
+ EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA
+ MiscmangementDeviceComponentDescriptionData;
+ EFI_MISC_IPMI_INTERFACE_TYPE_DATA MiscIpmiInterfaceTypeData;
+ EFI_MISC_SYSTEM_POWER_SUPPLY_DATA MiscPowerSupplyInfo;
+ EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA MiscSmbiosStructEncapsulation;
+} EFI_MISC_SUBCLASS_RECORDS;
+
+//
+//
+//
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER Header;
+ EFI_MISC_SUBCLASS_RECORDS Record;
+} EFI_MISC_SUBCLASS_DRIVER_DATA;
+
+#pragma pack()
+
+//
+// Sub Class Header type1
+//
+
+#define EFI_SUBCLASS_INSTANCE_RESERVED 0
+#define EFI_SUBCLASS_INSTANCE_NON_APPLICABLE 0xFFFF //16 bit
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Common/FrameworkDxeCis.h b/IntelFrameworkPkg/Include/Common/FrameworkDxeCis.h new file mode 100644 index 0000000000..93e36399fa --- /dev/null +++ b/IntelFrameworkPkg/Include/Common/FrameworkDxeCis.h @@ -0,0 +1,68 @@ +/** @file
+ Include file that supportes Framework extension to the EFI 1.10 spec.
+
+ This include file must only contain things defined in the Framework
+ specifications. If a code construct is defined in the Framework specification
+ it must be included by this include file.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkDxeCis.h
+
+**/
+
+#ifndef _FRAMEWORK_DXE_CIS_H_
+#define _FRAMEWORK_DXE_CIS_H_
+
+#include <PiDxe.h>
+
+typedef struct {
+ EFI_TABLE_HEADER Hdr;
+
+ //
+ // Time services
+ //
+ EFI_GET_TIME GetTime;
+ EFI_SET_TIME SetTime;
+ EFI_GET_WAKEUP_TIME GetWakeupTime;
+ EFI_SET_WAKEUP_TIME SetWakeupTime;
+
+ //
+ // Virtual memory services
+ //
+ EFI_SET_VIRTUAL_ADDRESS_MAP SetVirtualAddressMap;
+ EFI_CONVERT_POINTER ConvertPointer;
+
+ //
+ // Variable services
+ //
+ EFI_GET_VARIABLE GetVariable;
+ EFI_GET_NEXT_VARIABLE_NAME GetNextVariableName;
+ EFI_SET_VARIABLE SetVariable;
+
+ //
+ // Misc
+ //
+ EFI_GET_NEXT_HIGH_MONO_COUNT GetNextHighMonotonicCount;
+ EFI_RESET_SYSTEM ResetSystem;
+
+ //
+ // Framework extension to EFI 1.10 runtime table
+ // It was moved to a protocol to not conflict with UEFI 2.0
+ //
+ EFI_REPORT_STATUS_CODE ReportStatusCode;
+} FRAMEWORK_EFI_RUNTIME_SERVICES;
+
+#define EFI_EVENT_RUNTIME_CONTEXT 0x20000000
+#define EFI_EVENT_NOTIFY_SIGNAL_ALL 0x00000400
+#define EFI_EVENT_SIGNAL_READY_TO_BOOT 0x00000203
+#define EFI_EVENT_SIGNAL_LEGACY_BOOT 0x00000204
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Common/FrameworkFirmwareFileSystem.h b/IntelFrameworkPkg/Include/Common/FrameworkFirmwareFileSystem.h new file mode 100644 index 0000000000..c5868e067e --- /dev/null +++ b/IntelFrameworkPkg/Include/Common/FrameworkFirmwareFileSystem.h @@ -0,0 +1,31 @@ +/** @file
+ This file defines the data structures that comprise the FFS file system.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkFirmwareFileSystem.h
+
+ @par Revision Reference:
+ These definitions are from Firmware File System Spec 0.9 but not in PI specs.
+
+**/
+
+#ifndef _FRAMEWORK_FIRMWARE_FILE_SYSTEM_H_
+#define _FRAMEWORK_FIRMWARE_FILE_SYSTEM_H_
+
+#include <PiFirmwareFileSystem.h>
+
+typedef UINT16 EFI_FFS_FILE_TAIL;
+
+#define FFS_ATTRIB_TAIL_PRESENT 0x01
+#define FFS_ATTRIB_RECOVERY 0x02
+#define FFS_ATTRIB_HEADER_EXTENSION 0x04
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Common/FrameworkHob.h b/IntelFrameworkPkg/Include/Common/FrameworkHob.h new file mode 100644 index 0000000000..346c9543ff --- /dev/null +++ b/IntelFrameworkPkg/Include/Common/FrameworkHob.h @@ -0,0 +1,36 @@ +/** @file
+ This file defines the data structures per HOB specification v0.9.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkFirmwareFileSystem.h
+
+ @par Revision Reference:
+ These definitions are from HOB Spec 0.9 but not adopted by PI specs.
+
+**/
+
+#ifndef _FRAMEWORK_HOB_H_
+#define _FRAMEWORK_HOB_H_
+
+#include <PiHob.h>
+
+//
+// Capsule volume HOB -- identical to a firmware volume
+//
+#define EFI_HOB_TYPE_CV 0x0008
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ UINT64 Length;
+} EFI_HOB_CAPSULE_VOLUME;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Common/FrameworkLegacy16.h b/IntelFrameworkPkg/Include/Common/FrameworkLegacy16.h new file mode 100644 index 0000000000..ff7f2c016f --- /dev/null +++ b/IntelFrameworkPkg/Include/Common/FrameworkLegacy16.h @@ -0,0 +1,425 @@ +/** @file
+ API between 16-bit Legacy BIOS and EFI
+
+ We need to figure out what the 16-bit code is going to use to
+ represent these data structures. Is a pointer SEG:OFF or 32-bit...
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkLegacy16.h
+
+ @par Revision Reference:
+ These definitions are from Compatibility Support Module Spec Version 0.96.
+
+**/
+
+#ifndef _FRAMEWORK_LEGACY_16_H_
+#define _FRAMEWORK_LEGACY_16_H_
+
+#include <Base.h>
+
+//
+// All structures defined in this header file are packed on byte boundary
+//
+#pragma pack(1)
+
+///////////////////////////////////////////////////////////////////////////////
+// EFI_COMPATIBILITY16_TABLE is located at a 16-byte boundary starting with the
+// signature "$EFI"
+///////////////////////////////////////////////////////////////////////////////
+
+#define EFI_COMPATIBILITY16_TABLE_SIGNATURE EFI_SIGNATURE_32('$', 'E', 'F', 'I')
+
+typedef struct {
+ UINT32 Signature; // "$EFI"
+ UINT8 TableChecksum;
+ UINT8 TableLength;
+ UINT8 EfiMajorRevision;
+ UINT8 EfiMinorRevision;
+ UINT8 TableMajorRevision;
+ UINT8 TableMinorRevision;
+ UINT16 Reserved;
+ UINT16 Compatibility16CallSegment;
+ UINT16 Compatibility16CallOffset;
+ UINT16 PnPInstallationCheckSegment;
+ UINT16 PnPInstallationCheckOffset;
+ UINT32 EfiSystemTable; // The physical address of EFI_SYSTEM_TABLE
+ UINT32 OemIdStringPointer;
+ UINT32 AcpiRsdPtrPointer;
+ UINT16 OemRevision;
+ UINT32 E820Pointer;
+ UINT32 E820Length;
+ UINT32 IrqRoutingTablePointer;
+ UINT32 IrqRoutingTableLength;
+ UINT32 MpTablePtr;
+ UINT32 MpTableLength;
+ UINT16 OemIntSegment;
+ UINT16 OemIntOffset;
+ UINT16 Oem32Segment;
+ UINT16 Oem32Offset;
+ UINT16 Oem16Segment;
+ UINT16 Oem16Offset;
+ UINT16 TpmSegment;
+ UINT16 TpmOffset;
+ UINT32 IbvPointer;
+ UINT32 PciExpressBase;
+ UINT8 LastPciBus;
+} EFI_COMPATIBILITY16_TABLE;
+
+///////////////////////////////////////////////////////////////////////////////
+// Functions provided by the CSM binary
+///////////////////////////////////////////////////////////////////////////////
+typedef enum {
+ Legacy16InitializeYourself = 0x0000,
+ Legacy16UpdateBbs = 0x0001,
+ Legacy16PrepareToBoot = 0x0002,
+ Legacy16Boot = 0x0003,
+ Legacy16RetrieveLastBootDevice= 0x0004,
+ Legacy16DispatchOprom = 0x0005,
+ Legacy16GetTableAddress = 0x0006,
+ Legacy16SetKeyboardLeds = 0x0007,
+ Legacy16InstallPciHandler = 0x0008
+} EFI_COMPATIBILITY_FUNCTIONS;
+
+///////////////////////////////////////////////////////////////////////////////
+// EFI_TO_COMPATIBILITY16_INIT_TABLE
+///////////////////////////////////////////////////////////////////////////////
+typedef struct {
+ UINT32 BiosLessThan1MB;
+ UINT32 HiPmmMemory;
+ UINT32 HiPmmMemorySizeInBytes;
+ UINT16 ReverseThunkCallSegment;
+ UINT16 ReverseThunkCallOffset;
+ UINT32 NumberE820Entries;
+ UINT32 OsMemoryAbove1Mb;
+ UINT32 ThunkStart;
+ UINT32 ThunkSizeInBytes;
+ UINT32 LowPmmMemory;
+ UINT32 LowPmmMemorySizeInBytes;
+} EFI_TO_COMPATIBILITY16_INIT_TABLE;
+
+///////////////////////////////////////////////////////////////////////////////
+// EFI_TO_COMPATIBILITY16_BOOT_TABLE
+///////////////////////////////////////////////////////////////////////////////
+
+//
+// DEVICE_PRODUCER_SERIAL & its modes
+//
+typedef struct {
+ UINT16 Address;
+ UINT8 Irq;
+ SERIAL_MODE Mode;
+} DEVICE_PRODUCER_SERIAL;
+
+#define DEVICE_SERIAL_MODE_NORMAL 0x00
+#define DEVICE_SERIAL_MODE_IRDA 0x01
+#define DEVICE_SERIAL_MODE_ASK_IR 0x02
+#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00
+#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10
+
+//
+// DEVICE_PRODUCER_PARALLEL & its modes
+//
+typedef struct {
+ UINT16 Address;
+ UINT8 Irq;
+ UINT8 Dma;
+ PARALLEL_MODE Mode;
+} DEVICE_PRODUCER_PARALLEL;
+
+#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00
+#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01
+#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02
+#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03
+
+//
+// DEVICE_PRODUCER_FLOPPY
+//
+typedef struct {
+ UINT16 Address;
+ UINT8 Irq;
+ UINT8 Dma;
+ UINT8 NumberOfFloppy;
+} DEVICE_PRODUCER_FLOPPY;
+
+//
+// LEGACY_DEVICE_FLAGS
+//
+typedef struct {
+ UINT32 A20Kybd : 1;
+ UINT32 A20Port90 : 1;
+ UINT32 Reserved : 30;
+} LEGACY_DEVICE_FLAGS;
+
+//
+// DEVICE_PRODUCER_DATA_HEADER
+//
+typedef struct {
+ DEVICE_PRODUCER_SERIAL Serial[4];
+ DEVICE_PRODUCER_PARALLEL Parallel[3];
+ DEVICE_PRODUCER_FLOPPY Floppy;
+ UINT8 MousePresent;
+ LEGACY_DEVICE_FLAGS Flags;
+} DEVICE_PRODUCER_DATA_HEADER;
+
+//
+// ATAPI_IDENTIFY
+//
+typedef struct {
+ UINT16 Raw[256];
+} ATAPI_IDENTIFY;
+
+//
+// HDD_INFO & its status
+//
+typedef struct {
+ UINT16 Status;
+ UINT32 Bus;
+ UINT32 Device;
+ UINT32 Function;
+ UINT16 CommandBaseAddress;
+ UINT16 ControlBaseAddress;
+ UINT16 BusMasterAddress;
+ UINT8 HddIrq;
+ ATAPI_IDENTIFY IdentifyDrive[2];
+} HDD_INFO;
+
+#define HDD_PRIMARY 0x01
+#define HDD_SECONDARY 0x02
+#define HDD_MASTER_ATAPI_CDROM 0x04
+#define HDD_SLAVE_ATAPI_CDROM 0x08
+#define HDD_MASTER_IDE 0x20
+#define HDD_SLAVE_IDE 0x40
+#define HDD_MASTER_ATAPI_ZIPDISK 0x10
+#define HDD_SLAVE_ATAPI_ZIPDISK 0x80
+
+//
+// BBS_STATUS_FLAGS
+//
+typedef struct {
+ UINT16 OldPosition : 4;
+ UINT16 Reserved1 : 4;
+ UINT16 Enabled : 1;
+ UINT16 Failed : 1;
+ UINT16 MediaPresent : 2;
+ UINT16 Reserved2 : 4;
+} BBS_STATUS_FLAGS;
+
+//
+// BBS_TABLE, device type values & boot priority values
+//
+typedef struct {
+ UINT16 BootPriority;
+ UINT32 Bus;
+ UINT32 Device;
+ UINT32 Function;
+ UINT8 Class;
+ UINT8 SubClass;
+ UINT16 MfgStringOffset;
+ UINT16 MfgStringSegment;
+ UINT16 DeviceType;
+ BBS_STATUS_FLAGS StatusFlags;
+ UINT16 BootHandlerOffset;
+ UINT16 BootHandlerSegment;
+ UINT16 DescStringOffset;
+ UINT16 DescStringSegment;
+ UINT32 InitPerReserved;
+ UINT32 AdditionalIrq13Handler;
+ UINT32 AdditionalIrq18Handler;
+ UINT32 AdditionalIrq19Handler;
+ UINT32 AdditionalIrq40Handler;
+ UINT8 AssignedDriveNumber;
+ UINT32 AdditionalIrq41Handler;
+ UINT32 AdditionalIrq46Handler;
+ UINT32 IBV1;
+ UINT32 IBV2;
+} BBS_TABLE;
+
+#define BBS_FLOPPY 0x01
+#define BBS_HARDDISK 0x02
+#define BBS_CDROM 0x03
+#define BBS_PCMCIA 0x04
+#define BBS_USB 0x05
+#define BBS_EMBED_NETWORK 0x06
+#define BBS_BEV_DEVICE 0x80
+#define BBS_UNKNOWN 0xff
+
+#define BBS_DO_NOT_BOOT_FROM 0xFFFC
+#define BBS_LOWEST_PRIORITY 0xFFFD
+#define BBS_UNPRIORITIZED_ENTRY 0xFFFE
+#define BBS_IGNORE_ENTRY 0xFFFF
+
+//
+// SMM_ATTRIBUTES & relating type, port and data size constants
+//
+typedef struct {
+ UINT16 Type : 3;
+ UINT16 PortGranularity : 3;
+ UINT16 DataGranularity : 3;
+ UINT16 Reserved : 7;
+} SMM_ATTRIBUTES;
+
+#define STANDARD_IO 0x00
+#define STANDARD_MEMORY 0x01
+
+#define PORT_SIZE_8 0x00
+#define PORT_SIZE_16 0x01
+#define PORT_SIZE_32 0x02
+#define PORT_SIZE_64 0x03
+
+#define DATA_SIZE_8 0x00
+#define DATA_SIZE_16 0x01
+#define DATA_SIZE_32 0x02
+#define DATA_SIZE_64 0x03
+
+//
+// SMM_FUNCTION & relating constants
+//
+typedef struct {
+ UINT16 Function : 15;
+ UINT16 Owner : 1;
+} SMM_FUNCTION;
+
+#define INT15_D042 0x0000
+#define GET_USB_BOOT_INFO 0x0001
+#define DMI_PNP_50_57 0x0002
+
+#define STANDARD_OWNER 0x0
+#define OEM_OWNER 0x1
+
+//
+// SMM_ENTRY
+//
+// This structure assumes both port and data sizes are 1. SmmAttribute must be
+// properly to reflect that assumption.
+//
+typedef struct {
+ SMM_ATTRIBUTES SmmAttributes;
+ SMM_FUNCTION SmmFunction;
+ UINT8 SmmPort;
+ UINT8 SmmData;
+} SMM_ENTRY;
+
+//
+// SMM_TABLE
+//
+typedef struct {
+ UINT16 NumSmmEntries;
+ SMM_ENTRY SmmEntry;
+} SMM_TABLE;
+
+//
+// UDC_ATTRIBUTES
+//
+typedef struct {
+ UINT8 DirectoryServiceValidity : 1;
+ UINT8 RabcaUsedFlag : 1;
+ UINT8 ExecuteHddDiagnosticsFlag : 1;
+ UINT8 Reserved : 5;
+} UDC_ATTRIBUTES;
+
+//
+// UD_TABLE
+//
+typedef struct {
+ UDC_ATTRIBUTES Attributes;
+ UINT8 DeviceNumber;
+ UINT8 BbsTableEntryNumberForParentDevice;
+ UINT8 BbsTableEntryNumberForBoot;
+ UINT8 BbsTableEntryNumberForHddDiag;
+ UINT8 BeerData[128];
+ UINT8 ServiceAreaData[64];
+} UD_TABLE;
+
+//
+// EFI_TO_COMPATIBILITY16_BOOT_TABLE
+//
+#define EFI_TO_LEGACY_MAJOR_VERSION 0x02
+#define EFI_TO_LEGACY_MINOR_VERSION 0x00
+#define MAX_IDE_CONTROLLER 8
+
+typedef struct {
+ UINT16 MajorVersion;
+ UINT16 MinorVersion;
+ UINT32 AcpiTable; // 4 GB range
+ UINT32 SmbiosTable; // 4 GB range
+ UINT32 SmbiosTableLength;
+
+ //
+ // Legacy SIO state
+ //
+ DEVICE_PRODUCER_DATA_HEADER SioData;
+
+ UINT16 DevicePathType;
+ UINT16 PciIrqMask;
+ UINT32 NumberE820Entries;
+
+ //
+ // Controller & Drive Identify[2] per controller information
+ //
+ HDD_INFO HddInfo[MAX_IDE_CONTROLLER];
+
+ UINT32 NumberBbsEntries;
+ UINT32 BbsTable;
+ UINT32 SmmTable;
+ UINT32 OsMemoryAbove1Mb;
+ UINT32 UnconventionalDeviceTable;
+} EFI_TO_COMPATIBILITY16_BOOT_TABLE;
+
+///////////////////////////////////////////////////////////////////////////////
+// EFI_DISPATCH_OPROM_TABLE
+///////////////////////////////////////////////////////////////////////////////
+
+typedef struct {
+ UINT16 PnPInstallationCheckSegment;
+ UINT16 PnPInstallationCheckOffset;
+ UINT16 OpromSegment;
+ UINT8 PciBus;
+ UINT8 PciDeviceFunction;
+ UINT8 NumberBbsEntries;
+ VOID *BbsTablePointer; /// @bug: variable size on 32/64-bit systems.
+} EFI_DISPATCH_OPROM_TABLE;
+
+///////////////////////////////////////////////////////////////////////////////
+// EFI_LEGACY_INSTALL_PCI_HANDLER
+///////////////////////////////////////////////////////////////////////////////
+typedef struct {
+ UINT8 PciBus;
+ UINT8 PciDeviceFun;
+ UINT8 PciSegment;
+ UINT8 PciClass;
+ UINT8 PciSubclass;
+ UINT8 PciInterface;
+
+ //
+ // Primary section
+ //
+ UINT8 PrimaryIrq;
+ UINT8 PrimaryReserved;
+ UINT16 PrimaryControl;
+ UINT16 PrimaryBase;
+ UINT16 PrimaryBusMaster;
+
+ //
+ // Secondary Section
+ //
+ UINT8 SecondaryIrq;
+ UINT8 SecondaryReserved;
+ UINT16 SecondaryControl;
+ UINT16 SecondaryBase;
+ UINT16 SecondaryBusMaster;
+} EFI_LEGACY_INSTALL_PCI_HANDLER;
+
+//
+// Restore default pack value
+//
+#pragma pack()
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Common/FrameworkSmmCis.h b/IntelFrameworkPkg/Include/Common/FrameworkSmmCis.h new file mode 100644 index 0000000000..695a6a16c6 --- /dev/null +++ b/IntelFrameworkPkg/Include/Common/FrameworkSmmCis.h @@ -0,0 +1,480 @@ +/** @file
+ Include file matches things in the Smm CIS spec.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkSmmCis.h
+
+ @par Revision Reference:
+ Version 0.9.
+
+**/
+
+#ifndef _FRAMEWORK_SMM_CIS_H_
+#define _FRAMEWORK_SMM_CIS_H_
+
+#include <PiDxe.h>
+
+#define EFI_SMM_CPU_IO_GUID \
+ { \
+ 0x5f439a0b, 0x45d8, 0x4682, {0xa4, 0xf4, 0xf0, 0x57, 0x6b, 0x51, 0x34, 0x41 } \
+ }
+
+typedef struct _EFI_SMM_SYSTEM_TABLE EFI_SMM_SYSTEM_TABLE;
+typedef struct _EFI_SMM_CPU_IO_INTERFACE EFI_SMM_CPU_IO_INTERFACE;
+
+
+//
+// SMM Base specification constant and types
+//
+#define SMM_SMST_SIGNATURE EFI_SIGNATURE_32 ('S', 'M', 'S', 'T')
+#define EFI_SMM_SYSTEM_TABLE_REVISION (0 << 16) | (0x09)
+
+//
+// *******************************************************
+// EFI_SMM_IO_WIDTH
+// *******************************************************
+//
+typedef enum {
+ SMM_IO_UINT8 = 0,
+ SMM_IO_UINT16 = 1,
+ SMM_IO_UINT32 = 2,
+ SMM_IO_UINT64 = 3
+} EFI_SMM_IO_WIDTH;
+
+/**
+ Provides the basic memory and I/O interfaces that are used to
+ abstract accesses to devices.
+
+ @param This The EFI_SMM_CPU_IO_INTERFACE instance.
+ @param Width Signifies the width of the I/O operations.
+ @param Address The base address of the I/O operations.
+ @param Count The number of I/O operations to perform.
+ @param Buffer For read operations, the destination buffer to store the results.
+ For write operations, the source buffer from which to write data.
+
+ @retval EFI_SUCCESS The data was read from or written to the device.
+ @retval EFI_UNSUPPORTED The Address is not valid for this system.
+ @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CPU_IO) (
+ IN EFI_SMM_CPU_IO_INTERFACE *This,
+ IN EFI_SMM_IO_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
+ );
+
+typedef struct {
+ EFI_SMM_CPU_IO Read;
+ EFI_SMM_CPU_IO Write;
+} EFI_SMM_IO_ACCESS;
+
+struct _EFI_SMM_CPU_IO_INTERFACE {
+ EFI_SMM_IO_ACCESS Mem;
+ EFI_SMM_IO_ACCESS Io;
+};
+
+/**
+ Allocates pool memory from SMRAM for IA-32 or runtime memory for
+ the Itanium processor family.
+
+ @param PoolType The type of pool to allocate.The only supported type is EfiRuntimeServicesData
+ @param Size The number of bytes to allocate from the pool.
+ @param Buffer A pointer to a pointer to the allocated buffer if the call
+ succeeds; undefined otherwise.
+
+ @retval EFI_SUCCESS The requested number of bytes was allocated.
+ @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated.
+ @retval EFI_UNSUPPORTED In runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_ALLOCATE_POOL) (
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN Size,
+ OUT VOID **Buffer
+ );
+
+/**
+ Returns pool memory to the system.
+
+ @param Buffer Pointer to the buffer to free.
+
+ @retval EFI_SUCCESS The memory was returned to the system.
+ @retval EFI_INVALID_PARAMETER Buffer was invalid.
+ @retval EFI_UNSUPPORTED In runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_FREE_POOL) (
+ IN VOID *Buffer
+ );
+
+/**
+ Allocates memory pages from the system.
+
+ @param Type The type of allocation to perform.
+ @param MemoryType The only supported type is EfiRuntimeServicesData
+ @param NumberofPages The number of contiguous 4 KB pages to allocate
+ @param Memory Pointer to a physical address. On input, the way in which
+ the address is used depends on the value of Type. On output, the address
+ is set to the base of the page range that was allocated.
+
+ @retval EFI_SUCCESS The requested pages were allocated.
+ @retval EFI_OUT_OF_RESOURCES The pages requested could not be allocated.
+ @retval EFI_NOT_FOUND The requested pages could not be found.
+ @retval EFI_INVALID_PARAMETER Type is not AllocateAnyPages or AllocateMaxAddress
+ or AllocateAddress. Or MemoryType is in the range EfiMaxMemoryType..0x7FFFFFFF.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_ALLOCATE_PAGES) (
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN NumberOfPages,
+ OUT EFI_PHYSICAL_ADDRESS *Memory
+ );
+
+/**
+ Frees memory pages for the system.
+
+ @param Memory The base physical address of the pages to be freed
+ @param NumberOfPages The number of contiguous 4 KB pages to free.
+
+ @retval EFI_SUCCESS The requested memory pages were freed.
+ @retval EFI_INVALID_PARAMETER Memory is not a page-aligned address or NumberOfPages is invalid.
+ @retval EFI_NOT_FOUND The requested memory pages were not allocated with SmmAllocatePages().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_FREE_PAGES) (
+ IN EFI_PHYSICAL_ADDRESS Memory,
+ IN UINTN NumberOfPages
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_STARTUP_THIS_AP) (
+ IN EFI_AP_PROCEDURE Procedure,
+ IN UINTN CpuNumber,
+ IN OUT VOID *ProcArguments OPTIONAL
+ );
+
+typedef struct {
+ UINT8 Reserved1[248];
+ UINT32 SMBASE;
+ UINT32 SMMRevId;
+ UINT16 IORestart;
+ UINT16 AutoHALTRestart;
+ UINT8 Reserved2[164];
+ UINT32 ES;
+ UINT32 CS;
+ UINT32 SS;
+ UINT32 DS;
+ UINT32 FS;
+ UINT32 GS;
+ UINT32 LDTBase;
+ UINT32 TR;
+ UINT32 DR7;
+ UINT32 DR6;
+ UINT32 EAX;
+ UINT32 ECX;
+ UINT32 EDX;
+ UINT32 EBX;
+ UINT32 ESP;
+ UINT32 EBP;
+ UINT32 ESI;
+ UINT32 EDI;
+ UINT32 EIP;
+ UINT32 EFLAGS;
+ UINT32 CR3;
+ UINT32 CR0;
+} EFI_SMI_CPU_SAVE_STATE;
+
+typedef struct {
+ UINT64 reserved;
+ UINT64 r1;
+ UINT64 r2;
+ UINT64 r3;
+ UINT64 r4;
+ UINT64 r5;
+ UINT64 r6;
+ UINT64 r7;
+ UINT64 r8;
+ UINT64 r9;
+ UINT64 r10;
+ UINT64 r11;
+ UINT64 r12;
+ UINT64 r13;
+ UINT64 r14;
+ UINT64 r15;
+ UINT64 r16;
+ UINT64 r17;
+ UINT64 r18;
+ UINT64 r19;
+ UINT64 r20;
+ UINT64 r21;
+ UINT64 r22;
+ UINT64 r23;
+ UINT64 r24;
+ UINT64 r25;
+ UINT64 r26;
+ UINT64 r27;
+ UINT64 r28;
+ UINT64 r29;
+ UINT64 r30;
+ UINT64 r31;
+
+ UINT64 pr;
+
+ UINT64 b0;
+ UINT64 b1;
+ UINT64 b2;
+ UINT64 b3;
+ UINT64 b4;
+ UINT64 b5;
+ UINT64 b6;
+ UINT64 b7;
+
+ // application registers
+ UINT64 ar_rsc;
+ UINT64 ar_bsp;
+ UINT64 ar_bspstore;
+ UINT64 ar_rnat;
+
+ UINT64 ar_fcr;
+
+ UINT64 ar_eflag;
+ UINT64 ar_csd;
+ UINT64 ar_ssd;
+ UINT64 ar_cflg;
+ UINT64 ar_fsr;
+ UINT64 ar_fir;
+ UINT64 ar_fdr;
+
+ UINT64 ar_ccv;
+
+ UINT64 ar_unat;
+
+ UINT64 ar_fpsr;
+
+ UINT64 ar_pfs;
+ UINT64 ar_lc;
+ UINT64 ar_ec;
+
+ // control registers
+ UINT64 cr_dcr;
+ UINT64 cr_itm;
+ UINT64 cr_iva;
+ UINT64 cr_pta;
+ UINT64 cr_ipsr;
+ UINT64 cr_isr;
+ UINT64 cr_iip;
+ UINT64 cr_ifa;
+ UINT64 cr_itir;
+ UINT64 cr_iipa;
+ UINT64 cr_ifs;
+ UINT64 cr_iim;
+ UINT64 cr_iha;
+
+ // debug registers
+ UINT64 dbr0;
+ UINT64 dbr1;
+ UINT64 dbr2;
+ UINT64 dbr3;
+ UINT64 dbr4;
+ UINT64 dbr5;
+ UINT64 dbr6;
+ UINT64 dbr7;
+
+ UINT64 ibr0;
+ UINT64 ibr1;
+ UINT64 ibr2;
+ UINT64 ibr3;
+ UINT64 ibr4;
+ UINT64 ibr5;
+ UINT64 ibr6;
+ UINT64 ibr7;
+
+ // virtual registers
+ UINT64 int_nat; // nat bits for R1-R31
+
+} EFI_PMI_SYSTEM_CONTEXT;
+
+typedef union {
+ EFI_SMI_CPU_SAVE_STATE Ia32SaveState;
+ EFI_PMI_SYSTEM_CONTEXT ItaniumSaveState;
+} EFI_SMM_CPU_SAVE_STATE;
+
+typedef struct {
+ UINT16 Fcw;
+ UINT16 Fsw;
+ UINT16 Ftw;
+ UINT16 Opcode;
+ UINT32 Eip;
+ UINT16 Cs;
+ UINT16 Rsvd1;
+ UINT32 DataOffset;
+ UINT16 Ds;
+ UINT8 Rsvd2[10];
+ UINT8 St0Mm0[10], Rsvd3[6];
+ UINT8 St0Mm1[10], Rsvd4[6];
+ UINT8 St0Mm2[10], Rsvd5[6];
+ UINT8 St0Mm3[10], Rsvd6[6];
+ UINT8 St0Mm4[10], Rsvd7[6];
+ UINT8 St0Mm5[10], Rsvd8[6];
+ UINT8 St0Mm6[10], Rsvd9[6];
+ UINT8 St0Mm7[10], Rsvd10[6];
+ UINT8 Rsvd11[22*16];
+} EFI_SMI_OPTIONAL_FPSAVE_STATE;
+
+typedef struct {
+ UINT64 f2[2];
+ UINT64 f3[2];
+ UINT64 f4[2];
+ UINT64 f5[2];
+ UINT64 f6[2];
+ UINT64 f7[2];
+ UINT64 f8[2];
+ UINT64 f9[2];
+ UINT64 f10[2];
+ UINT64 f11[2];
+ UINT64 f12[2];
+ UINT64 f13[2];
+ UINT64 f14[2];
+ UINT64 f15[2];
+ UINT64 f16[2];
+ UINT64 f17[2];
+ UINT64 f18[2];
+ UINT64 f19[2];
+ UINT64 f20[2];
+ UINT64 f21[2];
+ UINT64 f22[2];
+ UINT64 f23[2];
+ UINT64 f24[2];
+ UINT64 f25[2];
+ UINT64 f26[2];
+ UINT64 f27[2];
+ UINT64 f28[2];
+ UINT64 f29[2];
+ UINT64 f30[2];
+ UINT64 f31[2];
+} EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT;
+
+typedef union {
+ EFI_SMI_OPTIONAL_FPSAVE_STATE Ia32FpSave;
+ EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT ItaniumFpSave;
+} EFI_SMM_FLOATING_POINT_SAVE_STATE;
+
+/**
+ This function is the main entry point for an SMM handler dispatch
+ or communicate-based callback.
+
+ @param SmmImageHandle A unique value returned by the SMM infrastructure
+ in response to registration for a communicate-based callback or dispatch.
+ @param CommunicationBuffer
+ An optional buffer that will be populated
+ by the SMM infrastructure in response to a non-SMM agent (preboot or runtime)
+ invoking the EFI_SMM_BASE_PROTOCOL.Communicate() service.
+ @param SourceSize If CommunicationBuffer is non-NULL, this field
+ indicates the size of the data payload in this buffer.
+
+ @return Status Code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_HANDLER_ENTRY_POINT) (
+ IN EFI_HANDLE SmmImageHandle,
+ IN OUT VOID *CommunicationBuffer OPTIONAL,
+ IN OUT UINTN *SourceSize OPTIONAL
+ );
+
+/**
+ The SmmInstallConfigurationTable() function is used to maintain the list
+ of configuration tables that are stored in the System Management System
+ Table. The list is stored as an array of (GUID, Pointer) pairs. The list
+ must be allocated from pool memory with PoolType set to EfiRuntimeServicesData.
+
+ @param SystemTable A pointer to the SMM System Table.
+ @param Guid A pointer to the GUID for the entry to add, update, or remove.
+ @param Table A pointer to the buffer of the table to add.
+ @param TableSize The size of the table to install.
+
+ @retval EFI_SUCCESS The (Guid, Table) pair was added, updated, or removed.
+ @retval EFI_INVALID_PARAMETER Guid is not valid.
+ @retval EFI_NOT_FOUND An attempt was made to delete a non-existent entry.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_INSTALL_CONFIGURATION_TABLE) (
+ IN EFI_SMM_SYSTEM_TABLE *SystemTable,
+ IN EFI_GUID *Guid,
+ IN VOID *Table,
+ IN UINTN TableSize
+ );
+
+//
+// System Management System Table (SMST)
+//
+struct _EFI_SMM_SYSTEM_TABLE {
+ EFI_TABLE_HEADER Hdr;
+
+ CHAR16 *SmmFirmwareVendor;
+ UINT32 SmmFirmwareRevision;
+
+ EFI_SMM_INSTALL_CONFIGURATION_TABLE SmmInstallConfigurationTable;
+
+ //
+ // I/O Services
+ //
+ EFI_GUID EfiSmmCpuIoGuid;
+ EFI_SMM_CPU_IO_INTERFACE SmmIo;
+
+ //
+ // Runtime memory service
+ //
+ EFI_SMMCORE_ALLOCATE_POOL SmmAllocatePool;
+ EFI_SMMCORE_FREE_POOL SmmFreePool;
+ EFI_SMMCORE_ALLOCATE_PAGES SmmAllocatePages;
+ EFI_SMMCORE_FREE_PAGES SmmFreePages;
+
+ //
+ // MP service
+ //
+ EFI_SMM_STARTUP_THIS_AP SmmStartupThisAp;
+
+ //
+ // CPU information records
+ //
+ UINTN CurrentlyExecutingCpu;
+ UINTN NumberOfCpus;
+ EFI_SMM_CPU_SAVE_STATE *CpuSaveState;
+ EFI_SMM_FLOATING_POINT_SAVE_STATE *CpuOptionalFloatingPointState;
+
+ //
+ // Extensibility table
+ //
+ UINTN NumberOfTableEntries;
+ EFI_CONFIGURATION_TABLE *SmmConfigurationTable;
+};
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Common/FrameworkStatusCode.h b/IntelFrameworkPkg/Include/Common/FrameworkStatusCode.h new file mode 100644 index 0000000000..dccb9510c0 --- /dev/null +++ b/IntelFrameworkPkg/Include/Common/FrameworkStatusCode.h @@ -0,0 +1,904 @@ +/** @file
+ Status Code Definitions, according to Intel Platform Innovation Framework
+ for EFI Status Codes Specification
+
+ The file is divided into sections for ease of use.
+
+<pre>
+ Section: Contents:
+ 1 General Status Code Definitions
+ 2 Class definitions
+ 3 Computing Unit Subclasses, Progress and Error Codes
+ 4 Peripheral Subclasses, Progress and Error Codes.
+ 5 IO Bus Subclasses, Progress and Error Codes.
+ 6 Software Subclasses, Progress and Error Codes.
+ 7 Debug Codes
+</pre>
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: StatusCode.h
+
+ @par Revision Reference:
+ Version 0.92.
+
+**/
+
+#ifndef _FRAMEWORK_STATUS_CODE_H_
+#define _FRAMEWORK_STATUS_CODE_H_
+
+
+//
+// /////////////////////////////////////////////////////////////////////////////
+// Section 1
+////////////////////////////////////////////////////////////////////////////////
+
+//
+// Data Hub Status Code class record definition
+// This structure isn't adopted by PI, so is defined here.
+//
+typedef struct {
+ EFI_STATUS_CODE_TYPE CodeType;
+ EFI_STATUS_CODE_VALUE Value;
+ UINT32 Instance;
+ EFI_GUID CallerId;
+ EFI_STATUS_CODE_DATA Data;
+} DATA_HUB_STATUS_CODE_DATA_RECORD;
+
+//
+// /////////////////////////////////////////////////////////////////////////////
+// Section 2
+///////////////////////////////////////////////////////////////////////////////
+//
+// Class definitions
+// Values of 4-127 are reserved for future use by this
+// specification.
+// Values in the range 127-255 are reserved for OEM use.
+//
+#define EFI_COMPUTING_UNIT 0x00000000
+#define EFI_PERIPHERAL 0x01000000
+#define EFI_IO_BUS 0x02000000
+#define EFI_SOFTWARE 0x03000000
+
+//
+// General partitioning scheme for Progress and Error Codes are
+// 0x0000-0x0FFF - Shared by all sub-classes in a given class
+// 0x1000-0x7FFF - Subclass Specific
+// 0x8000-0xFFFF - OEM specific
+//
+#define EFI_SUBCLASS_SPECIFIC 0x1000
+#define EFI_OEM_SPECIFIC 0x8000
+
+//
+// /////////////////////////////////////////////////////////////////////////////
+// Section 3
+///////////////////////////////////////////////////////////////////////////////
+//
+// Computing Unit Subclass definitions.
+// Values of 8-127 are reserved for future use by this
+// specification.
+// Values of 128-255 are reserved for OEM use.
+//
+#define EFI_COMPUTING_UNIT_UNSPECIFIED (EFI_COMPUTING_UNIT | 0x00000000)
+#define EFI_COMPUTING_UNIT_HOST_PROCESSOR (EFI_COMPUTING_UNIT | 0x00010000)
+#define EFI_COMPUTING_UNIT_FIRMWARE_PROCESSOR (EFI_COMPUTING_UNIT | 0x00020000)
+#define EFI_COMPUTING_UNIT_IO_PROCESSOR (EFI_COMPUTING_UNIT | 0x00030000)
+#define EFI_COMPUTING_UNIT_CACHE (EFI_COMPUTING_UNIT | 0x00040000)
+#define EFI_COMPUTING_UNIT_MEMORY (EFI_COMPUTING_UNIT | 0x00050000)
+#define EFI_COMPUTING_UNIT_CHIPSET (EFI_COMPUTING_UNIT | 0x00060000)
+
+//
+// Computing Unit Class Progress Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_CU_PC_INIT_BEGIN 0x00000000
+#define EFI_CU_PC_INIT_END 0x00000001
+
+//
+// Computing Unit Unspecified Subclass Progress Code definitions.
+//
+//
+// Computing Unit Host Processor Subclass Progress Code definitions.
+//
+#define EFI_CU_HP_PC_POWER_ON_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_HP_PC_CACHE_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_HP_PC_RAM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_HP_PC_MEMORY_CONTROLLER_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_HP_PC_IO_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_HP_PC_BSP_SELECT (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_HP_PC_BSP_RESELECT (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_CU_HP_PC_AP_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_CU_HP_PC_SMM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+
+//
+// Computing Unit Firmware Processor Subclass Progress Code definitions.
+//
+//
+// Computing Unit IO Processor Subclass Progress Code definitions.
+//
+//
+// Computing Unit Cache Subclass Progress Code definitions.
+//
+#define EFI_CU_CACHE_PC_PRESENCE_DETECT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_CACHE_PC_CONFIGURATION (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Computing Unit Memory Subclass Progress Code definitions.
+//
+#define EFI_CU_MEMORY_PC_SPD_READ (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_MEMORY_PC_PRESENCE_DETECT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_MEMORY_PC_TIMING (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_MEMORY_PC_CONFIGURING (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_MEMORY_PC_OPTIMIZING (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_MEMORY_PC_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_MEMORY_PC_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+
+//
+// Computing Unit Chipset Subclass Progress Code definitions.
+//
+//
+// Computing Unit Class Error Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_CU_EC_NON_SPECIFIC 0x00000000
+#define EFI_CU_EC_DISABLED 0x00000001
+#define EFI_CU_EC_NOT_SUPPORTED 0x00000002
+#define EFI_CU_EC_NOT_DETECTED 0x00000003
+#define EFI_CU_EC_NOT_CONFIGURED 0x00000004
+
+//
+// Computing Unit Unspecified Subclass Error Code definitions.
+//
+//
+// Computing Unit Host Processor Subclass Error Code definitions.
+//
+#define EFI_CU_HP_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_HP_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_HP_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_HP_EC_TIMER_EXPIRED (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_HP_EC_SELF_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_HP_EC_INTERNAL (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_HP_EC_THERMAL (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_CU_HP_EC_LOW_VOLTAGE (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_CU_HP_EC_HIGH_VOLTAGE (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_CU_HP_EC_CACHE (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_CU_HP_EC_MICROCODE_UPDATE (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+#define EFI_CU_HP_EC_CORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x0000000B)
+#define EFI_CU_HP_EC_UNCORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x0000000C)
+#define EFI_CU_HP_EC_NO_MICROCODE_UPDATE (EFI_SUBCLASS_SPECIFIC | 0x0000000D)
+
+//
+// Computing Unit Firmware Processor Subclass Error Code definitions.
+//
+#define EFI_CU_FP_EC_HARD_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_FP_EC_SOFT_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_FP_EC_COMM_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+
+//
+// Computing Unit IO Processor Subclass Error Code definitions.
+//
+//
+// Computing Unit Cache Subclass Error Code definitions.
+//
+#define EFI_CU_CACHE_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_CACHE_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_CACHE_EC_INVALID_SIZE (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_CACHE_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+
+//
+// Computing Unit Memory Subclass Error Code definitions.
+//
+#define EFI_CU_MEMORY_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_MEMORY_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_MEMORY_EC_CORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_MEMORY_EC_UNCORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_MEMORY_EC_SPD_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_MEMORY_EC_INVALID_SIZE (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_MEMORY_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_CU_MEMORY_EC_S3_RESUME_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_CU_MEMORY_EC_UPDATE_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_CU_MEMORY_EC_NONE_DETECTED (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_CU_MEMORY_EC_NONE_USEFUL (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+
+//
+// Computing Unit Chipset Subclass Error Code definitions.
+//
+
+///////////////////////////////////////////////////////////////////////////////
+// Section 4
+///////////////////////////////////////////////////////////////////////////////
+//
+// Peripheral Subclass definitions.
+// Values of 12-127 are reserved for future use by this
+// specification.
+// Values of 128-255 are reserved for OEM use.
+//
+#define EFI_PERIPHERAL_UNSPECIFIED (EFI_PERIPHERAL | 0x00000000)
+#define EFI_PERIPHERAL_KEYBOARD (EFI_PERIPHERAL | 0x00010000)
+#define EFI_PERIPHERAL_MOUSE (EFI_PERIPHERAL | 0x00020000)
+#define EFI_PERIPHERAL_LOCAL_CONSOLE (EFI_PERIPHERAL | 0x00030000)
+#define EFI_PERIPHERAL_REMOTE_CONSOLE (EFI_PERIPHERAL | 0x00040000)
+#define EFI_PERIPHERAL_SERIAL_PORT (EFI_PERIPHERAL | 0x00050000)
+#define EFI_PERIPHERAL_PARALLEL_PORT (EFI_PERIPHERAL | 0x00060000)
+#define EFI_PERIPHERAL_FIXED_MEDIA (EFI_PERIPHERAL | 0x00070000)
+#define EFI_PERIPHERAL_REMOVABLE_MEDIA (EFI_PERIPHERAL | 0x00080000)
+#define EFI_PERIPHERAL_AUDIO_INPUT (EFI_PERIPHERAL | 0x00090000)
+#define EFI_PERIPHERAL_AUDIO_OUTPUT (EFI_PERIPHERAL | 0x000A0000)
+#define EFI_PERIPHERAL_LCD_DEVICE (EFI_PERIPHERAL | 0x000B0000)
+#define EFI_PERIPHERAL_NETWORK (EFI_PERIPHERAL | 0x000C0000)
+
+//
+// Peripheral Class Progress Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_P_PC_INIT 0x00000000
+#define EFI_P_PC_RESET 0x00000001
+#define EFI_P_PC_DISABLE 0x00000002
+#define EFI_P_PC_PRESENCE_DETECT 0x00000003
+#define EFI_P_PC_ENABLE 0x00000004
+#define EFI_P_PC_RECONFIG 0x00000005
+#define EFI_P_PC_DETECTED 0x00000006
+
+//
+// Peripheral Class Unspecified Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Keyboard Subclass Progress Code definitions.
+//
+#define EFI_P_KEYBOARD_PC_CLEAR_BUFFER (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_P_KEYBOARD_PC_SELF_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Peripheral Class Mouse Subclass Progress Code definitions.
+//
+#define EFI_P_MOUSE_PC_SELF_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Peripheral Class Local Console Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Remote Console Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Serial Port Subclass Progress Code definitions.
+//
+#define EFI_P_SERIAL_PORT_PC_CLEAR_BUFFER (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Peripheral Class Parallel Port Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Fixed Media Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Removable Media Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Audio Input Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Audio Output Subclass Progress Code definitions.
+//
+//
+// Peripheral Class LCD Device Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Network Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Error Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_P_EC_NON_SPECIFIC 0x00000000
+#define EFI_P_EC_DISABLED 0x00000001
+#define EFI_P_EC_NOT_SUPPORTED 0x00000002
+#define EFI_P_EC_NOT_DETECTED 0x00000003
+#define EFI_P_EC_NOT_CONFIGURED 0x00000004
+#define EFI_P_EC_INTERFACE_ERROR 0x00000005
+#define EFI_P_EC_CONTROLLER_ERROR 0x00000006
+#define EFI_P_EC_INPUT_ERROR 0x00000007
+#define EFI_P_EC_OUTPUT_ERROR 0x00000008
+#define EFI_P_EC_RESOURCE_CONFLICT 0x00000009
+
+//
+// Peripheral Class Unspecified Subclass Error Code definitions.
+//
+//
+// Peripheral Class Keyboard Subclass Error Code definitions.
+//
+#define EFI_P_KEYBOARD_EC_LOCKED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_P_KEYBOARD_EC_STUCK_KEY (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Peripheral Class Mouse Subclass Error Code definitions.
+//
+#define EFI_P_MOUSE_EC_LOCKED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Peripheral Class Local Console Subclass Error Code definitions.
+//
+//
+// Peripheral Class Remote Console Subclass Error Code definitions.
+//
+//
+// Peripheral Class Serial Port Subclass Error Code definitions.
+//
+//
+// Peripheral Class Parallel Port Subclass Error Code definitions.
+//
+//
+// Peripheral Class Fixed Media Subclass Error Code definitions.
+//
+//
+// Peripheral Class Removable Media Subclass Error Code definitions.
+//
+//
+// Peripheral Class Audio Input Subclass Error Code definitions.
+//
+//
+// Peripheral Class Audio Output Subclass Error Code definitions.
+//
+//
+// Peripheral Class LCD Device Subclass Error Code definitions.
+//
+//
+// Peripheral Class Network Subclass Error Code definitions.
+//
+
+///////////////////////////////////////////////////////////////////////////////
+// Section 5
+///////////////////////////////////////////////////////////////////////////////
+//
+// IO Bus Subclass definitions.
+// Values of 14-127 are reserved for future use by this
+// specification.
+// Values of 128-255 are reserved for OEM use.
+//
+#define EFI_IO_BUS_UNSPECIFIED (EFI_IO_BUS | 0x00000000)
+#define EFI_IO_BUS_PCI (EFI_IO_BUS | 0x00010000)
+#define EFI_IO_BUS_USB (EFI_IO_BUS | 0x00020000)
+#define EFI_IO_BUS_IBA (EFI_IO_BUS | 0x00030000)
+#define EFI_IO_BUS_AGP (EFI_IO_BUS | 0x00040000)
+#define EFI_IO_BUS_PC_CARD (EFI_IO_BUS | 0x00050000)
+#define EFI_IO_BUS_LPC (EFI_IO_BUS | 0x00060000)
+#define EFI_IO_BUS_SCSI (EFI_IO_BUS | 0x00070000)
+#define EFI_IO_BUS_ATA_ATAPI (EFI_IO_BUS | 0x00080000)
+#define EFI_IO_BUS_FC (EFI_IO_BUS | 0x00090000)
+#define EFI_IO_BUS_IP_NETWORK (EFI_IO_BUS | 0x000A0000)
+#define EFI_IO_BUS_SMBUS (EFI_IO_BUS | 0x000B0000)
+#define EFI_IO_BUS_I2C (EFI_IO_BUS | 0x000C0000)
+
+//
+// IO Bus Class Progress Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_IOB_PC_INIT 0x00000000
+#define EFI_IOB_PC_RESET 0x00000001
+#define EFI_IOB_PC_DISABLE 0x00000002
+#define EFI_IOB_PC_DETECT 0x00000003
+#define EFI_IOB_PC_ENABLE 0x00000004
+#define EFI_IOB_PC_RECONFIG 0x00000005
+#define EFI_IOB_PC_HOTPLUG 0x00000006
+
+//
+// IO Bus Class Unspecified Subclass Progress Code definitions.
+//
+//
+// IO Bus Class PCI Subclass Progress Code definitions.
+//
+#define EFI_IOB_PCI_PC_BUS_ENUM (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_PCI_PC_RES_ALLOC (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_IOB_PCI_PC_HPC_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+
+//
+// IO Bus Class USB Subclass Progress Code definitions.
+//
+//
+// IO Bus Class IBA Subclass Progress Code definitions.
+//
+//
+// IO Bus Class AGP Subclass Progress Code definitions.
+//
+//
+// IO Bus Class PC Card Subclass Progress Code definitions.
+//
+//
+// IO Bus Class LPC Subclass Progress Code definitions.
+//
+//
+// IO Bus Class SCSI Subclass Progress Code definitions.
+//
+//
+// IO Bus Class ATA/ATAPI Subclass Progress Code definitions.
+//
+#define EFI_IOB_ATA_BUS_SMART_ENABLE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_ATA_BUS_SMART_DISABLE (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+
+//
+// IO Bus Class FC Subclass Progress Code definitions.
+//
+//
+// IO Bus Class IP Network Subclass Progress Code definitions.
+//
+//
+// IO Bus Class SMBUS Subclass Progress Code definitions.
+//
+//
+// IO Bus Class I2C Subclass Progress Code definitions.
+//
+//
+// IO Bus Class Error Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_IOB_EC_NON_SPECIFIC 0x00000000
+#define EFI_IOB_EC_DISABLED 0x00000001
+#define EFI_IOB_EC_NOT_SUPPORTED 0x00000002
+#define EFI_IOB_EC_NOT_DETECTED 0x00000003
+#define EFI_IOB_EC_NOT_CONFIGURED 0x00000004
+#define EFI_IOB_EC_INTERFACE_ERROR 0x00000005
+#define EFI_IOB_EC_CONTROLLER_ERROR 0x00000006
+#define EFI_IOB_EC_READ_ERROR 0x00000007
+#define EFI_IOB_EC_WRITE_ERROR 0x00000008
+#define EFI_IOB_EC_RESOURCE_CONFLICT 0x00000009
+
+//
+// IO Bus Class Unspecified Subclass Error Code definitions.
+//
+//
+// IO Bus Class PCI Subclass Error Code definitions.
+//
+#define EFI_IOB_PCI_EC_PERR (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_PCI_EC_SERR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// IO Bus Class USB Subclass Error Code definitions.
+//
+//
+// IO Bus Class IBA Subclass Error Code definitions.
+//
+//
+// IO Bus Class AGP Subclass Error Code definitions.
+//
+//
+// IO Bus Class PC Card Subclass Error Code definitions.
+//
+//
+// IO Bus Class LPC Subclass Error Code definitions.
+//
+//
+// IO Bus Class SCSI Subclass Error Code definitions.
+//
+//
+// IO Bus Class ATA/ATAPI Subclass Error Code definitions.
+//
+#define EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_ATA_BUS_SMART_DISABLED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// IO Bus Class FC Subclass Error Code definitions.
+//
+//
+// IO Bus Class IP Network Subclass Error Code definitions.
+//
+//
+// IO Bus Class SMBUS Subclass Error Code definitions.
+//
+//
+// IO Bus Class I2C Subclass Error Code definitions.
+//
+
+///////////////////////////////////////////////////////////////////////////////
+// Section 6
+///////////////////////////////////////////////////////////////////////////////
+//
+// Software Subclass definitions.
+// Values of 14-127 are reserved for future use by this
+// specification.
+// Values of 128-255 are reserved for OEM use.
+//
+#define EFI_SOFTWARE_UNSPECIFIED (EFI_SOFTWARE | 0x00000000)
+#define EFI_SOFTWARE_SEC (EFI_SOFTWARE | 0x00010000)
+#define EFI_SOFTWARE_PEI_CORE (EFI_SOFTWARE | 0x00020000)
+#define EFI_SOFTWARE_PEI_MODULE (EFI_SOFTWARE | 0x00030000)
+#define EFI_SOFTWARE_DXE_CORE (EFI_SOFTWARE | 0x00040000)
+#define EFI_SOFTWARE_DXE_BS_DRIVER (EFI_SOFTWARE | 0x00050000)
+#define EFI_SOFTWARE_DXE_RT_DRIVER (EFI_SOFTWARE | 0x00060000)
+#define EFI_SOFTWARE_SMM_DRIVER (EFI_SOFTWARE | 0x00070000)
+#define EFI_SOFTWARE_EFI_APPLICATION (EFI_SOFTWARE | 0x00080000)
+#define EFI_SOFTWARE_EFI_OS_LOADER (EFI_SOFTWARE | 0x00090000)
+#define EFI_SOFTWARE_RT (EFI_SOFTWARE | 0x000A0000)
+#define EFI_SOFTWARE_AL (EFI_SOFTWARE | 0x000B0000)
+#define EFI_SOFTWARE_EBC_EXCEPTION (EFI_SOFTWARE | 0x000C0000)
+#define EFI_SOFTWARE_IA32_EXCEPTION (EFI_SOFTWARE | 0x000D0000)
+#define EFI_SOFTWARE_IPF_EXCEPTION (EFI_SOFTWARE | 0x000E0000)
+#define EFI_SOFTWARE_PEI_SERVICE (EFI_SOFTWARE | 0x000F0000)
+#define EFI_SOFTWARE_EFI_BOOT_SERVICE (EFI_SOFTWARE | 0x00100000)
+#define EFI_SOFTWARE_EFI_RUNTIME_SERVICE (EFI_SOFTWARE | 0x00110000)
+#define EFI_SOFTWARE_EFI_DXE_SERVICE (EFI_SOFTWARE | 0x00120000)
+#define EFI_SOFTWARE_X64_EXCEPTION (EFI_SOFTWARE | 0x00130000)
+
+//
+// Software Class Progress Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_SW_PC_INIT 0x00000000
+#define EFI_SW_PC_LOAD 0x00000001
+#define EFI_SW_PC_INIT_BEGIN 0x00000002
+#define EFI_SW_PC_INIT_END 0x00000003
+#define EFI_SW_PC_AUTHENTICATE_BEGIN 0x00000004
+#define EFI_SW_PC_AUTHENTICATE_END 0x00000005
+#define EFI_SW_PC_INPUT_WAIT 0x00000006
+#define EFI_SW_PC_USER_SETUP 0x00000007
+
+//
+// Software Class Unspecified Subclass Progress Code definitions.
+//
+//
+// Software Class SEC Subclass Progress Code definitions.
+//
+#define EFI_SW_SEC_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_SEC_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Software Class PEI Core Subclass Progress Code definitions.
+//
+#define EFI_SW_PEI_CORE_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PEI_CORE_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_PEI_CORE_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+
+//
+// Software Class PEI Module Subclass Progress Code definitions.
+//
+#define EFI_SW_PEIM_PC_RECOVERY_BEGIN (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PEIM_PC_CAPSULE_LOAD (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_PEIM_PC_CAPSULE_START (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_PEIM_PC_RECOVERY_USER (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_PEIM_PC_RECOVERY_AUTO (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+
+//
+// Software Class DXE Core Subclass Progress Code definitions.
+//
+#define EFI_SW_DXE_CORE_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DXE_CORE_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DXE_CORE_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DXE_CORE_PC_START_DRIVER (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+
+//
+// Software Class DXE BS Driver Subclass Progress Code definitions.
+//
+#define EFI_SW_DXE_BS_PC_LEGACY_OPROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DXE_BS_PC_READY_TO_BOOT_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DXE_BS_PC_LEGACY_BOOT_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DXE_BS_PC_EXIT_BOOT_SERVICES_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_DXE_BS_PC_VIRTUAL_ADDRESS_CHANGE_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_DXE_BS_PC_VERIFYING_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+
+//
+// Software Class DXE RT Driver Subclass Progress Code definitions.
+//
+#define EFI_SW_DXE_RT_PC_S0 (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DXE_RT_PC_S1 (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DXE_RT_PC_S2 (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DXE_RT_PC_S3 (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_DXE_RT_PC_S4 (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_DXE_RT_PC_S5 (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+
+//
+// Software Class SMM Driver Subclass Progress Code definitions.
+//
+//
+// Software Class EFI Application Subclass Progress Code definitions.
+//
+//
+// Software Class EFI OS Loader Subclass Progress Code definitions.
+//
+//
+// Software Class EFI RT Subclass Progress Code definitions.
+//
+#define EFI_SW_RT_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_RT_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_RT_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+
+//
+// Software Class EFI AL Subclass Progress Code definitions.
+//
+#define EFI_SW_AL_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_AL_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Software Class EBC Exception Subclass Progress Code definitions.
+//
+//
+// Software Class IA32 Exception Subclass Progress Code definitions.
+//
+//
+// Software Class X64 Exception Subclass Progress Code definitions.
+//
+//
+// Software Class IPF Exception Subclass Progress Code definitions.
+//
+//
+// Software Class PEI Services Subclass Progress Code definitions.
+//
+#define EFI_SW_PS_PC_INSTALL_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PS_PC_REINSTALL_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_PS_PC_LOCATE_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_PS_PC_NOTIFY_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_PS_PC_GET_BOOT_MODE (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_PS_PC_SET_BOOT_MODE (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_PS_PC_GET_HOB_LIST (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_PS_PC_CREATE_HOB (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_PS_PC_FFS_FIND_NEXT_VOLUME (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_SW_PS_PC_FFS_FIND_NEXT_FILE (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_SW_PS_PC_FFS_FIND_SECTION_DATA (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+#define EFI_SW_PS_PC_INSTALL_PEI_MEMORY (EFI_SUBCLASS_SPECIFIC | 0x0000000B)
+#define EFI_SW_PS_PC_ALLOCATE_PAGES (EFI_SUBCLASS_SPECIFIC | 0x0000000C)
+#define EFI_SW_PS_PC_ALLOCATE_POOL (EFI_SUBCLASS_SPECIFIC | 0x0000000D)
+#define EFI_SW_PS_PC_COPY_MEM (EFI_SUBCLASS_SPECIFIC | 0x0000000E)
+#define EFI_SW_PS_PC_SET_MEM (EFI_SUBCLASS_SPECIFIC | 0x0000000F)
+
+//
+// Software Class EFI Boot Services Subclass Progress Code definitions.
+//
+#define EFI_SW_BS_PC_RAISE_TPL (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_BS_PC_RESTORE_TPL (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_BS_PC_ALLOCATE_PAGES (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_BS_PC_FREE_PAGES (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_BS_PC_GET_MEMORY_MAP (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_BS_PC_ALLOCATE_POOL (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_BS_PC_FREE_POOL (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_BS_PC_CREATE_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_BS_PC_SET_TIMER (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_SW_BS_PC_WAIT_FOR_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_SW_BS_PC_SIGNAL_EVENT (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+#define EFI_SW_BS_PC_CLOSE_EVENT (EFI_SUBCLASS_SPECIFIC | 0x0000000B)
+#define EFI_SW_BS_PC_CHECK_EVENT (EFI_SUBCLASS_SPECIFIC | 0x0000000C)
+#define EFI_SW_BS_PC_INSTALL_PROTOCOL_INTERFACE (EFI_SUBCLASS_SPECIFIC | 0x0000000D)
+#define EFI_SW_BS_PC_REINSTALL_PROTOCOL_INTERFACE (EFI_SUBCLASS_SPECIFIC | 0x0000000E)
+#define EFI_SW_BS_PC_UNINSTALL_PROTOCOL_INTERFACE (EFI_SUBCLASS_SPECIFIC | 0x0000000F)
+#define EFI_SW_BS_PC_HANDLE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000010)
+#define EFI_SW_BS_PC_PC_HANDLE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000011)
+#define EFI_SW_BS_PC_REGISTER_PROTOCOL_NOTIFY (EFI_SUBCLASS_SPECIFIC | 0x00000012)
+#define EFI_SW_BS_PC_LOCATE_HANDLE (EFI_SUBCLASS_SPECIFIC | 0x00000013)
+#define EFI_SW_BS_PC_INSTALL_CONFIGURATION_TABLE (EFI_SUBCLASS_SPECIFIC | 0x00000014)
+#define EFI_SW_BS_PC_LOAD_IMAGE (EFI_SUBCLASS_SPECIFIC | 0x00000015)
+#define EFI_SW_BS_PC_START_IMAGE (EFI_SUBCLASS_SPECIFIC | 0x00000016)
+#define EFI_SW_BS_PC_EXIT (EFI_SUBCLASS_SPECIFIC | 0x00000017)
+#define EFI_SW_BS_PC_UNLOAD_IMAGE (EFI_SUBCLASS_SPECIFIC | 0x00000018)
+#define EFI_SW_BS_PC_EXIT_BOOT_SERVICES (EFI_SUBCLASS_SPECIFIC | 0x00000019)
+#define EFI_SW_BS_PC_GET_NEXT_MONOTONIC_COUNT (EFI_SUBCLASS_SPECIFIC | 0x0000001A)
+#define EFI_SW_BS_PC_STALL (EFI_SUBCLASS_SPECIFIC | 0x0000001B)
+#define EFI_SW_BS_PC_SET_WATCHDOG_TIMER (EFI_SUBCLASS_SPECIFIC | 0x0000001C)
+#define EFI_SW_BS_PC_CONNECT_CONTROLLER (EFI_SUBCLASS_SPECIFIC | 0x0000001D)
+#define EFI_SW_BS_PC_DISCONNECT_CONTROLLER (EFI_SUBCLASS_SPECIFIC | 0x0000001E)
+#define EFI_SW_BS_PC_OPEN_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x0000001F)
+#define EFI_SW_BS_PC_CLOSE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000020)
+#define EFI_SW_BS_PC_OPEN_PROTOCOL_INFORMATION (EFI_SUBCLASS_SPECIFIC | 0x00000021)
+#define EFI_SW_BS_PC_PROTOCOLS_PER_HANDLE (EFI_SUBCLASS_SPECIFIC | 0x00000022)
+#define EFI_SW_BS_PC_LOCATE_HANDLE_BUFFER (EFI_SUBCLASS_SPECIFIC | 0x00000023)
+#define EFI_SW_BS_PC_LOCATE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000024)
+#define EFI_SW_BS_PC_INSTALL_MULTIPLE_INTERFACES (EFI_SUBCLASS_SPECIFIC | 0x00000025)
+#define EFI_SW_BS_PC_UNINSTALL_MULTIPLE_INTERFACES (EFI_SUBCLASS_SPECIFIC | 0x00000026)
+#define EFI_SW_BS_PC_CALCULATE_CRC_32 (EFI_SUBCLASS_SPECIFIC | 0x00000027)
+#define EFI_SW_BS_PC_COPY_MEM (EFI_SUBCLASS_SPECIFIC | 0x00000028)
+#define EFI_SW_BS_PC_SET_MEM (EFI_SUBCLASS_SPECIFIC | 0x00000029)
+
+//
+// Software Class EFI Runtime Services Subclass Progress Code definitions.
+//
+#define EFI_SW_RS_PC_GET_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_RS_PC_SET_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_RS_PC_GET_WAKEUP_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_RS_PC_SET_WAKEUP_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_RS_PC_SET_VIRTUAL_ADDRESS_MAP (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_RS_PC_CONVERT_POINTER (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_RS_PC_GET_VARIABLE (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_RS_PC_GET_NEXT_VARIABLE_NAME (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_RS_PC_SET_VARIABLE (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_SW_RS_PC_GET_NEXT_HIGH_MONOTONIC_COUNT (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_SW_RS_PC_RESET_SYSTEM (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+
+//
+// Software Class EFI DXE Services Subclass Progress Code definitions
+//
+#define EFI_SW_DS_PC_ADD_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DS_PC_ALLOCATE_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DS_PC_FREE_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DS_PC_REMOVE_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_DS_PC_GET_MEMORY_SPACE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_DS_PC_SET_MEMORY_SPACE_ATTRIBUTES (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_DS_PC_GET_MEMORY_SPACE_MAP (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_DS_PC_ADD_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_DS_PC_ALLOCATE_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_SW_DS_PC_FREE_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_SW_DS_PC_REMOVE_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+#define EFI_SW_DS_PC_GET_IO_SPACE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x0000000B)
+#define EFI_SW_DS_PC_GET_IO_SPACE_MAP (EFI_SUBCLASS_SPECIFIC | 0x0000000C)
+#define EFI_SW_DS_PC_DISPATCH (EFI_SUBCLASS_SPECIFIC | 0x0000000D)
+#define EFI_SW_DS_PC_SCHEDULE (EFI_SUBCLASS_SPECIFIC | 0x0000000E)
+#define EFI_SW_DS_PC_TRUST (EFI_SUBCLASS_SPECIFIC | 0x0000000F)
+#define EFI_SW_DS_PC_PROCESS_FIRMWARE_VOLUME (EFI_SUBCLASS_SPECIFIC | 0x00000010)
+
+//
+// Software Class Error Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_SW_EC_NON_SPECIFIC 0x00000000
+#define EFI_SW_EC_LOAD_ERROR 0x00000001
+#define EFI_SW_EC_INVALID_PARAMETER 0x00000002
+#define EFI_SW_EC_UNSUPPORTED 0x00000003
+#define EFI_SW_EC_INVALID_BUFFER 0x00000004
+#define EFI_SW_EC_OUT_OF_RESOURCES 0x00000005
+#define EFI_SW_EC_ABORTED 0x00000006
+#define EFI_SW_EC_ILLEGAL_SOFTWARE_STATE 0x00000007
+#define EFI_SW_EC_ILLEGAL_HARDWARE_STATE 0x00000008
+#define EFI_SW_EC_START_ERROR 0x00000009
+#define EFI_SW_EC_BAD_DATE_TIME 0x0000000A
+#define EFI_SW_EC_CFG_INVALID 0x0000000B
+#define EFI_SW_EC_CFG_CLR_REQUEST 0x0000000C
+#define EFI_SW_EC_CFG_DEFAULT 0x0000000D
+#define EFI_SW_EC_PWD_INVALID 0x0000000E
+#define EFI_SW_EC_PWD_CLR_REQUEST 0x0000000F
+#define EFI_SW_EC_PWD_CLEARED 0x00000010
+#define EFI_SW_EC_EVENT_LOG_FULL 0x00000011
+
+//
+// Software Class Unspecified Subclass Error Code definitions.
+//
+//
+// Software Class SEC Subclass Error Code definitions.
+//
+//
+// Software Class PEI Core Subclass Error Code definitions.
+//
+#define EFI_SW_PEI_CORE_EC_DXE_CORRUPT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Software Class PEI Module Subclass Error Code definitions.
+//
+#define EFI_SW_PEIM_EC_NO_RECOVERY_CAPSULE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PEIM_EC_INVALID_CAPSULE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Software Class DXE Core Subclass Error Code definitions.
+//
+#define EFI_SW_CSM_LEGACY_ROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+//
+// Software Class DXE Boot Service Driver Subclass Error Code definitions.
+//
+#define EFI_SW_DXE_BS_EC_LEGACY_OPROM_NO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Software Class DXE Runtime Service Driver Subclass Error Code definitions.
+//
+//
+// Software Class SMM Driver Subclass Error Code definitions.
+//
+//
+// Software Class EFI Application Subclass Error Code definitions.
+//
+//
+// Software Class EFI OS Loader Subclass Error Code definitions.
+//
+//
+// Software Class EFI RT Subclass Error Code definitions.
+//
+//
+// Software Class EFI AL Subclass Error Code definitions.
+//
+//
+// Software Class EBC Exception Subclass Error Code definitions.
+// These exceptions are derived from the debug protocol definitions in the EFI
+// specification.
+//
+#define EFI_SW_EC_EBC_UNDEFINED (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_UNDEFINED)
+#define EFI_SW_EC_EBC_DIVIDE_ERROR (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_DIVIDE_ERROR)
+#define EFI_SW_EC_EBC_DEBUG (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_DEBUG)
+#define EFI_SW_EC_EBC_BREAKPOINT (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_BREAKPOINT)
+#define EFI_SW_EC_EBC_OVERFLOW (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_OVERFLOW)
+#define EFI_SW_EC_EBC_INVALID_OPCODE (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_INVALID_OPCODE)
+#define EFI_SW_EC_EBC_STACK_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_STACK_FAULT)
+#define EFI_SW_EC_EBC_ALIGNMENT_CHECK (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_ALIGNMENT_CHECK)
+#define EFI_SW_EC_EBC_INSTRUCTION_ENCODING (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_INSTRUCTION_ENCODING)
+#define EFI_SW_EC_EBC_BAD_BREAK (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_BAD_BREAK)
+#define EFI_SW_EC_EBC_STEP (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_STEP)
+
+//
+// Software Class IA32 Exception Subclass Error Code definitions.
+// These exceptions are derived from the debug protocol definitions in the EFI
+// specification.
+//
+#define EFI_SW_EC_IA32_DIVIDE_ERROR (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_DIVIDE_ERROR)
+#define EFI_SW_EC_IA32_DEBUG (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_DEBUG)
+#define EFI_SW_EC_IA32_NMI (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_NMI)
+#define EFI_SW_EC_IA32_BREAKPOINT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_BREAKPOINT)
+#define EFI_SW_EC_IA32_OVERFLOW (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_OVERFLOW)
+#define EFI_SW_EC_IA32_BOUND (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_BOUND)
+#define EFI_SW_EC_IA32_INVALID_OPCODE (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_INVALID_OPCODE)
+#define EFI_SW_EC_IA32_DOUBLE_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_DOUBLE_FAULT)
+#define EFI_SW_EC_IA32_INVALID_TSS (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_INVALID_TSS)
+#define EFI_SW_EC_IA32_SEG_NOT_PRESENT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_SEG_NOT_PRESENT)
+#define EFI_SW_EC_IA32_STACK_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_STACK_FAULT)
+#define EFI_SW_EC_IA32_GP_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_GP_FAULT)
+#define EFI_SW_EC_IA32_PAGE_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_PAGE_FAULT)
+#define EFI_SW_EC_IA32_FP_ERROR (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_FP_ERROR)
+#define EFI_SW_EC_IA32_ALIGNMENT_CHECK (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_ALIGNMENT_CHECK)
+#define EFI_SW_EC_IA32_MACHINE_CHECK (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_MACHINE_CHECK)
+#define EFI_SW_EC_IA32_SIMD (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_SIMD)
+
+//
+// Software Class X64 Exception Subclass Error Code definitions.
+// These exceptions are derived from the debug protocol definitions in the EFI
+// specification.
+//
+#define EFI_SW_EC_X64_DIVIDE_ERROR (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_DIVIDE_ERROR)
+#define EFI_SW_EC_X64_DEBUG (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_DEBUG)
+#define EFI_SW_EC_X64_NMI (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_NMI)
+#define EFI_SW_EC_X64_BREAKPOINT (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_BREAKPOINT)
+#define EFI_SW_EC_X64_OVERFLOW (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_OVERFLOW)
+#define EFI_SW_EC_X64_BOUND (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_BOUND)
+#define EFI_SW_EC_X64_INVALID_OPCODE (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_INVALID_OPCODE)
+#define EFI_SW_EC_X64_DOUBLE_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_DOUBLE_FAULT)
+#define EFI_SW_EC_X64_INVALID_TSS (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_INVALID_TSS)
+#define EFI_SW_EC_X64_SEG_NOT_PRESENT (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_SEG_NOT_PRESENT)
+#define EFI_SW_EC_X64_STACK_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_STACK_FAULT)
+#define EFI_SW_EC_X64_GP_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_GP_FAULT)
+#define EFI_SW_EC_X64_PAGE_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_PAGE_FAULT)
+#define EFI_SW_EC_X64_FP_ERROR (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_FP_ERROR)
+#define EFI_SW_EC_X64_ALIGNMENT_CHECK (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_ALIGNMENT_CHECK)
+#define EFI_SW_EC_X64_MACHINE_CHECK (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_MACHINE_CHECK)
+#define EFI_SW_EC_X64_SIMD (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_SIMD)
+
+//
+// Software Class IPF Exception Subclass Error Code definitions.
+// These exceptions are derived from the debug protocol definitions in the EFI
+// specification.
+//
+#define EFI_SW_EC_IPF_ALT_DTLB (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_ALT_DTLB)
+#define EFI_SW_EC_IPF_DNESTED_TLB (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_DNESTED_TLB)
+#define EFI_SW_EC_IPF_BREAKPOINT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_BREAKPOINT)
+#define EFI_SW_EC_IPF_EXTERNAL_INTERRUPT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_EXTERNAL_INTERRUPT)
+#define EFI_SW_EC_IPF_GEN_EXCEPT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_GEN_EXCEPT)
+#define EFI_SW_EC_IPF_NAT_CONSUMPTION (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_NAT_CONSUMPTION)
+#define EFI_SW_EC_IPF_DEBUG_EXCEPT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_DEBUG_EXCEPT)
+#define EFI_SW_EC_IPF_UNALIGNED_ACCESS (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_UNALIGNED_ACCESS)
+#define EFI_SW_EC_IPF_FP_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_FP_FAULT)
+#define EFI_SW_EC_IPF_FP_TRAP (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_FP_TRAP)
+#define EFI_SW_EC_IPF_TAKEN_BRANCH (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_TAKEN_BRANCH)
+#define EFI_SW_EC_IPF_SINGLE_STEP (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_SINGLE_STEP)
+
+
+//
+// Software Class PEI Service Subclass Error Code definitions.
+//
+//
+// Software Class EFI Boot Service Subclass Error Code definitions.
+//
+//
+// Software Class EFI Runtime Service Subclass Error Code definitions.
+//
+//
+// Software Class EFI DXE Service Subclass Error Code definitions.
+//
+
+///////////////////////////////////////////////////////////////////////////////
+// Section 7
+///////////////////////////////////////////////////////////////////////////////
+//
+// Debug Code definitions for all classes and subclass
+// Only one debug code is defined at this point and should
+// be used for anything that gets sent to debug stream.
+//
+#define EFI_DC_UNSPECIFIED 0x0
+
+#endif
diff --git a/IntelFrameworkPkg/Include/FrameworkBase.h b/IntelFrameworkPkg/Include/FrameworkBase.h new file mode 100644 index 0000000000..fb99890349 --- /dev/null +++ b/IntelFrameworkPkg/Include/FrameworkBase.h @@ -0,0 +1,29 @@ +/** @file
+ Header file that supports Framework extension to UEFI for all types of
+ modules.
+
+ This header file must include Framework extension definitions common to all
+ types of modules.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkBase.h
+
+**/
+
+#ifndef _FRAMEWORK_BASE_H_
+#define _FRAMEWORK_BASE_H_
+
+#include <Common/FrameworkFirmwareFileSystem.h>
+#include <Common/FrameworkHob.h>
+#include <Common/FrameworkLegacy16.h>
+#include <Common/DataHubRecords.h>
+
+#endif
diff --git a/IntelFrameworkPkg/Include/FrameworkDxe.h b/IntelFrameworkPkg/Include/FrameworkDxe.h new file mode 100644 index 0000000000..6fb767eb0c --- /dev/null +++ b/IntelFrameworkPkg/Include/FrameworkDxe.h @@ -0,0 +1,27 @@ +/** @file
+ Header file that supports Framework extension to UEFI/PI for DXE modules.
+
+ This header file must include Framework extension definitions common to DXE
+ modules.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkDxe.h
+
+**/
+
+#ifndef _FRAMEWORK_DXE_H_
+#define _FRAMEWORK_DXE_H_
+
+#include <FrameworkBase.h>
+#include <Common/FrameworkDxeCis.h>
+#include <Common/FrameworkStatusCode.h>
+
+#endif
diff --git a/IntelFrameworkPkg/Include/FrameworkPei.h b/IntelFrameworkPkg/Include/FrameworkPei.h new file mode 100644 index 0000000000..fdcbbcf42b --- /dev/null +++ b/IntelFrameworkPkg/Include/FrameworkPei.h @@ -0,0 +1,27 @@ +/** @file
+ Header file that supports Framework extension to UEFI/PI for PEI modules.
+
+ This header file must include Framework extension definitions common to PEI
+ modules.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkPei.h
+
+**/
+
+#ifndef _FRAMEWORK_PEI_H_
+#define _FRAMEWORK_PEI_H_
+
+#include <FrameworkBase.h>
+#include <PiPei.h>
+#include <Common/FrameworkStatusCode.h>
+
+#endif
diff --git a/IntelFrameworkPkg/Include/FrameworkSmm.h b/IntelFrameworkPkg/Include/FrameworkSmm.h new file mode 100644 index 0000000000..0226b9a15b --- /dev/null +++ b/IntelFrameworkPkg/Include/FrameworkSmm.h @@ -0,0 +1,26 @@ +/** @file
+ Header file that supports Framework extension to UEFI/PI for DXE modules.
+
+ This header file must include Framework extension definitions common to DXE
+ modules.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkSmm.h
+
+**/
+
+#ifndef _FRAMEWORK_SMM_H_
+#define _FRAMEWORK_SMM_H_
+
+#include <FrameworkDxe.h>
+#include <Common/FrameworkSmmCis.h>
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Guid/AcpiTableStorage.h b/IntelFrameworkPkg/Include/Guid/AcpiTableStorage.h new file mode 100644 index 0000000000..69a8bc0265 --- /dev/null +++ b/IntelFrameworkPkg/Include/Guid/AcpiTableStorage.h @@ -0,0 +1,30 @@ +/** @file
+ The ACPI table storage file is fully FFS compliant.
+ The file is a number of sections of type EFI_SECTION_RAW.
+ This GUID is used to identify the file as an ACPI table storage file.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: AcpiTableStorage.h
+
+ @par Revision Reference:
+ GUID defined in ACPI Table Storage Spec Version 0.9.
+
+**/
+
+#ifndef _ACPI_TABLE_STORAGE_H_
+#define _ACPI_TABLE_STORAGE_H_
+
+#define EFI_ACPI_TABLE_STORAGE_GUID \
+ { 0x7e374e25, 0x8e01, 0x4fee, {0x87, 0xf2, 0x39, 0xc, 0x23, 0xc6, 0x6, 0xcd } }
+
+extern EFI_GUID gEfiAcpiTableStorageGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Guid/Capsule.h b/IntelFrameworkPkg/Include/Guid/Capsule.h new file mode 100644 index 0000000000..64496668fa --- /dev/null +++ b/IntelFrameworkPkg/Include/Guid/Capsule.h @@ -0,0 +1,43 @@ +/** @file
+ GUIDs used for EFI Capsule
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Capsule.h
+
+ @par Revision Reference:
+ GUIDs defined in Capsule Spec Version 0.9
+
+**/
+
+#ifndef _CAPSULE_GUID_H__
+#define _CAPSULE_GUID_H__
+
+//
+// This is the GUID of the capsule header of the image on disk.
+//
+#define EFI_CAPSULE_GUID \
+ { \
+ 0x3B6686BD, 0x0D76, 0x4030, {0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 } \
+ }
+
+//
+// This is the GUID of the configuration results file created by the capsule
+// application.
+//
+#define EFI_CONFIG_FILE_NAME_GUID \
+ { \
+ 0x98B8D59B, 0xE8BA, 0x48EE, {0x98, 0xDD, 0xC2, 0x95, 0x39, 0x2F, 0x1E, 0xDB } \
+ }
+
+extern EFI_GUID gEfiCapsuleGuid;
+extern EFI_GUID gEfiConfigFileNameGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Guid/DataHubRecords.h b/IntelFrameworkPkg/Include/Guid/DataHubRecords.h new file mode 100644 index 0000000000..f50a6d3ee4 --- /dev/null +++ b/IntelFrameworkPkg/Include/Guid/DataHubRecords.h @@ -0,0 +1,63 @@ +/** @file
+ DataHubRecord.h include all data hub sub class GUID defitions.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name:
+
+ @par Revision Reference:
+ These GUID are from Cache subclass spec 0.9, DataHub SubClass spec 0.9, Memory SubClass Spec 0.9,
+ Processor Subclass spec 0.9, Misc SubClass spec 0.9.
+
+**/
+#ifndef _DATAHUB_RECORDS_GUID_H_
+#define _DATAHUB_RECORDS_GUID_H_
+
+#define EFI_PROCESSOR_PRODUCER_GUID \
+ { 0x1bf06aea, 0x5bec, 0x4a8d, {0x95, 0x76, 0x74, 0x9b, 0x09, 0x56, 0x2d, 0x30 } }
+
+extern EFI_GUID gEfiProcessorProducerGuid;
+
+
+#define EFI_PROCESSOR_SUBCLASS_GUID \
+ { 0x26fdeb7e, 0xb8af, 0x4ccf, {0xaa, 0x97, 0x02, 0x63, 0x3c, 0xe4, 0x8c, 0xa7 } }
+
+extern EFI_GUID gEfiProcessorSubClassGuid;
+
+
+#define EFI_CACHE_SUBCLASS_GUID \
+ { 0x7f0013a7, 0xdc79, 0x4b22, {0x80, 0x99, 0x11, 0xf7, 0x5f, 0xdc, 0x82, 0x9d } }
+
+extern EFI_GUID gEfiCacheSubClassGuid;
+
+
+#define EFI_MEMORY_PRODUCER_GUID \
+ { 0x1d7add6e, 0xb2da, 0x4b0b, {0xb2, 0x9f, 0x49, 0xcb, 0x42, 0xf4, 0x63, 0x56 } }
+
+extern EFI_GUID gEfiMemoryProducerGuid;
+
+
+#define EFI_MEMORY_SUBCLASS_GUID \
+ {0x4E8F4EBB, 0x64B9, 0x4e05, {0x9B, 0x18, 0x4C, 0xFE, 0x49, 0x23, 0x50, 0x97} }
+
+extern EFI_GUID gEfiMemorySubClassGuid;
+
+
+#define EFI_MISC_PRODUCER_GUID \
+ { 0x62512c92, 0x63c4, 0x4d80, {0x82, 0xb1, 0xc1, 0xa4, 0xdc, 0x44, 0x80, 0xe5 } }
+
+extern EFI_GUID gEfiMiscProducerGuid;
+
+#define EFI_MISC_SUBCLASS_GUID \
+ { 0x772484B2, 0x7482, 0x4b91, {0x9F, 0x9A, 0xAD, 0x43, 0xF8, 0x1C, 0x58, 0x81 } }
+
+extern EFI_GUID gEfiMiscSubClassGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Guid/FrameworkDevicePath.h b/IntelFrameworkPkg/Include/Guid/FrameworkDevicePath.h new file mode 100644 index 0000000000..81f8ff0a62 --- /dev/null +++ b/IntelFrameworkPkg/Include/Guid/FrameworkDevicePath.h @@ -0,0 +1,29 @@ +/** @file
+ This GUID is used to define a vendor specific device path being owned by the
+ Framework specificaitons.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkDevicePath.h
+
+ @par Revision Reference:
+ Spec Version 0.9
+
+**/
+
+#ifndef _FRAMEWORK_DEVICE_PATH_GUID_H_
+#define _FRAMEWORK_DEVICE_PATH_GUID_H_
+
+#define EFI_FRAMEWORK_DEVICE_PATH_GUID \
+ { 0xb7084e63, 0x46b7, 0x4d1a, { 0x86, 0x77, 0xe3, 0x0b, 0x53, 0xdb, 0xf0, 0x50 } }
+
+extern EFI_GUID gEfiFrameworkDevicePathGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Guid/SmmCommunicate.h b/IntelFrameworkPkg/Include/Guid/SmmCommunicate.h new file mode 100644 index 0000000000..8d36fe9466 --- /dev/null +++ b/IntelFrameworkPkg/Include/Guid/SmmCommunicate.h @@ -0,0 +1,40 @@ +/** @file
+ Definitions EFI_SMM_COMMUNICATE_HEADER used by EFI_SMM_BASE_PROTOCOL.Communicate()
+ functions
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmCommunicate.h
+
+ @par Revision Reference:
+ GUIDs defined in SmmCis spec version 0.9
+
+**/
+
+#ifndef _SMM_COMMUNICATE_GUID_H_
+#define _SMM_COMMUNICATE_GUID_H_
+
+//******************************************************
+// EFI_SMM_COMMUNICATE_HEADER
+//******************************************************
+#define SMM_COMMUNICATE_HEADER_GUID \
+ { \
+ 0xf328e36c, 0x23b6, 0x4a95, {0x85, 0x4b, 0x32, 0xe1, 0x95, 0x34, 0xcd, 0x75 } \
+ }
+
+typedef struct {
+ EFI_GUID HeaderGuid;
+ UINTN MessageLength;
+ UINT8 Data[1];
+} EFI_SMM_COMMUNICATE_HEADER;
+
+extern EFI_GUID gSmmCommunicateHeaderGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Guid/SmramMemoryReserve.h b/IntelFrameworkPkg/Include/Guid/SmramMemoryReserve.h new file mode 100644 index 0000000000..680f0b93ae --- /dev/null +++ b/IntelFrameworkPkg/Include/Guid/SmramMemoryReserve.h @@ -0,0 +1,67 @@ +/** @file
+ GUID for use in reserving SMRAM regions.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmramMemoryReserve.h
+
+ @par Revision Reference:
+ GUIDs defined in SmmCis spec version 0.9
+
+**/
+
+#ifndef _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_
+#define _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_
+
+#define EFI_SMM_PEI_SMRAM_MEMORY_RESERVE \
+ { \
+ 0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff, 0x3d } \
+ }
+
+//
+// *******************************************************
+// EFI_SMRAM_DESCRIPTOR
+// *******************************************************
+//
+typedef struct {
+ EFI_PHYSICAL_ADDRESS PhysicalStart; // Phsyical location in DRAM
+ EFI_PHYSICAL_ADDRESS CpuStart; // Address CPU uses to access the SMI handler
+ // May or may not match PhysicalStart
+ //
+ UINT64 PhysicalSize;
+ UINT64 RegionState;
+} EFI_SMRAM_DESCRIPTOR;
+
+//
+// *******************************************************
+// EFI_SMRAM_STATE
+// *******************************************************
+//
+#define EFI_SMRAM_OPEN 0x00000001
+#define EFI_SMRAM_CLOSED 0x00000002
+#define EFI_SMRAM_LOCKED 0x00000004
+#define EFI_CACHEABLE 0x00000008
+#define EFI_ALLOCATED 0x00000010
+#define EFI_NEEDS_TESTING 0x00000020
+#define EFI_NEEDS_ECC_INITIALIZATION 0x00000040
+
+//
+// *******************************************************
+// EFI_SMRAM_HOB_DESCRIPTOR_BLOCK
+// *******************************************************
+//
+typedef struct {
+ UINTN NumberOfSmmReservedRegions;
+ EFI_SMRAM_DESCRIPTOR Descriptor[1];
+} EFI_SMRAM_HOB_DESCRIPTOR_BLOCK;
+
+extern EFI_GUID gEfiSmmPeiSmramMemoryReserveGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Ppi/BlockIo.h b/IntelFrameworkPkg/Include/Ppi/BlockIo.h new file mode 100644 index 0000000000..df209f5ea3 --- /dev/null +++ b/IntelFrameworkPkg/Include/Ppi/BlockIo.h @@ -0,0 +1,158 @@ +/** @file
+ This file declares BlockIo PPI used to access block-oriented storage devices
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BlockIo.h
+
+ @par Revision Reference:
+ This PPI is defined in Framework of EFI Recovery Spec
+ Version 0.9
+
+**/
+
+#ifndef _PEI_BLOCK_IO_H_
+#define _PEI_BLOCK_IO_H_
+
+#define EFI_PEI_IDE_BLOCK_IO_PPI \
+ { \
+ 0x0964e5b22, 0x6459, 0x11d2, { 0x8e, 0x39, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
+ }
+
+#define EFI_PEI_144_FLOPPY_BLOCK_IO_PPI \
+ { \
+ 0xda6855bd, 0x07b7, 0x4c05, { 0x9e, 0xd8, 0xe2, 0x59, 0xfd, 0x36, 0x0e, 0x22 } \
+ }
+
+#define EFI_PEI_VIRTUAL_BLOCK_IO_PPI \
+ { \
+ 0x695d8aa1, 0x42ee, 0x4c46, { 0x80, 0x5c, 0x6e, 0xa6, 0xbc, 0xe7, 0x99, 0xe3 } \
+ }
+
+typedef struct _EFI_PEI_RECOVERY_BLOCK_IO_PPI EFI_PEI_RECOVERY_BLOCK_IO_PPI;
+
+typedef UINT64 EFI_PEI_LBA;
+
+typedef enum {
+ LegacyFloppy = 0,
+ IdeCDROM = 1,
+ IdeLS120 = 2,
+ UsbMassStorage= 3,
+ MaxDeviceType
+} EFI_PEI_BLOCK_DEVICE_TYPE;
+
+typedef struct {
+ EFI_PEI_BLOCK_DEVICE_TYPE DeviceType;
+ BOOLEAN MediaPresent;
+ UINTN LastBlock;
+ UINTN BlockSize;
+} EFI_PEI_BLOCK_IO_MEDIA;
+
+/**
+ Gets the count of block I/O devices that one specific block driver detects.
+
+ @param PeiServices General-purpose services that are available to every PEIM.
+ @param This Indicates the EFI_PEI_RECOVERY_BLOCK_IO_PPI instance.
+ @param NumberBlockDevices The number of block I/O devices discovered.
+
+ @return Status code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_GET_NUMBER_BLOCK_DEVICES) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ OUT UINTN *NumberBlockDevices
+ );
+
+/**
+ Gets a block device's media information.
+
+ @param PeiServices General-purpose services that are available to every PEIM
+ @param This Indicates the EFI_PEI_RECOVERY_BLOCK_IO_PPI instance.
+ @param DeviceIndex Specifies the block device to which the function
+ wants to talk. Because the driver that implements Block I/O PPIs
+ will manage multiple block devices, the PPIs that want to talk to a single
+ device must specify the device index that was assigned during the enumeration
+ process. This index is a number from one to NumberBlockDevices.
+ @param MediaInfo The media information of the specified block media.
+
+ @retval EFI_SUCCESS Media information about the specified block device was obtained successfully.
+ @retval EFI_DEVICE_ERROR Cannot get the media information due to a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_GET_DEVICE_MEDIA_INFORMATION) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
+ );
+
+/**
+ Reads the requested number of blocks from the specified block device.
+
+ @param PeiServices General-purpose services that are available to every PEIM.
+ @param This Indicates the EFI_PEI_RECOVERY_BLOCK_IO_PPI instance.
+ @param DeviceIndex Specifies the block device to which the function wants to talk.
+ @param StartLBA The starting logical block address (LBA) to read from on the device
+ @param BufferSize The size of the Buffer in bytes. This number must
+ be a multiple of the intrinsic block size of the device.
+ @param Buffer A pointer to the destination buffer for the data.
+ The caller is responsible for the ownership of the buffer.
+
+ @retval EFI_SUCCESS The data was read correctly from the device.
+ @retval EFI_DEVICE_ERROR The device reported an error while attempting to perform the read operation.
+ @retval EFI_INVALID_PARAMETER The read request contains LBAs that are not valid,
+ or the buffer is not properly aligned.
+ @retval EFI_BAD_BUFFER_SIZE The BufferSize parameter is not a multiple of
+ the intrinsic block size of the device.
+ @retval EFI_NO_MEDIA There is no media in the device.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_READ_BLOCKS) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
+ );
+
+/**
+ @par Ppi Description:
+ EFI_PEI_RECOVERY_BLOCK_IO_PPI provides the services that are required
+ to access a block I/O device during PEI recovery boot mode.
+
+ @param GetNumberOfBlockDevices
+ Gets the number of block I/O devices that the specific block driver manages.
+
+ @param GetBlockDeviceMediaInfo
+ Gets the specified media information.
+
+ @param ReadBlocks
+ Reads the requested number of blocks from the specified block device.
+
+**/
+struct _EFI_PEI_RECOVERY_BLOCK_IO_PPI {
+ EFI_PEI_GET_NUMBER_BLOCK_DEVICES GetNumberOfBlockDevices;
+ EFI_PEI_GET_DEVICE_MEDIA_INFORMATION GetBlockDeviceMediaInfo;
+ EFI_PEI_READ_BLOCKS ReadBlocks;
+};
+
+extern EFI_GUID gEfiPeiIdeBlockIoPpiGuid;
+extern EFI_GUID gEfiPei144FloppyBlockIoPpiGuid;
+extern EFI_GUID gEfiPeiVirtualBlockIoPpiGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Ppi/BootScriptExecuter.h b/IntelFrameworkPkg/Include/Ppi/BootScriptExecuter.h new file mode 100644 index 0000000000..1d249f01a5 --- /dev/null +++ b/IntelFrameworkPkg/Include/Ppi/BootScriptExecuter.h @@ -0,0 +1,72 @@ +/** @file
+ This file declares Boot Script Executer PPI.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BootScriptExecuter.h
+
+ @par Revision Reference:
+ This PPI is defined in Framework of EFI BootScript spec.
+ Version 0.91.
+
+**/
+
+#ifndef _PEI_BOOT_SCRIPT_EXECUTER_PPI_H
+#define _PEI_BOOT_SCRIPT_EXECUTER_PPI_H
+
+#define EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI_GUID \
+ { \
+ 0xabd42895, 0x78cf, 0x4872, {0x84, 0x44, 0x1b, 0x5c, 0x18, 0x0b, 0xfb, 0xff } \
+ }
+
+typedef struct _EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI;
+
+/**
+ Executes the Framework boot script table.
+
+ @param PeiServices A pointer to the system PEI Services Table.
+ @param This A pointer to the EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI instance.
+ @param Address The physical memory address where the table is stored.
+ It must be zero if the table to be executed is stored in a firmware volume file.
+ @param FvFile The firmware volume file name that contains the table to
+ be executed. It must be NULL if the table to be executed is stored in physical memory.
+
+ @retval EFI_SUCCESS The boot script table was executed successfully.
+ @retval EFI_INVALID_PARAMETER Address is zero and FvFile is NULL.
+ @retval EFI_NOT_FOUND The file name specified in FvFile cannot be found.
+ @retval EFI_UNSUPPORTED The format of the boot script table is invalid.
+ Or An unsupported opcode occurred in the table.
+ Or There were opcode execution errors, such as an insufficient dependency.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_BOOT_SCRIPT_EXECUTE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI *This,
+ IN EFI_PHYSICAL_ADDRESS Address,
+ IN EFI_GUID *FvFile OPTIONAL
+ );
+
+/**
+ @par Ppi Description:
+ This PPI produces functions to interpret and execute the Framework boot script table.
+
+ @param Execute
+ Executes a boot script table.
+
+**/
+struct _EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI {
+ EFI_PEI_BOOT_SCRIPT_EXECUTE Execute;
+};
+
+extern EFI_GUID gEfiPeiBootScriptExecuterPpiGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Ppi/RecoveryModule.h b/IntelFrameworkPkg/Include/Ppi/RecoveryModule.h new file mode 100644 index 0000000000..8136271366 --- /dev/null +++ b/IntelFrameworkPkg/Include/Ppi/RecoveryModule.h @@ -0,0 +1,64 @@ +/** @file
+ This file declares Recovery Module PPI.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: RecoveryModule.h
+
+ @par Revision Reference:
+ This PPI is defined in Framework of EFI Recovery Spec.
+ Version 0.9
+
+**/
+
+#ifndef __PEI_RECOVERY_MODULE_PPI_H__
+#define __PEI_RECOVERY_MODULE_PPI_H__
+
+#define EFI_PEI_RECOVERY_MODULE_PPI_GUID \
+ { \
+ 0xFB6D9542, 0x612D, 0x4f45, {0x87, 0x2F, 0x5C, 0xFF, 0x52, 0xE9, 0x3D, 0xCF } \
+ }
+
+typedef struct _EFI_PEI_RECOVERY_MODULE_PPI EFI_PEI_RECOVERY_MODULE_PPI;
+
+/**
+ Loads a DXE capsule from some media into memory and updates the HOB table
+ with the DXE firmware volume information.
+
+ @param PeiServices General-purpose services that are available to every PEIM.
+ @param This Indicates the EFI_PEI_RECOVERY_MODULE_PPI instance.
+
+ @retval EFI_SUCCESS The capsule was loaded correctly.
+ @retval EFI_DEVICE_ERROR A device error occurred.
+ @retval EFI_NOT_FOUND A recovery DXE capsule cannot be found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_LOAD_RECOVERY_CAPSULE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_MODULE_PPI *This
+ );
+
+/**
+ @par Ppi Description:
+ Finds and loads the recovery files.
+
+ @param LoadRecoveryCapsule
+ Loads a DXE binary capsule into memory.
+
+**/
+struct _EFI_PEI_RECOVERY_MODULE_PPI {
+ EFI_PEI_LOAD_RECOVERY_CAPSULE LoadRecoveryCapsule;
+};
+
+extern EFI_GUID gEfiPeiRecoveryModulePpiGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Ppi/S3Resume.h b/IntelFrameworkPkg/Include/Ppi/S3Resume.h new file mode 100644 index 0000000000..d031018a7d --- /dev/null +++ b/IntelFrameworkPkg/Include/Ppi/S3Resume.h @@ -0,0 +1,64 @@ +/** @file
+ This file declares S3 Resume PPI.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: S3Resume.h
+
+ @par Revision Reference:
+ This PPI is defined in Framework of EFI S3 Resume Boot Path spec.
+ Version 0.9
+
+**/
+
+#ifndef __PEI_S3_RESUME_PPI_H__
+#define __PEI_S3_RESUME_PPI_H__
+
+#define EFI_PEI_S3_RESUME_PPI_GUID \
+ { \
+ 0x4426CCB2, 0xE684, 0x4a8a, {0xAE, 0x40, 0x20, 0xD4, 0xB0, 0x25, 0xB7, 0x10 } \
+ }
+
+typedef struct _EFI_PEI_S3_RESUME_PPI EFI_PEI_S3_RESUME_PPI;
+
+/**
+ Restores the platform to its preboot configuration for an S3 resume and
+ jumps to the OS waking vector.
+
+ @param PeiServices Pointer to the PEI Services Table
+
+ @retval EFI_ABORTED Execution of the S3 resume boot script table failed.
+ @retval EFI_NOT_FOUND Some necessary information that is used for
+ the S3 resume boot path could not be located.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_S3_RESUME_PPI_RESTORE_CONFIG) (
+ IN EFI_PEI_SERVICES **PeiServices
+ );
+
+/**
+ @par Ppi Description:
+ EFI_PEI_S3_RESUME_PPI accomplishes the firmware S3 resume boot
+ path and transfers control to OS.
+
+ @param S3RestoreConfig
+ Restores the platform to its preboot configuration for an S3 resume and
+ jumps to the OS waking vector.
+
+**/
+struct _EFI_PEI_S3_RESUME_PPI {
+ EFI_PEI_S3_RESUME_PPI_RESTORE_CONFIG S3RestoreConfig;
+};
+
+extern EFI_GUID gEfiPeiS3ResumePpiGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Ppi/Smbus.h b/IntelFrameworkPkg/Include/Ppi/Smbus.h new file mode 100644 index 0000000000..54e6f58963 --- /dev/null +++ b/IntelFrameworkPkg/Include/Ppi/Smbus.h @@ -0,0 +1,228 @@ +/** @file
+ This file declares Smbus PPI.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Smbus.h
+
+ @par Revision Reference:
+ This PPI is defined in Framework of EFI SmBus PPI spec.
+ Version 0.9
+
+**/
+
+#ifndef _PEI_SMBUS_PPI_H
+#define _PEI_SMBUS_PPI_H
+
+#include <IndustryStandard/SmBus.h>
+
+#define EFI_PEI_SMBUS_PPI_GUID \
+ { \
+ 0xabd42895, 0x78cf, 0x4872, {0x84, 0x44, 0x1b, 0x5c, 0x18, 0xb, 0xfb, 0xda } \
+ }
+
+typedef struct _EFI_PEI_SMBUS_PPI EFI_PEI_SMBUS_PPI;
+
+/**
+ Executes an SMBus operation to an SMBus controller.
+
+ @param PeiServices A pointer to the system PEI Services Table.
+ @param This A pointer to the EFI_PEI_SMBUS_PPI instance.
+ @param SlaveAddress The SMBUS hardware address to which the SMBUS
+ device is preassigned or allocated.
+ @param Command This command is transmitted by the SMBus host
+ controller to the SMBus slave device and the interpretation is
+ SMBus slave device specific.
+ @param Operation Signifies which particular SMBus hardware protocol
+ instance that it will use to execute the SMBus transactions.
+ @param PecCheck Defines if Packet Error Code (PEC) checking is required
+ for this operation.
+ @param Length Signifies the number of bytes that this operation will do.
+ @param Buffer Contains the value of data to execute to the SMBus slave device.
+
+ @retval EFI_SUCCESS The last data that was returned from the access
+ matched the poll exit criteria.
+ @retval EFI_CRC_ERROR The checksum is not correct (PEC is incorrect)
+ @retval EFI_TIMEOUT Timeout expired before the operation was completed.
+ Timeout is determined by the SMBus host controller device.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed
+ due to a lack of resources.
+ @retval EFI_DEVICE_ERROR The request was not completed because
+ a failure reflected in the Host Status Register bit.
+ @retval EFI_INVALID_PARAMETER Operation is not defined in EFI_SMBUS_OPERATION.
+ Or Length/Buffer is NULL for operations except for EfiSmbusQuickRead and
+ EfiSmbusQuickWrite. Length is outside the range of valid values.
+ @retval EFI_UNSUPPORTED The SMBus operation or PEC is not supported.
+ @retval EFI_BUFFER_TOO_SMALL Buffer is not sufficient for this operation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_PPI_EXECUTE_OPERATION) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *This,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN EFI_SMBUS_DEVICE_COMMAND Command,
+ IN EFI_SMBUS_OPERATION Operation,
+ IN BOOLEAN PecCheck,
+ IN OUT UINTN *Length,
+ IN OUT VOID *Buffer
+ );
+
+typedef struct {
+ UINT32 VendorSpecificId;
+ UINT16 SubsystemDeviceId;
+ UINT16 SubsystemVendorId;
+ UINT16 Interface;
+ UINT16 DeviceId;
+ UINT16 VendorId;
+ UINT8 VendorRevision;
+ UINT8 DeviceCapabilities;
+} EFI_SMBUS_UDID;
+
+/**
+ CallBack function can be registered in EFI_PEI_SMBUS_PPI_NOTIFY.
+
+ @param PeiServices A pointer to the system PEI Services Table.
+ @param This A pointer to the EFI_PEI_SMBUS_PPI instance.
+ @param SlaveAddress The SMBUS hardware address to which the SMBUS
+ device is preassigned or allocated.
+ @param Data Data of the SMBus host notify command that
+ the caller wants to be called.
+
+ @return Status Code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_NOTIFY_FUNCTION) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *SmbusPpi,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN UINTN Data
+ );
+
+/**
+ The ArpDevice() function enumerates the entire bus or enumerates a specific
+ device that is identified by SmbusUdid.
+
+ @param PeiServices A pointer to the system PEI Services Table.
+ @param This A pointer to the EFI_PEI_SMBUS_PPI instance.
+ @param ArpAll A Boolean expression that indicates if the host drivers need
+ to enumerate all the devices or enumerate only the device that is identified
+ by SmbusUdid. If ArpAll is TRUE, SmbusUdid and SlaveAddress are optional.
+ If ArpAll is FALSE, ArpDevice will enumerate SmbusUdid and the address
+ will be at SlaveAddress.
+ @param SmbusUdid The targeted SMBus Unique Device Identifier (UDID).
+ The UDID may not exist for SMBus devices with fixed addresses.
+ @param SlaveAddress The new SMBus address for the slave device for
+ which the operation is targeted.
+
+ @retval EFI_SUCCESS The SMBus slave device address was set.
+ @retval EFI_INVALID_PARAMETER SlaveAddress is NULL.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed
+ due to a lack of resources.
+ @retval EFI_TIMEOUT The SMBus slave device did not respond.
+ @retval EFI_DEVICE_ERROR The request was not completed because the transaction failed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_PPI_ARP_DEVICE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *This,
+ IN BOOLEAN ArpAll,
+ IN EFI_SMBUS_UDID *SmbusUdid, OPTIONAL
+ IN OUT EFI_SMBUS_DEVICE_ADDRESS *SlaveAddress OPTIONAL
+ );
+
+typedef struct {
+ EFI_SMBUS_DEVICE_ADDRESS SmbusDeviceAddress;
+ EFI_SMBUS_UDID SmbusDeviceUdid;
+} EFI_SMBUS_DEVICE_MAP;
+
+/**
+ The GetArpMap() function returns the mapping of all the SMBus devices
+ that are enumerated by the SMBus host driver.
+
+ @param PeiServices A pointer to the system PEI Services Table.
+ @param This A pointer to the EFI_PEI_SMBUS_PPI instance.
+ @param Length Size of the buffer that contains the SMBus device map.
+ @param SmbusDeviceMap The pointer to the device map as enumerated
+ by the SMBus controller driver.
+
+ @retval EFI_SUCCESS The device map was returned correctly in the buffer.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_PPI_GET_ARP_MAP) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *This,
+ IN OUT UINTN *Length,
+ IN OUT EFI_SMBUS_DEVICE_MAP **SmbusDeviceMap
+ );
+
+/**
+ The Notify() function registers all the callback functions to allow the
+ bus driver to call these functions when the SlaveAddress/Data pair happens.
+
+ @param PeiServices A pointer to the system PEI Services Table.
+ @param This A pointer to the EFI_PEI_SMBUS_PPI instance.
+ @param SlaveAddress Address that the host controller detects as
+ sending a message and calls all the registered functions.
+ @param Data Data that the host controller detects as sending a message
+ and calls all the registered functions.
+ @param NotifyFunction The function to call when the bus driver
+ detects the SlaveAddress and Data pair.
+
+ @retval EFI_SUCCESS NotifyFunction has been registered.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_PPI_NOTIFY) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *This,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN UINTN Data,
+ IN EFI_PEI_SMBUS_NOTIFY_FUNCTION NotifyFunction
+ );
+
+/**
+ @par Ppi Description:
+ Provides the basic I/O interfaces that a PEIM uses to access
+ its SMBus controller and the slave devices attached to it.
+
+ @param Execute
+ Executes the SMBus operation to an SMBus slave device.
+
+ @param ArpDevice
+ Allows an SMBus 2.0 device(s) to be Address Resolution Protocol (ARP)
+
+ @param GetArpMap
+ Allows a PEIM to retrieve the address that was allocated by the SMBus
+ host controller during enumeration/ARP.
+
+ @param Notify
+ Allows a driver to register for a callback to the SMBus host
+ controller driver when the bus issues a notification to the bus controller PEIM.
+
+**/
+struct _EFI_PEI_SMBUS_PPI {
+ EFI_PEI_SMBUS_PPI_EXECUTE_OPERATION Execute;
+ EFI_PEI_SMBUS_PPI_ARP_DEVICE ArpDevice;
+ EFI_PEI_SMBUS_PPI_GET_ARP_MAP GetArpMap;
+ EFI_PEI_SMBUS_PPI_NOTIFY Notify;
+};
+
+extern EFI_GUID gEfiPeiSmbusPpiGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/AcpiSupport.h b/IntelFrameworkPkg/Include/Protocol/AcpiSupport.h new file mode 100644 index 0000000000..b0fa68ead7 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/AcpiSupport.h @@ -0,0 +1,161 @@ +/** @file
+ Definition of the ACPI Support protocol.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: AcpiSupport.h
+
+ @par Revision Reference:
+ This is defined in the ACPI Specification 0.9.
+
+**/
+
+#ifndef _ACPI_SUPPORT_PROTOCOL_H_
+#define _ACPI_SUPPORT_PROTOCOL_H_
+
+typedef struct _EFI_ACPI_SUPPORT_PROTOCOL EFI_ACPI_SUPPORT_PROTOCOL;
+
+//
+// ACPI Support Protocol GUID
+//
+#define EFI_ACPI_SUPPORT_GUID \
+ { \
+ 0xdbff9d55, 0x89b7, 0x46da, {0xbd, 0xdf, 0x67, 0x7d, 0x3d, 0xc0, 0x24, 0x1d } \
+ }
+
+//
+// Protocol Data Definitions
+//
+//
+// ACPI Version bitmap definition:
+//
+// EFI_ACPI_TABLE_VERSION_1_0B - ACPI Version 1.0b
+// EFI_ACPI_TABLE_VERSION_2_0 - ACPI Version 2.0
+// EFI_ACPI_TABLE_VERSION_3_0 - ACPI Version 3.0
+// EFI_ACPI_TABLE_VERSION_NONE - No ACPI Versions. This might be used
+// to create memory-based operation regions or other information
+// that is not part of the ACPI "tree" but must still be found
+// in ACPI memory space and/or managed by the core ACPI driver.
+//
+// Note that EFI provides discrete GUIDs for each version of ACPI
+// that is supported. It is expected that each EFI GUIDed
+// version of ACPI will also have a corresponding bitmap
+// definition. This allows maintenance of separate ACPI trees
+// for each distinctly different version of ACPI.
+//
+#define EFI_ACPI_TABLE_VERSION UINT32
+
+#define EFI_ACPI_TABLE_VERSION_NONE (1 << 0)
+#define EFI_ACPI_TABLE_VERSION_1_0B (1 << 1)
+#define EFI_ACPI_TABLE_VERSION_2_0 (1 << 2)
+#define EFI_ACPI_TABLE_VERSION_3_0 (1 << 3)
+
+//
+// Protocol Member Functions
+//
+
+/**
+ Returns a requested ACPI table.
+
+ @param This A pointer to the EFI_ACPI_SUPPORT_PROTOCOL instance.
+ @param Index The zero-based index of the table to retrieve.
+ @param Table Pointer for returning the table buffer.
+ @param Version Updated with the ACPI versions to which this table belongs.
+ @param Handle Pointer for identifying the table.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NOT_FOUND The requested index is too large and a table was not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ACPI_GET_ACPI_TABLE) (
+ IN EFI_ACPI_SUPPORT_PROTOCOL *This,
+ IN INTN Index,
+ OUT VOID **Table,
+ OUT EFI_ACPI_TABLE_VERSION *Version,
+ OUT UINTN *Handle
+ );
+
+/**
+ Used to add, remove, or update ACPI tables.
+
+ @param This A pointer to the EFI_ACPI_SUPPORT_PROTOCOL instance.
+ @param Table Pointer to the new table to add or update.
+ @param Checksum If TRUE, indicates that the checksum should be
+ calculated for this table.
+ @param Version Indicates to which version(s) of ACPI the table should be added.
+ @param Pointer to the handle of the table to remove or update.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_INVALID_PARAMETER *Handle was zero and Table was NULL.
+ @retval EFI_ABORTED Could not complete the desired action.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ACPI_SET_ACPI_TABLE) (
+ IN EFI_ACPI_SUPPORT_PROTOCOL *This,
+ IN VOID *Table OPTIONAL,
+ IN BOOLEAN Checksum,
+ IN EFI_ACPI_TABLE_VERSION Version,
+ IN OUT UINTN *Handle
+ );
+
+/**
+ Causes one or more versions of the ACPI tables to be published in
+ the EFI system configuration tables.
+
+ @param This A pointer to the EFI_ACPI_SUPPORT_PROTOCOL instance.
+ @param Version Indicates to which version(s) of ACPI that the table should be published.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_ABORTED An error occurred and the function could not complete successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ACPI_PUBLISH_TABLES) (
+ IN EFI_ACPI_SUPPORT_PROTOCOL *This,
+ IN EFI_ACPI_TABLE_VERSION Version
+ );
+
+//
+// ACPI Support Protocol
+//
+/**
+ @par Protocol Description:
+ This protocol provides some basic services to support publishing ACPI system
+ tables. The services handle many of the more mundane tasks that are required
+ to publish a set of tables.
+
+ @param GetAcpiTable
+ Returns a table specified by an index if it exists.
+
+ @param SetAcpiTable
+ Adds, removes, or updates ACPI tables
+
+ @param PublishTables
+ Publishes the ACPI tables.
+
+**/
+struct _EFI_ACPI_SUPPORT_PROTOCOL {
+ EFI_ACPI_GET_ACPI_TABLE GetAcpiTable;
+ EFI_ACPI_SET_ACPI_TABLE SetAcpiTable;
+ EFI_ACPI_PUBLISH_TABLES PublishTables;
+};
+
+//
+// Extern the GUID for protocol users.
+//
+extern EFI_GUID gEfiAcpiSupportProtocolGuid;
+
+#endif
+
diff --git a/IntelFrameworkPkg/Include/Protocol/BootScriptSave.h b/IntelFrameworkPkg/Include/Protocol/BootScriptSave.h new file mode 100644 index 0000000000..fc34723bdc --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/BootScriptSave.h @@ -0,0 +1,102 @@ +/** @file
+ Definition of the Boot Script Save protocol.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BootScriptSave.h
+
+ @par Revision Reference:
+ This protocol defined in the Boot Script Specification, Version 0.91.
+
+**/
+
+#ifndef _BOOT_SCRIPT_SAVE_PROTOCOL_H
+#define _BOOT_SCRIPT_SAVE_PROTOCOL_H
+
+//
+// S3 Save Protocol GUID
+//
+#define EFI_BOOT_SCRIPT_SAVE_PROTOCOL_GUID \
+ { \
+ 0x470e1529, 0xb79e, 0x4e32, {0xa0, 0xfe, 0x6a, 0x15, 0x6d, 0x29, 0xf9, 0xb2 } \
+ }
+
+typedef struct _EFI_BOOT_SCRIPT_SAVE_PROTOCOL EFI_BOOT_SCRIPT_SAVE_PROTOCOL;
+
+//
+// Protocol Member_Function
+//
+/**
+ Adds a record into a specified Framework boot script table.
+
+ @param This A pointer to the EFI_BOOT_SCRIPT_SAVE_PROTOCOL instance.
+ @param TableName Name of the script table.Currently, the only meaningful
+ value is EFI_ACPI_S3_RESUME_SCRIPT_TABLE.
+ @param OpCode The operation code (opcode) number.
+ @param ... Argument list that is specific to each opcode.
+
+ @retval EFI_SUCCESS The operation succeeded. A record was added into the specified script table.
+ @retval EFI_INVALID_PARAMETER The parameter is illegal or the given boot script is not supported.
+ @retval EFI_OUT_OF_RESOURCES There is insufficient memory to store the boot script.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BOOT_SCRIPT_WRITE) (
+ IN EFI_BOOT_SCRIPT_SAVE_PROTOCOL *This,
+ IN UINT16 TableName,
+ IN UINT16 OpCode,
+ ...
+ );
+
+/**
+ Closes the specified script table.
+
+ @param This A pointer to the EFI_BOOT_SCRIPT_SAVE_PROTOCOL instance.
+ @param TableName Name of the script table.
+ @param Address A pointer to the physical address where the table begins.
+
+ @retval EFI_SUCCESS The table was successfully returned.
+ @retval EFI_NOT_FOUND The specified table was not created previously.
+ @retval EFI_OUT_OF_RESOURCES Memory is insufficient to hold the reorganized boot script table.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BOOT_SCRIPT_CLOSE_TABLE) (
+ IN EFI_BOOT_SCRIPT_SAVE_PROTOCOL *This,
+ IN UINT16 TableName,
+ OUT EFI_PHYSICAL_ADDRESS *Address
+ );
+
+//
+// S3 Save Protocol data structure
+//
+/**
+ @par Protocol Description:
+ The EFI_BOOT_SCRIPT_SAVE_PROTOCOL publishes the Framework boot script abstractions
+ to store or record various boot scripts into boot script tables.
+
+ @param Write
+ Writes various boot scripts to a boot script table.
+
+ @param CloseTable
+ Retrieves and closes a script table.
+
+**/
+struct _EFI_BOOT_SCRIPT_SAVE_PROTOCOL {
+ EFI_BOOT_SCRIPT_WRITE Write;
+ EFI_BOOT_SCRIPT_CLOSE_TABLE CloseTable;
+};
+
+extern EFI_GUID gEfiBootScriptSaveProtocolGuid;
+
+#endif
+
diff --git a/IntelFrameworkPkg/Include/Protocol/CpuIo.h b/IntelFrameworkPkg/Include/Protocol/CpuIo.h new file mode 100644 index 0000000000..38f910ea94 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/CpuIo.h @@ -0,0 +1,125 @@ +/** @file
+ This code abstracts the CPU IO Protocol
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: CpuIO.h
+
+ @par Revision Reference:
+ CPU IO Protocol is defined in Framework of EFI CPU IO Protocol Spec
+ Version 0.9
+
+**/
+
+#ifndef _CPUIO_H_
+#define _CPUIO_H_
+
+#define EFI_CPU_IO_PROTOCOL_GUID \
+ { \
+ 0xB0732526, 0x38C8, 0x4b40, {0x88, 0x77, 0x61, 0xC7, 0xB0, 0x6A, 0xAC, 0x45 } \
+ }
+
+typedef struct _EFI_CPU_IO_PROTOCOL EFI_CPU_IO_PROTOCOL;
+
+//
+// *******************************************************
+// EFI_CPU_IO_PROTOCOL_WIDTH
+// *******************************************************
+//
+typedef enum {
+ EfiCpuIoWidthUint8,
+ EfiCpuIoWidthUint16,
+ EfiCpuIoWidthUint32,
+ EfiCpuIoWidthUint64,
+ EfiCpuIoWidthFifoUint8,
+ EfiCpuIoWidthFifoUint16,
+ EfiCpuIoWidthFifoUint32,
+ EfiCpuIoWidthFifoUint64,
+ EfiCpuIoWidthFillUint8,
+ EfiCpuIoWidthFillUint16,
+ EfiCpuIoWidthFillUint32,
+ EfiCpuIoWidthFillUint64,
+ EfiCpuIoWidthMaximum
+} EFI_CPU_IO_PROTOCOL_WIDTH;
+
+//
+// *******************************************************
+// EFI_CPU_IO_PROTOCOL_IO_MEM
+// *******************************************************
+//
+/**
+ Enables a driver to access memory-mapped registers in the EFI system memory space.
+ Or, Enables a driver to access registers in the EFI CPU I/O space.
+
+ @param This A pointer to the EFI_CPU_IO_PROTOCOL instance.
+ @param Width Signifies the width of the I/O or Memory operation.
+ @param Address The base address of the I/O or Memoryoperation.
+ @param Count The number of I/O or Memory operations to perform.
+ The number of bytes moved is Width size * Count, starting at Address.
+ @param Buffer For read operations, the destination buffer to store the results.
+ For write operations, the source buffer from which to write data.
+
+ @retval EFI_SUCCESS The data was read from or written to the EFI system.
+ @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.Or Buffer is NULL.
+ @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
+ Or,The address range specified by Address, Width, and Count is not valid for this EFI system.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CPU_IO_PROTOCOL_IO_MEM) (
+ IN EFI_CPU_IO_PROTOCOL *This,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
+ );
+
+//
+// *******************************************************
+// EFI_CPU_IO_PROTOCOL_ACCESS
+// *******************************************************
+//
+typedef struct {
+ EFI_CPU_IO_PROTOCOL_IO_MEM Read;
+ EFI_CPU_IO_PROTOCOL_IO_MEM Write;
+} EFI_CPU_IO_PROTOCOL_ACCESS;
+
+//
+// *******************************************************
+// EFI_CPU_IO_PROTOCOL
+// *******************************************************
+//
+/**
+ @par Protocol Description:
+ Provides the basic memory and I/O interfaces that are used to abstract
+ accesses to devices in a system.
+
+ @param Mem.Read
+ Allows reads from memory-mapped I/O space.
+
+ @param Mem.Write
+ Allows writes to memory-mapped I/O space.
+
+ @param Io.Read
+ Allows reads from I/O space.
+
+ @param Io.Write
+ Allows writes to I/O space.
+
+**/
+struct _EFI_CPU_IO_PROTOCOL {
+ EFI_CPU_IO_PROTOCOL_ACCESS Mem;
+ EFI_CPU_IO_PROTOCOL_ACCESS Io;
+};
+
+extern EFI_GUID gEfiCpuIoProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/DataHub.h b/IntelFrameworkPkg/Include/Protocol/DataHub.h new file mode 100644 index 0000000000..8af09641ee --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/DataHub.h @@ -0,0 +1,212 @@ +/** @file
+ The data hub protocol is used both by agents wishing to log
+ data and those wishing to be made aware of all information that
+ has been logged.
+
+ For more information please look at Intel Platform Innovation
+ Framework for EFI Data Hub Specification.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DataHub.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Data Hub Specification.
+ Version 0.9.
+
+**/
+
+#ifndef _DATA_HUB_H_
+#define _DATA_HUB_H_
+
+#define EFI_DATA_HUB_PROTOCOL_GUID \
+ { \
+ 0xae80d021, 0x618e, 0x11d4, {0xbc, 0xd7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
+ }
+
+//
+// EFI generic Data Hub Header
+//
+// A Data Record is an EFI_DATA_RECORD_HEADER followed by RecordSize bytes of
+// data. The format of the data is defined by the DataRecordGuid.
+//
+// If EFI_DATA_RECORD_HEADER is extended in the future the Version number must
+// change and the HeaderSize will change if the definition of
+// EFI_DATA_RECORD_HEADER is extended.
+//
+// The logger is responcible for initializing:
+// Version, HeaderSize, RecordSize, DataRecordGuid, DataRecordClass
+//
+// The Data Hub driver is responcible for initializing:
+// LogTime and LogMonotonicCount.
+//
+#define EFI_DATA_RECORD_HEADER_VERSION 0x0100
+typedef struct {
+ UINT16 Version;
+ UINT16 HeaderSize;
+ UINT32 RecordSize;
+ EFI_GUID DataRecordGuid;
+ EFI_GUID ProducerName;
+ UINT64 DataRecordClass;
+ EFI_TIME LogTime;
+ UINT64 LogMonotonicCount;
+} EFI_DATA_RECORD_HEADER;
+
+//
+// Definition of DataRecordClass. These are used to filter out class types
+// at a very high level. The DataRecordGuid still defines the format of
+// the data. See DateHub.doc for rules on what can and can not be a
+// new DataRecordClass
+//
+#define EFI_DATA_RECORD_CLASS_DEBUG 0x0000000000000001
+#define EFI_DATA_RECORD_CLASS_ERROR 0x0000000000000002
+#define EFI_DATA_RECORD_CLASS_DATA 0x0000000000000004
+#define EFI_DATA_RECORD_CLASS_PROGRESS_CODE 0x0000000000000008
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_DATA_HUB_PROTOCOL EFI_DATA_HUB_PROTOCOL;
+
+/**
+ Logs a data record to the system event log.
+
+ @param This The EFI_DATA_HUB_PROTOCOL instance.
+ @param description
+ @param DataRecordGuid A GUID that indicates the format of the data passed into RawData.
+ @param ProducerName A GUID that indicates the identity of the caller to this API.
+ @param DataRecordClass This class indicates the generic type of the data record.
+ @param RawData The DataRecordGuid-defined data to be logged.
+ @param RawDataSize The size in bytes of RawData.
+
+ @retval EFI_SUCCESS Data was logged.
+ @retval EFI_OUT_OF_RESOURCES Data was not logged due to lack of system resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DATA_HUB_LOG_DATA) (
+ IN EFI_DATA_HUB_PROTOCOL *This,
+ IN EFI_GUID *DataRecordGuid,
+ IN EFI_GUID *ProducerName,
+ IN UINT64 DataRecordClass,
+ IN VOID *RawData,
+ IN UINT32 RawDataSize
+ );
+
+/**
+ Allows the system data log to be searched.
+
+ @param This The EFI_DATA_HUB_PROTOCOL instance.
+ @param MonotonicCount On input, it specifies the Record to return.
+ An input of zero means to return the first record.
+ @param FilterDriver If FilterDriver is not passed in a MonotonicCount of zero,
+ it means to return the first data record. If FilterDriver is passed in,
+ then a MonotonicCount of zero means to return the first data not yet read
+ by FilterDriver.
+ @param Record Returns a dynamically allocated memory buffer with a data
+ record that matches MonotonicCount.
+
+ @retval EFI_SUCCESS Data was returned in Record.
+ @retval EFI_INVALID_PARAMETER FilterDriver was passed in but does not exist.
+ @retval EFI_NOT_FOUND MonotonicCount does not match any data record
+ in the system. If a MonotonicCount of zero was passed in, then no
+ data records exist in the system.
+ @retval EFI_OUT_OF_RESOURCES Record was not returned due to lack
+ of system resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DATA_HUB_GET_NEXT_RECORD) (
+ IN EFI_DATA_HUB_PROTOCOL *This,
+ IN OUT UINT64 *MonotonicCount,
+ IN EFI_EVENT *FilterDriver OPTIONAL,
+ OUT EFI_DATA_RECORD_HEADER **Record
+ );
+
+/**
+ Registers an event to be signaled every time a data record is logged in the system.
+
+ @param This The EFI_DATA_HUB_PROTOCOL instance.
+ @param FilterEvent The EFI_EVENT to signal whenever data that matches
+ FilterClass is logged in the system.
+ @param FilterTpl The maximum EFI_TPL at which FilterEvent can be signaled.
+ It is strongly recommended that you use the lowest EFI_TPL possible.
+ @param FilterClass FilterEvent will be signaled whenever a bit
+ in EFI_DATA_RECORD_HEADER.DataRecordClass is also set in FilterClass.
+ If FilterClass is zero, no class-based filtering will be performed.
+ @param FilterDataRecordGuid FilterEvent will be signaled whenever
+ FilterDataRecordGuid matches EFI_DATA_RECORD_HEADER.DataRecordGuid.
+ If FilterDataRecordGuid is NULL, then no GUID-based filtering will be performed.
+
+ @retval EFI_SUCCESS The filter driver event was registered
+ @retval EFI_ALREADY_STARTED FilterEvent was previously registered and cannot be registered again.
+ @retval EFI_OUT_OF_RESOURCES The filter driver event was not registered
+ due to lack of system resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DATA_HUB_REGISTER_FILTER_DRIVER) (
+ IN EFI_DATA_HUB_PROTOCOL *This,
+ IN EFI_EVENT FilterEvent,
+ IN EFI_TPL FilterTpl,
+ IN UINT64 FilterClass,
+ IN EFI_GUID *FilterDataRecordGuid OPTIONAL
+ );
+
+/**
+ Stops a filter driver from being notified when data records are logged.
+
+ @param This The EFI_DATA_HUB_PROTOCOL instance.
+ @param FilterEvent The EFI_EVENT to remove from the list of events to be
+ signaled every time errors are logged.
+
+ @retval EFI_SUCCESS The filter driver represented by FilterEvent was shut off.
+ @retval EFI_NOT_FOUND FilterEvent did not exist.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DATA_HUB_UNREGISTER_FILTER_DRIVER) (
+ IN EFI_DATA_HUB_PROTOCOL *This,
+ IN EFI_EVENT FilterEvent
+ );
+
+/**
+ @par Protocol Description:
+ This protocol is used to log information and register filter drivers
+ to receive data records.
+
+ @param LogData
+ Logs a data record.
+
+ @param GetNextDataRecord
+ Gets a data record. Used both to view the memory-based log and to
+ get information about which data records have been consumed by a filter driver.
+
+ @param RegisterFilterDriver
+ Allows the registration of an EFI event to act as a filter driver for all data records that are logged.
+
+ @param UnregisterFilterDriver
+ Used to remove a filter driver that was added with RegisterFilterDriver().
+
+**/
+struct _EFI_DATA_HUB_PROTOCOL {
+ EFI_DATA_HUB_LOG_DATA LogData;
+ EFI_DATA_HUB_GET_NEXT_RECORD GetNextRecord;
+ EFI_DATA_HUB_REGISTER_FILTER_DRIVER RegisterFilterDriver;
+ EFI_DATA_HUB_UNREGISTER_FILTER_DRIVER UnregisterFilterDriver;
+};
+
+extern EFI_GUID gEfiDataHubProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/FirmwareVolume.h b/IntelFrameworkPkg/Include/Protocol/FirmwareVolume.h new file mode 100644 index 0000000000..50c53d5e2e --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/FirmwareVolume.h @@ -0,0 +1,319 @@ +/** @file
+ This file declares Firmware Volume protocol.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FirmwareVolume.h
+
+ @par Revision Reference:
+ This protocol is defined in Firmware Volume specification.
+ Version 0.9
+
+**/
+
+#ifndef _FIRMWARE_VOLUME_H_
+#define _FIRMWARE_VOLUME_H_
+
+
+//
+// Firmware Volume Protocol GUID definition
+//
+#define EFI_FIRMWARE_VOLUME_PROTOCOL_GUID \
+ { \
+ 0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xCD, 0x81, 0x54, 0xBD, 0x27, 0xF8 } \
+ }
+
+#define FV_DEVICE_SIGNATURE EFI_SIGNATURE_32 ('_', 'F', 'V', '_')
+
+typedef struct _EFI_FIRMWARE_VOLUME_PROTOCOL EFI_FIRMWARE_VOLUME_PROTOCOL;
+
+//
+// EFI_FV_ATTRIBUTES bit definitions
+//
+typedef UINT64 EFI_FV_ATTRIBUTES;
+
+//
+// ************************************************************
+// EFI_FV_ATTRIBUTES bit definitions
+// ************************************************************
+//
+#define EFI_FV_READ_DISABLE_CAP 0x0000000000000001ULL
+#define EFI_FV_READ_ENABLE_CAP 0x0000000000000002ULL
+#define EFI_FV_READ_STATUS 0x0000000000000004ULL
+
+#define EFI_FV_WRITE_DISABLE_CAP 0x0000000000000008ULL
+#define EFI_FV_WRITE_ENABLE_CAP 0x0000000000000010ULL
+#define EFI_FV_WRITE_STATUS 0x0000000000000020ULL
+
+#define EFI_FV_LOCK_CAP 0x0000000000000040ULL
+#define EFI_FV_LOCK_STATUS 0x0000000000000080ULL
+#define EFI_FV_WRITE_POLICY_RELIABLE 0x0000000000000100ULL
+
+#define EFI_FV_ALIGNMENT_CAP 0x0000000000008000ULL
+#define EFI_FV_ALIGNMENT_2 0x0000000000010000ULL
+#define EFI_FV_ALIGNMENT_4 0x0000000000020000ULL
+#define EFI_FV_ALIGNMENT_8 0x0000000000040000ULL
+#define EFI_FV_ALIGNMENT_16 0x0000000000080000ULL
+#define EFI_FV_ALIGNMENT_32 0x0000000000100000ULL
+#define EFI_FV_ALIGNMENT_64 0x0000000000200000ULL
+#define EFI_FV_ALIGNMENT_128 0x0000000000400000ULL
+#define EFI_FV_ALIGNMENT_256 0x0000000000800000ULL
+#define EFI_FV_ALIGNMENT_512 0x0000000001000000ULL
+#define EFI_FV_ALIGNMENT_1K 0x0000000002000000ULL
+#define EFI_FV_ALIGNMENT_2K 0x0000000004000000ULL
+#define EFI_FV_ALIGNMENT_4K 0x0000000008000000ULL
+#define EFI_FV_ALIGNMENT_8K 0x0000000010000000ULL
+#define EFI_FV_ALIGNMENT_16K 0x0000000020000000ULL
+#define EFI_FV_ALIGNMENT_32K 0x0000000040000000ULL
+#define EFI_FV_ALIGNMENT_64K 0x0000000080000000ULL
+
+//
+// Protocol API definitions
+//
+
+/**
+ Retrieves attributes, insures positive polarity of attribute bits, returns
+ resulting attributes in output parameter
+
+ @param This Calling context
+ @param Attributes output buffer which contains attributes
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FV_GET_ATTRIBUTES) (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ OUT EFI_FV_ATTRIBUTES *Attributes
+ );
+
+/**
+ Sets volume attributes
+
+ @param This Calling context
+ @param Attributes Buffer which contains attributes
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FV_SET_ATTRIBUTES) (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN OUT EFI_FV_ATTRIBUTES *Attributes
+ );
+
+typedef UINT32 EFI_FV_FILE_ATTRIBUTES;
+
+#define EFI_FV_FILE_ATTRIB_ALIGNMENT 0x0000001F
+
+/**
+ Read the requested file (NameGuid) and returns data in Buffer.
+
+ @param This Calling context
+ @param NameGuid Filename identifying which file to read
+ @param Buffer Pointer to pointer to buffer in which contents of file are returned.
+ <br>
+ If Buffer is NULL, only type, attributes, and size are returned as
+ there is no output buffer.
+ <br>
+ If Buffer != NULL and *Buffer == NULL, the output buffer is allocated
+ from BS pool by ReadFile
+ <br>
+ If Buffer != NULL and *Buffer != NULL, the output buffer has been
+ allocated by the caller and is being passed in.
+ @param BufferSize Indicates the buffer size passed in, and on output the size
+ required to complete the read
+ @param FoundType Indicates the type of the file who's data is returned
+ @param FileAttributes Indicates the attributes of the file who's data is resturned
+ @param AuthenticationStatus Indicates the authentication status of the data
+
+ @retval EFI_SUCCESS
+ @retval EFI_WARN_BUFFER_TOO_SMALL
+ @retval EFI_NOT_FOUND
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_ACCESS_DENIED
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FV_READ_FILE) (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN EFI_GUID *NameGuid,
+ IN OUT VOID **Buffer,
+ IN OUT UINTN *BufferSize,
+ OUT EFI_FV_FILETYPE *FoundType,
+ OUT EFI_FV_FILE_ATTRIBUTES *FileAttributes,
+ OUT UINT32 *AuthenticationStatus
+ );
+
+/**
+ Read the requested section from the specified file and returns data in Buffer.
+
+ @param This Calling context
+ @param NameGuid Filename identifying the file from which to read
+ @param SectionType Indicates what section type to retrieve
+ @param SectionInstance Indicates which instance of SectionType to retrieve
+ @param Buffer Pointer to pointer to buffer in which contents of file are returned.
+ <br>
+ If Buffer is NULL, only type, attributes, and size are returned as
+ there is no output buffer.
+ <br>
+ If Buffer != NULL and *Buffer == NULL, the output buffer is allocated
+ from BS pool by ReadFile
+ <br>
+ If Buffer != NULL and *Buffer != NULL, the output buffer has been
+ allocated by the caller and is being passed in.
+ @param BufferSize Indicates the buffer size passed in, and on output the size
+ required to complete the read
+ @param AuthenticationStatus Indicates the authentication status of the data
+
+ @retval EFI_SUCCESS
+ @retval EFI_WARN_BUFFER_TOO_SMALL
+ @retval EFI_OUT_OF_RESOURCES
+ @retval EFI_NOT_FOUND
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_ACCESS_DENIED
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FV_READ_SECTION) (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN EFI_GUID *NameGuid,
+ IN EFI_SECTION_TYPE SectionType,
+ IN UINTN SectionInstance,
+ IN OUT VOID **Buffer,
+ IN OUT UINTN *BufferSize,
+ OUT UINT32 *AuthenticationStatus
+ );
+
+typedef UINT32 EFI_FV_WRITE_POLICY;
+
+#define EFI_FV_UNRELIABLE_WRITE 0x00000000
+#define EFI_FV_RELIABLE_WRITE 0x00000001
+
+typedef struct {
+ EFI_GUID *NameGuid;
+ EFI_FV_FILETYPE Type;
+ EFI_FV_FILE_ATTRIBUTES FileAttributes;
+ VOID *Buffer;
+ UINT32 BufferSize;
+} EFI_FV_WRITE_FILE_DATA;
+
+/**
+ Write the supplied file (NameGuid) to the FV.
+
+ @param This Calling context
+ @param NumberOfFiles Indicates the number of file records pointed to by FileData
+ @param WritePolicy Indicates the level of reliability of the write with respect to
+ things like power failure events.
+ @param FileData A pointer to an array of EFI_FV_WRITE_FILE_DATA structures. Each
+ element in the array indicates a file to write, and there are
+ NumberOfFiles elements in the input array.
+
+ @retval EFI_SUCCESS
+ @retval EFI_OUT_OF_RESOURCES
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_WRITE_PROTECTED
+ @retval EFI_NOT_FOUND
+ @retval EFI_INVALID_PARAMETER
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FV_WRITE_FILE) (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN UINT32 NumberOfFiles,
+ IN EFI_FV_WRITE_POLICY WritePolicy,
+ IN EFI_FV_WRITE_FILE_DATA *FileData
+ );
+
+/**
+ Given the input key, search for the next matching file in the volume.
+
+ @param This Calling context
+ @param Key Pointer to a caller allocated buffer that contains an implementation
+ specific key that is used to track where to begin searching on
+ successive calls.
+ @param FileType Indicates the file type to filter for
+ @param NameGuid Guid filename of the file found
+ @param Attributes Attributes of the file found
+ @param Size Size in bytes of the file found
+
+ @retval EFI_SUCCESS
+ @retval EFI_NOT_FOUND
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_ACCESS_DENIED
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FV_GET_NEXT_FILE) (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN OUT VOID *Key,
+ IN OUT EFI_FV_FILETYPE *FileType,
+ OUT EFI_GUID *NameGuid,
+ OUT EFI_FV_FILE_ATTRIBUTES *Attributes,
+ OUT UINTN *Size
+ );
+
+/**
+ @par Protocol Description:
+ The Firmware Volume Protocol provides file-level access to the firmware volume.
+ Each firmware volume driver must produce an instance of the Firmware Volume
+ Protocol if the firmware volume is to be visible to the system. The Firmware
+ Volume Protocol also provides mechanisms for determining and modifying some
+ attributes of the firmware volume.
+
+ @param GetVolumeAttributes
+ Retrieves volume capabilities and current settings.
+
+ @param SetVolumeAttributes
+ Modifies the current settings of the firmware volume.
+
+ @param ReadFile
+ Reads an entire file from the firmware volume.
+
+ @param ReadSection
+ Reads a single section from a file into a buffer.
+
+ @param WriteFile
+ Writes an entire file into the firmware volume.
+
+ @param GetNextFile
+ Provides service to allow searching the firmware volume.
+
+ @param KeySize
+ Data field that indicates the size in bytes of the Key input buffer for
+ the GetNextFile() API.
+
+ @param ParentHandle
+ Handle of the parent firmware volume.
+
+**/
+struct _EFI_FIRMWARE_VOLUME_PROTOCOL {
+ EFI_FV_GET_ATTRIBUTES GetVolumeAttributes;
+ EFI_FV_SET_ATTRIBUTES SetVolumeAttributes;
+ EFI_FV_READ_FILE ReadFile;
+ EFI_FV_READ_SECTION ReadSection;
+ EFI_FV_WRITE_FILE WriteFile;
+ EFI_FV_GET_NEXT_FILE GetNextFile;
+ UINT32 KeySize;
+ EFI_HANDLE ParentHandle;
+};
+
+extern EFI_GUID gEfiFirmwareVolumeProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/FirmwareVolumeBlock.h b/IntelFrameworkPkg/Include/Protocol/FirmwareVolumeBlock.h new file mode 100644 index 0000000000..f397f5935d --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/FirmwareVolumeBlock.h @@ -0,0 +1,251 @@ +/** @file
+ This file declares Firmware Volume Block protocol.
+
+ Low level firmware device access routines to abstract firmware device
+ hardware.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FirmwareVolumeBlock.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework of EFI Firmware Volume Block specification.
+ Version 0.9
+
+**/
+
+#ifndef _FIRMWARE_VOLUME_BLOCK_H_
+#define _FIRMWARE_VOLUME_BLOCK_H_
+
+
+#define EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID \
+ { \
+ 0xDE28BC59, 0x6228, 0x41BD, {0xBD, 0xF6, 0xA3, 0xB9, 0xAD, 0xB5, 0x8D, 0xA1 } \
+ }
+
+typedef struct _EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL;
+
+/**
+ Retrieves Volume attributes. No polarity translations are done.
+
+ @param This Calling context
+ @param Attributes output buffer which contains attributes
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FVB_GET_ATTRIBUTES) (
+ IN EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ OUT EFI_FVB_ATTRIBUTES *Attributes
+ )
+;
+
+/**
+ Sets Volume attributes. No polarity translations are done.
+
+ @param This Calling context
+ @param Attributes On input: contains new attributes
+ On output: contains current attributes of FV
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FVB_SET_ATTRIBUTES) (
+ IN EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN OUT EFI_FVB_ATTRIBUTES *Attributes
+ )
+;
+
+/**
+ Retrieves the physical address of a memory mapped FV.
+
+ @param This Calling context
+ @param Attributes Address is a pointer to a caller allocated EFI_PHYSICAL_ADDRESS
+ that on successful return from GetPhysicalAddress() contains the
+ base address of the firmware volume.
+
+ @retval EFI_UNSUPPORTED
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FVB_GET_PHYSICAL_ADDRESS) (
+ IN EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ OUT EFI_PHYSICAL_ADDRESS *Address
+ )
+;
+
+/**
+ Retrieves the size in bytes of a specific block within an FV.
+
+ @param This Calling context.
+ @param Lba Indicates which block to return the size for.
+ @param BlockSize BlockSize is a pointer to a caller allocated
+ UINTN in which the size of the block is returned.
+ @param NumberOfBlocks NumberOfBlocks is a pointer to a caller allocated
+ UINTN in which the number of consecutive blocks
+ starting with Lba is returned. All blocks in this
+ range have a size of BlockSize.
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FVB_GET_BLOCK_SIZE) (
+ IN EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ OUT UINTN *BlockSize,
+ OUT UINTN *NumberOfBlocks
+ )
+;
+
+/**
+ Reads data beginning at Lba:Offset from FV and places the data in Buffer.
+ The read terminates either when *NumBytes of data have been read, or when
+ a block boundary is reached. *NumBytes is updated to reflect the actual
+ number of bytes read.
+
+ @param This Calling context
+ @param Lba Block in which to begin read
+ @param Offset Offset in the block at which to begin read
+ @param NumBytes At input, indicates the requested read size. At output, indicates
+ the actual number of bytes read.
+ @param Buffer Data buffer in which to place data read.
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_NOT_FOUND
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FVB_READ) (
+ IN EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ OUT UINT8 *Buffer
+ )
+;
+
+/**
+ Writes data beginning at Lba:Offset from FV. The write terminates either
+ when *NumBytes of data have been written, or when a block boundary is
+ reached. *NumBytes is updated to reflect the actual number of bytes
+ written.
+
+ @param This Calling context
+ @param Lba Block in which to begin write
+ @param Offset Offset in the block at which to begin write
+ @param NumBytes At input, indicates the requested write size. At output, indicates
+ the actual number of bytes written.
+ @param Buffer Buffer containing source data for the write.
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_NOT_FOUND
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FVB_WRITE) (
+ IN EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ IN UINT8 *Buffer
+ )
+;
+
+#define EFI_LBA_LIST_TERMINATOR 0xFFFFFFFFFFFFFFFFULL
+
+/**
+ The EraseBlock() function erases one or more blocks as denoted by the
+ variable argument list. The entire parameter list of blocks must be verified
+ prior to erasing any blocks. If a block is requested that does not exist
+ within the associated firmware volume (it has a larger index than the last
+ block of the firmware volume), the EraseBlock() function must return
+ EFI_INVALID_PARAMETER without modifying the contents of the firmware volume.
+
+ @param This Calling context
+ @param ... Starting LBA followed by Number of Lba to erase. a -1 to terminate
+ the list.
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_SUCCESS
+ @retval EFI_ACCESS_DENIED
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FVB_ERASE_BLOCKS) (
+ IN EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ ...
+ )
+;
+
+/**
+ @par Protocol Description:
+ This protocol provides control over block-oriented firmware devices.
+ Typically, the FFS (or an alternate file system) driver consumes the
+ Firmware Volume Block Protocol and produces the Firmware Volume Protocol.
+
+ @param GetAttributes
+ Retrieves the current volume attributes.
+
+ @param SetAttributes
+ Sets the current volume attributes.
+
+ @param GetPhysicalAddress
+ Retrieves the memory-mapped address of the firmware volume.
+
+ @param GetBlockSize
+ Retrieves the size for a specific block.
+
+ @param Read
+ Reads n bytes into a buffer from the firmware volume hardware.
+
+ @param Write
+ Writes n bytes from a buffer into the firmware volume hardware.
+
+ @param EraseBlocks
+ Erases specified block(s) and sets all values as indicated by
+ the EFI_FVB_ERASE_POLARITY bit.
+
+ @param ParentHandle
+ Handle of the parent firmware volume.
+
+**/
+struct _EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL {
+ EFI_FVB_GET_ATTRIBUTES GetVolumeAttributes;
+ EFI_FVB_SET_ATTRIBUTES SetVolumeAttributes;
+ EFI_FVB_GET_PHYSICAL_ADDRESS GetPhysicalAddress;
+ EFI_FVB_GET_BLOCK_SIZE GetBlockSize;
+ EFI_FVB_READ Read;
+ EFI_FVB_WRITE Write;
+ EFI_FVB_ERASE_BLOCKS EraseBlocks;
+ EFI_HANDLE ParentHandle;
+};
+
+extern EFI_GUID gEfiFirmwareVolumeBlockProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/Hii.h b/IntelFrameworkPkg/Include/Protocol/Hii.h new file mode 100644 index 0000000000..fbecbef8ae --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/Hii.h @@ -0,0 +1,942 @@ +/** @file
+ This file defines the Human Interface Infrastructure protocol which will
+ be used by resources which want to publish IFR/Font/String data and have it
+ collected by the Configuration engine.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Hii.h
+
+ @par Revision Reference:
+ This protocol is defined in HII spec 0.92.
+
+**/
+
+#ifndef _HII_H_
+#define _HII_H_
+
+#define EFI_HII_PROTOCOL_GUID \
+ { \
+ 0xd7ad636e, 0xb997, 0x459b, {0xbf, 0x3f, 0x88, 0x46, 0x89, 0x79, 0x80, 0xe1} \
+ }
+
+// BugBug:
+//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+// If UGA goes away we need to put this some place. I'm not sure where?
+//
+//typedef struct {
+// UINT8 Blue;
+// UINT8 Green;
+// UINT8 Red;
+// UINT8 Reserved;
+//} EFI_UGA_PIXEL;
+
+//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+//
+
+typedef struct _EFI_HII_PROTOCOL EFI_HII_PROTOCOL;
+
+//
+// Global definition
+//
+#define NARROW_CHAR 0xFFF0
+#define WIDE_CHAR 0xFFF1
+#define NON_BREAKING_CHAR 0xFFF2
+#define GLYPH_WIDTH 8
+#define GLYPH_HEIGHT 19
+
+#define EFI_HII_FONT 1
+#define EFI_HII_STRING 2
+#define EFI_HII_IFR 3
+#define EFI_HII_KEYBOARD 4
+#define EFI_HII_HANDLES 5
+#define EFI_HII_VARIABLE 6
+#define EFI_HII_DEVICE_PATH 7
+
+
+// References to string tokens must use this macro to enable scanning for
+// token usages.
+//
+#define STRING_TOKEN(t) t
+
+//
+// The following types are currently defined:
+//
+typedef UINT16 EFI_FORM_ID;
+typedef UINT16 EFI_FORM_LABEL;
+
+#pragma pack(1)
+
+typedef struct {
+ UINT32 Length;
+ UINT16 Type;
+} EFI_HII_PACK_HEADER;
+
+//
+// A form list consists of a large variety of structure
+// possibilities so to represent the binary blob of data
+// associated with a package of forms, we will assume a
+// pointer to a self-describing data buffer.
+//
+typedef struct {
+ EFI_HII_PACK_HEADER Header;
+} EFI_HII_IFR_PACK;
+
+typedef struct {
+ EFI_HII_PACK_HEADER Header; // Must be filled in
+ EFI_HANDLE ImageHandle; // Must be filled in
+ EFI_HANDLE DeviceHandle; // Optional
+ EFI_HANDLE ControllerHandle; // Optional
+ EFI_HANDLE CallbackHandle; // Optional
+ EFI_HANDLE COBExportHandle; // Optional
+} EFI_HII_HANDLE_PACK;
+
+//
+// ********************************************************
+// EFI_VARIABLE_CONTENTS
+// ********************************************************
+//
+typedef struct {
+ EFI_HII_PACK_HEADER Header;
+ EFI_GUID VariableGuid;
+ UINT32 VariableNameLength;
+ UINT16 VariableId;
+ //
+ // CHAR16 VariableName[]; //Null-terminated
+ //
+} EFI_HII_VARIABLE_PACK;
+
+//
+// ********************************************************
+// EFI_DEVICE_PATH_PACK
+// ********************************************************
+//
+typedef struct {
+ EFI_HII_PACK_HEADER Header;
+ //
+ // EFI_DEVICE_PATH DevicePath[];
+ //
+} EFI_HII_DEVICE_PATH_PACK;
+
+//
+// ********************************************************
+// EFI_HII_DATA_TABLE
+// ********************************************************
+//
+typedef struct {
+ EFI_HII_HANDLE HiiHandle;
+ EFI_GUID PackageGuid;
+ UINT32 DataTableSize;
+ UINT32 IfrDataOffset;
+ UINT32 StringDataOffset;
+ UINT32 VariableDataOffset;
+ UINT32 DevicePathOffset;
+ UINT32 NumberOfVariableData;
+ UINT32 NumberOfLanguages;
+ //
+ // EFI_HII_DEVICE_PATH_PACK DevicePath[];
+ // EFI_HII_VARIABLE_PACK VariableData[];
+ // EFI_HII_IFR_PACK IfrData;
+ // EFI_HII_STRING_PACK StringData[];
+ //
+} EFI_HII_DATA_TABLE;
+
+//
+// ********************************************************
+// EFI_HII_EXPORT_TABLE
+// ********************************************************
+//
+typedef struct {
+ UINT32 NumberOfHiiDataTables;
+ EFI_GUID Revision;
+ //
+ // EFI_HII_DATA_TABLE HiiDataTable[];
+ //
+} EFI_HII_EXPORT_TABLE;
+
+typedef struct {
+ BOOLEAN FormSetUpdate; // If TRUE, next variable is significant
+ EFI_PHYSICAL_ADDRESS FormCallbackHandle; // If not 0, will update Formset with this info
+ BOOLEAN FormUpdate; // If TRUE, next variable is significant
+ UINT16 FormValue; // specify which form is to be updated if FormUpdate value is TRUE.
+ STRING_REF FormTitle; // If not 0, will update Form with this info
+ UINT16 DataCount; // The number of Data entries in this structure
+ UINT8 *Data; // An array of 1+ op-codes, specified by DataCount
+} EFI_HII_UPDATE_DATA;
+
+//
+// String attributes
+//
+#define LANG_RIGHT_TO_LEFT 0x00000001
+
+//
+// A string package is used to localize strings to a particular
+// language. The package is associated with a particular driver
+// or set of drivers. Tools are used to associate tokens with
+// string references in forms and in programs. These tokens are
+// language agnostic. When paired with a language pack (directly
+// or indirectly), the string token resolves into an actual
+// UNICODE string. The NumStringPointers determines how many
+// StringPointers (offset values) there are as well as the total
+// number of Strings that are defined.
+//
+typedef struct {
+ EFI_HII_PACK_HEADER Header;
+ RELOFST LanguageNameString;
+ RELOFST PrintableLanguageName;
+ UINT32 NumStringPointers;
+ UINT32 Attributes;
+ //
+ // RELOFST StringPointers[];
+ // EFI_STRING Strings[];
+ //
+} EFI_HII_STRING_PACK;
+
+//
+// Glyph Attributes
+//
+#define EFI_GLYPH_NON_SPACING 1
+#define EFI_GLYPH_WIDE 2
+
+typedef struct {
+ CHAR16 UnicodeWeight;
+ UINT8 Attributes;
+ UINT8 GlyphCol1[GLYPH_HEIGHT];
+} EFI_NARROW_GLYPH;
+
+typedef struct {
+ CHAR16 UnicodeWeight;
+ UINT8 Attributes;
+ UINT8 GlyphCol1[GLYPH_HEIGHT];
+ UINT8 GlyphCol2[GLYPH_HEIGHT];
+ UINT8 Pad[3];
+} EFI_WIDE_GLYPH;
+
+//
+// A font list consists of a font header followed by a series
+// of glyph structures. Note that fonts are not language specific.
+//
+typedef struct {
+ EFI_HII_PACK_HEADER Header;
+ UINT16 NumberOfNarrowGlyphs;
+ UINT16 NumberOfWideGlyphs;
+} EFI_HII_FONT_PACK;
+
+//
+// The IfrData in the EFI_HII_IFR_PACK structure definition
+// is variable length, and not really part of the header. To
+// simplify from code the size of the header, define an
+// identical structure that does not include the IfrData field.
+// Then use sizeof() this new structure to determine the
+// actual size of the header.
+//
+typedef struct {
+ EFI_HII_PACK_HEADER Header;
+} EFI_HII_IFR_PACK_HEADER;
+
+//
+// pedef EFI_HII_PACK_HEADER EFI_HII_IFR_PACK_HEADER;
+//
+typedef enum {
+ EfiKeyLCtrl,
+ EfiKeyA0,
+ EfiKeyLAlt,
+ EfiKeySpaceBar,
+ EfiKeyA2,
+ EfiKeyA3,
+ EfiKeyA4,
+ EfiKeyRCtrl,
+ EfiKeyLeftArrow,
+ EfiKeyDownArrow,
+ EfiKeyRightArrow,
+ EfiKeyZero,
+ EfiKeyPeriod,
+ EfiKeyEnter,
+ EfiKeyLShift,
+ EfiKeyB0,
+ EfiKeyB1,
+ EfiKeyB2,
+ EfiKeyB3,
+ EfiKeyB4,
+ EfiKeyB5,
+ EfiKeyB6,
+ EfiKeyB7,
+ EfiKeyB8,
+ EfiKeyB9,
+ EfiKeyB10,
+ EfiKeyRshift,
+ EfiKeyUpArrow,
+ EfiKeyOne,
+ EfiKeyTwo,
+ EfiKeyThree,
+ EfiKeyCapsLock,
+ EfiKeyC1,
+ EfiKeyC2,
+ EfiKeyC3,
+ EfiKeyC4,
+ EfiKeyC5,
+ EfiKeyC6,
+ EfiKeyC7,
+ EfiKeyC8,
+ EfiKeyC9,
+ EfiKeyC10,
+ EfiKeyC11,
+ EfiKeyC12,
+ EfiKeyFour,
+ EfiKeyFive,
+ EfiKeySix,
+ EfiKeyPlus,
+ EfiKeyTab,
+ EfiKeyD1,
+ EfiKeyD2,
+ EfiKeyD3,
+ EfiKeyD4,
+ EfiKeyD5,
+ EfiKeyD6,
+ EfiKeyD7,
+ EfiKeyD8,
+ EfiKeyD9,
+ EfiKeyD10,
+ EfiKeyD11,
+ EfiKeyD12,
+ EfiKeyD13,
+ EfiKeyDel,
+ EfiKeyEnd,
+ EfiKeyPgDn,
+ EfiKeySeven,
+ EfiKeyEight,
+ EfiKeyNine,
+ EfiKeyE0,
+ EfiKeyE1,
+ EfiKeyE2,
+ EfiKeyE3,
+ EfiKeyE4,
+ EfiKeyE5,
+ EfiKeyE6,
+ EfiKeyE7,
+ EfiKeyE8,
+ EfiKeyE9,
+ EfiKeyE10,
+ EfiKeyE11,
+ EfiKeyE12,
+ EfiKeyBackSpace,
+ EfiKeyIns,
+ EfiKeyHome,
+ EfiKeyPgUp,
+ EfiKeyNLck,
+ EfiKeySlash,
+ EfiKeyAsterisk,
+ EfiKeyMinus,
+ EfiKeyEsc,
+ EfiKeyF1,
+ EfiKeyF2,
+ EfiKeyF3,
+ EfiKeyF4,
+ EfiKeyF5,
+ EfiKeyF6,
+ EfiKeyF7,
+ EfiKeyF8,
+ EfiKeyF9,
+ EfiKeyF10,
+ EfiKeyF11,
+ EfiKeyF12,
+ EfiKeyPrint,
+ EfiKeySLck,
+ EfiKeyPause
+} EFI_KEY;
+
+typedef struct {
+ EFI_KEY Key;
+ CHAR16 Unicode;
+ CHAR16 ShiftedUnicode;
+ CHAR16 AltGrUnicode;
+ CHAR16 ShiftedAltGrUnicode;
+ UINT16 Modifier;
+} EFI_KEY_DESCRIPTOR;
+
+//
+// This structure allows a sparse set of keys to be redefined
+// or a complete redefinition of the keyboard layout. Most
+// keyboards have a lot of commonality in their layouts, therefore
+// only defining those keys that need to change from the default
+// minimizes the passed in information.
+//
+// Additionally, when an update occurs, the active keyboard layout
+// will be switched to the newly updated keyboard layout. This
+// allows for situations that when a keyboard layout driver is
+// loaded as part of system initialization, the system will default
+// the keyboard behavior to the new layout.
+//
+// Each call to update the keyboard mapping should contain the
+// complete set of key descriptors to be updated, since every
+// call to the HII which contains an EFI_HII_KEYBOARD_PACK will
+// wipe the previous set of overrides. A call to
+//
+typedef struct {
+ EFI_HII_PACK_HEADER Header;
+ EFI_KEY_DESCRIPTOR *Descriptor;
+ UINT8 DescriptorCount;
+} EFI_HII_KEYBOARD_PACK;
+
+//
+// The EFI_HII_PACKAGES can contain different types of packages just
+// after the structure as inline data.
+//
+typedef struct {
+ UINTN NumberOfPackages;
+ EFI_GUID *GuidId;
+ //
+ // EFI_HII_HANDLE_PACK *HandlePack; // Only one pack.
+ // EFI_HII_IFR_PACK *IfrPack; // Only one pack.
+ // EFI_HII_FONT_PACK *FontPack[]; // Multiple packs ok
+ // EFI_HII_STRING_PACK *StringPack[]; // Multiple packs ok
+ // EFI_HII_KEYBOARD_PACK *KeyboardPack[]; // Multiple packs ok
+ //
+} EFI_HII_PACKAGES;
+
+typedef struct _EFI_HII_VARIABLE_PACK_LIST {
+ struct _EFI_HII_VARIABLE_PACK_LIST *NextVariablePack;
+ EFI_HII_VARIABLE_PACK *VariablePack;
+} EFI_HII_VARIABLE_PACK_LIST;
+
+#pragma pack()
+
+/**
+ Registers the various packs that are passed in via the Packages parameter.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Packages A pointer to an EFI_HII_PACKAGES package instance.
+ @param Handle A pointer to the EFI_HII_HANDLE instance.
+
+ @retval EFI_SUCCESS Data was extracted from Packages, the database
+ was updated with the data, and Handle returned successfully.
+ @retval EFI_INVALID_PARAMETER The content of Packages was invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_NEW_PACK) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_PACKAGES *Packages,
+ OUT EFI_HII_HANDLE *Handle
+ );
+
+/**
+ Removes a package from the HII database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle The handle that was registered to the data that is requested
+ for removal.
+
+ @retval EFI_SUCCESS The data associated with the Handle was removed
+ from the HII database.
+ @retval EFI_INVALID_PARAMETER The Handle was not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_REMOVE_PACK) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle
+ );
+
+/**
+ Determines the handles that are currently active in the database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param HandleBufferLength On input, a pointer to the length of the handle
+ buffer. On output, the length of the handle buffer that is required
+ for the handles found.
+ @param Handle An array of EFI_HII_HANDLE instances returned.
+
+ @retval EFI_SUCCESS Handle was updated successfully.
+ @retval EFI_BUFFER_TOO_SMALL The HandleBufferLength parameter indicates
+ that Handle is too small to support the number of handles.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_FIND_HANDLES) (
+ IN EFI_HII_PROTOCOL *This,
+ IN OUT UINT16 *HandleBufferLength,
+ OUT EFI_HII_HANDLE *Handle
+ );
+
+/**
+ Exports the contents of the database into a buffer.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle An EFI_HII_HANDLE that corresponds to the desired
+ handle to export. If the value is 0, the entire database will be exported.
+ In either case, the data will be exported in a format described by the
+ structure definition of EFI_HII_EXPORT_TABLE.
+ @param BufferSize
+ On input, a pointer to the length of the buffer. On output, the length
+ of the buffer that is required for the export data.
+ @param Buffer A pointer to a buffer that will contain the results of the export function.
+
+ @retval EFI_SUCCESS The buffer was successfully filled with BufferSize amount of data.
+ @retval EFI_BUFFER_TOO_SMALL The value in BufferSize was too small to contain the export data.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_EXPORT) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ );
+
+/**
+ Remove any new strings that were added after the initial string export
+ for this handle.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle The handle on which the string resides.
+
+ @retval EFI_SUCCESS Remove strings from the handle successfully.
+ @retval EFI_INVALID_PARAMETER The Handle was unknown.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_RESET_STRINGS) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle
+ );
+
+/**
+ Tests if all of the characters in a string have corresponding font characters.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param StringToTest A pointer to a Unicode string.
+ @param FirstMissing A pointer to an index into the string. On input,
+ the index of the first character in the StringToTest to examine. On exit,
+ the index of the first character encountered for which a glyph is unavailable.
+ If all glyphs in the string are available, the index is the index of the
+ terminator of the string.
+ @param GlyphBufferSize A pointer to a value. On output, if the function
+ returns EFI_SUCCESS, it contains the amount of memory that is required to
+ store the string's glyph equivalent.
+
+ @retval EFI_SUCCESS All glyphs are available. Note that an empty string
+ always returns this value.
+ @retval EFI_NOT_FOUND A glyph was not found for a character.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_TEST_STRING) (
+ IN EFI_HII_PROTOCOL *This,
+ IN CHAR16 *StringToTest,
+ IN OUT UINT32 *FirstMissing,
+ OUT UINT32 *GlyphBufferSize
+ );
+
+/**
+ Translates a Unicode character into the corresponding font glyph.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Source A pointer to a Unicode string.
+ @param Index On input, the offset into the string from which to fetch
+ the character.On successful completion, the index is updated to the first
+ character past the character(s) making up the just extracted glyph.
+ @param GlyphBuffer Pointer to an array where the glyphs corresponding
+ to the characters in the source may be stored. GlyphBuffer is assumed
+ to be wide enough to accept a wide glyph character.
+ @param BitWidth If EFI_SUCCESS was returned, the UINT16 pointed to by
+ this value is filled with the length of the glyph in pixels. It is unchanged
+ if the call was unsuccessful.
+ @param InternalStatus The cell pointed to by this parameter must be
+ initialized to zero prior to invoking the call the first time for any string.
+
+ @retval EFI_SUCCESS It worked.
+ @retval EFI_NOT_FOUND A glyph for a character was not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_GLYPH) (
+ IN EFI_HII_PROTOCOL *This,
+ IN CHAR16 *Source,
+ IN OUT UINT16 *Index,
+ OUT UINT8 **GlyphBuffer,
+ OUT UINT16 *BitWidth,
+ IN OUT UINT32 *InternalStatus
+ );
+
+/**
+ Translates a glyph into the format required for input to the Universal
+ Graphics Adapter (UGA) Block Transfer (BLT) routines.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param GlyphBuffer A pointer to the buffer that contains glyph data.
+ @param Foreground The foreground setting requested to be used for the
+ generated BltBuffer data.
+ @param Background The background setting requested to be used for the
+ generated BltBuffer data.
+ @param Count The entry in the BltBuffer upon which to act.
+ @param Width The width in bits of the glyph being converted.
+ @param Height The height in bits of the glyph being converted
+ @param BltBuffer A pointer to the buffer that contains the data that is
+ ready to be used by the UGA BLT routines.
+
+ @retval EFI_SUCCESS It worked.
+ @retval EFI_NOT_FOUND A glyph for a character was not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GLYPH_TO_BLT) (
+ IN EFI_HII_PROTOCOL *This,
+ IN UINT8 *GlyphBuffer,
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL Foreground,
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL Background,
+ IN UINTN Count,
+ IN UINTN Width,
+ IN UINTN Height,
+ IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer
+ );
+
+/**
+ Allows a new string to be added to an already existing string package.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Pointer to a NULL-terminated string containing a single ISO 639-2
+ language identifier, indicating the language in which the string is translated.
+ @param Handle The handle of the language pack to which the string is to be added.
+ @param Reference The identifier of the string to be added. If the reference
+ value is zero, then the string will be assigned a new identifier on that
+ handle for the language specified. Otherwise, the string will be updated
+ with the NewString Value.
+ @param NewString The string to be added.
+
+ @retval EFI_SUCCESS The string was effectively registered.
+ @retval EFI_INVALID_PARAMETER The Handle was unknown.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_NEW_STRING) (
+ IN EFI_HII_PROTOCOL *This,
+ IN CHAR16 *Language,
+ IN EFI_HII_HANDLE Handle,
+ IN OUT STRING_REF *Reference,
+ IN CHAR16 *NewString
+ );
+
+/**
+ Allows a program to determine the primary languages that are supported
+ on a given handle.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle The handle on which the strings reside.
+ @param LanguageString A string allocated by GetPrimaryLanguages() that
+ contains a list of all primary languages registered on the handle.
+
+ @retval EFI_SUCCESS LanguageString was correctly returned.
+ @retval EFI_INVALID_PARAMETER The Handle was unknown.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_PRI_LANGUAGES) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ OUT EFI_STRING *LanguageString
+ );
+
+/**
+ Allows a program to determine which secondary languages are supported
+ on a given handle for a given primary language.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle The handle on which the strings reside.
+ @param PrimaryLanguage Pointer to a NULL-terminated string containing a single
+ ISO 639-2 language identifier, indicating the primary language.
+ @param LanguageString A string allocated by GetSecondaryLanguages()
+ containing a list of all secondary languages registered on the handle.
+
+ @retval EFI_SUCCESS LanguageString was correctly returned.
+ @retval EFI_INVALID_PARAMETER The Handle was unknown.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_SEC_LANGUAGES) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ IN CHAR16 *PrimaryLanguage,
+ OUT EFI_STRING *LanguageString
+ );
+
+/**
+ Extracts a string from a package already registered with the EFI HII database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle The handle on which the string resides.
+ @param Token The string token assigned to the string.
+ @param Raw If TRUE, the string is returned unedited in the internal
+ storage format described above. If false, the string returned is edited
+ by replacing <cr> with <space> and by removing special characters such
+ as the <wide> prefix.
+ @param LanguageString Pointer to a NULL-terminated string containing a
+ single ISO 639-2 language identifier, indicating the language to print.
+ If the LanguageString is empty (starts with a NULL), the default system
+ language will be used to determine the language.
+ @param BufferLength Length of the StringBuffer.
+ @param StringBuffer The buffer designed to receive the characters in the string.
+
+ @retval EFI_SUCCESS StringBuffer is filled with a NULL-terminated string.
+ @retval EFI_INVALID_PARAMETER The handle or string token is unknown.
+ @retval EFI_BUFFER_TOO_SMALL The buffer provided was not large enough to
+ allow the entire string to be stored.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_STRING) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ IN STRING_REF Token,
+ IN BOOLEAN Raw,
+ IN CHAR16 *LanguageString,
+ IN OUT UINTN *BufferLength,
+ OUT EFI_STRING StringBuffer
+ );
+
+/**
+ Allows a program to extract a part of a string of not more than a given width.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle The handle on which the string resides.
+ @param Token The string token assigned to the string.
+ @param Index On input, the offset into the string where the line is to start.
+ On output, the index is updated to point to beyond the last character returned
+ in the call.
+ @param LineWidth The maximum width of the line in units of narrow glyphs.
+ @param LanguageString Pointer to a NULL-terminated string containing a
+ single ISO 639-2 language identifier, indicating the language to print.
+ @param BufferLength Pointer to the length of the StringBuffer.
+ @param StringBuffer The buffer designed to receive the characters in the string.
+
+ @retval EFI_SUCCESS StringBuffer filled with characters that will fit on the line.
+ @retval EFI_NOT_FOUND The font glyph for at least one of the characters in
+ the string is not in the font database.
+ @retval EFI_BUFFER_TOO_SMALL The buffer provided was not large enough
+ to allow the entire string to be stored.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_LINE) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ IN STRING_REF Token,
+ IN OUT UINT16 *Index,
+ IN UINT16 LineWidth,
+ IN CHAR16 *LanguageString,
+ IN OUT UINT16 *BufferLength,
+ OUT EFI_STRING StringBuffer
+ );
+
+/**
+ Allows a program to extract a form or form package that has previously
+ been registered with the HII database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle Handle on which the form resides.
+ @param FormId The ID of the form to return. If the ID is zero,
+ the entire form package is returned.
+ @param BufferLength On input, the length of the Buffer. On output,
+ the length of the returned buffer,
+ @param Buffer The buffer designed to receive the form(s).
+
+ @retval EFI_SUCCESS Buffer filled with the requested forms. BufferLength
+ was updated.
+ @retval EFI_INVALID_PARAMETER The handle is unknown.
+ @retval EFI_NOT_FOUND A form on the requested handle cannot be found with
+ the requested FormId.
+ @retval EFI_BUFFER_TOO_SMALL The buffer provided was not large enough
+ to allow the form to be stored.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_FORMS) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ IN EFI_FORM_ID FormId,
+ IN OUT UINTN *BufferLength,
+ OUT UINT8 *Buffer
+ );
+
+/**
+ Extracts the defaults that are associated with a given handle in the HII database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle The HII handle from which will have default data retrieved.
+ @param DefaultMask The mask used to specify some type of default override when extracting
+ the default image data.
+ @param VariablePackList A indirect pointer to the first entry of a link list with
+ type EFI_HII_VARIABLE_PACK_LIST.
+
+ @retval EFI_SUCCESS The VariablePackList was populated with the appropriate
+ default setting data.
+ @retval EFI_NOT_FOUND The IFR does not have any explicit or default map(s).
+ @retval EFI_INVALID_PARAMETER The HII database entry associated with Handle
+ contain invalid data.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_DEFAULT_IMAGE) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ IN UINTN DefaultMask,
+ OUT EFI_HII_VARIABLE_PACK_LIST **VariablePackList
+ );
+
+/**
+ Allows the caller to update a form or form package that has previously been
+ registered with the EFI HII database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle Handle of the package where the form to be updated resides.
+ @param Label The label inside the form package where the update is to take place.
+ @param AddData If TRUE, adding data at a given Label; otherwise,
+ if FALSE, removing data at a given Label.
+ @param Data The buffer containing the new tags to insert after the Label
+
+ @retval EFI_SUCCESS The form was updated with the new tags.
+ @retval EFI_INVALID_PARAMETER The buffer for the buffer length does not
+ contain an integral number of tags.
+ @retval EFI_NOT_FOUND The Handle, Label, or FormId was not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_UPDATE_FORM) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ IN EFI_FORM_LABEL Label,
+ IN BOOLEAN AddData,
+ IN EFI_HII_UPDATE_DATA *Data
+ );
+
+/**
+ Retrieves the current keyboard layout.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param DescriptorCount A pointer to the number of Descriptor entries being
+ described in the keyboard layout being retrieved.
+ @param Descriptor A pointer to a buffer containing an array of EFI_KEY_DESCRIPTOR
+ entries. Each entry will reflect the definition of a specific physical key.
+
+ @retval EFI_SUCCESS The keyboard layout was retrieved successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_KEYBOARD_LAYOUT) (
+ IN EFI_HII_PROTOCOL *This,
+ OUT UINT16 *DescriptorCount,
+ OUT EFI_KEY_DESCRIPTOR *Descriptor
+ );
+
+/**
+ @par Protocol Description:
+ The HII Protocol manages the HII database, which is a repository for data
+ having to do with fonts, strings, forms, keyboards, and other future human
+ interface items.
+
+ @param NewPack
+ Extracts the various packs from a package list.
+
+ @param RemovePack
+ Removes a package from the HII database.
+
+ @param FindHandles
+ Determines the handles that are currently active in the database.
+
+ @param ExportDatabase
+ Export the entire contents of the database to a buffer.
+
+ @param TestString
+ Tests if all of the characters in a string have corresponding font characters.
+
+ @param GetGlyph
+ Translates a Unicode character into the corresponding font glyph.
+
+ @param GlyphToBlt
+ Converts a glyph value into a format that is ready for a UGA BLT command.
+
+ @param NewString
+ Allows a new string to be added to an already existing string package.
+
+ @param GetPrimaryLanguages
+ Allows a program to determine the primary languages that are supported
+ on a given handle.
+
+ @param GetSecondaryLanguages
+ Allows a program to determine which secondary languages are supported
+ on a given handle for a given primary language.
+
+ @param GetString
+ Extracts a string from a package that is already registered with the
+ EFI HII database.
+
+ @param ResetString
+ Remove any new strings that were added after the initial string export
+ for this handle.
+
+ @param GetLine
+ Allows a program to extract a part of a string of not more than a given width.
+
+ @param GetForms
+ Allows a program to extract a form or form package that has been previously registered.
+
+ @param GetDefaultImage
+ Allows a program to extract the nonvolatile image that represents the default storage image.
+
+ @param UpdateForm
+ Allows a program to update a previously registered form.
+
+ @param GetKeyboardLayout
+ Allows a program to extract the current keyboard layout.
+
+**/
+struct _EFI_HII_PROTOCOL {
+ EFI_HII_NEW_PACK NewPack;
+ EFI_HII_REMOVE_PACK RemovePack;
+ EFI_HII_FIND_HANDLES FindHandles;
+ EFI_HII_EXPORT ExportDatabase;
+
+ EFI_HII_TEST_STRING TestString;
+ EFI_HII_GET_GLYPH GetGlyph;
+ EFI_HII_GLYPH_TO_BLT GlyphToBlt;
+
+ EFI_HII_NEW_STRING NewString;
+ EFI_HII_GET_PRI_LANGUAGES GetPrimaryLanguages;
+ EFI_HII_GET_SEC_LANGUAGES GetSecondaryLanguages;
+ EFI_HII_GET_STRING GetString;
+ EFI_HII_RESET_STRINGS ResetStrings;
+ EFI_HII_GET_LINE GetLine;
+ EFI_HII_GET_FORMS GetForms;
+ EFI_HII_GET_DEFAULT_IMAGE GetDefaultImage;
+ EFI_HII_UPDATE_FORM UpdateForm;
+
+ EFI_HII_GET_KEYBOARD_LAYOUT GetKeyboardLayout;
+};
+
+extern EFI_GUID gEfiHiiProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/IdeControllerInit.h b/IntelFrameworkPkg/Include/Protocol/IdeControllerInit.h new file mode 100644 index 0000000000..1f8b51589f --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/IdeControllerInit.h @@ -0,0 +1,455 @@ +/** @file
+ This file declares EFI IDE Controller Init Protocol
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IdeControllerInit.h
+
+ @par Revision Reference:
+ This Protocol is defined in IDE Controller Initialization Protocol Specification
+ Version 0.9
+
+**/
+
+#ifndef _EFI_IDE_CONTROLLER_INIT_PROTOCOL_H_
+#define _EFI_IDE_CONTROLLER_INIT_PROTOCOL_H_
+
+//
+// Global ID for the EFI Platform IDE Protocol GUID
+//
+#define EFI_IDE_CONTROLLER_INIT_PROTOCOL_GUID \
+ { 0xa1e37052, 0x80d9, 0x4e65, {0xa3, 0x17, 0x3e, 0x9a, 0x55, 0xc4, 0x3e, 0xc9 } }
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_IDE_CONTROLLER_INIT_PROTOCOL EFI_IDE_CONTROLLER_INIT_PROTOCOL;
+
+//
+//////////////////////////////////////////////////////////////////////////////////////////
+// EFI_IDE_BUS_ENUMERATION_PHASE
+// EFI_IDE_CONTROLLER_ENUM_PHASE
+//
+typedef enum{
+ EfiIdeBeforeChannelEnumeration,
+ EfiIdeAfterChannelEnumeration,
+ EfiIdeBeforeChannelReset,
+ EfiIdeAfterChannelReset,
+ EfiIdeBusBeforeDevicePresenceDetection,
+ EfiIdeBusAfterDevicePresenceDetection,
+ EfiIdeResetMode,
+ EfiIdeBusPhaseMaximum
+} EFI_IDE_CONTROLLER_ENUM_PHASE;
+
+//
+//******************************************************
+// EFI_ATA_EXT_TRANSFER_PROTOCOL
+//******************************************************
+//
+// This extended mode describes the SATA physical protocol.
+// SATA physical layers can operate at different speeds.
+// These speeds are defined below. Various PATA protocols
+// and associated modes are not applicable to SATA devices.
+//
+
+typedef enum {
+ EfiAtaSataTransferProtocol
+} EFI_ATA_EXT_TRANSFER_PROTOCOL;
+
+#define EFI_SATA_AUTO_SPEED 0
+#define EFI_SATA_GEN1_SPEED 1
+#define EFI_SATA_GEN2_SPEED 2
+
+//
+//*******************************************************
+// EFI_IDE_CABLE_TYPE
+//*******************************************************
+//
+typedef enum {
+ EfiIdeCableTypeUnknown,
+ EfiIdeCableType40pin,
+ EfiIdeCableType80Pin,
+ EfiIdeCableTypeSerial,
+ EfiIdeCableTypeMaximum
+} EFI_IDE_CABLE_TYPE;
+
+//
+//******************************************************
+// EFI_ATA_MODE
+//******************************************************
+//
+typedef struct {
+ BOOLEAN Valid;
+ UINT32 Mode;
+} EFI_ATA_MODE;
+
+//
+//******************************************************
+// EFI_ATA_EXTENDED_MODE
+//******************************************************
+//
+typedef struct {
+ EFI_ATA_EXT_TRANSFER_PROTOCOL TransferProtocol;
+ UINT32 Mode;
+} EFI_ATA_EXTENDED_MODE;
+
+//
+//******************************************************
+// EFI_ATA_COLLECTIVE_MODE
+//******************************************************
+//
+typedef struct {
+ EFI_ATA_MODE PioMode;
+ EFI_ATA_MODE SingleWordDmaMode;
+ EFI_ATA_MODE MultiWordDmaMode;
+ EFI_ATA_MODE UdmaMode;
+ UINT32 ExtModeCount;
+ EFI_ATA_EXTENDED_MODE ExtMode[1];
+} EFI_ATA_COLLECTIVE_MODE;
+
+//
+//*******************************************************
+// EFI_ATA_IDENTIFY_DATA
+//*******************************************************
+//
+
+#pragma pack(1)
+
+typedef struct {
+ UINT16 config; // General Configuration
+ UINT16 cylinders; // Number of Cylinders
+ UINT16 reserved_2;
+ UINT16 heads; //Number of logical heads
+ UINT16 vendor_data1;
+ UINT16 vendor_data2;
+ UINT16 sectors_per_track;
+ UINT16 vendor_specific_7_9[3];
+ CHAR8 SerialNo[20]; // ASCII
+ UINT16 vendor_specific_20_21[2];
+ UINT16 ecc_bytes_available;
+ CHAR8 FirmwareVer[8]; // ASCII
+ CHAR8 ModelName[40]; // ASCII
+ UINT16 multi_sector_cmd_max_sct_cnt;
+ UINT16 reserved_48;
+ UINT16 capabilities;
+ UINT16 reserved_50;
+ UINT16 pio_cycle_timing;
+ UINT16 reserved_52;
+ UINT16 field_validity;
+ UINT16 current_cylinders;
+ UINT16 current_heads;
+ UINT16 current_sectors;
+ UINT16 CurrentCapacityLsb;
+ UINT16 CurrentCapacityMsb;
+ UINT16 reserved_59;
+ UINT16 user_addressable_sectors_lo;
+ UINT16 user_addressable_sectors_hi;
+ UINT16 reserved_62;
+ UINT16 multi_word_dma_mode;
+ UINT16 advanced_pio_modes;
+ UINT16 min_multi_word_dma_cycle_time;
+ UINT16 rec_multi_word_dma_cycle_time;
+ UINT16 min_pio_cycle_time_without_flow_control;
+ UINT16 min_pio_cycle_time_with_flow_control;
+ UINT16 reserved_69_79[11];
+ UINT16 major_version_no;
+ UINT16 minor_version_no;
+ UINT16 command_set_supported_82; // word 82
+ UINT16 command_set_supported_83; // word 83
+ UINT16 command_set_feature_extn; // word 84
+ UINT16 command_set_feature_enb_85; // word 85
+ UINT16 command_set_feature_enb_86; // word 86
+ UINT16 command_set_feature_default; // word 87
+ UINT16 ultra_dma_mode; // word 88
+ UINT16 reserved_89_127[39];
+ UINT16 security_status;
+ UINT16 vendor_data_129_159[31];
+ UINT16 reserved_160_255[96];
+} EFI_ATA_IDENTIFY_DATA;
+
+#pragma pack()
+//
+//*******************************************************
+// EFI_ATAPI_IDENTIFY_DATA
+//*******************************************************
+//
+#pragma pack(1)
+typedef struct {
+ UINT16 config; // General Configuration
+ UINT16 obsolete_1;
+ UINT16 specific_config;
+ UINT16 obsolete_3;
+ UINT16 retired_4_5[2];
+ UINT16 obsolete_6;
+ UINT16 cfa_reserved_7_8[2];
+ UINT16 retired_9;
+ CHAR8 SerialNo[20]; // ASCII
+ UINT16 retired_20_21[2];
+ UINT16 obsolete_22;
+ CHAR8 FirmwareVer[8]; // ASCII
+ CHAR8 ModelName[40]; // ASCII
+ UINT16 multi_sector_cmd_max_sct_cnt;
+ UINT16 reserved_48;
+ UINT16 capabilities_49;
+ UINT16 capabilities_50;
+ UINT16 obsolete_51_52[2];
+ UINT16 field_validity;
+ UINT16 obsolete_54_58[5];
+ UINT16 mutil_sector_setting;
+ UINT16 user_addressable_sectors_lo;
+ UINT16 user_addressable_sectors_hi;
+ UINT16 obsolete_62;
+ UINT16 multi_word_dma_mode;
+ UINT16 advanced_pio_modes;
+ UINT16 min_multi_word_dma_cycle_time;
+ UINT16 rec_multi_word_dma_cycle_time;
+ UINT16 min_pio_cycle_time_without_flow_control;
+ UINT16 min_pio_cycle_time_with_flow_control;
+ UINT16 reserved_69_74[6];
+ UINT16 queue_depth;
+ UINT16 reserved_76_79[4];
+ UINT16 major_version_no;
+ UINT16 minor_version_no;
+ UINT16 cmd_set_support_82;
+ UINT16 cmd_set_support_83;
+ UINT16 cmd_feature_support;
+ UINT16 cmd_feature_enable_85;
+ UINT16 cmd_feature_enable_86;
+ UINT16 cmd_feature_default;
+ UINT16 ultra_dma_select;
+ UINT16 time_required_for_sec_erase;
+ UINT16 time_required_for_enhanced_sec_erase;
+ UINT16 current_advanced_power_mgmt_value;
+ UINT16 master_pwd_revison_code;
+ UINT16 hardware_reset_result;
+ UINT16 current_auto_acoustic_mgmt_value;
+ UINT16 reserved_95_99[5];
+ UINT16 max_user_lba_for_48bit_addr[4];
+ UINT16 reserved_104_126[23];
+ UINT16 removable_media_status_notification_support;
+ UINT16 security_status;
+ UINT16 vendor_data_129_159[31];
+ UINT16 cfa_power_mode;
+ UINT16 cfa_reserved_161_175[15];
+ UINT16 current_media_serial_no[30];
+ UINT16 reserved_206_254[49];
+ UINT16 integrity_word;
+} EFI_ATAPI_IDENTIFY_DATA;
+
+#pragma pack()
+//
+//*******************************************************
+// EFI_IDENTIFY_DATA
+//*******************************************************
+//
+typedef union {
+ EFI_ATA_IDENTIFY_DATA AtaData;
+ EFI_ATAPI_IDENTIFY_DATA AtapiData;
+} EFI_IDENTIFY_DATA;
+
+#define EFI_ATAPI_DEVICE_IDENTIFY_DATA 0x8000
+
+//
+/////////////////////////////////////////////////////////////////////////////////////////
+// Function prototype declaration, for ANSI compatability
+//
+/**
+ Returns the information about the specified IDE channel.
+
+ @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
+ @param Channel Zero-based channel number.
+ @param Enabled TRUE if this channel is enabled. Disabled channels are not scanned
+ to see if any devices are present.
+ @param MaxDevices The maximum number of IDE devices that the bus driver
+ can expect on this channel.
+
+ @retval EFI_SUCCESS Information was returned without any errors.
+ @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IDE_CONTROLLER_GET_CHANNEL_INFO) (
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ OUT BOOLEAN *Enabled,
+ OUT UINT8 *MaxDevices
+);
+
+/**
+ The notifications from the IDE bus driver that it is about to enter a certain
+ phase of the IDE channel enumeration process.
+
+ @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
+ @param Phase The phase during enumeration.
+ @param Channel Zero-based channel number.
+
+ @retval EFI_SUCCESS The notification was accepted without any errors.
+ @retval EFI_NOT_SUPPORTED Phase is not supported.
+ @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
+ @retval EFI_NOT_READY This phase cannot be entered at this time.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IDE_CONTROLLER_NOTIFY_PHASE) (
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN EFI_IDE_CONTROLLER_ENUM_PHASE Phase,
+ IN UINT8 Channel
+);
+
+/**
+ Submits the device information to the IDE controller driver.
+
+ @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
+ @param Channel Zero-based channel number.
+ @param Device Zero-based device number on the Channel.
+ @param IdentifyData The device's response to the ATA IDENTIFY_DEVICE command.
+
+ @retval EFI_SUCCESS The information was accepted without any errors.
+ @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
+ Or Device is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IDE_CONTROLLER_SUBMIT_DATA) (
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ IN EFI_IDENTIFY_DATA *IdentifyData
+);
+
+/**
+ Disqualifies specific modes for an IDE device.
+
+ @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
+ @param Channel Zero-based channel number.
+ @param Device Zero-based device number on the Channel.
+ @param BadModes The modes that the device does not support and that
+ should be disqualified.
+
+ @retval EFI_SUCCESS The modes were accepted without any errors.
+ @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
+ Or Device is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IDE_CONTROLLER_DISQUALIFY_MODE) (
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ IN EFI_ATA_COLLECTIVE_MODE *BadModes
+);
+
+/**
+ Returns the information about the optimum modes for the specified IDE device.
+
+ @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
+ @param Channel Zero-based channel number.
+ @param Device Zero-based device number on the Channel.
+ @param SupportedModes The optimum modes for the device.
+
+ @retval EFI_SUCCESS SupportedModes was returned.
+ @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
+ Or Device is invalid. Or SupportedModes is NULL.
+ @retval EFI_NOT_READY Modes cannot be calculated due to a lack of data.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IDE_CONTROLLER_CALCULATE_MODE) (
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ OUT EFI_ATA_COLLECTIVE_MODE **SupportedModes
+);
+
+/**
+ Commands the IDE controller driver to program the IDE controller hardware
+ so that the specified device can operate at the specified mode.
+
+ @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
+ @param Channel Zero-based channel number.
+ @param Device Zero-based device number on the Channel.
+ @param Modes The modes to set.
+
+ @retval EFI_SUCCESS The command was accepted without any errors.
+ @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
+ Or Device is invalid.
+ @retval EFI_NOT_READY Modes cannot be set at this time due to lack of data.
+ @retval EFI_DEVICE_ERROR Modes cannot be set due to hardware failure.
+ The IDE bus driver should not use this device.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IDE_CONTROLLER_SET_TIMING) (
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ IN EFI_ATA_COLLECTIVE_MODE *Modes
+);
+
+//
+////////////////////////////////////////////////////////////////////////////////////////////////////
+// Interface structure
+// EFI_IDE_CONTROLLER_INIT_PROTOCOL protocol provides the chipset specific information to the IDE bus driver.
+// An IDE Bus driver wants to manage an IDE bus and possible IDE devices will have to retrieve the
+// EFI_IDE_CONTROLLER_INIT_PROTOCOL instances.
+//
+/**
+ @par Protocol Description:
+ Provides the basic interfaces to abstract an IDE controller.
+
+ @param GetChannelInfo
+ Returns the information about a specific channel.
+
+ @param NotifyPhase
+ The notification that the IDE bus driver is about to enter the
+ specified phase during the enumeration process.
+
+ @param SubmitData
+ Submits the Drive Identify data that was returned by the device.
+
+ @param DisqualifyMode
+ Submits information about modes that should be disqualified.
+
+ @param CalculateMode
+ Calculates and returns the optimum mode for a particular IDE device.
+
+ @param SetTiming
+ Programs the IDE controller hardware to the default timing or per the modes
+ that were returned by the last call to CalculateMode().
+
+ @param EnumAll
+ Set to TRUE if the enumeration group includes all the channels that are
+ produced by this controller. FALSE if an enumeration group consists of
+ only one channel.
+
+ @param ChannelCount
+ The number of channels that are produced by this controller.
+
+**/
+struct _EFI_IDE_CONTROLLER_INIT_PROTOCOL {
+ EFI_IDE_CONTROLLER_GET_CHANNEL_INFO GetChannelInfo;
+ EFI_IDE_CONTROLLER_NOTIFY_PHASE NotifyPhase;
+ EFI_IDE_CONTROLLER_SUBMIT_DATA SubmitData;
+ EFI_IDE_CONTROLLER_DISQUALIFY_MODE DisqualifyMode;
+ EFI_IDE_CONTROLLER_CALCULATE_MODE CalculateMode;
+ EFI_IDE_CONTROLLER_SET_TIMING SetTiming;
+ BOOLEAN EnumAll;
+ UINT8 ChannelCount;
+};
+
+extern EFI_GUID gEfiIdeControllerInitProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/IncompatiblePciDeviceSupport.h b/IntelFrameworkPkg/Include/Protocol/IncompatiblePciDeviceSupport.h new file mode 100644 index 0000000000..c684f15531 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/IncompatiblePciDeviceSupport.h @@ -0,0 +1,78 @@ +/** @file
+ This file declares EFI Incompatible PCI Device Support Protocol
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IncompatiblePciDeviceSupport.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework of EFI PCI Platform Support Specification.
+ Version0.9
+
+**/
+
+#ifndef _INCOMPATIBLE_PCI_DEVICE_SUPPORT_H_
+#define _INCOMPATIBLE_PCI_DEVICE_SUPPORT_H_
+
+#define EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL_GUID \
+ {0xeb23f55a, 0x7863, 0x4ac2, {0x8d, 0x3d, 0x95, 0x65, 0x35, 0xde, 0x03, 0x75} }
+
+typedef struct _EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL;
+
+/**
+ Returns a list of ACPI resource descriptors that detail the special
+ resource configuration requirements for an incompatible PCI device.
+
+ @param This Pointer to the EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL instance.
+ @param VendorID A unique ID to identify the manufacturer of the PCI device.
+ @param DeviceID A unique ID to identify the particular PCI device.
+ @param RevisionID A PCI device-specific revision identifier.
+ @param SubsystemVendorId Specifies the subsystem vendor ID.
+ @param SubsystemDeviceId Specifies the subsystem device ID.
+ @param Configuration A list of ACPI resource descriptors that detail
+ the configuration requirement.
+
+ @retval EFI_SUCCESS The function always returns EFI_SUCCESS.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_CHECK_DEVICE) (
+ IN EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *This,
+ IN UINTN VendorId,
+ IN UINTN DeviceId,
+ IN UINTN Revision,
+ IN UINTN SubVendorId,OPTIONAL
+ IN UINTN SubDeviceId,OPTIONAL
+ OUT VOID **Configuration
+);
+
+
+//
+// Interface structure for the Incompatible PCI Device Support Protocol
+//
+/**
+ @par Protocol Description:
+ This protocol can find some incompatible PCI devices and report their
+ special resource requirements to the PCI bus driver.
+
+ @param CheckDevice
+ Returns a list of ACPI resource descriptors that detail any special
+ resource configuration requirements if the specified device is a recognized
+ incompatible PCI device.
+
+**/
+struct _EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL {
+ EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_CHECK_DEVICE CheckDevice;
+};
+
+extern EFI_GUID gEfiIncompatiblePciDeviceSupportProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/Legacy8259.h b/IntelFrameworkPkg/Include/Protocol/Legacy8259.h new file mode 100644 index 0000000000..e9f91733ef --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/Legacy8259.h @@ -0,0 +1,298 @@ +/** @file
+ This protocol abstracts the 8259 interrupt controller. This includes
+ PCI IRQ routing need to program the PCI Interrupt Line register.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Legacy8259.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.96
+
+**/
+
+#ifndef _EFI_LEGACY_8259_H_
+#define _EFI_LEGACY_8259_H_
+
+#define EFI_LEGACY_8259_PROTOCOL_GUID \
+ { \
+ 0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1 } \
+ }
+
+typedef struct _EFI_LEGACY_8259_PROTOCOL EFI_LEGACY_8259_PROTOCOL;
+
+typedef enum {
+ Efi8259Irq0,
+ Efi8259Irq1,
+ Efi8259Irq2,
+ Efi8259Irq3,
+ Efi8259Irq4,
+ Efi8259Irq5,
+ Efi8259Irq6,
+ Efi8259Irq7,
+ Efi8259Irq8,
+ Efi8259Irq9,
+ Efi8259Irq10,
+ Efi8259Irq11,
+ Efi8259Irq12,
+ Efi8259Irq13,
+ Efi8259Irq14,
+ Efi8259Irq15,
+ Efi8259IrqMax
+} EFI_8259_IRQ;
+
+typedef enum {
+ Efi8259LegacyMode,
+ Efi8259ProtectedMode,
+ Efi8259MaxMode
+} EFI_8259_MODE;
+
+/**
+ Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+
+ @param This Protocol instance pointer.
+ @param MasterBase The base vector for the Master PIC in the 8259 controller
+ @param Slavebase The base vector for the Master PIC in the 8259 controller
+
+ @retval EFI_SUCCESS The new bases were programmed
+ @retval EFI_DEVICE_ERROR A device erro occured programming the vector bases
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_VECTOR_BASE) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT8 MasterBase,
+ IN UINT8 SlaveBase
+ );
+
+/**
+ Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+
+ @param This Protocol instance pointer.
+ @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15
+ @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15
+ @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15
+ @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15
+
+ @retval EFI_SUCCESS 8259 status returned
+ @retval EFI_DEVICE_ERROR Error reading 8259
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_MASK) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ OUT UINT16 *LegacyMask, OPTIONAL
+ OUT UINT16 *LegacyEdgeLevel, OPTIONAL
+ OUT UINT16 *ProtectedMask, OPTIONAL
+ OUT UINT16 *ProtectedEdgeLevel OPTIONAL
+ );
+
+/**
+ Set the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+ Also set the edge/level masks.
+
+ @param This Protocol instance pointer.
+ @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15
+ @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15
+ @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15
+ @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15
+
+ @retval EFI_SUCCESS 8259 status returned
+ @retval EFI_DEVICE_ERROR Error reading 8259
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_MASK) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT16 *LegacyMask, OPTIONAL
+ IN UINT16 *LegacyEdgeLevel, OPTIONAL
+ IN UINT16 *ProtectedMask, OPTIONAL
+ IN UINT16 *ProtectedEdgeLevel OPTIONAL
+ );
+
+/**
+ Set the 8259 mode of operation. The base address for the 8259 is different for
+ legacy and protected mode. The legacy mode requires the master 8259 to have a
+ master base of 0x08 and the slave base of 0x70. The protected mode base locations
+ are not defined. Interrupts must be masked by the caller before this function
+ is called. The interrupt mask from the current mode is saved. The interrupt
+ mask for the new mode is Mask, or if Mask does not exist the previously saved
+ mask is used.
+
+ @param This Protocol instance pointer.
+ @param Mode Mode of operation. i.e. real mode or protected mode
+ @param Mask Optional interupt mask for the new mode.
+ @param EdgeLevel Optional trigger mask for the new mode.
+
+ @retval EFI_SUCCESS 8259 programmed
+ @retval EFI_DEVICE_ERROR Error writting to 8259
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_MODE) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_MODE Mode,
+ IN UINT16 *Mask, OPTIONAL
+ IN UINT16 *EdgeLevel OPTIONAL
+ );
+
+/**
+ Convert from IRQ to processor interrupt vector number.
+
+ @param This Protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15
+ @param Vector Processor vector number that matches Irq
+
+ @retval EFI_SUCCESS The Vector matching Irq is returned
+ @retval EFI_INVALID_PARAMETER Irq not valid
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_VECTOR) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ OUT UINT8 *Vector
+ );
+
+/**
+ Enable Irq by unmasking interrupt in 8259
+
+ @param This Protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15
+ @param LevelTriggered TRUE if level triggered. FALSE if edge triggered.
+
+ @retval EFI_SUCCESS Irq enabled on 8259
+ @retval EFI_INVALID_PARAMETER Irq not valid
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_ENABLE_IRQ) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ IN BOOLEAN LevelTriggered
+ );
+
+/**
+ Disable Irq by masking interrupt in 8259
+
+ @param This Protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15
+
+ @retval EFI_SUCCESS Irq disabled on 8259
+ @retval EFI_INVALID_PARAMETER Irq not valid
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_DISABLE_IRQ) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ );
+
+/**
+ PciHandle represents a PCI config space of a PCI function. Vector
+ represents Interrupt Pin (from PCI config space) and it is the data
+ that is programmed into the Interrupt Line (from the PCI config space)
+ register.
+
+ @param This Protocol instance pointer.
+ @param PciHandle PCI function to return vector for
+ @param Vector Vector for fucntion that matches
+
+ @retval EFI_SUCCESS A valid Vector is returned
+ @retval EFI_INVALID_PARAMETER PciHandle not valid
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_INTERRUPT_LINE) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT UINT8 *Vector
+ );
+
+/**
+ Send an EOI to 8259
+
+ @param This Protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15
+
+ @retval EFI_SUCCESS EOI successfully sent to 8259
+ @retval EFI_INVALID_PARAMETER Irq not valid
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_END_OF_INTERRUPT) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ );
+
+/**
+ @par Protocol Description:
+ Abstracts the 8259 and APIC hardware control between EFI usage and
+ Compatibility16 usage.
+
+ @param SetVectorBase
+ Sets the vector bases for master and slave PICs.
+
+ @param GetMask
+ Gets IRQ and edge/level masks for 16-bit real mode and 32-bit protected mode.
+
+ @param SetMask
+ Sets the IRQ and edge\level masks for 16-bit real mode and 32-bit protected mode.
+
+ @param SetMode
+ Sets PIC mode to 16-bit real mode or 32-bit protected mode.
+
+ @param GetVector
+ Gets the base vector assigned to an IRQ.
+
+ @param EnableIrq
+ Enables an IRQ.
+
+ @param DisableIrq
+ Disables an IRQ.
+
+ @param GetInterruptLine
+ Gets an IRQ that is assigned to a PCI device.
+
+ @param EndOfInterrupt
+ Issues the end of interrupt command.
+
+**/
+struct _EFI_LEGACY_8259_PROTOCOL {
+ EFI_LEGACY_8259_SET_VECTOR_BASE SetVectorBase;
+ EFI_LEGACY_8259_GET_MASK GetMask;
+ EFI_LEGACY_8259_SET_MASK SetMask;
+ EFI_LEGACY_8259_SET_MODE SetMode;
+ EFI_LEGACY_8259_GET_VECTOR GetVector;
+ EFI_LEGACY_8259_ENABLE_IRQ EnableIrq;
+ EFI_LEGACY_8259_DISABLE_IRQ DisableIrq;
+ EFI_LEGACY_8259_GET_INTERRUPT_LINE GetInterruptLine;
+ EFI_LEGACY_8259_END_OF_INTERRUPT EndOfInterrupt;
+};
+
+extern EFI_GUID gEfiLegacy8259ProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/LegacyBios.h b/IntelFrameworkPkg/Include/Protocol/LegacyBios.h new file mode 100644 index 0000000000..1d11d95f39 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/LegacyBios.h @@ -0,0 +1,524 @@ +/** @file
+ The EFI Legacy BIOS Protocol is used to abstract legacy Option ROM usage
+ under EFI and Legacy OS boot.
+
+ Note: The names for EFI_IA32_REGISTER_SET elements were picked to follow
+ well known naming conventions.
+
+ Thunk - A thunk is a transition from one processor mode to another. A Thunk
+ is a transition from native EFI mode to 16-bit mode. A reverse thunk
+ would be a transition from 16-bit mode to native EFI mode.
+
+ You most likely should not use this protocol! Find the EFI way to solve the
+ problem to make your code portable
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LegacyBios.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.96
+
+**/
+
+#ifndef _EFI_LEGACY_BIOS_H_
+#define _EFI_LEGACY_BIOS_H_
+
+#define EFI_LEGACY_BIOS_PROTOCOL_GUID \
+ { \
+ 0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d } \
+ }
+
+typedef struct _EFI_LEGACY_BIOS_PROTOCOL EFI_LEGACY_BIOS_PROTOCOL;
+
+//
+/// @bug: These macros appear in no specifications and are kept for backward
+// compatibility only.
+// Convert from 32-bit address (_Adr) to Segment:Offset 16-bit form
+//
+#define EFI_SEGMENT(_Adr) (UINT16) ((UINT16) (((UINTN) (_Adr)) >> 4) & 0xf000)
+#define EFI_OFFSET(_Adr) (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xffff)
+#define BYTE_GRANULARITY 0x01
+#define WORD_GRANULARITY 0x02
+#define DWORD_GRANULARITY 0x04
+#define QWORD_GRANULARITY 0x08
+#define PARAGRAPH_GRANULARITY 0x10
+
+#define CARRY_FLAG 0x01
+
+//*********************************************************
+// EFI_EFLAGS_REG
+//*********************************************************
+typedef struct {
+ UINT32 CF:1;
+ UINT32 Reserved1:1;
+ UINT32 PF:1;
+ UINT32 Reserved2:1;
+ UINT32 AF:1;
+ UINT32 Reserved3:1;
+ UINT32 ZF:1;
+ UINT32 SF:1;
+ UINT32 TF:1;
+ UINT32 IF:1;
+ UINT32 DF:1;
+ UINT32 OF:1;
+ UINT32 IOPL:2;
+ UINT32 NT:1;
+ UINT32 Reserved4:2;
+ UINT32 VM:1;
+ UINT32 Reserved5:14;
+} EFI_EFLAGS_REG;
+
+//*********************************************************
+// EFI_DWORD_REGS
+//*********************************************************
+
+typedef struct {
+ UINT32 EAX;
+ UINT32 EBX;
+ UINT32 ECX;
+ UINT32 EDX;
+ UINT32 ESI;
+ UINT32 EDI;
+ EFI_EFLAGS_REG EFlags;
+ UINT16 ES;
+ UINT16 CS;
+ UINT16 SS;
+ UINT16 DS;
+ UINT16 FS;
+ UINT16 GS;
+ UINT32 EBP;
+ UINT32 ESP;
+} EFI_DWORD_REGS;
+
+//*******************************************
+// EFI_FLAGS_REG
+//*******************************************
+typedef struct {
+ UINT16 CF:1;
+ UINT16 Reserved1:1;
+ UINT16 PF:1;
+ UINT16 Reserved2:1;
+ UINT16 AF:1;
+ UINT16 Reserved3:1;
+ UINT16 ZF:1;
+ UINT16 SF:1;
+ UINT16 TF:1;
+ UINT16 IF:1;
+ UINT16 DF:1;
+ UINT16 OF:1;
+ UINT16 IOPL:2;
+ UINT16 NT:1;
+ UINT16 Reserved4:1;
+} EFI_FLAGS_REG;
+
+
+//*********************************************************
+// EFI_WORD_REGS
+//*********************************************************
+
+typedef struct {
+ UINT16 AX;
+ UINT16 ReservedAX;
+ UINT16 BX;
+ UINT16 ReservedBX;
+ UINT16 CX;
+ UINT16 ReservedCX;
+ UINT16 DX;
+ UINT16 ReservedDX;
+ UINT16 SI;
+ UINT16 ReservedSI;
+ UINT16 DI;
+ UINT16 ReservedDI;
+ EFI_FLAGS_REG Flags;
+ UINT16 ReservedFlags;
+ UINT16 ES;
+ UINT16 CS;
+ UINT16 SS;
+ UINT16 DS;
+ UINT16 FS;
+ UINT16 GS;
+ UINT16 BP;
+ UINT16 ReservedBP;
+ UINT16 SP;
+ UINT16 ReservedSP;
+} EFI_WORD_REGS;
+
+//*********************************************************
+// EFI_BYTE_REGS
+//*********************************************************
+
+typedef struct {
+ UINT8 AL, AH;
+ UINT16 ReservedAX;
+ UINT8 BL, BH;
+ UINT16 ReservedBX;
+ UINT8 CL, CH;
+ UINT16 ReservedCX;
+ UINT8 DL, DH;
+ UINT16 ReservedDX;
+} EFI_BYTE_REGS;
+
+typedef union {
+ EFI_DWORD_REGS E;
+ EFI_WORD_REGS X;
+ EFI_BYTE_REGS H;
+} EFI_IA32_REGISTER_SET;
+
+/**
+ Thunk to 16-bit real mode and execute a software interrupt with a vector
+ of BiosInt. Regs will contain the 16-bit register context on entry and
+ exit.
+
+ @param This Protocol instance pointer.
+ @param BiosInt Processor interrupt vector to invoke
+ @param Reg Register contexted passed into (and returned) from thunk to
+ 16-bit mode
+
+ @retval FALSE Thunk completed, and there were no BIOS errors in the target code.
+ See Regs for status.
+ @retval TRUE There was a BIOS erro in the target code.
+
+**/
+typedef
+BOOLEAN
+(EFIAPI *EFI_LEGACY_BIOS_INT86) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINT8 BiosInt,
+ IN OUT EFI_IA32_REGISTER_SET *Regs
+ );
+
+/**
+ Thunk to 16-bit real mode and call Segment:Offset. Regs will contain the
+ 16-bit register context on entry and exit. Arguments can be passed on
+ the Stack argument
+
+ @param This Protocol instance pointer.
+ @param Segment Segemnt of 16-bit mode call
+ @param Offset Offset of 16-bit mdoe call
+ @param Reg Register contexted passed into (and returned) from thunk to
+ 16-bit mode
+ @param Stack Caller allocated stack used to pass arguments
+ @param StackSize Size of Stack in bytes
+
+ @retval FALSE Thunk completed, and there were no BIOS errors in the target code.
+ See Regs for status.
+ @retval TRUE There was a BIOS erro in the target code.
+
+**/
+typedef
+BOOLEAN
+(EFIAPI *EFI_LEGACY_BIOS_FARCALL86) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINT16 Segment,
+ IN UINT16 Offset,
+ IN EFI_IA32_REGISTER_SET *Regs,
+ IN VOID *Stack,
+ IN UINTN StackSize
+ );
+
+/**
+ Test to see if a legacy PCI ROM exists for this device. Optionally return
+ the Legacy ROM instance for this PCI device.
+
+ @param This Protocol instance pointer.
+ @param PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded
+ @param RomImage Return the legacy PCI ROM for this device
+ @param RomSize Size of ROM Image
+ @param Flags Indicates if ROM found and if PC-AT.
+
+ @retval EFI_SUCCESS Legacy Option ROM availible for this device
+ @retval EFI_UNSUPPORTED Legacy Option ROM not supported.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_CHECK_ROM) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT VOID **RomImage, OPTIONAL
+ OUT UINTN *RomSize, OPTIONAL
+ OUT UINTN *Flags
+ );
+
+/**
+ Load a legacy PC-AT OPROM on the PciHandle device. Return information
+ about how many disks were added by the OPROM and the shadow address and
+ size. DiskStart & DiskEnd are INT 13h drive letters. Thus 0x80 is C:
+
+ @param This Protocol instance pointer.
+ @param PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded.
+ This value is NULL if RomImage is non-NULL. This is the normal
+ case.
+ @param RomImage A PCI PC-AT ROM image. This argument is non-NULL if there is
+ no hardware associated with the ROM and thus no PciHandle,
+ otherwise is must be NULL.
+ Example is PXE base code.
+ @param Flags Return Status if ROM was found and if was Legacy OPROM.
+ @param DiskStart Disk number of first device hooked by the ROM. If DiskStart
+ is the same as DiskEnd no disked were hooked.
+ @param DiskEnd Disk number of the last device hooked by the ROM.
+ @param RomShadowAddress Shadow address of PC-AT ROM
+ @param RomShadowSize Size of RomShadowAddress in bytes
+
+ @retval EFI_SUCCESS Thunk completed, see Regs for status.
+ @retval EFI_INVALID_PARAMETER PciHandle not found
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_INSTALL_ROM) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ IN VOID **RomImage,
+ OUT UINTN *Flags,
+ OUT UINT8 *DiskStart, OPTIONAL
+ OUT UINT8 *DiskEnd, OPTIONAL
+ OUT VOID **RomShadowAddress, OPTIONAL
+ OUT UINT32 *ShadowedRomSize OPTIONAL
+ );
+
+/**
+ Attempt to legacy boot the BootOption. If the EFI contexted has been
+ compromised this function will not return.
+
+ @param This Protocol instance pointer.
+ @param BootOption EFI Device Path from BootXXXX variable.
+ @param LoadOptionSize Size of LoadOption in size.
+ @param LoadOption LoadOption from BootXXXX variable
+
+ @retval EFI_SUCCESS Removable media not present
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_BOOT) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN BBS_BBS_DEVICE_PATH *BootOption,
+ IN UINT32 LoadOptionsSize,
+ IN VOID *LoadOptions
+ );
+
+/**
+ Update BDA with current Scroll, Num & Cap lock LEDS
+
+ @param This Protocol instance pointer.
+ @param Leds Status of current Scroll, Num & Cap lock LEDS
+ Bit 0 is Scroll Lock 0 = Not locked
+ Bit 1 is Num Lock
+ Bit 2 is Caps Lock
+
+ @retval EFI_SUCCESS Removable media not present
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINT8 Leds
+ );
+
+/**
+ Retrieve legacy BBS info and assign boot priority.
+
+ @param This Protocol instance pointer.
+ @param HddCount Number of HDD_INFO structures
+ @param HddInfo Onboard IDE controller information
+ @param BbsCount Number of BBS_TABLE structures
+ @param BbsTable List BBS entries
+
+ @retval EFI_SUCCESS Tables returned
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_GET_BBS_INFO) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ OUT UINT16 *HddCount,
+ OUT HDD_INFO **HddInfo,
+ OUT UINT16 *BbsCount,
+ IN OUT BBS_TABLE **BbsTable
+ );
+
+/**
+ Assign drive number to legacy HDD drives prior to booting an EFI
+ aware OS so the OS can access drives without an EFI driver.
+
+ @param This Protocol instance pointer.
+ @param BbsCount Number of BBS_TABLE structures
+ @param BbsTable List BBS entries
+
+ @retval EFI_SUCCESS Drive numbers assigned
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ OUT UINT16 *BbsCount,
+ OUT BBS_TABLE **BbsTable
+ );
+
+/**
+ To boot from an unconventional device like parties and/or execute
+ HDD diagnostics.
+
+ @param This Protocol instance pointer.
+ @param Attributes How to interpret the other input parameters
+ @param BbsEntry The 0-based index into the BbsTable for the parent
+ device.
+ @param BeerData Pointer to the 128 bytes of ram BEER data.
+ @param ServiceAreaData Pointer to the 64 bytes of raw Service Area data. The
+ caller must provide a pointer to the specific Service
+ Area and not the start all Service Areas.
+
+ EFI_INVALID_PARAMETER if error. Does NOT return if no error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UDC_ATTRIBUTES Attributes,
+ IN UINTN BbsEntry,
+ IN VOID *BeerData,
+ IN VOID *ServiceAreaData
+ );
+
+/**
+ Shadow all legacy16 OPROMs that haven't been shadowed.
+ Warning: Use this with caution. This routine disconnects all EFI
+ drivers. If used externally then caller must re-connect EFI
+ drivers.
+
+ @retval EFI_SUCCESS OPROMs shadowed
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This
+ );
+
+/**
+ Get a region from the LegacyBios for S3 usage.
+
+ @param This Protocol instance pointer.
+ @param LegacyMemorySize Size of required region
+ @param Region Region to use.
+ 00 = Either 0xE0000 or 0xF0000 block
+ Bit0 = 1 0xF0000 block
+ Bit1 = 1 0xE0000 block
+ @param Alignment Address alignment. Bit mapped. First non-zero
+ bit from right is alignment.
+ @param LegacyMemoryAddress Region Assigned
+
+ @retval EFI_SUCCESS Region assigned
+ @retval Other Region not assigned
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_GET_LEGACY_REGION) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINTN LegacyMemorySize,
+ IN UINTN Region,
+ IN UINTN Alignment,
+ OUT VOID **LegacyMemoryAddress
+ );
+
+/**
+ Get a region from the LegacyBios for Tiano usage. Can only be invoked once.
+
+ @param This Protocol instance pointer.
+ @param LegacyMemorySize Size of data to copy
+ @param LegacyMemoryAddress Legacy Region destination address
+ Note: must be in region assigned by
+ LegacyBiosGetLegacyRegion
+ @param LegacyMemorySourceAddress
+ Source of data
+
+ @retval EFI_SUCCESS Region assigned
+ @retval EFI_ACCESS_DENIED Destination outside assigned region
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_COPY_LEGACY_REGION) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINTN LegacyMemorySize,
+ IN VOID *LegacyMemoryAddress,
+ IN VOID *LegacyMemorySourceAddress
+ );
+
+/**
+ @par Protocol Description:
+ Abstracts the traditional BIOS from the rest of EFI. The LegacyBoot()
+ member function allows the BDS to support booting a traditional OS.
+ EFI thunks drivers that make EFI bindings for BIOS INT services use
+ all the other member functions.
+
+ @param Int86
+ Performs traditional software INT. See the Int86() function description.
+
+ @param FarCall86
+ Performs a far call into Compatibility16 or traditional OpROM code.
+
+ @param CheckPciRom
+ Checks if a traditional OpROM exists for this device.
+
+ @param InstallPciRom
+ Loads a traditional OpROM in traditional OpROM address space.
+
+ @param LegacyBoot
+ Boots a traditional OS.
+
+ @param UpdateKeyboardLedStatus
+ Updates BDA to reflect the current EFI keyboard LED status.
+
+ @param GetBbsInfo
+ Allows an external agent, such as BIOS Setup, to get the BBS data.
+
+ @param ShadowAllLegacyOproms
+ Causes all legacy OpROMs to be shadowed.
+
+ @param PrepareToBootEfi
+ Performs all actions prior to boot. Used when booting an EFI-aware OS
+ rather than a legacy OS.
+
+ @param GetLegacyRegion
+ Allows EFI to reserve an area in the 0xE0000 or 0xF0000 block.
+
+ @param CopyLegacyRegion
+ Allows EFI to copy data to the area specified by GetLegacyRegion.
+
+ @param BootUnconventionalDevice
+ Allows the user to boot off an unconventional device such as a PARTIES partition.
+
+**/
+struct _EFI_LEGACY_BIOS_PROTOCOL {
+ EFI_LEGACY_BIOS_INT86 Int86;
+ EFI_LEGACY_BIOS_FARCALL86 FarCall86;
+ EFI_LEGACY_BIOS_CHECK_ROM CheckPciRom;
+ EFI_LEGACY_BIOS_INSTALL_ROM InstallPciRom;
+ EFI_LEGACY_BIOS_BOOT LegacyBoot;
+ EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS UpdateKeyboardLedStatus;
+ EFI_LEGACY_BIOS_GET_BBS_INFO GetBbsInfo;
+ EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS ShadowAllLegacyOproms;
+ EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI PrepareToBootEfi;
+ EFI_LEGACY_BIOS_GET_LEGACY_REGION GetLegacyRegion;
+ EFI_LEGACY_BIOS_COPY_LEGACY_REGION CopyLegacyRegion;
+ EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE BootUnconventionalDevice;
+};
+
+extern EFI_GUID gEfiLegacyBiosProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/LegacyBiosPlatform.h b/IntelFrameworkPkg/Include/Protocol/LegacyBiosPlatform.h new file mode 100644 index 0000000000..4eaa3dacba --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/LegacyBiosPlatform.h @@ -0,0 +1,281 @@ +/** @file
+ The EFI Legacy BIOS Patform Protocol is used to mate a Legacy16
+ implementation with this EFI code. The EFI driver that produces
+ the Legacy BIOS protocol is generic and consumes this protocol.
+ A driver that matches the Legacy16 produces this protocol
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LegacyBiosPlatform.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.96
+
+**/
+
+#ifndef _EFI_LEGACY_BIOS_PLATFORM_H_
+#define _EFI_LEGACY_BIOS_PLATFORM_H_
+
+#define EFI_LEGACY_BIOS_PLATFORM_PROTOCOL_GUID \
+ { \
+ 0x783658a3, 0x4172, 0x4421, {0xa2, 0x99, 0xe0, 0x9, 0x7, 0x9c, 0xc, 0xb4 } \
+ }
+
+typedef struct _EFI_LEGACY_BIOS_PLATFORM_PROTOCOL EFI_LEGACY_BIOS_PLATFORM_PROTOCOL;
+
+typedef enum {
+ EfiGetPlatformBinaryMpTable = 0,
+ EfiGetPlatformBinaryOemIntData = 1,
+ EfiGetPlatformBinaryOem16Data = 2,
+ EfiGetPlatformBinaryOem32Data = 3,
+ EfiGetPlatformBinaryTpmBinary = 4,
+ EfiGetPlatformBinarySystemRom = 5,
+ EfiGetPlatformPciExpressBase = 6,
+ EfiGetPlatformPmmSize = 7,
+ EfiGetPlatformEndOpromShadowAddr = 8,
+
+} EFI_GET_PLATFORM_INFO_MODE;
+
+typedef enum {
+ EfiGetPlatformVgaHandle = 0,
+ EfiGetPlatformIdeHandle = 1,
+ EfiGetPlatformIsaBusHandle = 2,
+ EfiGetPlatformUsbHandle = 3
+} EFI_GET_PLATFORM_HANDLE_MODE;
+
+typedef enum {
+ EfiPlatformHookPrepareToScanRom = 0,
+ EfiPlatformHookShadowServiceRoms= 1,
+ EfiPlatformHookAfterRomInit = 2
+} EFI_GET_PLATFORM_HOOK_MODE;
+
+/**
+ Finds the binary data or other platform information.
+
+ @param This Protocol instance pointer.
+ @param Mode Specifies what data to return
+ @param Table Pointer to MP table.
+ @param TableSize Size in bytes of table.
+ @param Location Legacy region requested
+ 0x00 = Any location
+ Bit 0 = 0xF0000 region
+ Bit 1 = 0xE0000 region
+ Multiple bits can be set
+ @param Alignment Address alignment for allocation.
+ Bit mapped. First non-zero bit from right
+ is alignment.
+ @param LegacySegment Segment in LegacyBios where Table is stored
+ @param LegacyOffset Offset in LegacyBios where Table is stored
+
+ @retval EFI_SUCCESS Data was returned successfully.
+ @retval EFI_UNSUPPORTED Mode is not supported on the platform.
+ @retval EFI_NOT_FOUND Binary image or table not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_INFO) (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN EFI_GET_PLATFORM_INFO_MODE Mode,
+ OUT VOID **Table,
+ OUT UINTN *TableSize,
+ OUT UINTN *Location,
+ OUT UINTN *Alignment,
+ IN UINT16 LegacySegment,
+ IN UINT16 LegacyOffset
+ );
+
+/**
+ Returns a buffer of handles for the requested sub-function.
+
+ @param This Protocol instance pointer.
+ @param Mode Specifies what handle to return.
+ @param Type Type from Device Path for Handle to represent.
+ @param HandleBuffer Handles of the device/controller in priority order
+ with HandleBuffer[0] highest priority.
+ @param HandleCount Number of handles in the buffer.
+ @param AdditionalData Mode specific.
+
+ @retval EFI_SUCCESS Handle is valid
+ @retval EFI_UNSUPPORTED Mode is not supported on the platform.
+ @retval EFI_NOT_FOUND Handle is not known
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_HANDLE) (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN EFI_GET_PLATFORM_HANDLE_MODE Mode,
+ IN UINT16 Type,
+ OUT EFI_HANDLE **HandleBuffer,
+ OUT UINTN *HandleCount,
+ IN VOID **AdditionalData OPTIONAL
+ );
+
+/**
+ Load and initialize the Legacy BIOS SMM handler.
+
+ @param This Protocol instance pointer.
+ @param EfiToLegacy16BootTable Pointer to Legacy16 boot table.
+
+ @retval EFI_SUCCESS SMM code loaded.
+ @retval EFI_DEVICE_ERROR SMM code failed to load
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_SMM_INIT) (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN VOID *EfiToLegacy16BootTable
+ );
+
+/**
+ Allows platform to perform any required action after a LegacyBios operation.
+
+ @param This Protocol instance pointer.
+ @param Mode Specifies what handle to return.
+ @param Type Mode specific.
+ @param DeviceHandle List of PCI devices in the system.
+ @param ShadowAddress First free OpROM area, after other OpROMs have been dispatched.
+ @param Compatibility16Table Pointer to Compatibility16Table.
+ @param AdditionalData Mode specific Pointer to additional data returned - mode specific.
+
+ @retval EFI_SUCCESS RomImage is valid
+ @retval EFI_UNSUPPORTED Mode is not supported on the platform.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_HOOKS) (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN EFI_GET_PLATFORM_HOOK_MODE Mode,
+ IN UINT16 Type,
+ IN EFI_HANDLE DeviceHandle,
+ IN OUT UINTN *ShadowAddress,
+ IN EFI_COMPATIBILITY16_TABLE *Compatibility16Table,
+ IN VOID **AdditionalData OPTIONAL
+ );
+
+/**
+ Returns information associated with PCI IRQ routing.
+
+ @param This Protocol instance pointer.
+ @param RoutingTable Pointer to PCI IRQ Routing table.
+ @param RoutingTableEntries Number of entries in table.
+ @param LocalPirqTable $PIR table
+ @param PirqTableSize $PIR table size
+ @param LocalIrqPriorityTable List of interrupts in priority order to assign
+ @param IrqPriorityTableEntries Number of entries in priority table
+
+ @retval EFI_SUCCESS Data was successfully returned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE) (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ OUT VOID **RoutingTable,
+ OUT UINTN *RoutingTableEntries,
+ OUT VOID **LocalPirqTable, OPTIONAL
+ OUT UINTN *PirqTableSize, OPTIONAL
+ OUT VOID **LocalIrqPriorityTable, OPTIONAL
+ OUT UINTN *IrqPriorityTableEntries OPTIONAL
+ );
+
+/**
+ Translates the given PIRQ accounting for bridge
+
+ @param This Protocol instance pointer.
+ @param PciBus PCI bus number for this device.
+ @param PciDevice PCI device number for this device.
+ @param PciFunction PCI function number for this device.
+ @param Pirq Input is PIRQ reported by device, output is true PIRQ.
+ @param PciIrq The IRQ already assigned to the PIRQ or the IRQ to be
+ assigned to the PIRQ.
+
+ @retval EFI_SUCCESS The PIRQ was translated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ) (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN UINTN PciBus,
+ IN UINTN PciDevice,
+ IN UINTN PciFunction,
+ IN OUT UINT8 *Pirq,
+ OUT UINT8 *PciIrq
+ );
+
+/**
+ Attempt to legacy boot the BootOption. If the EFI contexted has been
+ compromised this function will not return.
+
+ @param This Protocol instance pointer.
+ @param BbsDevicePath EFI Device Path from BootXXXX variable.
+ @param BbsTable Internal BBS table.
+ @param LoadOptionSize Size of LoadOption in size.
+ @param LoadOption LoadOption from BootXXXX variable
+ @param EfiToLegacy16BootTable Pointer to BootTable structure
+
+ @retval EFI_SUCCESS Ready to boot.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_PREPARE_TO_BOOT) (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN BBS_BBS_DEVICE_PATH *BbsDevicePath,
+ IN VOID *BbsTable,
+ IN UINT32 LoadOptionsSize,
+ IN VOID *LoadOptions,
+ IN VOID *EfiToLegacy16BootTable
+ );
+
+/**
+ @par Protocol Description:
+ Abstracts the platform portion of the traditional BIOS.
+
+ @param GetPlatformInfo
+ Gets binary data or other platform information.
+
+ @param GetPlatformHandle
+ Returns a buffer of all handles matching the requested subfunction.
+
+ @param SmmInit
+ Loads and initializes the traditional BIOS SMM handler.
+
+ @param PlatformHooks
+ Allows platform to perform any required actions after a LegacyBios operation.
+
+ @param GetRoutingTable
+ Gets $PIR table.
+
+ @param TranslatePirq
+ Translates the given PIRQ to the final value after traversing any PCI bridges.
+
+ @param PrepareToBoot
+ Final platform function before the system attempts to boot to a traditional OS.
+
+**/
+struct _EFI_LEGACY_BIOS_PLATFORM_PROTOCOL {
+ EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_INFO GetPlatformInfo;
+ EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_HANDLE GetPlatformHandle;
+ EFI_LEGACY_BIOS_PLATFORM_SMM_INIT SmmInit;
+ EFI_LEGACY_BIOS_PLATFORM_HOOKS PlatformHooks;
+ EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE GetRoutingTable;
+ EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ TranslatePirq;
+ EFI_LEGACY_BIOS_PLATFORM_PREPARE_TO_BOOT PrepareToBoot;
+};
+
+extern EFI_GUID gEfiLegacyBiosPlatformProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/LegacyInterrupt.h b/IntelFrameworkPkg/Include/Protocol/LegacyInterrupt.h new file mode 100644 index 0000000000..13ac36f31c --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/LegacyInterrupt.h @@ -0,0 +1,131 @@ +/** @file
+ This protocol manages the legacy memory regions between 0xc0000 - 0xfffff
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LegacyInterrupt.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.96
+
+**/
+
+#ifndef _EFI_LEGACY_INTERRUPT_H_
+#define _EFI_LEGACY_INTERRUPT_H_
+
+#define EFI_LEGACY_INTERRUPT_PROTOCOL_GUID \
+ { \
+ 0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe } \
+ }
+
+typedef struct _EFI_LEGACY_INTERRUPT_PROTOCOL EFI_LEGACY_INTERRUPT_PROTOCOL;
+
+/**
+ Get the number of PIRQs this hardware supports.
+
+ @param This Protocol instance pointer.
+ @param NumberPirsq Number of PIRQs.
+
+ @retval EFI_SUCCESS Number of PIRQs returned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS) (
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ OUT UINT8 *NumberPirqs
+ );
+
+/**
+ Gets the PCI location associated with this protocol.
+
+ @param This Protocol instance pointer.
+ @param Bus PCI Bus
+ @param Device PCI Device
+ @param Function PCI Function
+
+ @retval EFI_SUCCESS Bus/Device/Function returned
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_GET_LOCATION) (
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ OUT UINT8 *Bus,
+ OUT UINT8 *Device,
+ OUT UINT8 *Function
+ );
+
+/**
+ Read the PIRQ register and return the data
+
+ @param This Protocol instance pointer.
+ @param PirqNumber PIRQ register to read
+ @param PirqData Data read
+
+ @retval EFI_SUCCESS Data was read
+ @retval EFI_INVALID_PARAMETER Invalid PIRQ number
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_READ_PIRQ) (
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ IN UINT8 PirqNumber,
+ OUT UINT8 *PirqData
+ );
+
+/**
+ Write the specified PIRQ register with the given data.
+
+ @param This Protocol instance pointer.
+ @param PirqNumber PIRQ register to read.
+ @param PirqData Data written.
+
+ @retval EFI_SUCCESS Table pointer returned
+ @retval EFI_INVALID_PARAMETER Invalid PIRQ number
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_WRITE_PIRQ) (
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ IN UINT8 PirqNumber,
+ IN UINT8 PirqData
+ );
+
+/**
+ @par Protocol Description:
+ Abstracts the PIRQ programming from the generic EFI Compatibility Support Modules
+
+ @param GetNumberPirqs
+ Gets the number of PIRQs supported.
+
+ @param GetLocation
+ Gets the PCI bus, device, and function that associated with this protocol.
+
+ @param ReadPirq
+ Reads the indicated PIRQ register.
+
+ @param WritePirq
+ Writes to the indicated PIRQ register.
+
+**/
+struct _EFI_LEGACY_INTERRUPT_PROTOCOL {
+ EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS GetNumberPirqs;
+ EFI_LEGACY_INTERRUPT_GET_LOCATION GetLocation;
+ EFI_LEGACY_INTERRUPT_READ_PIRQ ReadPirq;
+ EFI_LEGACY_INTERRUPT_WRITE_PIRQ WritePirq;
+};
+
+extern EFI_GUID gEfiLegacyInterruptProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/LegacyRegion.h b/IntelFrameworkPkg/Include/Protocol/LegacyRegion.h new file mode 100644 index 0000000000..ede3a6c90f --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/LegacyRegion.h @@ -0,0 +1,140 @@ +/** @file
+ This protocol manages the legacy memory regions between 0xc0000 - 0xfffff
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LegacyRegion.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.96
+
+**/
+
+#ifndef _EFI_LEGACY_REGION_H_
+#define _EFI_LEGACY_REGION_H_
+
+#define EFI_LEGACY_REGION_PROTOCOL_GUID \
+ { \
+ 0xfc9013a, 0x568, 0x4ba9, {0x9b, 0x7e, 0xc9, 0xc3, 0x90, 0xa6, 0x60, 0x9b } \
+ }
+
+typedef struct _EFI_LEGACY_REGION_PROTOCOL EFI_LEGACY_REGION_PROTOCOL;
+
+/**
+ Sets hardware to decode or not decode a region.
+
+ @param This Indicates the EFI_LEGACY_REGION_PROTOCOL instance
+ @param Start Start of region to decode.
+ @param Length Size in bytes of the region.
+ @param On Decode/nondecode flag.
+
+ @retval EFI_SUCCESS Decode range successfully changed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_REGION_DECODE) (
+ IN EFI_LEGACY_REGION_PROTOCOL *This,
+ IN UINT32 Start,
+ IN UINT32 Length,
+ IN BOOLEAN *On
+ );
+
+/**
+ Sets a region to read only.
+
+ @param This Indicates the EFI_LEGACY_REGION_PROTOCOL instance
+ @param Start Start of region to lock.
+ @param Length Size in bytes of the region.
+ @param Granularity Lock attribute affects this granularity in bytes.
+
+ @retval EFI_SUCCESS The region was made read only.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_REGION_LOCK) (
+ IN EFI_LEGACY_REGION_PROTOCOL *This,
+ IN UINT32 Start,
+ IN UINT32 Length,
+ OUT UINT32 *Granularity OPTIONAL
+ );
+
+/**
+ Sets a region to read only and ensures that flash is locked from being
+ inadvertently modified.
+
+ @param This Indicates the EFI_LEGACY_REGION_PROTOCOL instance
+ @param Start Start of region to lock.
+ @param Length Size in bytes of the region.
+ @param Granularity Lock attribute affects this granularity in bytes.
+
+ @retval EFI_SUCCESS The region was made read only and flash is locked.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_REGION_BOOT_LOCK) (
+ IN EFI_LEGACY_REGION_PROTOCOL *This,
+ IN UINT32 Start,
+ IN UINT32 Length,
+ OUT UINT32 *Granularity OPTIONAL
+ );
+
+/**
+ Sets a region to read-write.
+
+ @param This Indicates the EFI_LEGACY_REGION_PROTOCOL instance
+ @param Start Start of region to lock.
+ @param Length Size in bytes of the region.
+ @param Granularity Lock attribute affects this granularity in bytes.
+
+ @retval EFI_SUCCESS The region was successfully made read-write.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_REGION_UNLOCK) (
+ IN EFI_LEGACY_REGION_PROTOCOL *This,
+ IN UINT32 Start,
+ IN UINT32 Length,
+ OUT UINT32 *Granularity OPTIONAL
+ );
+
+/**
+ @par Protocol Description:
+ Abstracts the hardware control of the physical address region 0xC0000-C0xFFFFF
+ for the traditional BIOS.
+
+ @param Decode
+ Specifies a region for the chipset to decode
+
+ @param Lock
+ Makes the specified OpROM region read only or locked.
+
+ @param BootLock
+ Sets a region to read only and ensures tat flash is locked from
+ inadvertent modification.
+
+ @param Unlock
+ Makes the specified OpROM region read-write or unlocked.
+
+**/
+struct _EFI_LEGACY_REGION_PROTOCOL {
+ EFI_LEGACY_REGION_DECODE Decode;
+ EFI_LEGACY_REGION_LOCK Lock;
+ EFI_LEGACY_REGION_BOOT_LOCK BootLock;
+ EFI_LEGACY_REGION_UNLOCK UnLock;
+};
+
+extern EFI_GUID gEfiLegacyRegionProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/PciHostBridgeResourceAllocation.h b/IntelFrameworkPkg/Include/Protocol/PciHostBridgeResourceAllocation.h new file mode 100644 index 0000000000..9e8d0781f9 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/PciHostBridgeResourceAllocation.h @@ -0,0 +1,363 @@ +/** @file
+ This file declares Pci Host Bridge Resource Allocation Protocol
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciHostBridgeResourceAllocation.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework of EFI Pci Host Bridge Resource Allocation Protocol Spec
+ Version 0.9
+
+**/
+
+#ifndef _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_
+#define _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_
+
+#define EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GUID \
+ { 0xCF8034BE, 0x6768, 0x4d8b, {0xB7,0x39,0x7C,0xCE,0x68,0x3A,0x9F,0xBE }}
+
+
+typedef struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL;
+
+
+//
+// EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES
+//
+
+// If this bit is set, then the PCI Root Bridge does not
+// support separate windows for Non-prefetchable and Prefetchable
+// memory. A PCI bus driver needs to include requests for Prefetchable
+// memory in the Non-prefetchable memory pool.
+//
+#define EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM 1
+
+//
+// If this bit is set, then the PCI Root Bridge supports
+// 64 bit memory windows. If this bit is not set,
+// the PCI bus driver needs to include requests for 64 bit
+// memory address in the corresponding 32 bit memory pool.
+//
+#define EFI_PCI_HOST_BRIDGE_MEM64_DECODE 2
+
+
+//
+// EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE
+//
+typedef enum {
+ EfiPciHostBridgeBeginEnumeration,
+ EfiPciHostBridgeBeginBusAllocation,
+ EfiPciHostBridgeEndBusAllocation,
+ EfiPciHostBridgeBeginResourceAllocation,
+ EfiPciHostBridgeAllocateResources,
+ EfiPciHostBridgeSetResources,
+ EfiPciHostBridgeFreeResources,
+ EfiPciHostBridgeEndResourceAllocation
+} EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE;
+
+//
+// EfiPciHostBridgeBeginEnumeration
+// Reset the host bridge PCI apertures and internal data structures.
+// PCI enumerator should issue this notification before starting fresh
+// enumeration process. Enumeration cannot be restarted after sending
+// any other notification such as EfiPciHostBridgeBeginBusAllocation.
+//
+// EfiPciHostBridgeBeginBusAllocation
+// The bus allocation phase is about to begin. No specific action
+// is required here. This notification can be used to perform any
+// chipset specific programming.
+//
+// EfiPciHostBridgeEndBusAllocation
+// The bus allocation and bus programming phase is complete. No specific
+// action is required here. This notification can be used to perform any
+// chipset specific programming.
+//
+// EfiPciHostBridgeBeginResourceAllocation
+// The resource allocation phase is about to begin.No specific action is
+// required here. This notification can be used to perform any chipset specific programming.
+//
+// EfiPciHostBridgeAllocateResources
+// Allocate resources per previously submitted requests for all the PCI Root
+// Bridges. These resource settings are returned on the next call to
+// GetProposedResources().
+//
+// EfiPciHostBridgeSetResources
+// Program the Host Bridge hardware to decode previously allocated resources
+// (proposed resources) for all the PCI Root Bridges.
+//
+// EfiPciHostBridgeFreeResources
+// De-allocate previously allocated resources previously for all the PCI
+// Root Bridges and reset the I/O and memory apertures to initial state.
+//
+// EfiPciHostBridgeEndResourceAllocation
+// The resource allocation phase is completed. No specific action is required
+// here. This notification can be used to perform any chipset specific programming.
+
+
+
+//
+// EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE
+//
+typedef enum {
+ EfiPciBeforeChildBusEnumeration,
+ EfiPciBeforeResourceCollection
+} EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE;
+
+//
+// EfiPciBeforeChildBusEnumeration
+// This notification is only applicable to PCI-PCI bridges and
+// indicates that the PCI enumerator is about to begin enumerating
+// the bus behind the PCI-PCI Bridge. This notification is sent after
+// the primary bus number, the secondary bus number and the subordinate
+// bus number registers in the PCI-PCI Bridge are programmed to valid
+// (not necessary final) values
+//
+// EfiPciBeforeResourceCollection
+// This notification is sent before the PCI enumerator probes BAR registers
+// for every valid PCI function.
+//
+
+
+/**
+ Enter a certain phase of the PCI enumeration process
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance
+ @param Phase The phase during enumeration
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_OUT_OF_RESOURCES If SubmitResources ( ) could not allocate resources
+ @retval EFI_NOT_READY This phase cannot be entered at this time
+ @retval EFI_DEVICE_ERROR SetResources failed due to HW error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
+ );
+
+
+/**
+ Return the device handle of the next PCI root bridge that is associated with
+ this Host Bridge
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
+ @param RootBridgeHandle Returns the device handle of the next PCI Root Bridge.
+ On input, it holds the RootBridgeHandle returned by the most
+ recent call to GetNextRootBridge().The handle for the first
+ PCI Root Bridge is returned if RootBridgeHandle is NULL on input
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN OUT EFI_HANDLE *RootBridgeHandle
+ );
+
+
+/**
+ Returns the attributes of a PCI Root Bridge.
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
+ @param RootBridgeHandle The device handle of the PCI Root Bridge
+ that the caller is interested in
+ @param Attribute The pointer to attributes of the PCI Root Bridge
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid
+ @retval EFI_INVALID_PARAMETER Attributes is NULL
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ OUT UINT64 *Attributes
+ );
+
+
+/**
+ This is the request from the PCI enumerator to set up
+ the specified PCI Root Bridge for bus enumeration process.
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
+ @param RootBridgeHandle The PCI Root Bridge to be set up
+ @param Configuration Pointer to the pointer to the PCI bus resource descriptor
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid
+ @retval EFI_DEVICE_ERROR Request failed due to hardware error
+ @retval EFI_OUT_OF_RESOURCES Request failed due to lack of resources
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ OUT VOID **Configuration
+ );
+
+
+/**
+ This function programs the PCI Root Bridge hardware so that
+ it decodes the specified PCI bus range
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
+ @param RootBridgeHandle The PCI Root Bridge whose bus range is to be programmed
+ @param Configuration The pointer to the PCI bus resource descriptor
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid
+ @retval EFI_INVALID_PARAMETER Configuration is NULL
+ @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI resource descriptor
+ @retval EFI_INVALID_PARAMETER Configuration contains one or more memory or IO ACPI resource descriptor
+ @retval EFI_INVALID_PARAMETER Address Range Minimum or Address Range Length fields in Configuration
+ are invalid for this Root Bridge.
+ @retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource descriptor
+ @retval EFI_DEVICE_ERROR Request failed due to hardware error
+ @retval EFI_OUT_OF_RESOURCES Request failed due to lack of resources
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ IN VOID *Configuration
+ );
+
+
+/**
+ Submits the I/O and memory resource requirements for the specified PCI Root Bridge
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
+ @param RootBridgeHandle The PCI Root Bridge whose I/O and memory resource requirements
+ are being submitted
+ @param Configuration The pointer to the PCI I/O and PCI memory resource descriptor
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid
+ @retval EFI_INVALID_PARAMETER Configuration is NULL
+ @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI resource descriptor
+ @retval EFI_INVALID_PARAMETER Configuration includes a resource descriptor of unsupported type
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ IN VOID *Configuration
+ );
+
+
+/**
+ This function returns the proposed resource settings for the specified
+ PCI Root Bridge
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
+ @param RootBridgeHandle The PCI Root Bridge handle
+ @param Configuration The pointer to the pointer to the PCI I/O
+ and memory resource descriptor
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid
+ @retval EFI_DEVICE_ERROR Request failed due to hardware error
+ @retval EFI_OUT_OF_RESOURCES Request failed due to lack of resources
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ OUT VOID **Configuration
+ );
+
+
+
+/**
+ This function is called for all the PCI controllers that the PCI
+ bus driver finds. Can be used to Preprogram the controller.
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
+ @param RootBridgeHandle The PCI Root Bridge handle
+ @param PciBusAddress Address of the controller on the PCI bus
+ @param Phase The Phase during resource allocation
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid
+ @retval EFI_DEVICE_ERROR Device pre-initialization failed due to hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
+ IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
+ );
+
+/**
+ @par Protocol Description:
+ Provides the basic interfaces to abstract a PCI host bridge resource allocation.
+
+ @param NotifyPhase
+ The notification from the PCI bus enumerator that it is about to enter
+ a certain phase during the enumeration process.
+
+ @param GetNextRootBridge
+ Retrieves the device handle for the next PCI root bridge that is produced by the
+ host bridge to which this instance of the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is attached.
+
+ @param GetAllocAttributes
+ Retrieves the allocation-related attributes of a PCI root bridge.
+
+ @param StartBusEnumeration
+ Sets up a PCI root bridge for bus enumeration.
+
+ @param SetBusNumbers
+ Sets up the PCI root bridge so that it decodes a specific range of bus numbers.
+
+ @param SubmitResources
+ Submits the resource requirements for the specified PCI root bridge.
+
+ @param GetProposedResources
+ Returns the proposed resource assignment for the specified PCI root bridges.
+
+ @param PreprocessController
+ Provides hooks from the PCI bus driver to every PCI controller
+ (device/function) at various stages of the PCI enumeration process that
+ allow the host bridge driver to preinitialize individual PCI controllers
+ before enumeration.
+
+**/
+struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL {
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE NotifyPhase;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE GetNextRootBridge;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES GetAllocAttributes;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION StartBusEnumeration;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS SetBusNumbers;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES SubmitResources;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES GetProposedResources;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER PreprocessController;
+};
+
+extern EFI_GUID gEfiPciHostBridgeResourceAllocationProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/PciHotPlugInit.h b/IntelFrameworkPkg/Include/Protocol/PciHotPlugInit.h new file mode 100644 index 0000000000..577a4dd430 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/PciHotPlugInit.h @@ -0,0 +1,165 @@ +/** @file
+ This file declares EFI PCI Hot Plug Init Protocol
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciHotPlugInit.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework of EFI Hot Plug Pci Initialization Protocol Spec
+ Version 0.9
+
+**/
+
+#ifndef _EFI_PCI_HOT_PLUG_INIT_H_
+#define _EFI_PCI_HOT_PLUG_INIT_H_
+
+//
+// Global ID for the PCI Hot Plug Protocol
+//
+#define EFI_PCI_HOT_PLUG_INIT_PROTOCOL_GUID \
+ { 0xaa0e8bc1, 0xdabc, 0x46b0, {0xa8, 0x44, 0x37, 0xb8, 0x16, 0x9b, 0x2b, 0xea } }
+
+
+typedef struct _EFI_PCI_HOT_PLUG_INIT_PROTOCOL EFI_PCI_HOT_PLUG_INIT_PROTOCOL;
+
+#define EFI_HPC_STATE_INITIALIZED 0x01
+#define EFI_HPC_STATE_ENABLED 0x02
+
+typedef UINT16 EFI_HPC_STATE;
+
+
+typedef struct{
+ EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *HpbDevicePath;
+} EFI_HPC_LOCATION;
+
+
+typedef enum{
+ EfiPaddingPciBus,
+ EfiPaddingPciRootBridge
+} EFI_HPC_PADDING_ATTRIBUTES;
+
+/**
+ Returns a list of root Hot Plug Controllers (HPCs) that require initialization
+ during the boot process.
+
+ @param This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL instance.
+ @param HpcCount The number of root HPCs that were returned.
+ @param HpcList The list of root HPCs. HpcCount defines the number of
+ elements in this list.
+
+ @retval EFI_SUCCESS HpcList was returned.
+ @retval EFI_OUT_OF_RESOURCES HpcList was not returned due to insufficient resources.
+ @retval EFI_INVALID_PARAMETER HpcCount is NULL or HpcList is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_ROOT_HPC_LIST) (
+ IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
+ OUT UINTN *HpcCount,
+ OUT EFI_HPC_LOCATION **HpcList
+);
+
+/**
+ Initializes one root Hot Plug Controller (HPC). This process may causes
+ initialization of its subordinate buses.
+
+ @param This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL instance.
+ @param HpcDevicePath The device path to the HPC that is being initialized.
+ @param HpcPciAddress The address of the HPC function on the PCI bus.
+ @param Event The event that should be signaled when the HPC initialization
+ is complete.
+ @param HpcState The state of the HPC hardware.
+
+ @retval EFI_SUCCESS If Event is NULL, the specific HPC was successfully
+ initialized. If Event is not NULL, Event will be signaled at a later time
+ when initialization is complete.
+ @retval EFI_UNSUPPORTED This instance of EFI_PCI_HOT_PLUG_INIT_PROTOCOL
+ does not support the specified HPC.
+ @retval EFI_OUT_OF_RESOURCES Initialization failed due to insufficient
+ resources.
+ @retval EFI_INVALID_PARAMETER HpcState is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_INITIALIZE_ROOT_HPC) (
+ IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
+ IN UINT64 HpcPciAddress,
+ IN EFI_EVENT Event, OPTIONAL
+ OUT EFI_HPC_STATE *HpcState
+);
+
+/**
+ Returns the resource padding that is required by the PCI bus that is controlled
+ by the specified Hot Plug Controller (HPC).
+
+ @param This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL instance.
+ @param HpcDevicePath The device path to the HPC.
+ @param HpcPciAddress The address of the HPC function on the PCI bus.
+ @param HpcState The state of the HPC hardware.
+ @param Padding The amount of resource padding that is required by the
+ PCI bus under the control of the specified HPC.
+ @param Attributes Describes how padding is accounted for. The padding
+ is returned in the form of ACPI 2.0 resource descriptors.
+
+ @retval EFI_SUCCESS The resource padding was successfully returned.
+ @retval EFI_UNSUPPORTED This instance of the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
+ does not support the specified HPC.
+ @retval EFI_NOT_READY This function was called before HPC initialization is complete.
+ @retval EFI_INVALID_PARAMETER HpcState or Padding or Attributes is NULL.
+ @retval EFI_OUT_OF_RESOURCES ACPI 2.0 resource descriptors for Padding
+ cannot be allocated due to insufficient resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_PCI_HOT_PLUG_PADDING) (
+ IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
+ IN UINT64 HpcPciAddress,
+ OUT EFI_HPC_STATE *HpcState,
+ OUT VOID **Padding,
+ OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes
+);
+
+
+//
+// Prototypes for the PCI Hot Plug Init Protocol
+//
+
+/**
+ @par Protocol Description:
+ This protocol provides the necessary functionality to initialize the
+ Hot Plug Controllers (HPCs) and the buses that they control. This protocol
+ also provides information regarding resource padding.
+
+ @param GetRootHpcList
+ Returns a list of root HPCs and the buses that they control.
+
+ @param InitializeRootHpc
+ Initializes the specified root HPC.
+
+ @param GetResourcePadding
+ Returns the resource padding that is required by the HPC.
+
+**/
+struct _EFI_PCI_HOT_PLUG_INIT_PROTOCOL {
+ EFI_GET_ROOT_HPC_LIST GetRootHpcList;
+ EFI_INITIALIZE_ROOT_HPC InitializeRootHpc;
+ EFI_GET_PCI_HOT_PLUG_PADDING GetResourcePadding;
+};
+
+extern EFI_GUID gEfiPciHotPlugInitProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/PciPlatform.h b/IntelFrameworkPkg/Include/Protocol/PciPlatform.h new file mode 100644 index 0000000000..f86ea51beb --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/PciPlatform.h @@ -0,0 +1,206 @@ +/** @file
+ This file declares PlatfromOpRom protocols.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciPlatform.h
+
+ @par Revision Reference:
+ This protocol is defined in PCI Platform Support Specification
+ Version 0.9
+
+**/
+
+#ifndef _PCI_PLATFORM_H_
+#define _PCI_PLATFORM_H_
+
+//
+// Protocol for GUID.
+//
+
+#define EFI_PCI_PLATFORM_PROTOCOL_GUID \
+{ 0x7d75280, 0x27d4, 0x4d69, {0x90, 0xd0, 0x56, 0x43, 0xe2, 0x38, 0xb3, 0x41} }
+
+typedef struct _EFI_PCI_PLATFORM_PROTOCOL EFI_PCI_PLATFORM_PROTOCOL;
+
+typedef UINT32 EFI_PCI_PLATFORM_POLICY;
+
+
+#define EFI_RESERVE_NONE_IO_ALIAS 0x0000
+#define EFI_RESERVE_ISA_IO_ALIAS 0x0001
+#define EFI_RESERVE_ISA_IO_NO_ALIAS 0x0002
+#define EFI_RESERVE_VGA_IO_ALIAS 0x0004
+#define EFI_RESERVE_VGA_IO_NO_ALIAS 0x0008
+
+
+typedef enum {
+ ChipsetEntry,
+ ChipsetExit,
+ MaximumChipsetPhase
+} EFI_PCI_CHIPSET_EXECUTION_PHASE;
+
+
+/**
+ The PlatformNotify() function can be used to notify the platform driver so that
+ it can perform platform-specific actions. No specific actions are required.
+ Eight notification points are defined at this time. More synchronization points
+ may be added as required in the future. The PCI bus driver calls the platform driver
+ twice for every Phase-once before the PCI Host Bridge Resource Allocation Protocol
+ driver is notified, and once after the PCI Host Bridge Resource Allocation Protocol
+ driver has been notified.
+ This member function may not perform any error checking on the input parameters. It
+ also does not return any error codes. If this member function detects any error condition,
+ it needs to handle those errors on its own because there is no way to surface any
+ errors to the caller.
+
+ @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ @param HostBridge The handle of the host bridge controller.
+ @param Phase The phase of the PCI bus enumeration.
+ @param ChipsetPhase Defines the execution phase of the PCI chipset driver.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_PLATFORM_PHASE_NOTIFY) (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE HostBridge,
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,
+ IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase
+)
+;
+
+
+/**
+ The PlatformPrepController() function can be used to notify the platform driver so that
+ it can perform platform-specific actions. No specific actions are required.
+ Several notification points are defined at this time. More synchronization points may be
+ added as required in the future. The PCI bus driver calls the platform driver twice for
+ every PCI controller-once before the PCI Host Bridge Resource Allocation Protocol driver
+ is notified, and once after the PCI Host Bridge Resource Allocation Protocol driver has
+ been notified.
+ This member function may not perform any error checking on the input parameters. It also
+ does not return any error codes. If this member function detects any error condition, it
+ needs to handle those errors on its own because there is no way to surface any errors to
+ the caller.
+
+ @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ @param HostBridge The associated PCI host bridge handle.
+ @param RootBridge The associated PCI root bridge handle.
+ @param PciAddress The address of the PCI device on the PCI bus.
+ @param Phase The phase of the PCI controller enumeration.
+ @param ChipsetPhase Defines the execution phase of the PCI chipset driver.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_PLATFORM_PREPROCESS_CONTROLLER) (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE HostBridge,
+ IN EFI_HANDLE RootBridge,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
+ IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,
+ IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase
+)
+;
+
+
+/**
+ The GetPlatformPolicy() function retrieves the platform policy regarding PCI
+ enumeration. The PCI bus driver and the PCI Host Bridge Resource Allocation Protocol
+ driver can call this member function to retrieve the policy.
+
+ @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ @param PciPolicy The platform policy with respect to VGA and ISA aliasing.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_INVALID_PARAMETER PciPolicy is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_PLATFORM_GET_PLATFORM_POLICY) (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ OUT EFI_PCI_PLATFORM_POLICY *PciPolicy
+)
+;
+
+
+/**
+ The GetPciRom() function gets the PCI device's option ROM from a platform-specific location.
+ The option ROM will be loaded into memory. This member function is used to return an image
+ that is packaged as a PCI 2.2 option ROM. The image may contain both legacy and EFI option
+ ROMs. See the EFI 1.10 Specification for details. This member function can be used to return
+ option ROM images for embedded controllers. Option ROMs for embedded controllers are typically
+ stored in platform-specific storage, and this member function can retrieve it from that storage
+ and return it to the PCI bus driver. The PCI bus driver will call this member function before
+ scanning the ROM that is attached to any controller, which allows a platform to specify a ROM
+ image that is different from the ROM image on a PCI card.
+
+ @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ @param PciHandle The handle of the PCI device.
+ @param RomImage If the call succeeds, the pointer to the pointer to the option ROM image.
+ Otherwise, this field is undefined. The memory for RomImage is allocated
+ by EFI_PCI_PLATFORM_PROTOCOL.GetPciRom() using the EFI Boot Service AllocatePool().
+ It is the caller's responsibility to free the memory using the EFI Boot Service
+ FreePool(), when the caller is done with the option ROM.
+ @param RomSize If the call succeeds, a pointer to the size of the option ROM size. Otherwise,
+ this field is undefined.
+
+ @retval EFI_SUCCESS The option ROM was available for this device and loaded into memory.
+ @retval EFI_NOT_FOUND No option ROM was available for this device.
+ @retval EFI_OUT_OF_RESOURCES No memory was available to load the option ROM.
+ @retval EFI_DEVICE_ERROR An error occurred in getting the option ROM.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_PLATFORM_GET_PCI_ROM) (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT VOID **RomImage,
+ OUT UINTN *RomSize
+)
+;
+
+/**
+ @par Protocol Description:
+ This protocol provides the interface between the PCI bus driver/PCI Host
+ Bridge Resource Allocation driver and a platform-specific driver to describe
+ the unique features of a platform.
+
+ @param PlatformNotify
+ The notification from the PCI bus enumerator to the platform that it is
+ about to enter a certain phase during the enumeration process.
+
+ @param PlatformPrepController
+ The notification from the PCI bus enumerator to the platform for each PCI
+ controller at several predefined points during PCI controller initialization.
+
+ @param GetPlatformPolicy
+ Retrieves the platform policy regarding enumeration.
+
+ @param GetPciRom
+ Gets the PCI device's option ROM from a platform-specific location.
+
+**/
+struct _EFI_PCI_PLATFORM_PROTOCOL {
+ EFI_PCI_PLATFORM_PHASE_NOTIFY PhaseNotify;
+ EFI_PCI_PLATFORM_PREPROCESS_CONTROLLER PlatformPrepController;
+ EFI_PCI_PLATFORM_GET_PLATFORM_POLICY GetPlatformPolicy;
+ EFI_PCI_PLATFORM_GET_PCI_ROM GetPciRom;
+};
+
+extern EFI_GUID gEfiPciPlatformProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/SectionExtraction.h b/IntelFrameworkPkg/Include/Protocol/SectionExtraction.h new file mode 100644 index 0000000000..964cf4b771 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/SectionExtraction.h @@ -0,0 +1,160 @@ +/** @file
+ This file declares Section Extraction protocols.
+
+ This interface provides a means of decoding a set of sections into a linked list of
+ leaf sections. This provides for an extensible and flexible file format.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SectionExtraction.h
+
+ @par Revision Reference:
+ This protocol is defined in Firmware Volume Specification.
+ Version 0.9
+
+**/
+
+#ifndef _SECTION_EXTRACTION_PROTOCOL_H_
+#define _SECTION_EXTRACTION_PROTOCOL_H_
+
+
+//
+// Protocol GUID definition
+//
+#define EFI_SECTION_EXTRACTION_PROTOCOL_GUID \
+ { \
+ 0x448F5DA4, 0x6DD7, 0x4FE1, {0x93, 0x07, 0x69, 0x22, 0x41, 0x92, 0x21, 0x5D } \
+ }
+
+typedef struct _EFI_SECTION_EXTRACTION_PROTOCOL EFI_SECTION_EXTRACTION_PROTOCOL;
+
+//
+// Protocol member functions
+//
+/**
+ Creates and returns a new section stream handle to represent the new section stream.
+
+ @param This Indicates the EFI_SECTION_EXTRACTION_PROTOCOL instance.
+ @param SectionStreamLength Size in bytes of the section stream.
+ @param SectionStream Buffer containing the new section stream.
+ @param SectionStreamHandle A pointer to a caller-allocated UINTN that,
+ on output, contains the new section stream handle.
+
+ @retval EFI_SUCCESS The SectionStream was successfully processed and
+ the section stream handle was returned.
+ @retval EFI_OUT_OF_RESOURCES The system has insufficient resources to
+ process the request.
+ @retval EFI_INVALID_PARAMETER The section stream may be corrupt or the value
+ of SectionStreamLength may be incorrect.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_OPEN_SECTION_STREAM) (
+ IN EFI_SECTION_EXTRACTION_PROTOCOL *This,
+ IN UINTN SectionStreamLength,
+ IN VOID *SectionStream,
+ OUT UINTN *SectionStreamHandle
+ );
+
+/**
+ Reads and returns a single section from a section stream.
+
+ @param This Indicates the EFI_SECTION_EXTRACTION_PROTOCOL instance.
+ @param SectionStreamHandle Indicates from which section stream to read.
+ @param SectionType Pointer to an EFI_SECTION_TYPE.
+ @param SectionDefinitionGuid Pointer to an EFI_GUID.If SectionType ==
+ EFI_SECTION_GUID_DEFINED, SectionDefinitionGuid indicates what section GUID
+ to search for.If SectionType !=EFI_SECTION_GUID_DEFINED, then
+ SectionDefinitionGuid is unused and is ignored.
+ @param SectionInstance Indicates which instance of the requested section
+ type to return when SectionType is not NULL.
+ @param SectionStreamHandle A pointer to a caller-allocated UINTN that, on output,
+ contains the new section stream handle.
+ @param Buffer Pointer to a pointer to a buffer in which the section
+ contents are returned.
+ @param BufferSize Pointer to a caller-allocated UINTN.
+ @param AuthenticationStatus Pointer to a caller-allocated UINT32 in
+ which any meta-data from encapsulation GUID-defined sections is returned.
+
+ @retval EFI_SUCCESS The SectionStream was successfully processed and
+ the section contents were returned in Buffer.
+ @retval EFI_PROTOCOL_ERROR A GUID-defined section was encountered in
+ the section stream with its EFI_GUIDED_SECTION_PROCESSING_REQUIRED bit set,
+ but there was no corresponding GUIDed Section Extraction Protocol in
+ the handle database.
+ @retval EFI_NOT_FOUND An error was encountered when parsing the SectionStream,
+ which indicates that the SectionStream is not correctly formatted.
+ Or The requested section does not exist.
+ @retval EFI_OUT_OF_RESOURCES The system has insufficient resources to process
+ the request.
+ @retval EFI_INVALID_PARAMETER The SectionStreamHandle does not exist.
+ @retval EFI_BUFFER_TOO_SMALL The size of the input buffer is insufficient to
+ contain the requested section.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_SECTION) (
+ IN EFI_SECTION_EXTRACTION_PROTOCOL *This,
+ IN UINTN SectionStreamHandle,
+ IN EFI_SECTION_TYPE *SectionType,
+ IN EFI_GUID *SectionDefinitionGuid,
+ IN UINTN SectionInstance,
+ IN VOID **Buffer,
+ IN OUT UINTN *BufferSize,
+ OUT UINT32 *AuthenticationStatus
+ );
+
+/**
+ Deletes a section stream handle and returns all associated resources to the system.
+
+ @param This Indicates the EFI_SECTION_EXTRACTION_PROTOCOL instance.
+ @param SectionStreamHandle Indicates the section stream to close.
+ @retval EFI_SUCCESS The SectionStream was successfully processed and
+ the section stream handle was returned.
+ @retval EFI_INVALID_PARAMETER The SectionStreamHandle does not exist.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CLOSE_SECTION_STREAM) (
+ IN EFI_SECTION_EXTRACTION_PROTOCOL *This,
+ IN UINTN SectionStreamHandle
+ );
+
+//
+// Protocol definition
+//
+/**
+ @par Protocol Description:
+ The Section Extraction Protocol provides a simple method of extracting
+ sections from arbitrarily complex files.
+
+ @param OpenSectionStream
+ Takes a bounded stream of sections and returns a section stream handle.
+
+ @param GetSection
+ Given a section stream handle, retrieves the requested section and
+ meta-data from the section stream.
+
+ @param CloseSectionStream
+ Given a section stream handle, closes the section stream.
+
+**/
+struct _EFI_SECTION_EXTRACTION_PROTOCOL {
+ EFI_OPEN_SECTION_STREAM OpenSectionStream;
+ EFI_GET_SECTION GetSection;
+ EFI_CLOSE_SECTION_STREAM CloseSectionStream;
+};
+
+extern EFI_GUID gEfiSectionExtractionProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/SmmAccess.h b/IntelFrameworkPkg/Include/Protocol/SmmAccess.h new file mode 100644 index 0000000000..700eb25006 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/SmmAccess.h @@ -0,0 +1,159 @@ +/** @file
+ This file declares SMM SMRAM Access abstraction protocol
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmAccess.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+**/
+
+#ifndef _SMM_ACCESS_H_
+#define _SMM_ACCESS_H_
+
+#include <SmramMemoryReserve.h>
+
+typedef struct _EFI_SMM_ACCESS_PROTOCOL EFI_SMM_ACCESS_PROTOCOL;
+
+#define EFI_SMM_ACCESS_PROTOCOL_GUID \
+ { \
+ 0x3792095a, 0xe309, 0x4c1e, {0xaa, 0x01, 0x85, 0xf5, 0x65, 0x5a, 0x17, 0xf1 } \
+ }
+
+//
+// SMM Access specification constant and types
+//
+// *******************************************************
+// EFI_SMRAM_STATE
+// *******************************************************
+//
+#define EFI_SMRAM_OPEN 0x00000001
+#define EFI_SMRAM_CLOSED 0x00000002
+#define EFI_SMRAM_LOCKED 0x00000004
+#define EFI_CACHEABLE 0x00000008
+#define EFI_ALLOCATED 0x00000010
+
+//
+// SMM Access specification Member Function
+//
+/**
+ Opens the SMRAM area to be accessible by a boot-service driver.
+
+ @param This The EFI_SMM_ACCESS_PROTOCOL instance.
+ @param DescriptorIndex Indicates that the driver wishes to open
+ the memory tagged by this index.
+
+ @retval EFI_SUCCESS The operation was successful.
+ @retval EFI_INVALID_PARAMETER The given DescriptorIndex is not supported.
+ @retval EFI_NOT_STARTED The SMM base service has not been initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_OPEN) (
+ IN EFI_SMM_ACCESS_PROTOCOL *This,
+ UINTN DescriptorIndex
+ );
+
+/**
+ Inhibits access to the SMRAM.
+
+ @param This The EFI_SMM_ACCESS_PROTOCOL instance.
+ @param DescriptorIndex Indicates that the driver wishes to open
+ the memory tagged by this index.
+
+ @retval EFI_SUCCESS The operation was successful.
+ @retval EFI_DEVICE_ERROR The given DescriptorIndex is not open.
+ @retval EFI_INVALID_PARAMETER The given DescriptorIndex is not supported.
+ @retval EFI_NOT_STARTED The SMM base service has not been initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CLOSE) (
+ IN EFI_SMM_ACCESS_PROTOCOL *This,
+ UINTN DescriptorIndex
+ );
+
+/**
+ Inhibits access to the SMRAM.
+ @param This The EFI_SMM_ACCESS_PROTOCOL instance.
+ @param DescriptorIndex Indicates that the driver wishes to open
+ the memory tagged by this index.
+
+ @retval EFI_SUCCESS The operation was successful.
+ @retval EFI_DEVICE_ERROR The given DescriptorIndex is not open.
+ @retval EFI_INVALID_PARAMETER The given DescriptorIndex is not supported.
+ @retval EFI_NOT_STARTED The SMM base service has not been initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_LOCK) (
+ IN EFI_SMM_ACCESS_PROTOCOL *This,
+ UINTN DescriptorIndex
+ );
+
+/**
+ Queries the memory controller for the possible regions that will support SMRAM.
+
+ @param This The EFI_SMM_ACCESS_PROTOCOL instance.
+ @param SmramMapSize A pointer to the size, in bytes, of the SmramMemoryMap buffer.
+ @param SmramMap A pointer to the buffer in which firmware places the current memory map.
+
+ @retval EFI_SUCCESS The chipset supported the given resource.
+ @retval EFI_BUFFER_TOO_SMALL The SmramMap parameter was too small.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CAPABILITIES) (
+ IN EFI_SMM_ACCESS_PROTOCOL *This,
+ IN OUT UINTN *SmramMapSize,
+ IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap
+ );
+
+/**
+ @par Protocol Description:
+ This protocol is used to control the visibility of the SMRAM on the platform.
+
+ @param Open
+ Opens the SMRAM.
+
+ @param Close
+ Closes the SMRAM.
+
+ @param Lock
+ Locks the SMRAM.
+
+ @param GetCapabilities
+ Gets information on possible SMRAM regions.
+
+ @param LockState
+Indicates the current state of the SMRAM. Set to TRUE if any region is locked.
+
+ @param OpenState
+Indicates the current state of the SMRAM. Set to TRUE if any region is open.
+
+**/
+struct _EFI_SMM_ACCESS_PROTOCOL {
+ EFI_SMM_OPEN Open;
+ EFI_SMM_CLOSE Close;
+ EFI_SMM_LOCK Lock;
+ EFI_SMM_CAPABILITIES GetCapabilities;
+ BOOLEAN LockState;
+ BOOLEAN OpenState;
+};
+
+extern EFI_GUID gEfiSmmAccessProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/SmmBase.h b/IntelFrameworkPkg/Include/Protocol/SmmBase.h new file mode 100644 index 0000000000..be214736f3 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/SmmBase.h @@ -0,0 +1,308 @@ +/** @file
+ This file declares SMM Base abstraction protocol.
+ This is the base level of compatiblity for SMM drivers.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmBase.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _SMM_BASE_H_
+#define _SMM_BASE_H_
+
+#define EFI_SMM_BASE_PROTOCOL_GUID \
+ { \
+ 0x1390954D, 0xda95, 0x4227, {0x93, 0x28, 0x72, 0x82, 0xc2, 0x17, 0xda, 0xa8 } \
+ }
+
+typedef struct _EFI_SMM_BASE_PROTOCOL EFI_SMM_BASE_PROTOCOL;
+
+//
+// SMM Handler Definition
+//
+#define EFI_HANDLER_SUCCESS 0x0000
+#define EFI_HANDLER_CRITICAL_EXIT 0x0001
+#define EFI_HANDLER_SOURCE_QUIESCED 0x0002
+#define EFI_HANDLER_SOURCE_PENDING 0x0003
+
+/**
+ Entry Point to Callback service
+
+ @param SmmImageHandle A handle allocated by the SMM infrastructure code
+ to uniquely designate a specific DXE SMM driver.
+ @param CommunicationBuffer A pointer to a collection of data in memory
+ that will be conveyed from a non-SMM environment into an SMM environment.
+ The buffer must be contiguous, physically mapped, and be a physical address.
+ @param SourceSize The size of the CommunicationBuffer.
+
+ @return Status code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CALLBACK_ENTRY_POINT) (
+ IN EFI_HANDLE SmmImageHandle,
+ IN OUT VOID *CommunicationBuffer OPTIONAL,
+ IN OUT UINTN *SourceSize OPTIONAL
+ );
+
+//
+// SMM Base Protocol Definition
+//
+/**
+ Register a given driver into SMRAM.This is the equivalent of performing
+ the LoadImage/StartImage into System Management Mode.
+
+ @param This Protocol instance pointer.
+ @param FilePath Location of the image to be installed as the handler.
+ @param SourceBuffer Optional source buffer in case of the image file
+ being in memory.
+ @param SourceSize Size of the source image file, if in memory.
+ @param ImageHandle Pointer to the handle that reflects the driver
+ loaded into SMM.
+ @param LegacyIA32Binary The binary image to load is legacy 16 bit code.
+
+ @retval EFI_SUCCESS The operation was successful.
+ @retval EFI_OUT_OF_RESOURCES There were no additional SMRAM resources to load the handler
+ @retval EFI_UNSUPPORTED This platform does not support 16-bit handlers.
+ @retval EFI_UNSUPPORTED In runtime.
+ @retval EFI_INVALID_PARAMETER The handlers was not the correct image type
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_REGISTER_HANDLER) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
+ IN VOID *SourceBuffer OPTIONAL,
+ IN UINTN SourceSize,
+ OUT EFI_HANDLE *ImageHandle,
+ IN BOOLEAN LegacyIA32Binary OPTIONAL
+ )
+;
+
+/**
+ Remove a given driver SMRAM. This is the equivalent of performing
+ the UnloadImage System Management Mode.
+
+ @param This Protocol instance pointer.
+ @param ImageHandle Pointer to the handle that reflects the driver
+ loaded into SMM.
+
+ @retval EFI_SUCCESS The operation was successful
+ @retval EFI_INVALID_PARAMETER The handler did not exist
+ @retval EFI_UNSUPPORTED In runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_UNREGISTER_HANDLER) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_HANDLE ImageHandle
+ )
+;
+
+/**
+ The SMM Inter-module Communicate Service Communicate() function
+ provides a services to send/received messages from a registered
+ EFI service. The BASE protocol driver is responsible for doing
+ any of the copies such that the data lives in boot-service accessible RAM.
+
+ @param This Protocol instance pointer.
+ @param ImageHandle Pointer to the handle that reflects the driver
+ loaded into SMM.
+ @param CommunicationBuffer Pointer to the buffer to convey into SMRAM.
+ @param SourceSize Size of the contents of buffer..
+
+ @retval EFI_SUCCESS The message was successfully posted
+ @retval EFI_INVALID_PARAMETER The buffer was NULL
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_COMMUNICATE) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_HANDLE ImageHandle,
+ IN OUT VOID *CommunicationBuffer,
+ IN OUT UINTN *SourceSize
+ )
+;
+
+/**
+ Register a callback to execute within SMM.
+ This allows receipt of messages created with the Boot Service COMMUNICATE.
+
+ @param This Protocol instance pointer.
+ @param CallbackAddress Address of the callback service
+ @param MakeFirst If present, will stipulate that the handler is posted
+ to be the first module executed in the dispatch table.
+ @param MakeLast If present, will stipulate that the handler is posted
+ to be last executed in the dispatch table.
+ @param FloatingPointSave This is an optional parameter which informs the
+ EFI_SMM_ACCESS_PROTOCOL Driver core if it needs to save
+ the floating point register state. If any of the handlers
+ require this, then the state will be saved for all of the handlers.
+
+ @retval EFI_SUCCESS The operation was successful
+ @retval EFI_OUT_OF_RESOURCES Not enough space in the dispatch queue
+ @retval EFI_UNSUPPORTED In runtime.
+ @retval EFI_UNSUPPORTED Not in SMM.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CALLBACK_SERVICE) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_HANDLE SmmImageHandle,
+ IN EFI_SMM_CALLBACK_ENTRY_POINT CallbackAddress,
+ IN BOOLEAN MakeLast OPTIONAL,
+ IN BOOLEAN FloatingPointSave OPTIONAL
+ )
+;
+
+/**
+ The SmmAllocatePool() function allocates a memory region of Size bytes from memory of
+ type PoolType and returns the address of the allocated memory in the location referenced
+ by Buffer. This function allocates pages from EFI SMRAM Memory as needed to grow the
+ requested pool type. All allocations are eight-byte aligned.
+
+ @param This Protocol instance pointer.
+ @param PoolType The type of pool to allocate.
+ The only supported type is EfiRuntimeServicesData;
+ the interface will internally map this runtime request to SMRAM.
+ @param Size The number of bytes to allocate from the pool.
+ @param Buffer A pointer to a pointer to the allocated buffer if the call
+ succeeds; undefined otherwise.
+
+ @retval EFI_SUCCESS The requested number of bytes was allocated.
+ @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated.
+ @retval EFI_INVALID_PARAMETER PoolType was invalid.
+ @retval EFI_UNSUPPORTED In runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_ALLOCATE_POOL) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN Size,
+ OUT VOID **Buffer
+ )
+;
+
+/**
+ The SmmFreePool() function returns the memory specified by Buffer to the system.
+ On return, the memory's type is EFI SMRAM Memory. The Buffer that is freed must
+ have been allocated by SmmAllocatePool().
+
+ @param This Protocol instance pointer.
+ @param Buffer Pointer to the buffer allocation.
+
+ @retval EFI_SUCCESS The memory was returned to the system.
+ @retval EFI_INVALID_PARAMETER Buffer was invalid.
+ @retval EFI_UNSUPPORTED In runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_FREE_POOL) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN VOID *Buffer
+ )
+;
+
+/**
+ This routine tells caller if execution context is SMM or not.
+
+ @param This Protocol instance pointer.
+ @param InSmm Whether the caller is inside SMM for IA-32 or servicing a PMI for the Itanium processor family.
+
+ @retval EFI_SUCCESS The operation was successful
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_INSIDE_OUT) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ OUT BOOLEAN *InSmm
+ )
+;
+
+/**
+ The GetSmstLocation() function returns the locatin of the System Management
+ Service Table. The use of the API is such that a driver can discover the
+ location of the SMST in its entry point and then cache it in some driver
+ global variable so that the SMST can be invoked in subsequent callbacks.
+
+ @param This Protocol instance pointer.
+ @param Smst Pointer to the SMST.
+
+ @retval EFI_SUCCESS The operation was successful
+ @retval EFI_INVALID_PARAMETER Smst was invalid.
+ @retval EFI_UNSUPPORTED Not in SMM.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_GET_SMST_LOCATION) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN OUT EFI_SMM_SYSTEM_TABLE **Smst
+ )
+;
+
+/**
+ @par Protocol Description:
+ This protocol is used to install SMM handlers for support of subsequent SMI/PMI
+ activations. This protocol is available on both IA-32 and Itanium-based systems.
+
+ @param Register
+ Registers a handler to run in System Management RAM (SMRAM).
+
+ @param UnRegister
+ Removes a handler from execution in SMRAM.
+
+ @param Communicate
+ Sends/receives a message for a registered handler.
+
+ @param RegisterCallback
+ Registers a callback from the constructor.
+
+ @param InSmm
+ Detects whether the caller is inside or outside of SMM. SName
+
+ @param SmmAllocatePool
+ Allocates SMRAM.
+
+ @param SmmFreePool
+ Deallocates SMRAM.
+
+ @param GetSmstLocation
+ Retrieves the location of the System Management System Table (SMST).
+
+**/
+struct _EFI_SMM_BASE_PROTOCOL {
+ EFI_SMM_REGISTER_HANDLER Register;
+ EFI_SMM_UNREGISTER_HANDLER UnRegister;
+ EFI_SMM_COMMUNICATE Communicate;
+ EFI_SMM_CALLBACK_SERVICE RegisterCallback;
+ EFI_SMM_INSIDE_OUT InSmm;
+ EFI_SMM_ALLOCATE_POOL SmmAllocatePool;
+ EFI_SMM_FREE_POOL SmmFreePool;
+ EFI_SMM_GET_SMST_LOCATION GetSmstLocation;
+};
+
+extern EFI_GUID gEfiSmmBaseProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/SmmControl.h b/IntelFrameworkPkg/Include/Protocol/SmmControl.h new file mode 100644 index 0000000000..51bc5bfad9 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/SmmControl.h @@ -0,0 +1,128 @@ +/** @file
+ This file declares SMM Control abstraction protocol.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmControl.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _SMM_CONTROL_H_
+#define _SMM_CONTROL_H_
+
+typedef struct _EFI_SMM_CONTROL_PROTOCOL EFI_SMM_CONTROL_PROTOCOL;
+
+#define EFI_SMM_CONTROL_PROTOCOL_GUID \
+ { \
+ 0x8d12e231, 0xc667, 0x4fd1, {0x98, 0xf2, 0x24, 0x49, 0xa7, 0xe7, 0xb2, 0xe5 } \
+ }
+
+// SMM Access specification Data Structures
+//
+typedef struct {
+ UINT8 SmiTriggerRegister;
+ UINT8 SmiDataRegister;
+} EFI_SMM_CONTROL_REGISTER;
+
+//
+// SMM Control specification member function
+//
+/**
+ Invokes SMI activation from either the preboot or runtime environment.
+
+ @param This The EFI_SMM_CONTROL_PROTOCOL instance.
+ @param ArgumentBuffer Optional sized data to pass into the protocol activation.
+ @param ArgumentBufferSize Optional size of the data.
+ @param Periodic Optional mechanism to engender a periodic stream.
+ @param ActivationInterval Optional parameter to repeat at this period one
+ time or, if the Periodic Boolean is set, periodically.
+
+ @retval EFI_SUCCESS The SMI/PMI has been engendered.
+ @retval EFI_DEVICE_ERROR The timing is unsupported.
+ @retval EFI_INVALID_PARAMETER The activation period is unsupported.
+ @retval EFI_NOT_STARTED The SMM base service has not been initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_ACTIVATE) (
+ IN EFI_SMM_CONTROL_PROTOCOL *This,
+ IN OUT INT8 *ArgumentBuffer OPTIONAL,
+ IN OUT UINTN *ArgumentBufferSize OPTIONAL,
+ IN BOOLEAN Periodic OPTIONAL,
+ IN UINTN ActivationInterval OPTIONAL
+ );
+
+/**
+ Clears any system state that was created in response to the Active call.
+
+ @param This The EFI_SMM_CONTROL_PROTOCOL instance.
+ @param Periodic Optional parameter to repeat at this period one time
+
+ @retval EFI_SUCCESS The SMI/PMI has been engendered.
+ @retval EFI_DEVICE_ERROR The source could not be cleared.
+ @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_DEACTIVATE) (
+ IN EFI_SMM_CONTROL_PROTOCOL *This,
+ IN BOOLEAN Periodic OPTIONAL
+ );
+
+/**
+ Provides information on the source register used to generate the SMI.
+
+ @param This The EFI_SMM_CONTROL_PROTOCOL instance.
+ @param SmiRegister Pointer to the SMI register description structure
+
+ @retval EFI_SUCCESS The register structure has been returned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_GET_REGISTER_INFO) (
+ IN EFI_SMM_CONTROL_PROTOCOL *This,
+ IN OUT EFI_SMM_CONTROL_REGISTER *SmiRegister
+ );
+
+/**
+ @par Protocol Description:
+ This protocol is used initiate SMI/PMI activations.
+
+ @param Trigger
+ Initiates the SMI/PMI activation.
+
+ @param Clear
+ Quiesces the SMI/PMI activation.
+
+ @param GetRegisterInfo
+ Provides data on the register used as the source of the SMI.
+
+ @param MinimumTriggerPeriod
+ Minimum interval at which the platform can set the period.
+
+**/
+
+struct _EFI_SMM_CONTROL_PROTOCOL {
+ EFI_SMM_ACTIVATE Trigger;
+ EFI_SMM_DEACTIVATE Clear;
+ EFI_SMM_GET_REGISTER_INFO GetRegisterInfo;
+ UINTN MinimumTriggerPeriod;
+};
+
+extern EFI_GUID gEfiSmmControlProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/SmmGpiDispatch.h b/IntelFrameworkPkg/Include/Protocol/SmmGpiDispatch.h new file mode 100644 index 0000000000..7454bcc685 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/SmmGpiDispatch.h @@ -0,0 +1,149 @@ +/** @file
+ This file declares Smm Gpi Smi Child Protocol
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmGpiDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_GPI_DISPATCH_H_
+#define _EFI_SMM_GPI_DISPATCH_H_
+
+//
+// Global ID for the GPI SMI Protocol
+//
+#define EFI_SMM_GPI_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xe0744b81, 0x9513, 0x49cd, {0x8c, 0xea, 0xe9, 0x24, 0x5e, 0x70, 0x39, 0xda } \
+ }
+
+typedef struct _EFI_SMM_GPI_DISPATCH_PROTOCOL EFI_SMM_GPI_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// GpiMask is a bit mask of 32 possible general purpose inputs that can generate a
+// a SMI. Bit 0 corresponds to logical GPI[0], 1 corresponds to logical GPI[1], etc.
+//
+// The logical GPI index to physical pin on device is described by the GPI device name
+// found on the same handle as the GpiSmi child dispatch protocol. The GPI device name
+// is defined as protocol with a GUID name and NULL protocol pointer.
+//
+typedef struct {
+ UINTN GpiNum;
+} EFI_SMM_GPI_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a GPI SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The DispatchContext fields are filled in by the dispatching driver prior to
+ invoking this dispatch function.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_GPI_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_GPI_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function the GPI(s) for which the dispatch function
+ should be invoked.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The GPI input value
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_GPI_REGISTER) (
+ IN EFI_SMM_GPI_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_GPI_DISPATCH DispatchFunction,
+ IN EFI_SMM_GPI_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+ @retval other TBD
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_GPI_UNREGISTER) (
+ IN EFI_SMM_GPI_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM GPI SMI Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for the General Purpose Input
+ (GPI) SMI source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+ @param NumSupportedGpis
+ Denotes the maximum value of inputs that can have handlers attached.
+
+**/
+struct _EFI_SMM_GPI_DISPATCH_PROTOCOL {
+ EFI_SMM_GPI_REGISTER Register;
+ EFI_SMM_GPI_UNREGISTER UnRegister;
+ UINTN NumSupportedGpis;
+};
+
+extern EFI_GUID gEfiSmmGpiDispatchProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/SmmIchnDispatch.h b/IntelFrameworkPkg/Include/Protocol/SmmIchnDispatch.h new file mode 100644 index 0000000000..34185e88dc --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/SmmIchnDispatch.h @@ -0,0 +1,193 @@ +/** @file
+ This file declares EFI Smm ICH [N] Specific Smi Child Protocol
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmIchnDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_ICHN_DISPATCH_H_
+#define _EFI_SMM_ICHN_DISPATCH_H_
+
+//
+// Global ID for the ICH SMI Protocol
+//
+#define EFI_SMM_ICHN_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xc50b323e, 0x9075, 0x4f2a, {0xac, 0x8e, 0xd2, 0x59, 0x6a, 0x10, 0x85, 0xcc } \
+ }
+
+typedef struct _EFI_SMM_ICHN_DISPATCH_PROTOCOL EFI_SMM_ICHN_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// ICHN Specific SMIs. These are miscellaneous SMI sources that are supported by the
+// ICHN specific SMI implementation. These may change over time. TrapNumber is only
+// valid if the Type is Trap.
+//
+typedef enum {
+ //
+ // NOTE: NEVER delete items from this list/enumeration! Doing so will prevent other versions
+ // of the code from compiling. If the ICH version your driver is written for doesn't support
+ // some of these SMIs, then simply return EFI_UNSUPPORTED when a child/client tries to register
+ // for them.
+ //
+ IchnMch,
+ IchnPme,
+ IchnRtcAlarm,
+ IchnRingIndicate,
+ IchnAc97Wake,
+ IchnSerialIrq,
+ IchnY2KRollover,
+ IchnTcoTimeout,
+ IchnOsTco,
+ IchnNmi,
+ IchnIntruderDetect,
+ IchnBiosWp,
+ IchnMcSmi,
+ IchnPmeB0,
+ IchnThrmSts,
+ IchnSmBus,
+ IchnIntelUsb2,
+ IchnMonSmi7,
+ IchnMonSmi6,
+ IchnMonSmi5,
+ IchnMonSmi4,
+ IchnDevTrap13,
+ IchnDevTrap12,
+ IchnDevTrap11,
+ IchnDevTrap10,
+ IchnDevTrap9,
+ IchnDevTrap8,
+ IchnDevTrap7,
+ IchnDevTrap6,
+ IchnDevTrap5,
+ IchnDevTrap3,
+ IchnDevTrap2,
+ IchnDevTrap1,
+ IchnDevTrap0,
+ IchnIoTrap3,
+ IchnIoTrap2,
+ IchnIoTrap1,
+ IchnIoTrap0,
+ //
+ // INSERT NEW ITEMS JUST BEFORE THIS LINE
+ //
+ NUM_ICHN_TYPES // the number of items in this enumeration
+} EFI_SMM_ICHN_SMI_TYPE;
+
+typedef struct {
+ EFI_SMM_ICHN_SMI_TYPE Type;
+} EFI_SMM_ICHN_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a ICH n specific SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+ Nothing
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_ICHN_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_ICHN_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function the ICHN SMI source for which the dispatch
+ function should be invoked.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The ICHN input value
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_ICHN_REGISTER) (
+ IN EFI_SMM_ICHN_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_ICHN_DISPATCH DispatchFunction,
+ IN EFI_SMM_ICHN_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+ @retval other TBD
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_ICHN_UNREGISTER) (
+ IN EFI_SMM_ICHN_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Ich n specific SMI Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for a given SMI source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+**/
+struct _EFI_SMM_ICHN_DISPATCH_PROTOCOL {
+ EFI_SMM_ICHN_REGISTER Register;
+ EFI_SMM_ICHN_UNREGISTER UnRegister;
+};
+
+extern EFI_GUID gEfiSmmIchnDispatchProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/SmmPeriodicTimerDispatch.h b/IntelFrameworkPkg/Include/Protocol/SmmPeriodicTimerDispatch.h new file mode 100644 index 0000000000..1f343a8e38 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/SmmPeriodicTimerDispatch.h @@ -0,0 +1,194 @@ +/** @file
+ This file declares EFI Smm Periodic Timer Smi Child Protocol
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmPeriodicTimerDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_PERIODIC_TIMER_DISPATCH_H_
+#define _EFI_SMM_PERIODIC_TIMER_DISPATCH_H_
+
+//
+// Global ID for the Periodic Timer SMI Protocol
+//
+#define EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0x9cca03fc, 0x4c9e, 0x4a19, {0x9b, 0x6, 0xed, 0x7b, 0x47, 0x9b, 0xde, 0x55 } \
+ }
+
+typedef struct _EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// Period is the minimum period of time in 100 nanosecond units that child gets called.
+// The child will be called back after a time greater than the time Period.
+//
+// SmiTickInterval is the period of time interval between SMIs. Children of this interface
+// should use this field when registering for periodic timer intervals when a finer
+// granularity periodic SMI is desired. Valid values for this field are those returned
+// by GetNextInterval. A value of 0 indicates the parent is allowed to use any SMI
+// interval period to satisfy the requested period.
+// Example: A chipset supports periodic SMIs on every 64ms or 2 seconds.
+// A child wishes schedule a period SMI to fire on a period of 3 seconds, there
+// are several ways to approach the problem:
+// 1. The child may accept a 4 second periodic rate, in which case it registers with
+// Period = 40000
+// SmiTickInterval = 20000
+// The resulting SMI will occur every 2 seconds with the child called back on
+// every 2nd SMI.
+// NOTE: the same result would occur if the child set SmiTickInterval = 0.
+// 2. The child may choose the finer granularity SMI (64ms):
+// Period = 30000
+// SmiTickInterval = 640
+// The resulting SMI will occur every 64ms with the child called back on
+// every 47th SMI.
+// NOTE: the child driver should be aware that this will result in more
+// SMIs occuring during system runtime which can negatively impact system
+// performance.
+//
+// ElapsedTime is the actual time in 100 nanosecond units elapsed since last called, a
+// value of 0 indicates an unknown amount of time.
+//
+typedef struct {
+ UINT64 Period;
+ UINT64 SmiTickInterval;
+ UINT64 ElapsedTime;
+} EFI_SMM_PERIODIC_TIMER_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a Periodic Timer SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+ Nothing
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Returns the next SMI tick period supported by the chipset. The order
+ returned is from longest to shortest interval period.
+
+ @param This Protocol instance pointer.
+ @param SmiTickInterval Pointer to pointer of next shorter SMI interval
+ period supported by the child. This parameter works as a get-first,
+ get-next field.The first time this function is called, *SmiTickInterval
+ should be set to NULL to get the longest SMI interval.The returned
+ *SmiTickInterval should be passed in on subsequent calls to get the
+ next shorter interval period until *SmiTickInterval = NULL.
+
+ @retval EFI_SUCCESS The service returned successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_INTERVAL) (
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL *This,
+ IN OUT UINT64 **SmiTickInterval
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function the period at which the dispatch function
+ should be invoked.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The period input value
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_REGISTER) (
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH DispatchFunction,
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_UNREGISTER) (
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Periodic Timer Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for the periodical timer SMI source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+ @param GetNextShorterInterval
+ Returns the next SMI tick period that is supported by the chipset.
+
+**/
+struct _EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL {
+ EFI_SMM_PERIODIC_TIMER_REGISTER Register;
+ EFI_SMM_PERIODIC_TIMER_UNREGISTER UnRegister;
+ EFI_SMM_PERIODIC_TIMER_INTERVAL GetNextShorterInterval;
+};
+
+extern EFI_GUID gEfiSmmPeriodicTimerDispatchProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/SmmPowerButtonDispatch.h b/IntelFrameworkPkg/Include/Protocol/SmmPowerButtonDispatch.h new file mode 100644 index 0000000000..c2c7b282f9 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/SmmPowerButtonDispatch.h @@ -0,0 +1,147 @@ +/** @file
+ This file declares EFI Smm Power Button Smi Child Protocol
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmPowerButtonDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_POWER_BUTTON_DISPATCH_H_
+#define _EFI_SMM_POWER_BUTTON_DISPATCH_H_
+
+//
+// Global ID for the Power Button SMI Protocol
+//
+#define EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xb709efa0, 0x47a6, 0x4b41, {0xb9, 0x31, 0x12, 0xec, 0xe7, 0xa8, 0xee, 0x56 } \
+ }
+
+typedef struct _EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// Power Button. Example, Use for changing LEDs before ACPI OS is on.
+// - DXE/BDS Phase
+// - OS Install Phase
+//
+typedef enum {
+ PowerButtonEntry,
+ PowerButtonExit
+} EFI_POWER_BUTTON_PHASE;
+
+typedef struct {
+ EFI_POWER_BUTTON_PHASE Phase;
+} EFI_SMM_POWER_BUTTON_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a Power Button SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+ Nothing
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_POWER_BUTTON_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_POWER_BUTTON_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function the Power Button SMI phase for which the dispatch
+ function should be invoked.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The Power Button SMI
+ phase is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_POWER_BUTTON_REGISTER) (
+ IN EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_POWER_BUTTON_DISPATCH DispatchFunction,
+ IN EFI_SMM_POWER_BUTTON_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+ @retval other TBD
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_POWER_BUTTON_UNREGISTER) (
+ IN EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Power Button SMI Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for the SMM power button SMI source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+**/
+struct _EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL {
+ EFI_SMM_POWER_BUTTON_REGISTER Register;
+ EFI_SMM_POWER_BUTTON_UNREGISTER UnRegister;
+};
+
+extern EFI_GUID gEfiSmmPowerButtonDispatchProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/SmmStandbyButtonDispatch.h b/IntelFrameworkPkg/Include/Protocol/SmmStandbyButtonDispatch.h new file mode 100644 index 0000000000..8753808a37 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/SmmStandbyButtonDispatch.h @@ -0,0 +1,148 @@ +/** @file
+ This file declares EFI Smm Standby Button Smi Child Protocol
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmStandbyButtonDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_STANDBY_BUTTON_DISPATCH_H_
+#define _EFI_SMM_STANDBY_BUTTON_DISPATCH_H_
+
+//
+// Global ID for the Standby Button SMI Protocol
+//
+#define EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0x78965b98, 0xb0bf, 0x449e, {0x8b, 0x22, 0xd2, 0x91, 0x4e, 0x49, 0x8a, 0x98 } \
+ }
+
+typedef struct _EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// Standby Button. Example, Use for changing LEDs before ACPI OS is on.
+// - DXE/BDS Phase
+// - OS Install Phase
+//
+typedef enum {
+ EfiStandbyButtonEntry,
+ EfiStandbyButtonExit,
+ EfiStandbyButtonMax
+} EFI_STANDBY_BUTTON_PHASE;
+
+typedef struct {
+ EFI_STANDBY_BUTTON_PHASE Phase;
+} EFI_SMM_STANDBY_BUTTON_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a Standby Button SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+ @return Nothing
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_STANDBY_BUTTON_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function the Standby Button SMI phase for which the dispatch
+ function should be invoked.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The Standby Button SMI
+ phase is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_STANDBY_BUTTON_REGISTER) (
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH DispatchFunction,
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+ @retval other TBD
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_STANDBY_BUTTON_UNREGISTER) (
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Standby Button SMI Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for the standby button SMI source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+**/
+struct _EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL {
+ EFI_SMM_STANDBY_BUTTON_REGISTER Register;
+ EFI_SMM_STANDBY_BUTTON_UNREGISTER UnRegister;
+};
+
+extern EFI_GUID gEfiSmmStandbyButtonDispatchProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/SmmSwDispatch.h b/IntelFrameworkPkg/Include/Protocol/SmmSwDispatch.h new file mode 100644 index 0000000000..e003fb74ef --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/SmmSwDispatch.h @@ -0,0 +1,149 @@ +/** @file
+ This file declares EFI Smm Software Smi Child Protocol
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmSwDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_SW_DISPATCH_H_
+#define _EFI_SMM_SW_DISPATCH_H_
+
+//
+// Global ID for the SW SMI Protocol
+//
+#define EFI_SMM_SW_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xe541b773, 0xdd11, 0x420c, {0xb0, 0x26, 0xdf, 0x99, 0x36, 0x53, 0xf8, 0xbf } \
+ }
+
+typedef struct _EFI_SMM_SW_DISPATCH_PROTOCOL EFI_SMM_SW_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// A particular chipset may not support all possible software SMI input values.
+// For example, the ICH supports only values 00h to 0FFh. The parent only allows a single
+// child registration for each SwSmiInputValue.
+//
+typedef struct {
+ UINTN SwSmiInputValue;
+} EFI_SMM_SW_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a Software SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The SwSmiInputValue field is filled in
+ by the software dispatch driver prior to
+ invoking this dispatch function.
+ The dispatch function will only be called
+ for input values for which it is registered.
+
+ Nothing
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_SW_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_SW_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function which Software SMI input value the
+ dispatch function should be invoked for.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The SW driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The SW SMI input value
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_SW_REGISTER) (
+ IN EFI_SMM_SW_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_SW_DISPATCH DispatchFunction,
+ IN EFI_SMM_SW_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+ @retval other TBD
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_SW_UNREGISTER) (
+ IN EFI_SMM_SW_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Software SMI Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for a given SMI source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+ @param MaximumSwiValue
+ A read-only field that describes the maximum value that can be used
+ in the EFI_SMM_SW_DISPATCH_PROTOCOL.Register() service.
+
+**/
+struct _EFI_SMM_SW_DISPATCH_PROTOCOL {
+ EFI_SMM_SW_REGISTER Register;
+ EFI_SMM_SW_UNREGISTER UnRegister;
+ UINTN MaximumSwiValue;
+};
+
+extern EFI_GUID gEfiSmmSwDispatchProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/SmmSxDispatch.h b/IntelFrameworkPkg/Include/Protocol/SmmSxDispatch.h new file mode 100644 index 0000000000..e7621cdfe6 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/SmmSxDispatch.h @@ -0,0 +1,160 @@ +/** @file
+ This file declares EFI Smm Sx Smi Child Protocol
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmSxDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_SX_DISPATCH_H_
+#define _EFI_SMM_SX_DISPATCH_H_
+
+//
+// Global ID for the Sx SMI Protocol
+//
+#define EFI_SMM_SX_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0x14fc52be, 0x1dc, 0x426c, {0x91, 0xae, 0xa2, 0x3c, 0x3e, 0x22, 0xa, 0xe8 } \
+ }
+
+typedef struct _EFI_SMM_SX_DISPATCH_PROTOCOL EFI_SMM_SX_DISPATCH_PROTOCOL;
+//
+// Related Definitions
+//
+typedef enum {
+ SxS0,
+ SxS1,
+ SxS2,
+ SxS3,
+ SxS4,
+ SxS5,
+ EfiMaximumSleepType
+} EFI_SLEEP_TYPE;
+
+typedef enum {
+ SxEntry,
+ SxExit,
+ EfiMaximumPhase
+} EFI_SLEEP_PHASE;
+
+typedef struct {
+ EFI_SLEEP_TYPE Type;
+ EFI_SLEEP_PHASE Phase;
+} EFI_SMM_SX_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a Sx state SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The Type and Phase fields are filled in by the Sx dispatch driver
+ prior to invoking this dispatch function. For this interface,
+ the Sx driver will call the dispatch function for all Sx type
+ and phases, so the Sx state handler(s) must check the Type and
+ Phase field of EFI_SMM_SX_DISPATCH_CONTEXT and act accordingly.
+
+ Nothing
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_SX_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_SX_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function which Sx state type and phase the caller
+ wishes to be called back on. For this intertace,
+ the Sx driver will call the registered handlers for
+ all Sx type and phases, so the Sx state handler(s)
+ must check the Type and Phase field of the Dispatch
+ context and act accordingly.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_UNSUPPORTED The Sx driver or hardware does not support that
+ Sx Type/Phase.
+ @retval EFI_DEVICE_ERROR The Sx driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. Type & Phase are not
+ within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_SX_REGISTER) (
+ IN EFI_SMM_SX_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_SX_DISPATCH DispatchFunction,
+ IN EFI_SMM_SX_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully unregistered and the
+ SMI source has been disabled if there are no other registered child
+ dispatch functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+ @retval other TBD
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_SX_UNREGISTER) (
+ IN EFI_SMM_SX_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Child Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for a given Sx-state source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+**/
+struct _EFI_SMM_SX_DISPATCH_PROTOCOL {
+ EFI_SMM_SX_REGISTER Register;
+ EFI_SMM_SX_UNREGISTER UnRegister;
+};
+
+extern EFI_GUID gEfiSmmSxDispatchProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Protocol/SmmUsbDispatch.h b/IntelFrameworkPkg/Include/Protocol/SmmUsbDispatch.h new file mode 100644 index 0000000000..e87619d938 --- /dev/null +++ b/IntelFrameworkPkg/Include/Protocol/SmmUsbDispatch.h @@ -0,0 +1,141 @@ +/** @file
+ This file declares EFI Smm USB Smi Child Protocol.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmUsbDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+**/
+
+#ifndef _EFI_SMM_USB_DISPATCH_H_
+#define _EFI_SMM_USB_DISPATCH_H_
+
+//
+// Global ID for the USB Protocol
+//
+#define EFI_SMM_USB_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xa05b6ffd, 0x87af, 0x4e42, {0x95, 0xc9, 0x62, 0x28, 0xb6, 0x3c, 0xf3, 0xf3 } \
+ }
+
+typedef struct _EFI_SMM_USB_DISPATCH_PROTOCOL EFI_SMM_USB_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+typedef enum {
+ UsbLegacy,
+ UsbWake
+} EFI_USB_SMI_TYPE;
+
+typedef struct {
+ EFI_USB_SMI_TYPE Type;
+ EFI_DEVICE_PATH_PROTOCOL *Device;
+} EFI_SMM_USB_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a USB SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+ Nothing
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_USB_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_USB_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function the USB SMI types for which the dispatch
+ function should be invoked.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The USB SMI type
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_USB_REGISTER) (
+ IN EFI_SMM_USB_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_USB_DISPATCH DispatchFunction,
+ IN EFI_SMM_USB_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_USB_UNREGISTER) (
+ IN EFI_SMM_USB_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM USB SMI Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for the USB SMI source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+**/
+struct _EFI_SMM_USB_DISPATCH_PROTOCOL {
+ EFI_SMM_USB_REGISTER Register;
+ EFI_SMM_USB_UNREGISTER UnRegister;
+};
+
+extern EFI_GUID gEfiSmmUsbDispatchProtocolGuid;
+
+#endif
diff --git a/IntelFrameworkPkg/IntelFrameworkPkg.spd b/IntelFrameworkPkg/IntelFrameworkPkg.spd new file mode 100644 index 0000000000..f39d82805a --- /dev/null +++ b/IntelFrameworkPkg/IntelFrameworkPkg.spd @@ -0,0 +1,26 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<PackageSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+ <SpdHeader>
+ <PackageName>IntelFrameworkPkg</PackageName>
+ <GuidValue>2759ded5-bb57-4b06-af4f-c398fa552719</GuidValue>
+ <Version>1.0</Version>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </SpdHeader>
+ <PackageDefinitions>
+ <ReadOnly>false</ReadOnly>
+ <RePackage>false</RePackage>
+ </PackageDefinitions>
+ <MsaFiles>
+ <Filename>Library/DxeIoLibCpuIo/DxeIoLibCpuIo.msa</Filename>
+ <Filename>Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.msa</Filename>
+ <Filename>Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.msa</Filename>
+ <Filename>Library/UefiLibFramework/UefiLib.msa</Filename>
+ </MsaFiles>
+ <PackageHeaders>
+ <IncludePkgHeader ModuleType="BASE">Include/FrameworkBase.h</IncludePkgHeader>
+ <IncludePkgHeader ModuleType="PEIM">Include/FrameworkPei.h</IncludePkgHeader>
+ <IncludePkgHeader ModuleType="DXE_DRIVER">Include/FrameworkDxe.h</IncludePkgHeader>
+ <IncludePkgHeader ModuleType="DXE_RUNTIME_DRIVER">Include/FrameworkDxe.h</IncludePkgHeader>
+ <IncludePkgHeader ModuleType="DXE_SMM_DRIVER">Include/FrameworkSmm.h</IncludePkgHeader>
+ </PackageHeaders>
+</PackageSurfaceArea>
\ No newline at end of file diff --git a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h new file mode 100644 index 0000000000..ef3dc1041c --- /dev/null +++ b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h @@ -0,0 +1,116 @@ +/** @file
+ Internal include file of DXE CPU IO Library.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DxeCpuIoLibInternal.h
+
+**/
+
+#ifndef _DXE_CPUIO_LIB_INTERNAL_H_
+#define _DXE_CPUIO_LIB_INTERNAL_H_
+
+#include <FrameworkDxe.h>
+#include <Library/IoLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseLib.h>
+
+#include <Protocol/PciRootBridgeIo.h>
+#include <Protocol/CpuIo.h>
+
+/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The read value is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all I/O read and write operations are serialized.
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+
+ @return Data read from registers in the EFI CPU I/O space.
+
+**/
+UINT64
+EFIAPI
+IoReadWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width
+ );
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width and value specified by Width
+ and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all I/O read and write operations are serialized.
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Data The value to write to the I/O port.
+
+ @return The paramter of Data.
+
+**/
+UINT64
+EFIAPI
+IoWriteWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Data
+ );
+
+/**
+ Reads memory-mapped registers in the EFI system memory space.
+
+ Reads the MMIO registers specified by Address with registers width specified by Width.
+ The read value is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all MMIO read and write operations are serialized.
+
+ @param Address The MMIO register to read.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+
+ @return Data read from registers in the EFI system memory space.
+
+**/
+UINT64
+EFIAPI
+MmioReadWorker (
+ IN UINTN Address,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width
+ );
+
+/**
+ Writes memory-mapped registers in the EFI system memory space.
+
+ Writes the MMIO registers specified by Address with registers width and value specified by Width
+ and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all MMIO read and write operations are serialized.
+
+ @param Address The MMIO register to read.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+
+ @return Data read from registers in the EFI system memory space.
+
+**/
+UINT64
+EFIAPI
+MmioWriteWorker (
+ IN UINTN Address,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Data
+ );
+
+#endif
diff --git a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.msa b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.msa new file mode 100644 index 0000000000..0ee234ec26 --- /dev/null +++ b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.msa @@ -0,0 +1,60 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+ <MsaHeader>
+ <ModuleName>DxeIoLibCpuIo</ModuleName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <GuidValue>e94cd42a-3aad-4ea0-9b09-945891c60ccd</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for Cpu Io Dxe Io Library.</Abstract>
+ <Description>I/O Library implementation that uses the CPU I/O Protocol for I/O
+ and MMIO operations.</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>DxeIoLibCpuIo</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED" SupModuleList="DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER">
+ <Keyword>IoLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>UefiBootServicesTableLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>BaseLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>IoLib.c</Filename>
+ <Filename>IoHighLevel.c</Filename>
+ <Filename>DxeCpuIoLibInternal.h</Filename>
+ <Filename>IoLibMmioBuffer.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Protocols>
+ <Protocol Usage="ALWAYS_CONSUMED">
+ <ProtocolCName>gEfiCpuIoProtocolGuid</ProtocolCName>
+ </Protocol>
+ </Protocols>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ <Extern>
+ <Constructor>IoLibConstructor</Constructor>
+ </Extern>
+ </Externs>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoHighLevel.c b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoHighLevel.c new file mode 100644 index 0000000000..719fe13017 --- /dev/null +++ b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoHighLevel.c @@ -0,0 +1,2274 @@ +/** @file
+ High-level Io/Mmio functions.
+
+ All assertions for bit field operations are handled bit field functions in the
+ Base Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoHighLevel.c
+
+ The following IoLib instances share the same version of this file:
+
+ BaseIoLibIntrinsic
+ DxeIoLibCpuIo
+ PeiIoLibCpuIo
+
+**/
+
+#include "DxeCpuIoLibInternal.h"
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoOr8 (
+ IN UINTN Port,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (Port, (UINT8) (IoRead8 (Port) | OrData));
+}
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAnd8 (
+ IN UINTN Port,
+ IN UINT8 AndData
+ )
+{
+ return IoWrite8 (Port, (UINT8) (IoRead8 (Port) & AndData));
+}
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 8-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAndThenOr8 (
+ IN UINTN Port,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (Port, (UINT8) ((IoRead8 (Port) & AndData) | OrData));
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in an 8-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldRead8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead8 (IoRead8 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldWrite8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldWrite8 (IoRead8 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldOr8 (IoRead8 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAnd8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldAnd8 (IoRead8 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 8-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAndThenOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldAndThenOr8 (IoRead8 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoOr16 (
+ IN UINTN Port,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (Port, (UINT16) (IoRead16 (Port) | OrData));
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAnd16 (
+ IN UINTN Port,
+ IN UINT16 AndData
+ )
+{
+ return IoWrite16 (Port, (UINT16) (IoRead16 (Port) & AndData));
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 16-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAndThenOr16 (
+ IN UINTN Port,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (Port, (UINT16) ((IoRead16 (Port) & AndData) | OrData));
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 16-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldRead16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead16 (IoRead16 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldWrite16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldWrite16 (IoRead16 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldOr16 (IoRead16 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAnd16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldAnd16 (IoRead16 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 16-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAndThenOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldAndThenOr16 (IoRead16 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoOr32 (
+ IN UINTN Port,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (Port, IoRead32 (Port) | OrData);
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAnd32 (
+ IN UINTN Port,
+ IN UINT32 AndData
+ )
+{
+ return IoWrite32 (Port, IoRead32 (Port) & AndData);
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 32-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAndThenOr32 (
+ IN UINTN Port,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (Port, (IoRead32 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 32-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldRead32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (IoRead32 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldWrite32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldWrite32 (IoRead32 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldOr32 (IoRead32 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAnd32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldAnd32 (IoRead32 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 32-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAndThenOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldAndThenOr32 (IoRead32 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoOr64 (
+ IN UINTN Port,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (Port, IoRead64 (Port) | OrData);
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAnd64 (
+ IN UINTN Port,
+ IN UINT64 AndData
+ )
+{
+ return IoWrite64 (Port, IoRead64 (Port) & AndData);
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAndThenOr64 (
+ IN UINTN Port,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (Port, (IoRead64 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 64-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldRead64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (IoRead64 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldWrite64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldWrite64 (IoRead64 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldOr64 (IoRead64 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAnd64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldAnd64 (IoRead64 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAndThenOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldAndThenOr64 (IoRead64 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) | OrData));
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ )
+{
+ return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) & AndData));
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 8-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (Address, (UINT8) ((MmioRead8 (Address) & AndData) | OrData));
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in an 8-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead8 (MmioRead8 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 8-bit register is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldWrite8 (MmioRead8 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldOr8 (MmioRead8 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldAnd8 (MmioRead8 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 8-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldAndThenOr8 (MmioRead8 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) | OrData));
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ )
+{
+ return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) & AndData));
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 16-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (Address, (UINT16) ((MmioRead16 (Address) & AndData) | OrData));
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 16-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead16 (MmioRead16 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 16-bit register is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldWrite16 (MmioRead16 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldOr16 (MmioRead16 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldAnd16 (MmioRead16 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 16-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldAndThenOr16 (MmioRead16 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (Address, MmioRead32 (Address) | OrData);
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ )
+{
+ return MmioWrite32 (Address, MmioRead32 (Address) & AndData);
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 32-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 32-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (MmioRead32 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 32-bit register is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldWrite32 (MmioRead32 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldOr32 (MmioRead32 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldAnd32 (MmioRead32 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 32-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldAndThenOr32 (MmioRead32 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioOr64 (
+ IN UINTN Address,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (Address, MmioRead64 (Address) | OrData);
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAnd64 (
+ IN UINTN Address,
+ IN UINT64 AndData
+ )
+{
+ return MmioWrite64 (Address, MmioRead64 (Address) & AndData);
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 64-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAndThenOr64 (
+ IN UINTN Address,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (Address, (MmioRead64 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 64-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldRead64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (MmioRead64 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 64-bit register is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldWrite64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldWrite64 (MmioRead64 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldOr64 (MmioRead64 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAnd64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldAnd64 (MmioRead64 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 64-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAndThenOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldAndThenOr64 (MmioRead64 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
diff --git a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c new file mode 100644 index 0000000000..096f899be6 --- /dev/null +++ b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c @@ -0,0 +1,614 @@ +/** @file
+ I/O Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoLib.c
+
+**/
+
+#include "DxeCpuIoLibInternal.h"
+
+//
+// Globle varible to cache pointer to CpuIo protocol.
+//
+STATIC EFI_CPU_IO_PROTOCOL *mCpuIo = NULL;
+STATIC EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *mPciRootBridgeIo = NULL;
+
+/**
+ The constructor function caches the pointer to CpuIo protocol.
+
+ The constructor function locates CpuIo protocol from protocol database.
+ It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.
+
+ @param ImageHandle The firmware allocated handle for the EFI image.
+ @param SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+IoLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, &mPciRootBridgeIo);
+ if (EFI_ERROR (Status)) {
+ Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, &mCpuIo);
+ }
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The read value is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all I/O read and write operations are serialized.
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+
+ @return Data read from registers in the EFI CPU I/O space.
+
+**/
+UINT64
+EFIAPI
+IoReadWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width
+ )
+{
+ EFI_STATUS Status;
+ UINT64 Data;
+
+ if (mPciRootBridgeIo != NULL) {
+ Status = mPciRootBridgeIo->Io.Read (mPciRootBridgeIo, Width, Port, 1, &Data);
+ } else {
+ Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);
+ }
+ ASSERT_EFI_ERROR (Status);
+
+ return Data;
+}
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width and value specified by Width
+ and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all I/O read and write operations are serialized.
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Data The value to write to the I/O port.
+
+ @return The paramter of Data.
+
+**/
+UINT64
+EFIAPI
+IoWriteWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Data
+ )
+{
+ EFI_STATUS Status;
+
+ if (mPciRootBridgeIo != NULL) {
+ Status = mPciRootBridgeIo->Io.Write (mPciRootBridgeIo, Width, Port, 1, &Data);
+ } else {
+ Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);
+ }
+ ASSERT_EFI_ERROR (Status);
+
+ return Data;
+}
+
+/**
+ Reads memory-mapped registers in the EFI system memory space.
+
+ Reads the MMIO registers specified by Address with registers width specified by Width.
+ The read value is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all MMIO read and write operations are serialized.
+
+ @param Address The MMIO register to read.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+
+ @return Data read from registers in the EFI system memory space.
+
+**/
+UINT64
+EFIAPI
+MmioReadWorker (
+ IN UINTN Address,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width
+ )
+{
+ EFI_STATUS Status;
+ UINT64 Data;
+
+ if (mPciRootBridgeIo != NULL) {
+ Status = mPciRootBridgeIo.Mem.Read (mPciRootBridgeIo, Width, Address, 1, &Data);
+ } else {
+ Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);
+ }
+ ASSERT_EFI_ERROR (Status);
+
+ return Data;
+}
+
+/**
+ Writes memory-mapped registers in the EFI system memory space.
+
+ Writes the MMIO registers specified by Address with registers width and value specified by Width
+ and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all MMIO read and write operations are serialized.
+
+ @param Address The MMIO register to read.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+
+ @return Data read from registers in the EFI system memory space.
+
+**/
+UINT64
+EFIAPI
+MmioWriteWorker (
+ IN UINTN Address,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Data
+ )
+{
+ EFI_STATUS Status;
+
+ if (mPciRootBridgeIo != NULL) {
+ Status = mPciRootBridgeIo->Mem.Write (mPciRootBridgeIo, Width, Address, 1, &Data);
+ } else {
+ Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);
+ }
+ ASSERT_EFI_ERROR (Status);
+
+ return Data;
+}
+
+/**
+ Reads an 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+ IN UINTN Port
+ )
+{
+ return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);
+}
+
+/**
+ Writes an 8-bit I/O port.
+
+ Writes the 8-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+ IN UINTN Port,
+ IN UINT8 Value
+ )
+{
+ return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);
+}
+
+/**
+ Reads a 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+ IN UINTN Port
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);
+}
+
+/**
+ Writes a 16-bit I/O port.
+
+ Writes the 16-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+ IN UINTN Port,
+ IN UINT16 Value
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);
+}
+
+/**
+ Reads a 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+ IN UINTN Port
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);
+}
+
+/**
+ Writes a 32-bit I/O port.
+
+ Writes the 32-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+ IN UINTN Port,
+ IN UINT32 Value
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);
+}
+
+/**
+ Reads a 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+ IN UINTN Port
+ )
+{
+ //
+ // Make sure Port is aligned on a 64-bit boundary.
+ //
+ ASSERT ((Port & 7) == 0);
+ return IoReadWorker (Port, EfiCpuIoWidthUint64);
+}
+
+/**
+ Writes a 64-bit I/O port.
+
+ Writes the 64-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoWrite64 (
+ IN UINTN Port,
+ IN UINT64 Value
+ )
+{
+ //
+ // Make sure Port is aligned on a 64-bit boundary.
+ //
+ ASSERT ((Port & 7) == 0);
+ return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);
+}
+
+/**
+ Reads an 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8 (
+ IN UINTN Address
+ )
+{
+ return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);
+}
+
+/**
+ Writes an 8-bit MMIO register.
+
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ )
+{
+ return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);
+}
+
+/**
+ Reads a 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16 (
+ IN UINTN Address
+ )
+{
+ //
+ // Make sure Address is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Address & 1) == 0);
+ return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);
+}
+
+/**
+ Writes a 16-bit MMIO register.
+
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ )
+{
+ //
+ // Make sure Address is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Address & 1) == 0);
+ return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);
+}
+
+/**
+ Reads a 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32 (
+ IN UINTN Address
+ )
+{
+ //
+ // Make sure Address is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Address & 3) == 0);
+ return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);
+}
+
+/**
+ Writes a 32-bit MMIO register.
+
+ Writes the 32-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ )
+{
+ //
+ // Make sure Address is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Address & 3) == 0);
+ return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);
+}
+
+/**
+ Reads a 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64 (
+ IN UINTN Address
+ )
+{
+ //
+ // Make sure Address is aligned on a 64-bit boundary.
+ //
+ ASSERT ((Address & 7) == 0);
+ return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);
+}
+
+/**
+ Writes a 64-bit MMIO register.
+
+ Writes the 64-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioWrite64 (
+ IN UINTN Address,
+ IN UINT64 Value
+ )
+{
+ //
+ // Make sure Address is aligned on a 64-bit boundary.
+ //
+ ASSERT ((Address & 7) == 0);
+ return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);
+}
diff --git a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLibMmioBuffer.c b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLibMmioBuffer.c new file mode 100644 index 0000000000..d3f745c6a1 --- /dev/null +++ b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLibMmioBuffer.c @@ -0,0 +1,411 @@ +/** @file
+ I/O Library MMIO Buffer Functions.
+
+ Copyright (c) 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "DxeCpuIoLibInternal.h"
+
+/**
+ Copy data from MMIO region to system memory by using 8-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 8-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT8 *
+EFIAPI
+MmioReadBuffer8 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT8 *Buffer
+ )
+{
+ UINT8 *ReturnBuffer;
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ReturnBuffer = Buffer;
+
+ while (Length--) {
+ *(Buffer++) = MmioRead8 (StartAddress++);
+ }
+
+ return ReturnBuffer;
+}
+
+/**
+ Copy data from MMIO region to system memory by using 16-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 16-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT16 *
+EFIAPI
+MmioReadBuffer16 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT16 *Buffer
+ )
+{
+ UINT16 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT16) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT16) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT16) - 1)) == 0);
+
+ ReturnBuffer = Buffer;
+
+ while (Length) {
+ *(Buffer++) = MmioRead16 (StartAddress);
+ StartAddress += sizeof (UINT16);
+ Length -= sizeof (UINT16);
+ }
+
+ return ReturnBuffer;
+}
+
+/**
+ Copy data from MMIO region to system memory by using 32-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 32-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT32 *
+EFIAPI
+MmioReadBuffer32 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT32 *Buffer
+ )
+{
+ UINT32 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT32) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT32) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT32) - 1)) == 0);
+
+ ReturnBuffer = Buffer;
+
+ while (Length) {
+ *(Buffer++) = MmioRead32 (StartAddress);
+ StartAddress += sizeof (UINT32);
+ Length -= sizeof (UINT32);
+ }
+
+ return ReturnBuffer;
+}
+
+/**
+ Copy data from MMIO region to system memory by using 64-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 64-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT64 *
+EFIAPI
+MmioReadBuffer64 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT64 *Buffer
+ )
+{
+ UINT64 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT64) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT64) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT64) - 1)) == 0);
+
+ ReturnBuffer = Buffer;
+
+ while (Length) {
+ *(Buffer++) = MmioRead64 (StartAddress);
+ StartAddress += sizeof (UINT64);
+ Length -= sizeof (UINT64);
+ }
+
+ return ReturnBuffer;
+}
+
+
+/**
+ Copy data from system memory to MMIO region by using 8-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 8-bit access. The total number
+ of byte to be copied is specified by Length. Buffer is returned.
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Size in bytes of the copy.
+
+**/
+UINT8 *
+EFIAPI
+MmioWriteBuffer8 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT8 *Buffer
+ )
+{
+ VOID* ReturnBuffer;
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ReturnBuffer = (UINT8 *) Buffer;
+
+ while (Length--) {
+ MmioWrite8 (StartAddress++, *(Buffer++));
+ }
+
+ return ReturnBuffer;
+
+}
+
+/**
+ Copy data from system memory to MMIO region by using 16-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 16-bit access. The total number
+ of byte to be copied is specified by Length. Length is returned.
+
+ If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Size in bytes of the copy.
+
+**/
+UINT16 *
+EFIAPI
+MmioWriteBuffer16 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT16 *Buffer
+ )
+{
+ UINT16 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT16) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT16) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT16) - 1)) == 0);
+
+ ReturnBuffer = (UINT16 *) Buffer;
+
+ while (Length) {
+ MmioWrite16 (StartAddress, *(Buffer++));
+
+ StartAddress += sizeof (UINT16);
+ Length -= sizeof (UINT16);
+ }
+
+ return ReturnBuffer;
+}
+
+
+/**
+ Copy data from system memory to MMIO region by using 32-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 32-bit access. The total number
+ of byte to be copied is specified by Length. Length is returned.
+
+ If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Size in bytes of the copy.
+
+**/
+UINT32 *
+EFIAPI
+MmioWriteBuffer32 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT32 *Buffer
+ )
+{
+ UINT32 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT32) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT32) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT32) - 1)) == 0);
+
+ ReturnBuffer = (UINT32 *) Buffer;
+
+ while (Length) {
+ MmioWrite32 (StartAddress, *(Buffer++));
+
+ StartAddress += sizeof (UINT32);
+ Length -= sizeof (UINT32);
+ }
+
+ return ReturnBuffer;
+}
+
+/**
+ Copy data from system memory to MMIO region by using 64-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 64-bit access. The total number
+ of byte to be copied is specified by Length. Length is returned.
+
+ If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Size in bytes of the copy.
+
+**/
+UINT64 *
+EFIAPI
+MmioWriteBuffer64 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT64 *Buffer
+ )
+{
+ UINT64 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT64) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT64) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT64) - 1)) == 0);
+
+ ReturnBuffer = (UINT64 *) Buffer;
+
+ while (Length) {
+ MmioWrite64 (StartAddress, *(Buffer++));
+
+ StartAddress += sizeof (UINT64);
+ Length -= sizeof (UINT64);
+ }
+
+ return ReturnBuffer;
+}
+
diff --git a/IntelFrameworkPkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.msa b/IntelFrameworkPkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.msa new file mode 100644 index 0000000000..3014952e51 --- /dev/null +++ b/IntelFrameworkPkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.msa @@ -0,0 +1,75 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+ <MsaHeader>
+ <ModuleName>DxeReportStatusCodeLib</ModuleName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <GuidValue>3ddc3b12-99ea-4364-b315-6310a2050be5</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>DXE report status code library</Abstract>
+ <Description>Retrieve status code and report status code in DXE phase</Description>
+ <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>DxeReportStatusCodeLib</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED" SupModuleList="DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER">
+ <Keyword>ReportStatusCodeLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>UefiBootServicesTableLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>BaseLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>BaseMemoryLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>PcdLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>ReportStatusCodeLib.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Protocols>
+ <Protocol Usage="ALWAYS_CONSUMED">
+ <ProtocolCName>gEfiStatusCodeRuntimeProtocolGuid</ProtocolCName>
+ </Protocol>
+ </Protocols>
+ <Guids>
+ <GuidCNames Usage="ALWAYS_CONSUMED">
+ <GuidCName>gEfiStatusCodeDataTypeDebugGuid</GuidCName>
+ </GuidCNames>
+ <GuidCNames Usage="ALWAYS_CONSUMED">
+ <GuidCName>gEfiStatusCodeSpecificDataGuid</GuidCName>
+ </GuidCNames>
+ </Guids>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+ <PcdCoded>
+ <PcdEntry PcdItemType="FIXED_AT_BUILD">
+ <C_Name>PcdReportStatusCodePropertyMask</C_Name>
+ <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>
+ <HelpText>The bitmask of flags that specify the enable/disable of + Progress Code, Error Code and Debug Code.</HelpText>
+ </PcdEntry>
+ </PcdCoded>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/IntelFrameworkPkg/Library/DxeReportStatusCodeLibFramework/ReportStatusCodeLib.c b/IntelFrameworkPkg/Library/DxeReportStatusCodeLibFramework/ReportStatusCodeLib.c new file mode 100644 index 0000000000..270966a884 --- /dev/null +++ b/IntelFrameworkPkg/Library/DxeReportStatusCodeLibFramework/ReportStatusCodeLib.c @@ -0,0 +1,602 @@ +/** @file
+ Report Status Code Library for DXE Phase.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Common/FrameworkDxeCis.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/PcdLib.h>
+#include <Library/ReportStatusCodeLib.h>
+
+#include <Protocol/StatusCode.h>
+
+/**
+ Internal worker function that reports a status code through the Status Code Protocol
+
+ This function checks to see if a Status Code Protocol is present in the handle
+ database. If a Status Code Protocol is not present, then EFI_UNSUPPORTED is
+ returned. If a Status Code Protocol is present, then it is cached in gStatusCode,
+ and the ReportStatusCode() service of the Status Code Protocol is called passing in
+ Type, Value, Instance, CallerId, and Data. The result of this call is returned.
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param Instance Status code instance number.
+ @param CallerId Pointer to a GUID that identifies the caller of this
+ function. This is an optional parameter that may be
+ NULL.
+ @param Data Pointer to the extended data buffer. This is an
+ optional parameter that may be NULL.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to report the status code.
+ @retval EFI_UNSUPPORTED Status Code Protocol is not available.
+
+**/
+STATIC
+EFI_STATUS
+InternalReportStatusCode (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID *CallerId OPTIONAL,
+ IN EFI_STATUS_CODE_DATA *Data OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+ EFI_STATUS_CODE_PROTOCOL *StatusCode;
+ STATIC EFI_REPORT_STATUS_CODE ReportStatusCode = NULL;
+
+ //
+ // If gStatusCode is NULL, then see if a Status Code Protocol instance is present
+ // in the handle database.
+ //
+ if (ReportStatusCode == NULL) {
+ if (gBS == NULL) {
+ return EFI_UNSUPPORTED;
+ }
+ Status = gBS->LocateProtocol (&gEfiStatusCodeRuntimeProtocolGuid, NULL, &StatusCode);
+ if (!EFI_ERROR (Status) && StatusCode != NULL) {
+ ReportStatusCode = StatusCode->ReportStatusCode;
+ } else if (gRT->Hdr.Revision < 0x20000) {
+ ReportStatusCode = ((FRAMEWORK_EFI_RUNTIME_SERVICES*)gRT)->ReportStatusCode;
+ } else {
+ return EFI_UNSUPPORTED;
+ }
+ }
+
+ //
+ // A Status Code Protocol is present in the handle database, so pass in all the
+ // parameters to the ReportStatusCode() service of the Status Code Protocol
+ //
+ return (*ReportStatusCode) (Type, Value, Instance, (EFI_GUID *)CallerId, Data);
+}
+
+
+/**
+ Computes and returns the size, in bytes, of a device path.
+
+ @param DevicePath A pointer to a device path.
+
+ @return The size, in bytes, of DevicePath.
+
+**/
+STATIC
+UINTN
+InternalReportStatusCodeDevicePathSize (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ CONST EFI_DEVICE_PATH_PROTOCOL *Start;
+
+ //
+ // Search for the end of the device path structure
+ //
+ Start = DevicePath;
+ while (!EfiIsDevicePathEnd (DevicePath)) {
+ DevicePath = EfiNextDevicePathNode (DevicePath);
+ }
+
+ //
+ // Subtract the start node from the end node and add in the size of the end node
+ //
+ return ((UINTN) DevicePath - (UINTN) Start) + DevicePathNodeLength (DevicePath);
+}
+
+
+/**
+ Converts a status code to an 8-bit POST code value.
+
+ Converts the status code specified by CodeType and Value to an 8-bit POST code
+ and returns the 8-bit POST code in PostCode. If CodeType is an
+ EFI_PROGRESS_CODE or CodeType is an EFI_ERROR_CODE, then bits 0..4 of PostCode
+ are set to bits 16..20 of Value, and bits 5..7 of PostCode are set to bits
+ 24..26 of Value., and TRUE is returned. Otherwise, FALSE is returned.
+
+ If PostCode is NULL, then ASSERT().
+
+ @param CodeType The type of status code being converted.
+ @param Value The status code value being converted.
+ @param PostCode A pointer to the 8-bit POST code value to return.
+
+ @retval TRUE The status code specified by CodeType and Value was converted
+ to an 8-bit POST code and returned in PostCode.
+ @retval FALSE The status code specified by CodeType and Value could not be
+ converted to an 8-bit POST code value.
+
+**/
+BOOLEAN
+EFIAPI
+CodeTypeToPostCode (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ OUT UINT8 *PostCode
+ )
+{
+ //
+ // If PostCode is NULL, then ASSERT()
+ //
+ ASSERT (PostCode != NULL);
+
+ //
+ // Convert Value to an 8 bit post code
+ //
+ if (((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ||
+ ((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ) {
+ *PostCode = (UINT8) ((((Value & EFI_STATUS_CODE_CLASS_MASK) >> 24) << 5) |
+ (((Value & EFI_STATUS_CODE_SUBCLASS_MASK) >> 16) & 0x1f));
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/**
+ Extracts ASSERT() information from a status code structure.
+
+ Converts the status code specified by CodeType, Value, and Data to the ASSERT()
+ arguments specified by Filename, Description, and LineNumber. If CodeType is
+ an EFI_ERROR_CODE, and CodeType has a severity of EFI_ERROR_UNRECOVERED, and
+ Value has an operation mask of EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, extract
+ Filename, Description, and LineNumber from the optional data area of the
+ status code buffer specified by Data. The optional data area of Data contains
+ a Null-terminated ASCII string for the FileName, followed by a Null-terminated
+ ASCII string for the Description, followed by a 32-bit LineNumber. If the
+ ASSERT() information could be extracted from Data, then return TRUE.
+ Otherwise, FALSE is returned.
+
+ If Data is NULL, then ASSERT().
+ If Filename is NULL, then ASSERT().
+ If Description is NULL, then ASSERT().
+ If LineNumber is NULL, then ASSERT().
+
+ @param CodeType The type of status code being converted.
+ @param Value The status code value being converted.
+ @param Data Pointer to status code data buffer.
+ @param Filename Pointer to the source file name that generated the ASSERT().
+ @param Description Pointer to the description of the ASSERT().
+ @param LineNumber Pointer to source line number that generated the ASSERT().
+
+ @retval TRUE The status code specified by CodeType, Value, and Data was
+ converted ASSERT() arguments specified by Filename, Description,
+ and LineNumber.
+ @retval FALSE The status code specified by CodeType, Value, and Data could
+ not be converted to ASSERT() arguments.
+
+**/
+BOOLEAN
+EFIAPI
+ReportStatusCodeExtractAssertInfo (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN CONST EFI_STATUS_CODE_DATA *Data,
+ OUT CHAR8 **Filename,
+ OUT CHAR8 **Description,
+ OUT UINT32 *LineNumber
+ )
+{
+ EFI_DEBUG_ASSERT_DATA *AssertData;
+
+ ASSERT (Data != NULL);
+ ASSERT (Filename != NULL);
+ ASSERT (Description != NULL);
+ ASSERT (LineNumber != NULL);
+
+ if (((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) &&
+ ((CodeType & EFI_STATUS_CODE_SEVERITY_MASK) == EFI_ERROR_UNRECOVERED) &&
+ ((Value & EFI_STATUS_CODE_OPERATION_MASK) == EFI_SW_EC_ILLEGAL_SOFTWARE_STATE)) {
+ AssertData = (EFI_DEBUG_ASSERT_DATA *)(Data + 1);
+ *Filename = (CHAR8 *)(AssertData + 1);
+ *Description = *Filename + AsciiStrLen (*Filename) + 1;
+ *LineNumber = AssertData->LineNumber;
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/**
+ Extracts DEBUG() information from a status code structure.
+
+ Converts the status code specified by Data to the DEBUG() arguments specified
+ by ErrorLevel, Marker, and Format. If type GUID in Data is
+ EFI_STATUS_CODE_DATA_TYPE_DEBUG_GUID, then extract ErrorLevel, Marker, and
+ Format from the optional data area of the status code buffer specified by Data.
+ The optional data area of Data contains a 32-bit ErrorLevel followed by Marker
+ which is 12 UINTN parameters, followed by a Null-terminated ASCII string for
+ the Format. If the DEBUG() information could be extracted from Data, then
+ return TRUE. Otherwise, FALSE is returned.
+
+ If Data is NULL, then ASSERT().
+ If ErrorLevel is NULL, then ASSERT().
+ If Marker is NULL, then ASSERT().
+ If Format is NULL, then ASSERT().
+
+ @param Data Pointer to status code data buffer.
+ @param ErrorLevel Pointer to error level mask for a debug message.
+ @param Marker Pointer to the variable argument list associated with Format.
+ @param Format Pointer to a Null-terminated ASCII format string of a
+ debug message.
+
+ @retval TRUE The status code specified by Data was converted DEBUG() arguments
+ specified by ErrorLevel, Marker, and Format.
+ @retval FALSE The status code specified by Data could not be converted to
+ DEBUG() arguments.
+
+**/
+BOOLEAN
+EFIAPI
+ReportStatusCodeExtractDebugInfo (
+ IN CONST EFI_STATUS_CODE_DATA *Data,
+ OUT UINT32 *ErrorLevel,
+ OUT VA_LIST *Marker,
+ OUT CHAR8 **Format
+ )
+{
+ EFI_DEBUG_INFO *DebugInfo;
+
+ ASSERT (Data != NULL);
+ ASSERT (ErrorLevel != NULL);
+ ASSERT (Marker != NULL);
+ ASSERT (Format != NULL);
+
+ //
+ // If the GUID type is not EFI_STATUS_CODE_DATA_TYPE_DEBUG_GUID then return FALSE
+ //
+ if (!CompareGuid (&Data->Type, &gEfiStatusCodeDataTypeDebugGuid)) {
+ return FALSE;
+ }
+
+ //
+ // Retrieve the debug information from the status code record
+ //
+ DebugInfo = (EFI_DEBUG_INFO *)(Data + 1);
+
+ *ErrorLevel = DebugInfo->ErrorLevel;
+
+ //
+ // The first 12 * UINTN bytes of the string are really an
+ // argument stack to support varargs on the Format string.
+ //
+ *Marker = (VA_LIST) (DebugInfo + 1);
+ *Format = (CHAR8 *)(((UINT64 *)*Marker) + 12);
+
+ return TRUE;
+}
+
+
+/**
+ Reports a status code.
+
+ Reports the status code specified by the parameters Type and Value. Status
+ code also require an instance, caller ID, and extended data. This function
+ passed in a zero instance, NULL extended data, and a caller ID of
+ gEfiCallerIdGuid, which is the GUID for the module.
+
+ ReportStatusCode()must actively prevent recusrsion. If ReportStatusCode()
+ is called while processing another any other Report Status Code Library function,
+ then ReportStatusCode() must return immediately.
+
+ @param Type Status code type.
+ @param Value Status code value.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_DEVICE_ERROR There status code could not be reported due to a
+ device error.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCode (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value
+ )
+{
+ return InternalReportStatusCode (Type, Value, 0, &gEfiCallerIdGuid, NULL);
+}
+
+
+/**
+ Reports a status code with a Device Path Protocol as the extended data.
+
+ Allocates and fills in the extended data section of a status code with the
+ Device Path Protocol specified by DevicePath. This function is responsible
+ for allocating a buffer large enough for the standard header and the device
+ path. The standard header is filled in with a GUID of
+ gEfiStatusCodeSpecificDataGuid. The status code is reported with a zero
+ instance and a caller ID of gEfiCallerIdGuid.
+
+ ReportStatusCodeWithDevicePath()must actively prevent recursion. If
+ ReportStatusCodeWithDevicePath() is called while processing another any other
+ Report Status Code Library function, then ReportStatusCodeWithDevicePath()
+ must return EFI_DEVICE_ERROR immediately.
+
+ If DevicePath is NULL, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param DevicePath Pointer to the Device Path Protocol to be reported.
+
+ @retval EFI_SUCCESS The status code was reported with the extended
+ data specified by DevicePath.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the
+ extended data section.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeWithDevicePath (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ ASSERT (DevicePath != NULL);
+ return ReportStatusCodeWithExtendedData (
+ Type,
+ Value,
+ (VOID *)DevicePath,
+ InternalReportStatusCodeDevicePathSize (DevicePath)
+ );
+}
+
+
+/**
+ Reports a status code with an extended data buffer.
+
+ Allocates and fills in the extended data section of a status code with the
+ extended data specified by ExtendedData and ExtendedDataSize. ExtendedData
+ is assumed to be one of the data structures specified in Related Definitions.
+ These data structure do not have the standard header, so this function is
+ responsible for allocating a buffer large enough for the standard header and
+ the extended data passed into this function. The standard header is filled
+ in with a GUID of gEfiStatusCodeSpecificDataGuid. The status code is reported
+ with a zero instance and a caller ID of gEfiCallerIdGuid.
+
+ ReportStatusCodeWithExtendedData()must actively prevent recursion. If
+ ReportStatusCodeWithExtendedData() is called while processing another any other
+ Report Status Code Library function, then ReportStatusCodeWithExtendedData()
+ must return EFI_DEVICE_ERROR immediately.
+
+ If ExtendedData is NULL, then ASSERT().
+ If ExtendedDataSize is 0, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param ExtendedData Pointer to the extended data buffer to be reported.
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer to
+ be reported.
+
+ @retval EFI_SUCCESS The status code was reported with the extended
+ data specified by ExtendedData and ExtendedDataSize.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the
+ extended data section.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeWithExtendedData (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN CONST VOID *ExtendedData,
+ IN UINTN ExtendedDataSize
+ )
+{
+ ASSERT (ExtendedData != NULL);
+ ASSERT (ExtendedDataSize != 0);
+ return ReportStatusCodeEx (
+ Type,
+ Value,
+ 0,
+ NULL,
+ NULL,
+ ExtendedData,
+ ExtendedDataSize
+ );
+}
+
+
+/**
+ Reports a status code with full parameters.
+
+ The function reports a status code. If ExtendedData is NULL and ExtendedDataSize
+ is 0, then an extended data buffer is not reported. If ExtendedData is not
+ NULL and ExtendedDataSize is not 0, then an extended data buffer is allocated.
+ ExtendedData is assumed not have the standard status code header, so this function
+ is responsible for allocating a buffer large enough for the standard header and
+ the extended data passed into this function. The standard header is filled in
+ with a GUID specified by ExtendedDataGuid. If ExtendedDataGuid is NULL, then a
+ GUID of gEfiStatusCodeSpecificDatauid is used. The status code is reported with
+ an instance specified by Instance and a caller ID specified by CallerId. If
+ CallerId is NULL, then a caller ID of gEfiCallerIdGuid is used.
+
+ ReportStatusCodeEx()must actively prevent recursion. If ReportStatusCodeEx()
+ is called while processing another any other Report Status Code Library function,
+ then ReportStatusCodeEx() must return EFI_DEVICE_ERROR immediately.
+
+ If ExtendedData is NULL and ExtendedDataSize is not zero, then ASSERT().
+ If ExtendedData is not NULL and ExtendedDataSize is zero, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param Instance Status code instance number.
+ @param CallerId Pointer to a GUID that identifies the caller of this
+ function. If this parameter is NULL, then a caller
+ ID of gEfiCallerIdGuid is used.
+ @param ExtendedDataGuid Pointer to the GUID for the extended data buffer.
+ If this parameter is NULL, then a the status code
+ standard header is filled in with
+ gEfiStatusCodeSpecificDataGuid.
+ @param ExtendedData Pointer to the extended data buffer. This is an
+ optional parameter that may be NULL.
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate
+ the extended data section if it was specified.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeEx (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID *CallerId OPTIONAL,
+ IN CONST EFI_GUID *ExtendedDataGuid OPTIONAL,
+ IN CONST VOID *ExtendedData OPTIONAL,
+ IN UINTN ExtendedDataSize
+ )
+{
+ EFI_STATUS Status;
+ EFI_STATUS_CODE_DATA *StatusCodeData;
+
+ ASSERT (!((ExtendedData == NULL) && (ExtendedDataSize != 0)));
+ ASSERT (!((ExtendedData != NULL) && (ExtendedDataSize == 0)));
+
+ if (gBS == NULL) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Allocate space for the Status Code Header and its buffer
+ //
+ StatusCodeData = NULL;
+ gBS->AllocatePool (EfiBootServicesData, sizeof (EFI_STATUS_CODE_DATA) + ExtendedDataSize, (VOID **)&StatusCodeData);
+ if (StatusCodeData == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Fill in the extended data header
+ //
+ StatusCodeData->HeaderSize = sizeof (EFI_STATUS_CODE_DATA);
+ StatusCodeData->Size = (UINT16)ExtendedDataSize;
+ if (ExtendedDataGuid == NULL) {
+ ExtendedDataGuid = &gEfiStatusCodeSpecificDataGuid;
+ }
+ CopyGuid (&StatusCodeData->Type, ExtendedDataGuid);
+
+ //
+ // Fill in the extended data buffer
+ //
+ CopyMem (StatusCodeData + 1, ExtendedData, ExtendedDataSize);
+
+ //
+ // Report the status code
+ //
+ if (CallerId == NULL) {
+ CallerId = &gEfiCallerIdGuid;
+ }
+ Status = InternalReportStatusCode (Type, Value, Instance, CallerId, StatusCodeData);
+
+ //
+ // Free the allocated buffer
+ //
+ gBS->FreePool (StatusCodeData);
+
+ return Status;
+}
+
+
+/**
+ Returns TRUE if status codes of type EFI_PROGRESS_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportProgressCodeEnabled (
+ VOID
+ )
+{
+ return (BOOLEAN) ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED) != 0);
+}
+
+
+/**
+ Returns TRUE if status codes of type EFI_ERROR_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportErrorCodeEnabled (
+ VOID
+ )
+{
+ return (BOOLEAN) ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED) != 0);
+}
+
+
+/**
+ Returns TRUE if status codes of type EFI_DEBUG_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportDebugCodeEnabled (
+ VOID
+ )
+{
+ return (BOOLEAN) ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED) != 0);
+}
diff --git a/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DriverEntryPoint.c b/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DriverEntryPoint.c new file mode 100644 index 0000000000..cf50f2395b --- /dev/null +++ b/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DriverEntryPoint.c @@ -0,0 +1,282 @@ +/** @file
+ Entry point to a EFI/DXE driver.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <FrameworkDxe.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DxeSmmDriverEntryPoint.h>
+
+#include <Protocol/LoadedImage.h>
+#include <Protocol/SmmBase.h>
+
+EFI_BOOT_SERVICES *mBS;
+
+/**
+ This function returns the size, in bytes,
+ of the device path data structure specified by DevicePath.
+ If DevicePath is NULL, then 0 is returned.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @return The size of a device path in bytes.
+
+**/
+STATIC
+UINTN
+EFIAPI
+SmmGetDevicePathSize (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ CONST EFI_DEVICE_PATH_PROTOCOL *Start;
+
+ if (DevicePath == NULL) {
+ return 0;
+ }
+
+ //
+ // Search for the end of the device path structure
+ //
+ Start = DevicePath;
+ while (!EfiIsDevicePathEnd (DevicePath)) {
+ DevicePath = EfiNextDevicePathNode (DevicePath);
+ }
+
+ //
+ // Compute the size and add back in the size of the end device path structure
+ //
+ return ((UINTN) DevicePath - (UINTN) Start) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
+}
+
+/**
+ This function appends the device path SecondDevicePath
+ to every device path instance in FirstDevicePath.
+
+ @param FirstDevicePath A pointer to a device path data structure.
+
+ @param SecondDevicePath A pointer to a device path data structure.
+
+ @return A pointer to the new device path is returned.
+ NULL is returned if space for the new device path could not be allocated from pool.
+ It is up to the caller to free the memory used by FirstDevicePath and SecondDevicePath
+ if they are no longer needed.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+SmmAppendDevicePath (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *FirstDevicePath,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *SecondDevicePath
+ )
+{
+ EFI_STATUS Status;
+ UINTN Size;
+ UINTN Size1;
+ UINTN Size2;
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath2;
+
+ ASSERT (FirstDevicePath != NULL && SecondDevicePath != NULL);
+
+ //
+ // Allocate space for the combined device path. It only has one end node of
+ // length EFI_DEVICE_PATH_PROTOCOL
+ //
+ Size1 = SmmGetDevicePathSize (FirstDevicePath);
+ Size2 = SmmGetDevicePathSize (SecondDevicePath);
+ Size = Size1 + Size2 - sizeof (EFI_DEVICE_PATH_PROTOCOL);
+
+ Status = mBS->AllocatePool (EfiBootServicesData, Size, (VOID **) &NewDevicePath);
+
+ if (EFI_SUCCESS == Status) {
+ mBS->CopyMem ((VOID *) NewDevicePath, (VOID *) FirstDevicePath, Size1);
+ //
+ // Over write Src1 EndNode and do the copy
+ //
+ DevicePath2 = (EFI_DEVICE_PATH_PROTOCOL *) ((CHAR8 *) NewDevicePath + (Size1 - sizeof (EFI_DEVICE_PATH_PROTOCOL)));
+ mBS->CopyMem ((VOID *) DevicePath2, (VOID *) SecondDevicePath, Size2);
+ }
+
+ return NewDevicePath;
+}
+
+/**
+ Unload function that is registered in the LoadImage protocol. It un-installs
+ protocols produced and deallocates pool used by the driver. Called by the core
+ when unloading the driver.
+
+ @param ImageHandle ImageHandle of the unloaded driver
+
+ @return Status of the ProcessModuleUnloadList.
+
+**/
+EFI_STATUS
+EFIAPI
+_DriverUnloadHandler (
+ EFI_HANDLE ImageHandle
+ )
+{
+ EFI_STATUS Status;
+
+ //
+ // Call the unload handlers for all the modules
+ //
+ Status = ProcessModuleUnloadList (ImageHandle);
+
+ //
+ // If the driver specific unload handler does not return an error, then call all of the
+ // library destructors. If the unload handler returned an error, then the driver can not be
+ // unloaded, and the library destructors should not be called
+ //
+ if (!EFI_ERROR (Status)) {
+ ProcessLibraryDestructorList (ImageHandle, gST);
+ }
+
+ //
+ // Return the status from the driver specific unload handler
+ //
+ return Status;
+}
+
+/**
+ Enrty point to DXE SMM Driver.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.
+
+**/
+EFI_STATUS
+EFIAPI
+_ModuleEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
+ EFI_SMM_BASE_PROTOCOL *SmmBase;
+ BOOLEAN InSmm;
+ EFI_DEVICE_PATH_PROTOCOL *CompleteFilePath;
+ EFI_DEVICE_PATH_PROTOCOL *ImageDevicePath;
+ EFI_HANDLE Handle;
+
+ //
+ // Cache a pointer to the Boot Services Table
+ //
+ mBS = SystemTable->BootServices;
+
+ //
+ // Retrieve the Loaded Image Protocol
+ //
+ Status = mBS->HandleProtocol (
+ ImageHandle,
+ &gEfiLoadedImageProtocolGuid,
+ (VOID*)&LoadedImage
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Retrieve SMM Base Protocol
+ //
+ Status = mBS->LocateProtocol (
+ &gEfiSmmBaseProtocolGuid,
+ NULL,
+ (VOID **) &SmmBase
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Check to see if we are already in SMM
+ //
+ SmmBase->InSmm (SmmBase, &InSmm);
+
+ //
+ //
+ //
+ if (!InSmm) {
+ //
+ // Retrieve the Device Path Protocol from the DeviceHandle tha this driver was loaded from
+ //
+ Status = mBS->HandleProtocol (
+ LoadedImage->DeviceHandle,
+ &gEfiDevicePathProtocolGuid,
+ (VOID*)&ImageDevicePath
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Build the full device path to the currently execuing image
+ //
+ CompleteFilePath = SmmAppendDevicePath (ImageDevicePath, LoadedImage->FilePath);
+
+ //
+ // Load the image in memory to SMRAM; it will automatically generate the
+ // SMI.
+ //
+ Status = SmmBase->Register (SmmBase, CompleteFilePath, NULL, 0, &Handle, FALSE);
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+
+ //
+ // Call constructor for all libraries
+ //
+ ProcessLibraryConstructorList (ImageHandle, SystemTable);
+
+ //
+ // Optionally install the unload handler
+ //
+ if (_gDriverUnloadImageCount > 0) {
+ Status = mBS->HandleProtocol (
+ ImageHandle,
+ &gEfiLoadedImageProtocolGuid,
+ (VOID **)&LoadedImage
+ );
+ ASSERT_EFI_ERROR (Status);
+ LoadedImage->Unload = _DriverUnloadHandler;
+ }
+
+ //
+ // Call the list of driver entry points
+ //
+ Status = ProcessModuleEntryPointList (ImageHandle, SystemTable);
+ if (EFI_ERROR (Status)) {
+ ProcessLibraryDestructorList (ImageHandle, SystemTable);
+ }
+
+ return Status;
+}
+
+/**
+ Enrty point wrapper of DXE SMM Driver.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiMain (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ return _ModuleEntryPoint (ImageHandle, SystemTable);
+}
diff --git a/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.msa b/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.msa new file mode 100644 index 0000000000..605579758c --- /dev/null +++ b/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.msa @@ -0,0 +1,56 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+ <MsaHeader>
+ <ModuleName>DxeSmmDriverEntryPoint</ModuleName>
+ <ModuleType>DXE_SMM_DRIVER</ModuleType>
+ <GuidValue>79C5C7B7-1083-42a6-AD15-2A4E7C4274D7</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>SMM driver entry point library</Abstract>
+ <Description>Register driver in SMRAM and wrapper driver library constructors and entry point</Description>
+ <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>DxeSmmDriverEntryPoint</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED" SupModuleList="DXE_SMM_DRIVER">
+ <Keyword>DxeSmmDriverEntryPoint</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>UefiBootServicesTableLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>DriverEntryPoint.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Protocols>
+ <Protocol Usage="ALWAYS_CONSUMED">
+ <ProtocolCName>gEfiDevicePathProtocolGuid</ProtocolCName>
+ </Protocol>
+ <Protocol Usage="ALWAYS_CONSUMED">
+ <ProtocolCName>gEfiSmmBaseProtocolGuid</ProtocolCName>
+ </Protocol>
+ <Protocol Usage="ALWAYS_CONSUMED">
+ <ProtocolCName>gEfiLoadedImageProtocolGuid</ProtocolCName>
+ </Protocol>
+ </Protocols>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/IntelFrameworkPkg/Library/UefiLibFramework/Console.c b/IntelFrameworkPkg/Library/UefiLibFramework/Console.c new file mode 100644 index 0000000000..6260555e9e --- /dev/null +++ b/IntelFrameworkPkg/Library/UefiLibFramework/Console.c @@ -0,0 +1,282 @@ +/** @file
+ Mde UEFI library functions.
+
+ Copyright (c) 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Console.c
+
+**/
+
+#include "UefiLibFramework.h"
+
+typedef struct {
+ CHAR16 WChar;
+ UINT32 Width;
+} UNICODE_WIDTH_ENTRY;
+
+UNICODE_WIDTH_ENTRY mUnicodeWidthTable[] = {
+ //
+ // General script area
+ //
+ {(CHAR16)0x1FFF, 1},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all narrow glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0x007F, 1}, // C0 controls and basic Latin. 0x0000-0x007F
+ {(CHAR16)0x00FF, 1}, // C1 controls and Latin-1 support. 0x0080-0x00FF
+ {(CHAR16)0x017F, 1}, // Latin extended-A. 0x0100-0x017F
+ {(CHAR16)0x024F, 1}, // Latin extended-B. 0x0180-0x024F
+ {(CHAR16)0x02AF, 1}, // IPA extensions. 0x0250-0x02AF
+ {(CHAR16)0x02FF, 1}, // Spacing modifier letters. 0x02B0-0x02FF
+ {(CHAR16)0x036F, 1}, // Combining diacritical marks. 0x0300-0x036F
+ {(CHAR16)0x03FF, 1}, // Greek. 0x0370-0x03FF
+ {(CHAR16)0x04FF, 1}, // Cyrillic. 0x0400-0x04FF
+ {(CHAR16)0x052F, 0}, // Unassigned. As Armenian in ver3.0. 0x0500-0x052F
+ {(CHAR16)0x058F, 1}, // Armenian. 0x0530-0x058F
+ {(CHAR16)0x05FF, 1}, // Hebrew. 0x0590-0x05FF
+ {(CHAR16)0x06FF, 1}, // Arabic. 0x0600-0x06FF
+ {(CHAR16)0x08FF, 0}, // Unassigned. 0x0700-0x08FF
+ {(CHAR16)0x097F, 1}, // Devanagari. 0x0900-0x097F
+ {(CHAR16)0x09FF, 1}, // Bengali. 0x0980-0x09FF
+ {(CHAR16)0x0A7F, 1}, // Gurmukhi. 0x0A00-0x0A7F
+ {(CHAR16)0x0AFF, 1}, // Gujarati. 0x0A80-0x0AFF
+ {(CHAR16)0x0B7F, 1}, // Oriya. 0x0B00-0x0B7F
+ {(CHAR16)0x0BFF, 1}, // Tamil. (See page 7-92). 0x0B80-0x0BFF
+ {(CHAR16)0x0C7F, 1}, // Telugu. 0x0C00-0x0C7F
+ {(CHAR16)0x0CFF, 1}, // Kannada. (See page 7-100). 0x0C80-0x0CFF
+ {(CHAR16)0x0D7F, 1}, // Malayalam (See page 7-104). 0x0D00-0x0D7F
+ {(CHAR16)0x0DFF, 0}, // Unassigned. 0x0D80-0x0DFF
+ {(CHAR16)0x0E7F, 1}, // Thai. 0x0E00-0x0E7F
+ {(CHAR16)0x0EFF, 1}, // Lao. 0x0E80-0x0EFF
+ {(CHAR16)0x0FBF, 1}, // Tibetan. 0x0F00-0x0FBF
+ {(CHAR16)0x109F, 0}, // Unassigned. 0x0FC0-0x109F
+ {(CHAR16)0x10FF, 1}, // Georgian. 0x10A0-0x10FF
+ {(CHAR16)0x11FF, 1}, // Hangul Jamo. 0x1100-0x11FF
+ {(CHAR16)0x1DFF, 0}, // Unassigned. 0x1200-0x1DFF
+ {(CHAR16)0x1EFF, 1}, // Latin extended additional. 0x1E00-0x1EFF
+ {(CHAR16)0x1FFF, 1}, // Greek extended. 0x1F00-0x1FFF
+ *
+ */
+
+ //
+ // Symbol area
+ //
+ {(CHAR16)0x2FFF, 1},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all narrow glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0x206F, 1}, // General punctuation. (See page7-154). 0x200-0x206F
+ {(CHAR16)0x209F, 1}, // Superscripts and subscripts. 0x2070-0x209F
+ {(CHAR16)0x20CF, 1}, // Currency symbols. 0x20A0-0x20CF
+ {(CHAR16)0x20FF, 1}, // Combining diacritical marks for symbols. 0x20D0-0x20FF
+ {(CHAR16)0x214F, 1}, // Letterlike sympbols. 0x2100-0x214F
+ {(CHAR16)0x218F, 1}, // Number forms. 0x2150-0x218F
+ {(CHAR16)0x21FF, 1}, // Arrows. 0x2190-0x21FF
+ {(CHAR16)0x22FF, 1}, // Mathematical operators. 0x2200-0x22FF
+ {(CHAR16)0x23FF, 1}, // Miscellaneous technical. 0x2300-0x23FF
+ {(CHAR16)0x243F, 1}, // Control pictures. 0x2400-0x243F
+ {(CHAR16)0x245F, 1}, // Optical character recognition. 0x2440-0x245F
+ {(CHAR16)0x24FF, 1}, // Enclosed alphanumerics. 0x2460-0x24FF
+ {(CHAR16)0x257F, 1}, // Box drawing. 0x2500-0x257F
+ {(CHAR16)0x259F, 1}, // Block elements. 0x2580-0x259F
+ {(CHAR16)0x25FF, 1}, // Geometric shapes. 0x25A0-0x25FF
+ {(CHAR16)0x26FF, 1}, // Miscellaneous symbols. 0x2600-0x26FF
+ {(CHAR16)0x27BF, 1}, // Dingbats. 0x2700-0x27BF
+ {(CHAR16)0x2FFF, 0}, // Reserved. 0x27C0-0x2FFF
+ *
+ */
+
+ //
+ // CJK phonetics and symbol area
+ //
+ {(CHAR16)0x33FF, 2},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all wide glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0x303F, 2}, // CJK symbols and punctuation. 0x3000-0x303F
+ {(CHAR16)0x309F, 2}, // Hiragana. 0x3040-0x309F
+ {(CHAR16)0x30FF, 2}, // Katakana. 0x30A0-0x30FF
+ {(CHAR16)0x312F, 2}, // Bopomofo. 0x3100-0x312F
+ {(CHAR16)0x318F, 2}, // Hangul compatibility jamo. 0x3130-0x318F
+ {(CHAR16)0x319F, 2}, // Kanbun. 0x3190-0x319F
+ {(CHAR16)0x31FF, 0}, // Reserved. As Bopomofo extended in ver3.0. 0x31A0-0x31FF
+ {(CHAR16)0x32FF, 2}, // Enclosed CJK letters and months. 0x3200-0x32FF
+ {(CHAR16)0x33FF, 2}, // CJK compatibility. 0x3300-0x33FF
+ *
+ */
+
+ //
+ // CJK ideograph area
+ //
+ {(CHAR16)0x9FFF, 2},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all wide glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0x4DFF, 0}, // Reserved. 0x3400-0x4DBF as CJK unified ideographs
+ // extension A in ver3.0. 0x3400-0x4DFF
+ {(CHAR16)0x9FFF, 2}, // CJK unified ideographs. 0x4E00-0x9FFF
+ *
+ */
+
+ //
+ // Reserved
+ //
+ {(CHAR16)0xABFF, 0}, // Reserved. 0xA000-0xA490 as Yi syllables. 0xA490-0xA4D0
+ // as Yi radicals in ver3.0. 0xA000-0xABFF
+ //
+ // Hangul syllables
+ //
+ {(CHAR16)0xD7FF, 2},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all wide glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0xD7A3, 2}, // Hangul syllables. 0xAC00-0xD7A3
+ {(CHAR16)0xD7FF, 0}, // Reserved. 0xD7A3-0xD7FF
+ *
+ */
+
+ //
+ // Surrogates area
+ //
+ {(CHAR16)0xDFFF, 0}, // Surrogates, not used now. 0xD800-0xDFFF
+
+ //
+ // Private use area
+ //
+ {(CHAR16)0xF8FF, 0}, // Private use area. 0xE000-0xF8FF
+
+ //
+ // Compatibility area and specials
+ //
+ {(CHAR16)0xFAFF, 2}, // CJK compatibility ideographs. 0xF900-0xFAFF
+ {(CHAR16)0xFB4F, 1}, // Alphabetic presentation forms. 0xFB00-0xFB4F
+ {(CHAR16)0xFDFF, 1}, // Arabic presentation forms-A. 0xFB50-0xFDFF
+ {(CHAR16)0xFE1F, 0}, // Reserved. As variation selectors in ver3.0. 0xFE00-0xFE1F
+ {(CHAR16)0xFE2F, 1}, // Combining half marks. 0xFE20-0xFE2F
+ {(CHAR16)0xFE4F, 2}, // CJK compatibility forms. 0xFE30-0xFE4F
+ {(CHAR16)0xFE6F, 1}, // Small Form Variants. 0xFE50-0xFE6F
+ {(CHAR16)0xFEFF, 1}, // Arabic presentation forms-B. 0xFE70-0xFEFF
+ {(CHAR16)0xFFEF, 1}, // Half width and full width forms. 0xFF00-0xFFEF
+ {(CHAR16)0xFFFF, 0}, // Speicials. 0xFFF0-0xFFFF
+};
+
+/**
+ This function computes and returns the width of the Unicode character
+ specified by UnicodeChar.
+
+ @param UnicodeChar A Unicode character.
+
+ @retval 0 The width if UnicodeChar could not be determined.
+ @retval 1 UnicodeChar is a narrow glyph.
+ @retval 2 UnicodeChar is a wide glyph.
+
+**/
+UINTN
+EFIAPI
+GetGlyphWidth (
+ IN CHAR16 UnicodeChar
+ )
+{
+ UINTN Index;
+ UINTN Low;
+ UINTN High;
+ UNICODE_WIDTH_ENTRY *Item;
+
+ Item = NULL;
+ Low = 0;
+ High = (sizeof (mUnicodeWidthTable)) / (sizeof (UNICODE_WIDTH_ENTRY)) - 1;
+ while (Low <= High) {
+ Index = (Low + High) >> 1;
+ Item = &(mUnicodeWidthTable[Index]);
+ if (Index == 0) {
+ if (UnicodeChar <= Item->WChar) {
+ break;
+ }
+
+ return 0;
+ }
+
+ if (UnicodeChar > Item->WChar) {
+ Low = Index + 1;
+ } else if (UnicodeChar <= mUnicodeWidthTable[Index - 1].WChar) {
+ High = Index - 1;
+ } else {
+ //
+ // Index - 1 < UnicodeChar <= Index. Found
+ //
+ break;
+ }
+ }
+
+ if (Low <= High) {
+ return Item->Width;
+ }
+
+ return 0;
+}
+
+/**
+ This function computes and returns the display length of
+ the Null-terminated Unicode string specified by String.
+ If String is NULL, then 0 is returned.
+ If any of the widths of the Unicode characters in String
+ can not be determined, then 0 is returned.
+
+ @param String A pointer to a Null-terminated Unicode string.
+
+ @return The display length of the Null-terminated Unicode string specified by String.
+
+**/
+UINTN
+EFIAPI
+UnicodeStringDisplayLength (
+ IN CONST CHAR16 *String
+ )
+{
+ UINTN Length;
+ UINTN Width;
+
+ if (String == NULL) {
+ return 0;
+ }
+
+ Length = 0;
+ while (*String != 0) {
+ Width = GetGlyphWidth (*String);
+ if (Width == 0) {
+ return 0;
+ }
+
+ Length += Width;
+ String++;
+ }
+
+ return Length;
+}
diff --git a/IntelFrameworkPkg/Library/UefiLibFramework/UefiLib.c b/IntelFrameworkPkg/Library/UefiLibFramework/UefiLib.c new file mode 100644 index 0000000000..732ac6c8f7 --- /dev/null +++ b/IntelFrameworkPkg/Library/UefiLibFramework/UefiLib.c @@ -0,0 +1,813 @@ +/** @file
+ Mde UEFI library functions.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiLib.c
+
+**/
+
+#include "UefiLibFramework.h"
+
+/**
+ Compare whether two names of languages are identical.
+
+ @param Language1 Name of language 1.
+ @param Language2 Name of language 2.
+
+ @retval TRUE Language 1 and language 2 are the same.
+ @retval FALSE Language 1 and language 2 are not the same.
+
+**/
+STATIC
+BOOLEAN
+CompareIso639LanguageCode (
+ IN CONST CHAR8 *Language1,
+ IN CONST CHAR8 *Language2
+ )
+{
+ UINT32 Name1;
+ UINT32 Name2;
+
+ Name1 = ReadUnaligned24 ((CONST UINT32 *) Language1);
+ Name2 = ReadUnaligned24 ((CONST UINT32 *) Language2);
+
+ return (BOOLEAN) (Name1 == Name2);
+}
+
+/**
+ This function searches the list of configuration tables stored in the EFI System
+ Table for a table with a GUID that matches TableGuid. If a match is found,
+ then a pointer to the configuration table is returned in Table, and EFI_SUCCESS
+ is returned. If a matching GUID is not found, then EFI_NOT_FOUND is returned.
+
+ @param TableGuid Pointer to table's GUID type..
+ @param Table Pointer to the table associated with TableGuid in the EFI System Table.
+
+ @retval EFI_SUCCESS A configuration table matching TableGuid was found.
+ @retval EFI_NOT_FOUND A configuration table matching TableGuid could not be found.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiGetSystemConfigurationTable (
+ IN EFI_GUID *TableGuid,
+ OUT VOID **Table
+ )
+{
+ EFI_SYSTEM_TABLE *SystemTable;
+ UINTN Index;
+
+ ASSERT (TableGuid != NULL);
+ ASSERT (Table != NULL);
+
+ SystemTable = gST;
+ *Table = NULL;
+ for (Index = 0; Index < SystemTable->NumberOfTableEntries; Index++) {
+ if (CompareGuid (TableGuid, &(SystemTable->ConfigurationTable[Index].VendorGuid))) {
+ *Table = SystemTable->ConfigurationTable[Index].VendorTable;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
+/**
+ This function causes the notification function to be executed for every protocol
+ of type ProtocolGuid instance that exists in the system when this function is
+ invoked. In addition, every time a protocol of type ProtocolGuid instance is
+ installed or reinstalled, the notification function is also executed.
+
+ @param ProtocolGuid Supplies GUID of the protocol upon whose installation the event is fired.
+ @param NotifyTpl Supplies the task priority level of the event notifications.
+ @param NotifyFunction Supplies the function to notify when the event is signaled.
+ @param NotifyContext The context parameter to pass to NotifyFunction.
+ @param Registration A pointer to a memory location to receive the registration value.
+
+ @return The notification event that was created.
+
+**/
+EFI_EVENT
+EFIAPI
+EfiCreateProtocolNotifyEvent(
+ IN EFI_GUID *ProtocolGuid,
+ IN EFI_TPL NotifyTpl,
+ IN EFI_EVENT_NOTIFY NotifyFunction,
+ IN VOID *NotifyContext, OPTIONAL
+ OUT VOID **Registration
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT Event;
+
+ //
+ // Create the event
+ //
+
+ Status = gBS->CreateEvent (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ NotifyTpl,
+ NotifyFunction,
+ NotifyContext,
+ &Event
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Register for protocol notifactions on this event
+ //
+
+ Status = gBS->RegisterProtocolNotify (
+ ProtocolGuid,
+ Event,
+ Registration
+ );
+
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Kick the event so we will perform an initial pass of
+ // current installed drivers
+ //
+
+ gBS->SignalEvent (Event);
+ return Event;
+}
+
+/**
+ This function creates an event using NotifyTpl, NoifyFunction, and NotifyContext.
+ This event is signaled with EfiNamedEventSignal(). This provide the ability for
+ one or more listeners on the same event named by the GUID specified by Name.
+
+ @param Name Supplies GUID name of the event.
+ @param NotifyTpl Supplies the task priority level of the event notifications.
+ @param NotifyFunction Supplies the function to notify when the event is signaled.
+ @param NotifyContext The context parameter to pass to NotifyFunction.
+ @param Registration A pointer to a memory location to receive the registration value.
+
+ @retval EFI_SUCCESS A named event was created.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resource to create the named event.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiNamedEventListen (
+ IN CONST EFI_GUID *Name,
+ IN EFI_TPL NotifyTpl,
+ IN EFI_EVENT_NOTIFY NotifyFunction,
+ IN CONST VOID *NotifyContext, OPTIONAL
+ OUT VOID *Registration OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT Event;
+ VOID *RegistrationLocal;
+
+ //
+ // Create event
+ //
+ Status = gBS->CreateEvent (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ NotifyTpl,
+ NotifyFunction,
+ (VOID *) NotifyContext,
+ &Event
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // The Registration is not optional to RegisterProtocolNotify().
+ // To make it optional to EfiNamedEventListen(), may need to substitute with a local.
+ //
+ if (Registration != NULL) {
+ RegistrationLocal = Registration;
+ } else {
+ RegistrationLocal = &RegistrationLocal;
+ }
+
+ //
+ // Register for an installation of protocol interface
+ //
+
+ Status = gBS->RegisterProtocolNotify (
+ (EFI_GUID *) Name,
+ Event,
+ RegistrationLocal
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This function signals the named event specified by Name. The named event must
+ have been created with EfiNamedEventListen().
+
+ @param Name Supplies GUID name of the event.
+
+ @retval EFI_SUCCESS A named event was signaled.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resource to signal the named event.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiNamedEventSignal (
+ IN CONST EFI_GUID *Name
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE Handle;
+
+ Handle = NULL;
+ Status = gBS->InstallProtocolInterface (
+ &Handle,
+ (EFI_GUID *) Name,
+ EFI_NATIVE_INTERFACE,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = gBS->UninstallProtocolInterface (
+ Handle,
+ (EFI_GUID *) Name,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Returns the current TPL.
+
+ This function returns the current TPL. There is no EFI service to directly
+ retrieve the current TPL. Instead, the RaiseTPL() function is used to raise
+ the TPL to TPL_HIGH_LEVEL. This will return the current TPL. The TPL level
+ can then immediately be restored back to the current TPL level with a call
+ to RestoreTPL().
+
+ @param VOID
+
+ @retvale EFI_TPL The current TPL.
+
+**/
+EFI_TPL
+EFIAPI
+EfiGetCurrentTpl (
+ VOID
+ )
+{
+ EFI_TPL Tpl;
+
+ Tpl = gBS->RaiseTPL (EFI_TPL_HIGH_LEVEL);
+ gBS->RestoreTPL (Tpl);
+
+ return Tpl;
+}
+
+
+/**
+ This function initializes a basic mutual exclusion lock to the released state
+ and returns the lock. Each lock provides mutual exclusion access at its task
+ priority level. Since there is no preemption or multiprocessor support in EFI,
+ acquiring the lock only consists of raising to the locks TPL.
+
+ @param Lock A pointer to the lock data structure to initialize.
+ @param Priority EFI TPL associated with the lock.
+
+ @return The lock.
+
+**/
+EFI_LOCK *
+EFIAPI
+EfiInitializeLock (
+ IN OUT EFI_LOCK *Lock,
+ IN EFI_TPL Priority
+ )
+{
+ ASSERT (Lock != NULL);
+ ASSERT (Priority <= EFI_TPL_HIGH_LEVEL);
+
+ Lock->Tpl = Priority;
+ Lock->OwnerTpl = EFI_TPL_APPLICATION;
+ Lock->Lock = EfiLockReleased ;
+ return Lock;
+}
+
+/**
+ This function raises the system's current task priority level to the task
+ priority level of the mutual exclusion lock. Then, it places the lock in the
+ acquired state.
+
+ @param Priority The task priority level of the lock.
+
+**/
+VOID
+EFIAPI
+EfiAcquireLock (
+ IN EFI_LOCK *Lock
+ )
+{
+ ASSERT (Lock != NULL);
+ ASSERT (Lock->Lock == EfiLockReleased);
+
+ Lock->OwnerTpl = gBS->RaiseTPL (Lock->Tpl);
+ Lock->Lock = EfiLockAcquired;
+}
+
+/**
+ This function raises the system's current task priority level to the task
+ priority level of the mutual exclusion lock. Then, it attempts to place the
+ lock in the acquired state.
+
+ @param Lock A pointer to the lock to acquire.
+
+ @retval EFI_SUCCESS The lock was acquired.
+ @retval EFI_ACCESS_DENIED The lock could not be acquired because it is already owned.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiAcquireLockOrFail (
+ IN EFI_LOCK *Lock
+ )
+{
+
+ ASSERT (Lock != NULL);
+ ASSERT (Lock->Lock != EfiLockUninitialized);
+
+ if (Lock->Lock == EfiLockAcquired) {
+ //
+ // Lock is already owned, so bail out
+ //
+ return EFI_ACCESS_DENIED;
+ }
+
+ Lock->OwnerTpl = gBS->RaiseTPL (Lock->Tpl);
+
+ Lock->Lock = EfiLockAcquired;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This function transitions a mutual exclusion lock from the acquired state to
+ the released state, and restores the system's task priority level to its
+ previous level.
+
+ @param Lock A pointer to the lock to release.
+
+**/
+VOID
+EFIAPI
+EfiReleaseLock (
+ IN EFI_LOCK *Lock
+ )
+{
+ EFI_TPL Tpl;
+
+ ASSERT (Lock != NULL);
+ ASSERT (Lock->Lock == EfiLockAcquired);
+
+ Tpl = Lock->OwnerTpl;
+
+ Lock->Lock = EfiLockReleased;
+
+ gBS->RestoreTPL (Tpl);
+}
+
+/** + Tests whether a controller handle is being managed by a specific driver. + + This function tests whether the driver specified by DriverBindingHandle is
+ currently managing the controller specified by ControllerHandle. This test
+ is performed by evaluating if the the protocol specified by ProtocolGuid is
+ present on ControllerHandle and is was opened by DriverBindingHandle with an
+ attribute of EFI_OPEN_PROTOCOL_BY_DRIVER.
+ If ProtocolGuid is NULL, then ASSERT().
+ + @param ControllerHandle A handle for a controller to test. + @param DriverBindingHandle Specifies the driver binding handle for the + driver. + @param ProtocolGuid Specifies the protocol that the driver specified + by DriverBindingHandle opens in its Start() + function. + + @retval EFI_SUCCESS ControllerHandle is managed by the driver + specifed by DriverBindingHandle. + @retval EFI_UNSUPPORTED ControllerHandle is not managed by the driver + specifed by DriverBindingHandle. + +**/
+EFI_STATUS
+EFIAPI
+EfiTestManagedDevice (
+ IN CONST EFI_HANDLE ControllerHandle,
+ IN CONST EFI_HANDLE DriverBindingHandle,
+ IN CONST EFI_GUID *ProtocolGuid
+ )
+{
+ EFI_STATUS Status;
+ VOID *ManagedInterface;
+
+ ASSERT (ProtocolGuid != NULL);
+
+ Status = gBS->OpenProtocol (
+ ControllerHandle,
+ (EFI_GUID *) ProtocolGuid,
+ &ManagedInterface,
+ DriverBindingHandle,
+ ControllerHandle,
+ EFI_OPEN_PROTOCOL_BY_DRIVER
+ );
+ if (!EFI_ERROR (Status)) {
+ gBS->CloseProtocol (
+ ControllerHandle,
+ (EFI_GUID *) ProtocolGuid,
+ DriverBindingHandle,
+ ControllerHandle
+ );
+ return EFI_UNSUPPORTED;
+ }
+
+ if (Status != EFI_ALREADY_STARTED) {
+ return EFI_UNSUPPORTED;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/** + Tests whether a child handle is a child device of the controller. + + This function tests whether ChildHandle is one of the children of
+ ControllerHandle. This test is performed by checking to see if the protocol
+ specified by ProtocolGuid is present on ControllerHandle and opened by
+ ChildHandle with an attribute of EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER.
+ If ProtocolGuid is NULL, then ASSERT().
+ + @param ControllerHandle A handle for a (parent) controller to test.
+ @param ChildHandle A child handle to test. + @param ConsumsedGuid Supplies the protocol that the child controller + opens on its parent controller.
+ + @retval EFI_SUCCESS ChildHandle is a child of the ControllerHandle. + @retval EFI_UNSUPPORTED ChildHandle is not a child of the + ControllerHandle. + +**/
+EFI_STATUS
+EFIAPI
+EfiTestChildHandle (
+ IN CONST EFI_HANDLE ControllerHandle,
+ IN CONST EFI_HANDLE ChildHandle,
+ IN CONST EFI_GUID *ProtocolGuid
+ )
+{
+ EFI_STATUS Status;
+ EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;
+ UINTN EntryCount;
+ UINTN Index;
+
+ ASSERT (ProtocolGuid != NULL);
+
+ //
+ // Retrieve the list of agents that are consuming the specific protocol
+ // on ControllerHandle.
+ //
+ Status = gBS->OpenProtocolInformation (
+ ControllerHandle,
+ (EFI_GUID *) ProtocolGuid,
+ &OpenInfoBuffer,
+ &EntryCount
+ );
+ if (EFI_ERROR (Status)) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Inspect if ChildHandle is one of the agents.
+ //
+ Status = EFI_UNSUPPORTED;
+ for (Index = 0; Index < EntryCount; Index++) {
+ if ((OpenInfoBuffer[Index].ControllerHandle == ChildHandle) &&
+ (OpenInfoBuffer[Index].Attributes & EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER) != 0) {
+ Status = EFI_SUCCESS;
+ break;
+ }
+ }
+
+ FreePool (OpenInfoBuffer);
+ return Status;
+}
+
+/**
+ This function looks up a Unicode string in UnicodeStringTable. If Language is
+ a member of SupportedLanguages and a Unicode string is found in UnicodeStringTable
+ that matches the language code specified by Language, then it is returned in
+ UnicodeString.
+
+ @param Language A pointer to the ISO 639-2 language code for the
+ Unicode string to look up and return.
+ @param SupportedLanguages A pointer to the set of ISO 639-2 language codes
+ that the Unicode string table supports. Language
+ must be a member of this set.
+ @param UnicodeStringTable A pointer to the table of Unicode strings.
+ @param UnicodeString A pointer to the Unicode string from UnicodeStringTable
+ that matches the language specified by Language.
+
+ @retval EFI_SUCCESS The Unicode string that matches the language
+ specified by Language was found
+ in the table of Unicoide strings UnicodeStringTable,
+ and it was returned in UnicodeString.
+ @retval EFI_INVALID_PARAMETER Language is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is NULL.
+ @retval EFI_UNSUPPORTED SupportedLanguages is NULL.
+ @retval EFI_UNSUPPORTED UnicodeStringTable is NULL.
+ @retval EFI_UNSUPPORTED The language specified by Language is not a
+ member of SupportedLanguages.
+ @retval EFI_UNSUPPORTED The language specified by Language is not
+ supported by UnicodeStringTable.
+
+**/
+EFI_STATUS
+EFIAPI
+LookupUnicodeString (
+ IN CONST CHAR8 *Language,
+ IN CONST CHAR8 *SupportedLanguages,
+ IN CONST EFI_UNICODE_STRING_TABLE *UnicodeStringTable,
+ OUT CHAR16 **UnicodeString
+ )
+{
+ //
+ // Make sure the parameters are valid
+ //
+ if (Language == NULL || UnicodeString == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // If there are no supported languages, or the Unicode String Table is empty, then the
+ // Unicode String specified by Language is not supported by this Unicode String Table
+ //
+ if (SupportedLanguages == NULL || UnicodeStringTable == NULL) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Make sure Language is in the set of Supported Languages
+ //
+ while (*SupportedLanguages != 0) {
+ if (CompareIso639LanguageCode (Language, SupportedLanguages)) {
+
+ //
+ // Search the Unicode String Table for the matching Language specifier
+ //
+ while (UnicodeStringTable->Language != NULL) {
+ if (CompareIso639LanguageCode (Language, UnicodeStringTable->Language)) {
+
+ //
+ // A matching string was found, so return it
+ //
+ *UnicodeString = UnicodeStringTable->UnicodeString;
+ return EFI_SUCCESS;
+ }
+
+ UnicodeStringTable++;
+ }
+
+ return EFI_UNSUPPORTED;
+ }
+
+ SupportedLanguages += 3;
+ }
+
+ return EFI_UNSUPPORTED;
+}
+
+/**
+ This function adds a Unicode string to UnicodeStringTable.
+ If Language is a member of SupportedLanguages then UnicodeString is added to
+ UnicodeStringTable. New buffers are allocated for both Language and
+ UnicodeString. The contents of Language and UnicodeString are copied into
+ these new buffers. These buffers are automatically freed when
+ FreeUnicodeStringTable() is called.
+
+ @param Language A pointer to the ISO 639-2 language code for the Unicode
+ string to add.
+ @param SupportedLanguages A pointer to the set of ISO 639-2 language codes
+ that the Unicode string table supports.
+ Language must be a member of this set.
+ @param UnicodeStringTable A pointer to the table of Unicode strings.
+ @param UnicodeString A pointer to the Unicode string to add.
+
+ @retval EFI_SUCCESS The Unicode string that matches the language
+ specified by Language was found in the table of
+ Unicode strings UnicodeStringTable, and it was
+ returned in UnicodeString.
+ @retval EFI_INVALID_PARAMETER Language is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is an empty string.
+ @retval EFI_UNSUPPORTED SupportedLanguages is NULL.
+ @retval EFI_ALREADY_STARTED A Unicode string with language Language is
+ already present in UnicodeStringTable.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory to add another
+ Unicode string to UnicodeStringTable.
+ @retval EFI_UNSUPPORTED The language specified by Language is not a
+ member of SupportedLanguages.
+
+**/
+EFI_STATUS
+EFIAPI
+AddUnicodeString (
+ IN CONST CHAR8 *Language,
+ IN CONST CHAR8 *SupportedLanguages,
+ IN EFI_UNICODE_STRING_TABLE **UnicodeStringTable,
+ IN CONST CHAR16 *UnicodeString
+ )
+{
+ UINTN NumberOfEntries;
+ EFI_UNICODE_STRING_TABLE *OldUnicodeStringTable;
+ EFI_UNICODE_STRING_TABLE *NewUnicodeStringTable;
+ UINTN UnicodeStringLength;
+
+ //
+ // Make sure the parameter are valid
+ //
+ if (Language == NULL || UnicodeString == NULL || UnicodeStringTable == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // If there are no supported languages, then a Unicode String can not be added
+ //
+ if (SupportedLanguages == NULL) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // If the Unicode String is empty, then a Unicode String can not be added
+ //
+ if (UnicodeString[0] == 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // Make sure Language is a member of SupportedLanguages
+ //
+ while (*SupportedLanguages != 0) {
+ if (CompareIso639LanguageCode (Language, SupportedLanguages)) {
+
+ //
+ // Determine the size of the Unicode String Table by looking for a NULL Language entry
+ //
+ NumberOfEntries = 0;
+ if (*UnicodeStringTable != NULL) {
+ OldUnicodeStringTable = *UnicodeStringTable;
+ while (OldUnicodeStringTable->Language != NULL) {
+ if (CompareIso639LanguageCode (Language, OldUnicodeStringTable->Language)) {
+ return EFI_ALREADY_STARTED;
+ }
+
+ OldUnicodeStringTable++;
+ NumberOfEntries++;
+ }
+ }
+
+ //
+ // Allocate space for a new Unicode String Table. It must hold the current number of
+ // entries, plus 1 entry for the new Unicode String, plus 1 entry for the end of table
+ // marker
+ //
+ NewUnicodeStringTable = AllocatePool ((NumberOfEntries + 2) * sizeof (EFI_UNICODE_STRING_TABLE));
+ if (NewUnicodeStringTable == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // If the current Unicode String Table contains any entries, then copy them to the
+ // newly allocated Unicode String Table.
+ //
+ if (*UnicodeStringTable != NULL) {
+ CopyMem (
+ NewUnicodeStringTable,
+ *UnicodeStringTable,
+ NumberOfEntries * sizeof (EFI_UNICODE_STRING_TABLE)
+ );
+ }
+
+ //
+ // Allocate space for a copy of the Language specifier
+ //
+ NewUnicodeStringTable[NumberOfEntries].Language = AllocateCopyPool (3, Language);
+ if (NewUnicodeStringTable[NumberOfEntries].Language == NULL) {
+ gBS->FreePool (NewUnicodeStringTable);
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Compute the length of the Unicode String
+ //
+ for (UnicodeStringLength = 0; UnicodeString[UnicodeStringLength] != 0; UnicodeStringLength++)
+ ;
+
+ //
+ // Allocate space for a copy of the Unicode String
+ //
+ NewUnicodeStringTable[NumberOfEntries].UnicodeString = AllocateCopyPool (
+ (UnicodeStringLength + 1) * sizeof (CHAR16),
+ UnicodeString
+ );
+ if (NewUnicodeStringTable[NumberOfEntries].UnicodeString == NULL) {
+ gBS->FreePool (NewUnicodeStringTable[NumberOfEntries].Language);
+ gBS->FreePool (NewUnicodeStringTable);
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Mark the end of the Unicode String Table
+ //
+ NewUnicodeStringTable[NumberOfEntries + 1].Language = NULL;
+ NewUnicodeStringTable[NumberOfEntries + 1].UnicodeString = NULL;
+
+ //
+ // Free the old Unicode String Table
+ //
+ if (*UnicodeStringTable != NULL) {
+ gBS->FreePool (*UnicodeStringTable);
+ }
+
+ //
+ // Point UnicodeStringTable at the newly allocated Unicode String Table
+ //
+ *UnicodeStringTable = NewUnicodeStringTable;
+
+ return EFI_SUCCESS;
+ }
+
+ SupportedLanguages += 3;
+ }
+
+ return EFI_UNSUPPORTED;
+}
+
+/**
+ This function frees the table of Unicode strings in UnicodeStringTable.
+ If UnicodeStringTable is NULL, then EFI_SUCCESS is returned.
+ Otherwise, each language code, and each Unicode string in the Unicode string
+ table are freed, and EFI_SUCCESS is returned.
+
+ @param UnicodeStringTable A pointer to the table of Unicode strings.
+
+ @retval EFI_SUCCESS The Unicode string table was freed.
+
+**/
+EFI_STATUS
+EFIAPI
+FreeUnicodeStringTable (
+ IN EFI_UNICODE_STRING_TABLE *UnicodeStringTable
+ )
+{
+ UINTN Index;
+
+ //
+ // If the Unicode String Table is NULL, then it is already freed
+ //
+ if (UnicodeStringTable == NULL) {
+ return EFI_SUCCESS;
+ }
+
+ //
+ // Loop through the Unicode String Table until we reach the end of table marker
+ //
+ for (Index = 0; UnicodeStringTable[Index].Language != NULL; Index++) {
+
+ //
+ // Free the Language string from the Unicode String Table
+ //
+ gBS->FreePool (UnicodeStringTable[Index].Language);
+
+ //
+ // Free the Unicode String from the Unicode String Table
+ //
+ if (UnicodeStringTable[Index].UnicodeString != NULL) {
+ gBS->FreePool (UnicodeStringTable[Index].UnicodeString);
+ }
+ }
+
+ //
+ // Free the Unicode String Table itself
+ //
+ gBS->FreePool (UnicodeStringTable);
+
+ return EFI_SUCCESS;
+}
+
diff --git a/IntelFrameworkPkg/Library/UefiLibFramework/UefiLib.msa b/IntelFrameworkPkg/Library/UefiLibFramework/UefiLib.msa new file mode 100644 index 0000000000..19b5703a3f --- /dev/null +++ b/IntelFrameworkPkg/Library/UefiLibFramework/UefiLib.msa @@ -0,0 +1,84 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+ <MsaHeader>
+ <ModuleName>UefiLib</ModuleName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <GuidValue>3a004ba5-efe0-4a61-9f1a-267a46ae5ba9</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification + + Help Port Framework/Tinao code that has conflicts with UEFI 2.0 by hiding the oldconflicts with library functions and supporting implementations of the old + (EDK/EFI 1.10) and new (EDK II/UEFI 2.0) way. This module is a DXE driver as it contains DXE enum extensions for EFI event services.</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>UefiLib</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED" SupModuleList="DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER">
+ <Keyword>UefiLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>UefiBootServicesTableLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>BaseLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>BaseMemoryLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>MemoryAllocationLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>PcdLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>PrintLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>UefiLib.c</Filename>
+ <Filename>Console.c</Filename>
+ <Filename>UefiNotTiano.c</Filename>
+ <Filename>UefiLibPrint.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Guids>
+ <GuidCNames Usage="ALWAYS_CONSUMED">
+ <GuidCName>gEfiEventLegacyBootGuid</GuidCName>
+ </GuidCNames>
+ <GuidCNames Usage="ALWAYS_CONSUMED">
+ <GuidCName>gEfiEventReadyToBootGuid</GuidCName>
+ </GuidCNames>
+ <GuidCNames Usage="ALWAYS_CONSUMED">
+ <GuidCName>gEfiFrameworkDevicePathGuid</GuidCName>
+ </GuidCNames>
+ </Guids>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+ <PcdCoded>
+ <PcdEntry PcdItemType="FIXED_AT_BUILD" Usage="ALWAYS_CONSUMED">
+ <C_Name>PcdUefiLibMaxPrintBufferSize</C_Name>
+ <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>
+ <HelpText>This PCD is used by UefiLib APIs, which are Print, ErrorPrint, AsciiPrint, AsciiErrorPrint. If the length of the formatted Unicode or ASCII string is greater than PcdUefiLibMaxPrintBufferSize, then only the first (PcdUefiLibMaxPrintBufferSize / Sizeof(CHAR16)) Unicode characters or PcdUefiLibMaxPrintBufferSize Ascii characters are sent to the respective console.</HelpText>
+ </PcdEntry>
+ </PcdCoded>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/IntelFrameworkPkg/Library/UefiLibFramework/UefiLibFramework.h b/IntelFrameworkPkg/Library/UefiLibFramework/UefiLibFramework.h new file mode 100644 index 0000000000..4bdc4b1edc --- /dev/null +++ b/IntelFrameworkPkg/Library/UefiLibFramework/UefiLibFramework.h @@ -0,0 +1,31 @@ +/** @file
+ Header file to include header files common to all source files in
+ UefiLibFramework.
+
+ Copyright (c) 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiLibFramework.h
+
+**/
+
+#ifndef _UEFI_LIB_FRAMEWORK_H_
+#define _UEFI_LIB_FRAMEWORK_H_
+
+#include <FrameworkDxe.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/PrintLib.h>
+#include <Library/UefiLib.h>
+
+#endif
diff --git a/IntelFrameworkPkg/Library/UefiLibFramework/UefiLibPrint.c b/IntelFrameworkPkg/Library/UefiLibFramework/UefiLibPrint.c new file mode 100644 index 0000000000..7b539be501 --- /dev/null +++ b/IntelFrameworkPkg/Library/UefiLibFramework/UefiLibPrint.c @@ -0,0 +1,261 @@ +/** @file
+ Mde UEFI library API implemention.
+ Print to StdErr or ConOut defined in EFI_SYSTEM_TABLE
+
+ Copyright (c) 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "UefiLibFramework.h"
+
+/**
+ Internal function which prints a formatted Unicode string to the console output device
+ specified by Console
+
+ This function prints a formatted Unicode string to the console output device
+ specified by Console and returns the number of Unicode characters that printed
+ to it. If the length of the formatted Unicode string is greater than PcdUefiLibMaxPrintBufferSize,
+ then only the first PcdUefiLibMaxPrintBufferSize characters are sent to Console.
+
+ @param Format Null-terminated Unicode format string.
+ @param Console The output console.
+ @param Marker VA_LIST marker for the variable argument list.
+
+ If Format is NULL, then ASSERT().
+ If Format is not aligned on a 16-bit boundary, then ASSERT().
+
+**/
+
+STATIC
+UINTN
+InternalPrint (
+ IN CONST CHAR16 *Format,
+ IN EFI_SIMPLE_TEXT_OUT_PROTOCOL *Console,
+ IN VA_LIST Marker
+ )
+{
+ UINTN Return;
+ CHAR16 *Buffer;
+ UINTN BufferSize;
+
+ ASSERT (Format != NULL);
+ ASSERT (((UINTN) Format & 0x01) == 0);
+
+ BufferSize = (PcdGet32 (PcdUefiLibMaxPrintBufferSize) + 1) * sizeof (CHAR16);
+
+ Buffer = (CHAR16 *) AllocatePool(BufferSize);
+ ASSERT (Buffer != NULL);
+
+ Return = UnicodeVSPrint (Buffer, BufferSize, Format, Marker);
+
+ if (Console != NULL) {
+ //
+ // To be extra safe make sure Console has been initialized
+ //
+ Console->OutputString (Console, Buffer);
+ }
+
+ FreePool (Buffer);
+
+ return Return;
+}
+
+/**
+ Prints a formatted Unicode string to the console output device specified by
+ ConOut defined in the EFI_SYSTEM_TABLE.
+
+ This function prints a formatted Unicode string to the console output device
+ specified by ConOut in EFI_SYSTEM_TABLE and returns the number of Unicode
+ characters that printed to ConOut. If the length of the formatted Unicode
+ string is greater than PcdUefiLibMaxPrintBufferSize, then only the first
+ PcdUefiLibMaxPrintBufferSize characters are sent to ConOut.
+
+ @param Format Null-terminated Unicode format string.
+ @param ... VARARG list consumed to process Format.
+ If Format is NULL, then ASSERT().
+ If Format is not aligned on a 16-bit boundary, then ASSERT().
+
+**/
+UINTN
+EFIAPI
+Print (
+ IN CONST CHAR16 *Format,
+ ...
+ )
+{
+ VA_LIST Marker;
+ UINTN Return;
+
+ VA_START (Marker, Format);
+
+ Return = InternalPrint (Format, gST->ConOut, Marker);
+
+ VA_END (Marker);
+
+ return Return;
+}
+
+/**
+ Prints a formatted Unicode string to the console output device specified by
+ StdErr defined in the EFI_SYSTEM_TABLE.
+
+ This function prints a formatted Unicode string to the console output device
+ specified by StdErr in EFI_SYSTEM_TABLE and returns the number of Unicode
+ characters that printed to StdErr. If the length of the formatted Unicode
+ string is greater than PcdUefiLibMaxPrintBufferSize, then only the first
+ PcdUefiLibMaxPrintBufferSize characters are sent to StdErr.
+
+ @param Format Null-terminated Unicode format string.
+ @param ... VARARG list consumed to process Format.
+ If Format is NULL, then ASSERT().
+ If Format is not aligned on a 16-bit boundary, then ASSERT().
+
+**/
+
+UINTN
+EFIAPI
+ErrorPrint (
+ IN CONST CHAR16 *Format,
+ ...
+ )
+{
+ VA_LIST Marker;
+ UINTN Return;
+
+ VA_START (Marker, Format);
+
+ Return = InternalPrint( Format, gST->StdErr, Marker);
+
+ VA_END (Marker);
+
+ return Return;
+}
+
+
+/**
+ Internal function which prints a formatted ASCII string to the console output device
+ specified by Console
+
+ This function prints a formatted ASCII string to the console output device
+ specified by Console and returns the number of ASCII characters that printed
+ to it. If the length of the formatted ASCII string is greater than PcdUefiLibMaxPrintBufferSize,
+ then only the first PcdUefiLibMaxPrintBufferSize characters are sent to Console.
+
+ @param Format Null-terminated ASCII format string.
+ @param Console The output console.
+ @param Marker VA_LIST marker for the variable argument list.
+
+ If Format is NULL, then ASSERT().
+
+**/
+
+STATIC
+UINTN
+AsciiInternalPrint (
+ IN CONST CHAR8 *Format,
+ IN EFI_SIMPLE_TEXT_OUT_PROTOCOL *Console,
+ IN VA_LIST Marker
+ )
+{
+ UINTN Return;
+ CHAR16 *Buffer;
+ UINTN BufferSize;
+
+ ASSERT (Format != NULL);
+
+ BufferSize = (PcdGet32 (PcdUefiLibMaxPrintBufferSize) + 1) * sizeof (CHAR16);
+
+ Buffer = (CHAR16 *) AllocatePool(BufferSize);
+ ASSERT (Buffer != NULL);
+
+ Return = UnicodeVSPrintAsciiFormat (Buffer, BufferSize, Format, Marker);
+
+ if (Console != NULL) {
+ //
+ // To be extra safe make sure Console has been initialized
+ //
+ Console->OutputString (Console, Buffer);
+ }
+
+ FreePool (Buffer);
+
+ return Return;
+}
+
+/**
+ Prints a formatted ASCII string to the console output device specified by
+ ConOut defined in the EFI_SYSTEM_TABLE.
+
+ This function prints a formatted ASCII string to the console output device
+ specified by ConOut in EFI_SYSTEM_TABLE and returns the number of ASCII
+ characters that printed to ConOut. If the length of the formatted ASCII
+ string is greater than PcdUefiLibMaxPrintBufferSize, then only the first
+ PcdUefiLibMaxPrintBufferSize characters are sent to ConOut.
+
+ @param Format Null-terminated ASCII format string.
+ @param ... VARARG list consumed to process Format.
+ If Format is NULL, then ASSERT().
+ If Format is not aligned on a 16-bit boundary, then ASSERT().
+
+**/
+UINTN
+EFIAPI
+AsciiPrint (
+ IN CONST CHAR8 *Format,
+ ...
+ )
+{
+ VA_LIST Marker;
+ UINTN Return;
+
+ VA_START (Marker, Format);
+
+ Return = AsciiInternalPrint( Format, gST->ConOut, Marker);
+
+ VA_END (Marker);
+
+ return Return;
+}
+
+/**
+ Prints a formatted ASCII string to the console output device specified by
+ StdErr defined in the EFI_SYSTEM_TABLE.
+
+ This function prints a formatted ASCII string to the console output device
+ specified by StdErr in EFI_SYSTEM_TABLE and returns the number of ASCII
+ characters that printed to StdErr. If the length of the formatted ASCII
+ string is greater than PcdUefiLibMaxPrintBufferSize, then only the first
+ PcdUefiLibMaxPrintBufferSize characters are sent to StdErr.
+
+ @param Format Null-terminated ASCII format string.
+ @param ... VARARG list consumed to process Format.
+ If Format is NULL, then ASSERT().
+ If Format is not aligned on a 16-bit boundary, then ASSERT().
+
+**/
+UINTN
+EFIAPI
+AsciiErrorPrint (
+ IN CONST CHAR8 *Format,
+ ...
+ )
+{
+ VA_LIST Marker;
+ UINTN Return;
+
+ VA_START (Marker, Format);
+
+ Return = AsciiInternalPrint( Format, gST->StdErr, Marker);
+
+ VA_END (Marker);
+
+ return Return;
+}
+
diff --git a/IntelFrameworkPkg/Library/UefiLibFramework/UefiNotTiano.c b/IntelFrameworkPkg/Library/UefiLibFramework/UefiNotTiano.c new file mode 100644 index 0000000000..35539936ed --- /dev/null +++ b/IntelFrameworkPkg/Library/UefiLibFramework/UefiNotTiano.c @@ -0,0 +1,353 @@ +/** @file
+ Library functions that abstract areas of conflict between Tiano an UEFI 2.1.
+
+ Help Port Framework/Tinao code that has conflicts with UEFI 2.1 by hiding the
+ oldconflicts with library functions and supporting implementations of the old
+ (EDK/EFI 1.10) and new (EDK II/UEFI 2.1) way. This module is a DXE driver as
+ it contains DXE enum extensions for EFI event services.
+
+Copyright (c) 2007, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "UefiLibFramework.h"
+
+/**
+ An empty function to pass error checking of CreateEventEx ().
+
+ This empty function ensures that EFI_EVENT_NOTIFY_SIGNAL_ALL is error
+ checked correctly since it is now mapped into CreateEventEx() in UEFI 2.0.
+
+**/
+STATIC
+VOID
+EFIAPI
+InternalEmptyFuntion (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ return;
+}
+
+/**
+ Create a Legacy Boot Event.
+
+ Tiano extended the CreateEvent Type enum to add a legacy boot event type.
+ This was bad as Tiano did not own the enum. In UEFI 2.0 CreateEventEx was
+ added and now it's possible to not voilate the UEFI specification by
+ declaring a GUID for the legacy boot event class. This library supports
+ the EDK/EFI 1.10 form and EDK II/UEFI 2.0 form and allows common code to
+ work both ways.
+
+ @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).
+
+ @retval EFI_SUCCESS Event was created.
+ @retval Other Event was not created.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiCreateEventLegacyBoot (
+ OUT EFI_EVENT *LegacyBootEvent
+ )
+{
+ return EfiCreateEventLegacyBootEx (
+ EFI_TPL_CALLBACK,
+ InternalEmptyFuntion,
+ NULL,
+ LegacyBootEvent
+ );
+}
+
+/**
+ Create an EFI event in the Legacy Boot Event Group and allows
+ the caller to specify a notification function.
+
+ This function abstracts the creation of the Legacy Boot Event.
+ The Framework moved from a proprietary to UEFI 2.0 based mechanism.
+ This library abstracts the caller from how this event is created to prevent
+ to code form having to change with the version of the specification supported.
+ If LegacyBootEvent is NULL, then ASSERT().
+
+ @param NotifyTpl The task priority level of the event.
+ @param NotifyFunction The notification function to call when the event is signaled.
+ @param NotifyContext The content to pass to NotifyFunction when the event is signaled.
+ @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).
+
+ @retval EFI_SUCCESS Event was created.
+ @retval Other Event was not created.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiCreateEventLegacyBootEx (
+ IN EFI_TPL NotifyTpl,
+ IN EFI_EVENT_NOTIFY NotifyFunction, OPTIONAL
+ IN VOID *NotifyContext, OPTIONAL
+ OUT EFI_EVENT *LegacyBootEvent
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (LegacyBootEvent != NULL);
+
+ if (gST->Hdr.Revision < 0x00020000) {
+ //
+ // prior to UEFI 2.0 use Tiano extension to EFI
+ //
+ Status = gBS->CreateEvent (
+ EFI_EVENT_SIGNAL_LEGACY_BOOT | EFI_EVENT_NOTIFY_SIGNAL_ALL,
+ NotifyTpl,
+ NotifyFunction,
+ NotifyContext,
+ LegacyBootEvent
+ );
+ } else {
+ //
+ // For UEFI 2.0 and the future use an Event Group
+ //
+ Status = gBS->CreateEventEx (
+ EVENT_NOTIFY_SIGNAL,
+ NotifyTpl,
+ NotifyFunction,
+ NotifyContext,
+ &gEfiEventLegacyBootGuid,
+ LegacyBootEvent
+ );
+ }
+
+ return Status;
+}
+
+/**
+ Create a Read to Boot Event.
+
+ Tiano extended the CreateEvent Type enum to add a ready to boot event type.
+ This was bad as Tiano did not own the enum. In UEFI 2.0 CreateEventEx was
+ added and now it's possible to not voilate the UEFI specification and use
+ the ready to boot event class defined in UEFI 2.0. This library supports
+ the EDK/EFI 1.10 form and EDK II/UEFI 2.0 form and allows common code to
+ work both ways.
+
+ @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).
+
+ @retval EFI_SUCCESS Event was created.
+ @retval Other Event was not created.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiCreateEventReadyToBoot (
+ OUT EFI_EVENT *ReadyToBootEvent
+ )
+{
+ return EfiCreateEventReadyToBootEx (
+ EFI_TPL_CALLBACK,
+ InternalEmptyFuntion,
+ NULL,
+ ReadyToBootEvent
+ );
+}
+
+/**
+ Create an EFI event in the Ready To Boot Event Group and allows
+ the caller to specify a notification function.
+
+ This function abstracts the creation of the Ready to Boot Event.
+ The Framework moved from a proprietary to UEFI 2.0 based mechanism.
+ This library abstracts the caller from how this event is created to prevent
+ to code form having to change with the version of the specification supported.
+ If ReadyToBootEvent is NULL, then ASSERT().
+
+ @param NotifyTpl The task priority level of the event.
+ @param NotifyFunction The notification function to call when the event is signaled.
+ @param NotifyContext The content to pass to NotifyFunction when the event is signaled.
+ @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).
+
+ @retval EFI_SUCCESS Event was created.
+ @retval Other Event was not created.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiCreateEventReadyToBootEx (
+ IN EFI_TPL NotifyTpl,
+ IN EFI_EVENT_NOTIFY NotifyFunction, OPTIONAL
+ IN VOID *NotifyContext, OPTIONAL
+ OUT EFI_EVENT *ReadyToBootEvent
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (ReadyToBootEvent != NULL);
+
+ if (gST->Hdr.Revision < 0x00020000) {
+ //
+ // prior to UEFI 2.0 use Tiano extension to EFI
+ //
+ Status = gBS->CreateEvent (
+ EFI_EVENT_SIGNAL_READY_TO_BOOT | EFI_EVENT_NOTIFY_SIGNAL_ALL,
+ NotifyTpl,
+ NotifyFunction,
+ NotifyContext,
+ ReadyToBootEvent
+ );
+ } else {
+ //
+ // For UEFI 2.0 and the future use an Event Group
+ //
+ Status = gBS->CreateEventEx (
+ EVENT_NOTIFY_SIGNAL,
+ NotifyTpl,
+ NotifyFunction,
+ NotifyContext,
+ &gEfiEventReadyToBootGuid,
+ ReadyToBootEvent
+ );
+ }
+
+ return Status;
+}
+
+
+/**
+ Signal a Ready to Boot Event.
+
+ Create a Ready to Boot Event. Signal it and close it. This causes other
+ events of the same event group to be signaled in other modules.
+
+**/
+VOID
+EFIAPI
+EfiSignalEventReadyToBoot (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT ReadyToBootEvent;
+
+ Status = EfiCreateEventReadyToBoot (&ReadyToBootEvent);
+ if (!EFI_ERROR (Status)) {
+ gBS->SignalEvent (ReadyToBootEvent);
+ gBS->CloseEvent (ReadyToBootEvent);
+ }
+}
+
+/**
+ Signal a Legacy Boot Event.
+
+ Create a legacy Boot Event. Signal it and close it. This causes other
+ events of the same event group to be signaled in other modules.
+
+**/
+VOID
+EFIAPI
+EfiSignalEventLegacyBoot (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT LegacyBootEvent;
+
+ Status = EfiCreateEventLegacyBoot (&LegacyBootEvent);
+ if (!EFI_ERROR (Status)) {
+ gBS->SignalEvent (LegacyBootEvent);
+ gBS->CloseEvent (LegacyBootEvent);
+ }
+}
+
+
+/**
+ Check to see if the Firmware Volume (FV) Media Device Path is valid
+
+ Tiano extended the EFI 1.10 device path nodes. Tiano does not own this enum
+ so as we move to UEFI 2.0 support we must use a mechanism that conforms with
+ the UEFI 2.0 specification to define the FV device path. An UEFI GUIDed
+ device path is defined for Tiano extensions of device path. If the code
+ is compiled to conform with the UEFI 2.0 specification use the new device path
+ else use the old form for backwards compatability. The return value to this
+ function points to a location in FvDevicePathNode and it does not allocate
+ new memory for the GUID pointer that is returned.
+
+ @param FvDevicePathNode Pointer to FV device path to check.
+
+ @retval NULL FvDevicePathNode is not valid.
+ @retval Other FvDevicePathNode is valid and pointer to NameGuid was returned.
+
+**/
+EFI_GUID *
+EFIAPI
+EfiGetNameGuidFromFwVolDevicePathNode (
+ IN CONST MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvDevicePathNode
+ )
+{
+ ASSERT (FvDevicePathNode != NULL);
+
+ //
+ // Use the new Device path that does not conflict with the UEFI
+ //
+ if (FvDevicePathNode->Tiano.Header.Type == MEDIA_DEVICE_PATH ||
+ FvDevicePathNode->Tiano.Header.SubType == MEDIA_VENDOR_DP) {
+ if (CompareGuid (&gEfiFrameworkDevicePathGuid, &FvDevicePathNode->Tiano.TianoSpecificDevicePath)) {
+ if (FvDevicePathNode->Tiano.Type == TIANO_MEDIA_FW_VOL_FILEPATH_DEVICE_PATH_TYPE) {
+ return (EFI_GUID *) &FvDevicePathNode->NameGuid;
+ }
+ }
+ }
+
+ return NULL;
+}
+
+
+/**
+ Initialize a Firmware Volume (FV) Media Device Path node.
+
+ Tiano extended the EFI 1.10 device path nodes. Tiano does not own this enum
+ so as we move to UEFI 2.0 support we must use a mechanism that conforms with
+ the UEFI 2.0 specification to define the FV device path. An UEFI GUIDed
+ device path is defined for Tiano extensions of device path. If the code
+ is compiled to conform with the UEFI 2.0 specification use the new device path
+ else use the old form for backwards compatability.
+
+ @param FvDevicePathNode Pointer to a FV device path node to initialize
+ @param NameGuid FV file name to use in FvDevicePathNode
+
+**/
+VOID
+EFIAPI
+EfiInitializeFwVolDevicepathNode (
+ IN OUT MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvDevicePathNode,
+ IN CONST EFI_GUID *NameGuid
+ )
+{
+ ASSERT (FvDevicePathNode != NULL);
+ ASSERT (NameGuid != NULL);
+
+ //
+ // Use the new Device path that does not conflict with the UEFI
+ //
+ FvDevicePathNode->Tiano.Header.Type = MEDIA_DEVICE_PATH;
+ FvDevicePathNode->Tiano.Header.SubType = MEDIA_VENDOR_DP;
+ SetDevicePathNodeLength (&FvDevicePathNode->Tiano.Header, sizeof (MEDIA_FW_VOL_FILEPATH_DEVICE_PATH));
+
+ //
+ // Add the GUID for generic Tiano device paths
+ //
+ CopyGuid (&FvDevicePathNode->Tiano.TianoSpecificDevicePath, &gEfiFrameworkDevicePathGuid);
+
+ //
+ // Add in the FW Vol File Path Tiano defined information
+ //
+ FvDevicePathNode->Tiano.Type = TIANO_MEDIA_FW_VOL_FILEPATH_DEVICE_PATH_TYPE;
+
+ CopyGuid (&FvDevicePathNode->NameGuid, NameGuid);
+}
+
|