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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2016-08-02 12:08:03 +0200
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2016-08-02 14:04:00 +0200
commitd54e2d6c1e68f2edfa06a6a331e808f109df779f (patch)
tree0dbf4042a2e00826b1a6122b66ed7a1e46776d21 /IntelFsp2Pkg
parente5cf919889b92a5fb89638ea10cebbb3ef59b5c7 (diff)
downloadedk2-platforms-d54e2d6c1e68f2edfa06a6a331e808f109df779f.tar.xz
ArmVirtPkg/ArmVirtPrePiUniCoreRelocatable: deal with relaxed XIP alignment
Commit b89919ee8f8c ("BaseTools AARCH64: override XIP module linker alignment to 32 bytes") updated the various AARCH64 toolchain definitions to allow SEC, PEI_CORE and PEIM modules to be built with minimal alignment requirements even when using the AArch64 small code model which normally requires 4 KB section alignment. This involves conversion of ADRP instructions into ADR instructions, which can only be done reliably if the ELF and the PE/COFF sections appear at the same offset modulo 4 KB. The ArmVirtPrePiUniCoreRelocatable linker script did not yet take this into account, so update it by starting the .text section at the next appropriately aligned offset PECOFF_HEADER_SIZE bytes into the image. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'IntelFsp2Pkg')
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