IntelFsp2WrapperPkg: Add support to handle ResetRequired return Status from FSP.

As per FSP 2.0 spec, FSP shall not trigger system reset and instead it
shall return from the FSP API to the BL/Wrapper with the required reset
type. The changes are to handle the ResetRequired return code from FSP
APIs and provide lib interface for platform to trigger the actual reset.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>

6 files changed, 105 insertions, 1 deletions

diff --git a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
index 30c06b88bf..0797f44a68 100644
--- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
+++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
@@ -22,6 +22,7 @@
 #include <Library/BaseMemoryLib.h>

 #include <Library/UefiLib.h>

 #include <Library/FspWrapperApiLib.h>

+#include <Library/FspWrapperPlatformLib.h>

 #include <Library/PerformanceLib.h>

 #include <Library/HobLib.h>

 

@@ -93,6 +94,15 @@ OnPciEnumerationComplete (
   PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x6000);

   Status = CallFspNotifyPhase (&NotifyPhaseParams);

   PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x607F);

+

+  //

+  // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status

+  //

+  if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {

+    DEBUG((DEBUG_INFO, "FSP NotifyPhase AfterPciEnumeration requested reset 0x%x\n", Status));

+    CallFspWrapperResetSystem ((UINT32)Status);

+  }

+

   if (Status != EFI_SUCCESS) {

     DEBUG((DEBUG_ERROR, "FSP NotifyPhase AfterPciEnumeration failed, status: 0x%x\n", Status));

   } else {

@@ -130,6 +140,15 @@ OnReadyToBoot (
   PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x4000);

   Status = CallFspNotifyPhase (&NotifyPhaseParams);

   PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x407F);

+

+  //

+  // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status

+  //

+  if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {

+    DEBUG((DEBUG_INFO, "FSP NotifyPhase ReadyToBoot requested reset 0x%x\n", Status));

+    CallFspWrapperResetSystem ((UINT32)Status);

+  }

+

   if (Status != EFI_SUCCESS) {

     DEBUG((DEBUG_ERROR, "FSP NotifyPhase ReadyToBoot failed, status: 0x%x\n", Status));

   } else {

@@ -179,6 +198,15 @@ OnEndOfFirmware (
   PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x2000);

   Status = CallFspNotifyPhase (&NotifyPhaseParams);

   PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x207F);

+

+  //

+  // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status

+  //

+  if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {

+    DEBUG((DEBUG_INFO, "FSP NotifyPhase EndOfFirmware requested reset 0x%x\n", Status));

+    CallFspWrapperResetSystem ((UINT32)Status);

+  }

+

   if (Status != EFI_SUCCESS) {

     DEBUG((DEBUG_ERROR, "FSP NotifyPhase EndOfFirmware failed, status: 0x%x\n", Status));

   } else {

diff --git a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
index d8af0aa50f..f851f6881d 100644
--- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
+++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
@@ -49,6 +49,7 @@
   DxeServicesLib

   PerformanceLib

   HobLib

+  FspWrapperPlatformLib

 

 [Protocols]

   gEfiPciEnumerationCompleteProtocolGuid            ## CONSUMES

diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
index 2eb36252f3..6144ad7f41 100644
--- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
@@ -88,6 +88,15 @@ PeiFspMemoryInit (
   PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, TimeStampCounterStart, 0xD000);

   PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0xD07F);

   DEBUG ((DEBUG_INFO, "Total time spent executing FspMemoryInitApi: %d millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () - TimeStampCounterStart), 1000000)));

+

+  //

+  // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status

+  //

+  if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {

+    DEBUG((DEBUG_INFO, "FspMemoryInitApi requested reset 0x%x\n", Status));

+    CallFspWrapperResetSystem ((UINT32)Status);

+  }

+

   if (EFI_ERROR(Status)) {

     DEBUG ((DEBUG_ERROR, "ERROR - Failed to execute FspMemoryInitApi(), Status = %r\n", Status));

   }

diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
index 9bc720fe2d..7a65ad7f61 100644
--- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
@@ -94,14 +94,38 @@ S3EndOfPeiNotify(
   Status = CallFspNotifyPhase (&NotifyPhaseParams);

   DEBUG((DEBUG_INFO, "FSP S3NotifyPhase AfterPciEnumeration status: 0x%x\n", Status));

 

+  //

+  // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status

+  //

+  if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {

+    DEBUG((DEBUG_INFO, "FSP S3NotifyPhase AfterPciEnumeration requested reset 0x%x\n", Status));

+    CallFspWrapperResetSystem ((UINT32)Status);

+  }

+

   NotifyPhaseParams.Phase = EnumInitPhaseReadyToBoot;

   Status = CallFspNotifyPhase (&NotifyPhaseParams);

   DEBUG((DEBUG_INFO, "FSP S3NotifyPhase ReadyToBoot status: 0x%x\n", Status));

 

+  //

+  // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status

+  //

+  if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {

+    DEBUG((DEBUG_INFO, "FSP S3NotifyPhase ReadyToBoot requested reset 0x%x\n", Status));

+    CallFspWrapperResetSystem ((UINT32)Status);

+  }

+

   NotifyPhaseParams.Phase = EnumInitPhaseEndOfFirmware;

   Status = CallFspNotifyPhase (&NotifyPhaseParams);

   DEBUG((DEBUG_INFO, "FSP S3NotifyPhase EndOfFirmware status: 0x%x\n", Status));

 

+  //

+  // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status

+  //

+  if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {

+    DEBUG((DEBUG_INFO, "FSP S3NotifyPhase EndOfFirmware requested reset 0x%x\n", Status));

+    CallFspWrapperResetSystem ((UINT32)Status);

+  }

+

   return EFI_SUCCESS;

 }

 

@@ -229,6 +253,15 @@ PeiMemoryDiscoveredNotify (
   Status = CallFspSiliconInit ((VOID *)FspsUpdDataPtr);

   PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x907F);

   DEBUG ((DEBUG_INFO, "Total time spent executing FspSiliconInitApi: %d millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () - TimeStampCounterStart), 1000000)));

+

+  //

+  // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status

+  //

+  if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {

+    DEBUG((DEBUG_INFO, "FspSiliconInitApi requested reset 0x%x\n", Status));

+    CallFspWrapperResetSystem ((UINT32)Status);

+  }

+

   if (EFI_ERROR(Status)) {

     DEBUG ((DEBUG_ERROR, "ERROR - Failed to execute FspSiliconInitApi(), Status = %r\n", Status));

   }

diff --git a/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h b/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h
index 30dc8df5da..25f4eca797 100644
--- a/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h
+++ b/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h
@@ -70,4 +70,17 @@ GetS3MemoryInfo (
   OUT EFI_PHYSICAL_ADDRESS *S3PeiMemBase

   );

 

+/**

+  Perform platform related reset in FSP wrapper.

+

+  This function will reset the system with requested ResetType.

+

+  @param[in] FspStatusResetType  The type of reset the platform has to perform.

+**/

+VOID

+EFIAPI

+CallFspWrapperResetSystem (

+  IN UINT32    FspStatusResetType

+  );

+

 #endif

diff --git a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
index 9c1a84f12c..926ff58a2f 100644
--- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
+++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
@@ -80,4 +80,24 @@ GetS3MemoryInfo (
   )

 {

   return EFI_UNSUPPORTED;

-}
\ No newline at end of file
+}

+

+/**

+  Perform platform related reset in FSP wrapper.

+

+  This function will reset the system with requested ResetType.

+

+  @param[in] FspStatusResetType  The type of reset the platform has to perform.

+**/

+VOID

+EFIAPI

+CallFspWrapperResetSystem (

+  IN UINT32    FspStatusResetType

+  )

+{

+  //

+  // Perform reset according to the type.

+  //

+

+  CpuDeadLoop();

+}