Add ARM support

Add C inline assembly files for IA32 and X64 GCC builds.


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9113 6f19259b-4bc3-4df7-8a09-765794883524

1 files changed, 38 insertions, 0 deletions

diff --git a/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm b/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm
new file mode 100644
index 0000000000..83485e9d78
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------ 
+;
+; CpuBreakpoint() for ARM
+;
+; Copyright (c) 2006 - 2009, Intel Corporation<BR>
+; Portions copyright (c) 2008-2009 Apple Inc.<BR>
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+    EXPORT CpuBreakpoint
+
+  AREA Cpu_Breakpoint, CODE, READONLY
+
+;/**
+;  Generates a breakpoint on the CPU.
+;
+;  Generates a breakpoint on the CPU. The breakpoint must be implemented such
+;  that code can resume normal execution after the breakpoint.
+;
+;**/
+;VOID
+;EFIAPI
+;CpuBreakpoint (
+;  VOID
+;  );
+;
+CpuBreakpoint
+    swi   0xdbdbdb
+    bx    lr
+    
+  END