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authormdkinney <mdkinney@6f19259b-4bc3-4df7-8a09-765794883524>2008-11-24 08:30:58 +0000
committermdkinney <mdkinney@6f19259b-4bc3-4df7-8a09-765794883524>2008-11-24 08:30:58 +0000
commit9f4f2f0e15252004e06ca246300a2fe21b8bf0ae (patch)
tree3c018c475b91d09f68c9409f34def10d27bf73ad /MdePkg/Library/BaseLib/Ia32/EnableCache.asm
parent298f0688f7b28b6f2cc3d65ddf608f2f2cdbf3d5 (diff)
downloadedk2-platforms-9f4f2f0e15252004e06ca246300a2fe21b8bf0ae.tar.xz
Add EnableCache() and DisableCache() implementations for IA32 and X64 to the BaseLib
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6705 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Library/BaseLib/Ia32/EnableCache.asm')
-rw-r--r--MdePkg/Library/BaseLib/Ia32/EnableCache.asm45
1 files changed, 45 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableCache.asm b/MdePkg/Library/BaseLib/Ia32/EnableCache.asm
new file mode 100644
index 0000000000..e25a5bf44d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableCache.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableCache.Asm
+;
+; Abstract:
+;
+; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
+; the NW bit of CR0 to 0
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmEnableCache (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmEnableCache PROC
+ wbinvd
+ mov eax, cr0
+ btr eax, 29
+ btr eax, 30
+ mov cr0, eax
+ ret
+AsmEnableCache ENDP
+
+ END