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authorJordan Justen <jordan.l.justen@intel.com>2016-05-30 18:52:00 -0700
committerLiming Gao <liming.gao@intel.com>2016-06-28 09:49:29 +0800
commita91d8309afc89fc5e823a6b324cb956ded5be9af (patch)
tree307598bcd101b11a99d1e4cf61d9707bbbf42c97 /MdePkg/Library/BaseLib
parented1e7222d634ddc4cc55f7c5bdca308af37696c7 (diff)
downloadedk2-platforms-a91d8309afc89fc5e823a6b324cb956ded5be9af.tar.xz
MdePkg BaseLib: Convert X64/EnableCache.asm to NASM
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/EnableCache.asm to X64/EnableCache.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'MdePkg/Library/BaseLib')
-rw-r--r--MdePkg/Library/BaseLib/BaseLib.inf2
-rw-r--r--MdePkg/Library/BaseLib/X64/EnableCache.nasm43
2 files changed, 45 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index 84c493e67e..896e7ba521 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -439,6 +439,7 @@
X64/SetJump.asm
X64/SwitchStack.nasm
X64/SwitchStack.asm
+ X64/EnableCache.nasm
X64/EnableCache.asm
X64/DisableCache.asm
@@ -620,6 +621,7 @@
X64/CpuId.S | GCC
X64/CpuIdEx.nasm| GCC
X64/CpuIdEx.S | GCC
+ X64/EnableCache.nasm| GCC
X64/EnableCache.S | GCC
X64/DisableCache.S | GCC
X64/RdRand.S | GCC
diff --git a/MdePkg/Library/BaseLib/X64/EnableCache.nasm b/MdePkg/Library/BaseLib/X64/EnableCache.nasm
new file mode 100644
index 0000000000..3f2bd0343f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/X64/EnableCache.nasm
@@ -0,0 +1,43 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableCache.Asm
+;
+; Abstract:
+;
+; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
+; the NW bit of CR0 to 0
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ DEFAULT REL
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmEnableCache (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmEnableCache)
+ASM_PFX(AsmEnableCache):
+ wbinvd
+ mov rax, cr0
+ btr rax, 29
+ btr rax, 30
+ mov cr0, rax
+ ret
+