Add ARM support

Add C inline versions of the IA32 and X64 assembly functions.  

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9112 6f19259b-4bc3-4df7-8a09-765794883524

1 files changed, 193 insertions, 0 deletions

diff --git a/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c b/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c
new file mode 100644
index 0000000000..eeb16c3d29
--- /dev/null
+++ b/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c
@@ -0,0 +1,193 @@
+/** @file
+  GCC inline implementation of BaseSynchronizationLib processor specific functions.
+  
+  Copyright (c) 2006 - 2009, Intel Corporation<BR>
+  Portions copyright (c) 2008-2009 Apple Inc.<BR>
+  All rights reserved. This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+/**
+  Performs an atomic increment of an 32-bit unsigned integer.
+
+  Performs an atomic increment of the 32-bit unsigned integer specified by
+  Value and returns the incremented value. The increment operation must be
+  performed using MP safe mechanisms. The state of the return value is not
+  guaranteed to be MP safe.
+
+  @param  Value A pointer to the 32-bit value to increment.
+
+  @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InternalSyncIncrement (
+  IN      volatile UINT32    *Value
+  )
+{
+  UINT32  Result;
+
+  __asm__ __volatile__ (
+    "lock               \n\t"
+    "incl    %2         \n\t"
+    "movl    %2, %%eax      "
+    : "=a" (Result),          // %0
+      "=m" (*Value)           // %1
+    : "m"  (*Value)           // %2 
+    : "memory",
+      "cc"
+    );
+    
+  return Result;    
+
+}
+
+
+/**
+  Performs an atomic decrement of an 32-bit unsigned integer.
+
+  Performs an atomic decrement of the 32-bit unsigned integer specified by
+  Value and returns the decremented value. The decrement operation must be
+  performed using MP safe mechanisms. The state of the return value is not
+  guaranteed to be MP safe.
+
+  @param  Value A pointer to the 32-bit value to decrement.
+
+  @return The decremented value.
+
+**/
+UINT32
+EFIAPI
+InternalSyncDecrement (
+  IN      volatile UINT32       *Value
+  )
+{
+   UINT32  Result;
+  
+  __asm__ __volatile__ (
+    "lock               \n\t"
+    "decl    %2         \n\t"
+    "movl    %2, %%eax      "
+    : "=a" (Result),          // %0
+      "=m" (*Value)           // %1
+    : "m"  (*Value)           // %2 
+    : "memory",
+      "cc"
+    );
+    
+  return Result;
+}
+
+/**
+  Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+  Performs an atomic compare exchange operation on the 32-bit unsigned integer
+  specified by Value.  If Value is equal to CompareValue, then Value is set to
+  ExchangeValue and CompareValue is returned.  If Value is not equal to CompareValue,
+  then Value is returned.  The compare exchange operation must be performed using
+  MP safe mechanisms.
+
+
+  @param  Value         A pointer to the 32-bit value for the compare exchange
+                        operation.
+  @param  CompareValue  32-bit value used in compare operation.
+  @param  ExchangeValue 32-bit value used in exchange operation.
+
+  @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InternalSyncCompareExchange32 (
+  IN OUT volatile  UINT32           *Value,
+  IN      UINT32                    CompareValue,
+  IN      UINT32                    ExchangeValue
+  )
+{
+
+// GCC 4.1 and forward supports atomic builtins  
+#if ((__GNUC__ > 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 1)))
+
+  return __sync_val_compare_and_swap (Value, CompareValue, ExchangeValue);
+
+#else
+
+  __asm__ __volatile__ (
+    "                     \n\t"
+    "lock                 \n\t"
+    "cmpxchgl    %1, %2   \n\t"
+    : "=a" (CompareValue)     // %0
+    : "q"  (ExchangeValue),   // %1
+      "m"  (*Value),m           // %2
+      "0"  (CompareValue)     // %4 
+    : "memory",
+      "cc"
+    );
+
+    return CompareValue;
+
+#endif
+}
+
+/**
+  Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+  Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+  by Value.  If Value is equal to CompareValue, then Value is set to ExchangeValue and
+  CompareValue is returned.  If Value is not equal to CompareValue, then Value is returned.
+  The compare exchange operation must be performed using MP safe mechanisms.
+
+
+  @param  Value         A pointer to the 64-bit value for the compare exchange
+                        operation.
+  @param  CompareValue  64-bit value used in compare operation.
+  @param  ExchangeValue 64-bit value used in exchange operation.
+
+  @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InternalSyncCompareExchange64 (
+  IN OUT  volatile UINT64           *Value,
+  IN      UINT64                    CompareValue,
+  IN      UINT64                    ExchangeValue
+  )
+{
+// GCC 4.1 and forward supports atomic builtins  
+#if ((__GNUC__ > 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 1)))
+
+  return __sync_val_compare_and_swap (Value, CompareValue, ExchangeValue);
+
+#else
+
+  __asm__ __volatile__ (
+    "                       \n\t"
+    "push        %%ebx      \n\t" 
+    "movl        %2,%%ebx   \n\t"   
+    "lock                   \n\t"
+    "cmpxchg8b   (%1)       \n\t"
+    "pop         %%ebx      \n\t"
+    : "+A"  (CompareValue)                    // %0
+    : "S"   (Value),                          // %1
+      "r"   ((UINT32) ExchangeValue),         // %2
+      "c"   ((UINT32) (ExchangeValue >> 32))  // %3
+    : "memory",
+      "cc"
+    );
+  
+  return CompareValue;
+
+#endif
+}
+
+