OvmfPkg: split Include/OvmfPlatforms.h

Move platform specific macros to their own include files.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17432 6f19259b-4bc3-4df7-8a09-765794883524

3 files changed, 72 insertions, 22 deletions

diff --git a/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h b/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h
new file mode 100644
index 0000000000..893bca495a
--- /dev/null
+++ b/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h
@@ -0,0 +1,35 @@
+/** @file

+  Various register numbers and value bits based on the following publications:

+  - Intel(R) datasheet 290549-001

+  - Intel(R) datasheet 290562-001

+  - Intel(R) datasheet 297654-006

+  - Intel(R) datasheet 297738-017

+

+  Copyright (C) 2015, Red Hat, Inc.

+  Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>

+

+  This program and the accompanying materials are licensed and made available

+  under the terms and conditions of the BSD License which accompanies this

+  distribution.   The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT

+  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+**/

+

+#ifndef __I440FX_PIIX4_H__

+#define __I440FX_PIIX4_H__

+

+#include <Library/PciLib.h>

+

+//

+// Host Bridge Device ID (DID) value for I440FX

+//

+#define INTEL_82441_DEVICE_ID 0x1237

+

+//

+// B/D/F/Type: 0/1/3/PCI

+//

+#define POWER_MGMT_REGISTER_PIIX4(Offset) PCI_LIB_ADDRESS (0, 1, 3, (Offset))

+

+#endif

diff --git a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
new file mode 100644
index 0000000000..91fb6e1d49
--- /dev/null
+++ b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
@@ -0,0 +1,34 @@
+/** @file

+  Various register numbers and value bits based on the following publications:

+  - Intel(R) datasheet 316966-002

+  - Intel(R) datasheet 316972-004

+

+  Copyright (C) 2015, Red Hat, Inc.

+  Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>

+

+  This program and the accompanying materials are licensed and made available

+  under the terms and conditions of the BSD License which accompanies this

+  distribution.   The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT

+  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+**/

+

+#ifndef __Q35_MCH_ICH9_H__

+#define __Q35_MCH_ICH9_H__

+

+#include <Library/PciLib.h>

+

+//

+// Host Bridge Device ID (DID) value for Q35/MCH

+//

+#define INTEL_Q35_MCH_DEVICE_ID 0x29C0

+

+//

+// B/D/F/Type: 0/0x1f/0/PCI

+//

+#define POWER_MGMT_REGISTER_Q35(Offset) \

+  PCI_LIB_ADDRESS (0, 0x1f, 0, (Offset))

+

+#endif

diff --git a/OvmfPkg/Include/OvmfPlatforms.h b/OvmfPkg/Include/OvmfPlatforms.h
index cf6e62435c..19f0adb897 100644
--- a/OvmfPkg/Include/OvmfPlatforms.h
+++ b/OvmfPkg/Include/OvmfPlatforms.h
@@ -1,6 +1,7 @@
 /** @file

   OVMF Platform definitions

 

+  Copyright (C) 2015, Red Hat, Inc.

   Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>

 

   This program and the accompanying materials are licensed and made

@@ -17,12 +18,8 @@
 

 #include <Library/PciLib.h>

 #include <IndustryStandard/Pci22.h>

-

-//

-// Host Bridge Device ID (DID) values for PIIX4 and Q35/MCH

-//

-#define INTEL_82441_DEVICE_ID     0x1237  // PIIX4

-#define INTEL_Q35_MCH_DEVICE_ID   0x29C0  // Q35

+#include <IndustryStandard/Q35MchIch9.h>

+#include <IndustryStandard/I440FxPiix4.h>

 

 //

 // OVMF Host Bridge DID Address

@@ -30,20 +27,4 @@
 #define OVMF_HOSTBRIDGE_DID \

   PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)

 

-//

-// Power Management Device and Function numbers for PIIX4 and Q35/MCH

-//

-#define OVMF_PM_DEVICE_PIIX4  0x01

-#define OVMF_PM_FUNC_PIIX4    0x03

-#define OVMF_PM_DEVICE_Q35    0x1f

-#define OVMF_PM_FUNC_Q35      0x00

-

-//

-// Power Management Register access for PIIX4 and Q35/MCH

-//

-#define POWER_MGMT_REGISTER_PIIX4(Offset) \

-  PCI_LIB_ADDRESS (0, OVMF_PM_DEVICE_PIIX4, OVMF_PM_FUNC_PIIX4, (Offset))

-#define POWER_MGMT_REGISTER_Q35(Offset) \

-  PCI_LIB_ADDRESS (0, OVMF_PM_DEVICE_Q35, OVMF_PM_FUNC_Q35, (Offset))

-

 #endif