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| author | Michael Kinney <michael.d.kinney@intel.com> | 2016-03-08 14:06:11 -0800 |
|---|---|---|
| committer | Hao Wu <hao.a.wu@intel.com> | 2016-03-14 08:51:10 +0800 |
| commit | e6e1efcea48ba1aa69a510a00fd5373253d72e5c (patch) | |
| tree | 3bea18f132a5022801b0c9e329fa1a670c2f306a /OvmfPkg/XenPvBlkDxe | |
| parent | cb82e41ee4ef3e4005b788b8b25e4f970b7cf05e (diff) | |
| download | edk2-platforms-e6e1efcea48ba1aa69a510a00fd5373253d72e5c.tar.xz | |
UefiCpuPkg/Include: Add P6 MSR include file
Add P6 MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-19.
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
(cherry picked from commit 8e6bff887588c956f9b646e7ad78c173fa50fc0a)
Diffstat (limited to 'OvmfPkg/XenPvBlkDxe')
0 files changed, 0 insertions, 0 deletions