diff options
| author | Leif Lindholm <leif.lindholm@linaro.org> | 2017-05-03 12:30:46 +0100 |
|---|---|---|
| committer | Leif Lindholm <leif.lindholm@linaro.org> | 2017-07-14 22:36:50 +0100 |
| commit | d61262ca0818842c1c3a32d3a4deb8217aee8580 (patch) | |
| tree | 1022985e88897b7bf0065905b5cb26f9a71fff25 /Platform/AMD | |
| parent | 455396bda43fbf008811fdd5f549ae60c1cce877 (diff) | |
| download | edk2-platforms-d61262ca0818842c1c3a32d3a4deb8217aee8580.tar.xz | |
Platform,Silicon: import AMD Styx SoC support and platforms
Common files for AMD Overdrive, SoftIron Overdrive 1000
and LeMaker Cello, as well as actual platform support.
Imported from commit efd798c1eb of
https://git.linaro.org/uefi/OpenPlatformPkg.git
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Platform/AMD')
| -rw-r--r-- | Platform/AMD/License.txt | 25 | ||||
| -rw-r--r-- | Platform/AMD/OverdriveBoard/FdtBlob/styx-overdrive.dtb | bin | 0 -> 9357 bytes | |||
| -rw-r--r-- | Platform/AMD/OverdriveBoard/FdtBlob/styx-overdrive.dts | 510 | ||||
| -rw-r--r-- | Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 762 | ||||
| -rw-r--r-- | Platform/AMD/OverdriveBoard/OverdriveBoard.fdf | 415 |
5 files changed, 1712 insertions, 0 deletions
diff --git a/Platform/AMD/License.txt b/Platform/AMD/License.txt new file mode 100644 index 0000000000..ff85835d63 --- /dev/null +++ b/Platform/AMD/License.txt @@ -0,0 +1,25 @@ +Copyright (c) 2013 - 2016, AMD Inc. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+1. Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in
+ the documentation and/or other materials provided with the
+ distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
diff --git a/Platform/AMD/OverdriveBoard/FdtBlob/styx-overdrive.dtb b/Platform/AMD/OverdriveBoard/FdtBlob/styx-overdrive.dtb Binary files differnew file mode 100644 index 0000000000..c8e5fd980b --- /dev/null +++ b/Platform/AMD/OverdriveBoard/FdtBlob/styx-overdrive.dtb diff --git a/Platform/AMD/OverdriveBoard/FdtBlob/styx-overdrive.dts b/Platform/AMD/OverdriveBoard/FdtBlob/styx-overdrive.dts new file mode 100644 index 0000000000..4039f66600 --- /dev/null +++ b/Platform/AMD/OverdriveBoard/FdtBlob/styx-overdrive.dts @@ -0,0 +1,510 @@ +/*
+ * DTS file for AMD Seattle (Rev.B) Overdrive Development Board
+ *
+ * Copyright 2015 - 2016 ADVANCED MICRO DEVICES, INC. All Rights Reserved.
+ *
+ * This program and the accompanying materials are licensed and made available
+ * under the terms and conditions of the BSD License which accompanies this
+ * distribution. The full text of the license may be found at
+ * http://opensource.org/licenses/bsd-license.php
+ *
+ * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+ * IMPLIED.
+ *
+ */
+
+/dts-v1/;
+
+/ {
+ model = "AMD Seattle (Rev.B) Development Board (Overdrive)";
+ compatible = "amd,seattle-overdrive", "amd,seattle";
+ interrupt-parent = <0x1>;
+ #address-cells = <0x2>;
+ #size-cells = <0x2>;
+
+ interrupt-controller@e1101000 {
+ compatible = "arm,gic-400", "arm,cortex-a15-gic";
+ interrupt-controller;
+ #interrupt-cells = <0x3>;
+ #address-cells = <0x2>;
+ #size-cells = <0x2>;
+ reg = <0x0 0xe1110000 0x0 0x1000>,
+ <0x0 0xe112f000 0x0 0x2000>,
+ <0x0 0xe1140000 0x0 0x2000>,
+ <0x0 0xe1160000 0x0 0x2000>;
+ interrupts = <0x1 0x9 0xf04>;
+ ranges = <0x0 0x0 0x0 0xe1100000 0x0 0x100000>;
+ linux,phandle = <0x1>;
+ phandle = <0x1>;
+
+ v2m@e0080000 {
+ compatible = "arm,gic-v2m-frame";
+ msi-controller;
+ reg = <0x0 0x80000 0x0 0x1000>;
+ linux,phandle = <0x4>;
+ phandle = <0x4>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <0x1 0xd 0xff04>,
+ <0x1 0xe 0xff04>,
+ <0x1 0xb 0xff04>,
+ <0x1 0xa 0xff04>;
+ };
+
+ smb {
+ compatible = "simple-bus";
+ #address-cells = <0x2>;
+ #size-cells = <0x2>;
+ ranges;
+ /*
+ * dma-ranges is 40-bit address space containing:
+ * - GICv2m MSI register is at 0xe0080000
+ * - DRAM range [0x8000000000 to 0xffffffffff]
+ */
+ dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
+
+ clk100mhz_0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "adl3clk_100mhz";
+ };
+
+ clk375mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <375000000>;
+ clock-output-names = "ccpclk_375mhz";
+ };
+
+ clk333mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <333000000>;
+ clock-output-names = "sataclk_333mhz";
+ linux,phandle = <0x2>;
+ phandle = <0x2>;
+ };
+
+ clk500mhz_0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <500000000>;
+ clock-output-names = "pcieclk_500mhz";
+ };
+
+ clk500mhz_1 {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <500000000>;
+ clock-output-names = "dmaclk_500mhz";
+ };
+
+ clk250mhz_4 {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <250000000>;
+ clock-output-names = "miscclk_250mhz";
+ linux,phandle = <0xd>;
+ phandle = <0xd>;
+ };
+
+ clk100mhz_1 {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "uartspiclk_100mhz";
+ linux,phandle = <0x3>;
+ phandle = <0x3>;
+ };
+
+ sata0_smmu: smmu@e0200000 {
+ compatible = "arm,mmu-401";
+ reg = <0 0xe0200000 0 0x10000>;
+ #global-interrupts = <1>;
+ interrupts = /* Uses combined intr for both
+ * global and context
+ */
+ <0 332 4>,
+ <0 332 4>;
+ #iommu-cells = <2>;
+ dma-coherent;
+ };
+
+ sata1_smmu: smmu@e0c00000 {
+ compatible = "arm,mmu-401";
+ reg = <0 0xe0c00000 0 0x10000>;
+ #global-interrupts = <1>;
+ interrupts = /* Uses combined intr for both
+ * global and context
+ */
+ <0 331 4>,
+ <0 331 4>;
+ #iommu-cells = <2>;
+ dma-coherent;
+ };
+
+ sata@e0300000 {
+ compatible = "snps,dwc-ahci";
+ reg = <0x0 0xe0300000 0x0 0xf0000>;
+ interrupts = <0x0 0x163 0x4>;
+ clocks = <0x2>;
+ dma-coherent;
+ iommus = <&sata0_smmu 0x00 0x1f>; /* 0-31 */
+ };
+
+ sata@e0d00000 {
+ status = "disabled";
+ compatible = "snps,dwc-ahci";
+ reg = <0x0 0xe0d00000 0x0 0xf0000>;
+ interrupts = <0x0 0x162 0x4>;
+ clocks = <0x2>;
+ dma-coherent;
+ iommus = <&sata1_smmu 0x00 0x1f>; /* 0-31 */
+ };
+
+ i2c@e1000000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xe1000000 0x0 0x1000>;
+ interrupts = <0x0 0x165 0x4>;
+ clocks = <0xd>;
+ };
+
+ i2c@e0050000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xe0050000 0x0 0x1000>;
+ interrupts = <0x0 0x154 0x4>;
+ clocks = <0xd>;
+ };
+
+ serial@e1010000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0 0xe1010000 0x0 0x1000>;
+ interrupts = <0x0 0x148 0x4>;
+ clocks = <0x3 0x3>;
+ clock-names = "uartclk", "apb_pclk";
+ };
+
+ ssp@e1020000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0x0 0xe1020000 0x0 0x1000>;
+ spi-controller;
+ interrupts = <0x0 0x14a 0x4>;
+ clocks = <0x3>;
+ clock-names = "apb_pclk";
+ };
+
+ ssp@e1030000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0x0 0xe1030000 0x0 0x1000>;
+ spi-controller;
+ interrupts = <0x0 0x149 0x4>;
+ clocks = <0x3>;
+ clock-names = "apb_pclk";
+ num-cs = <0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ sdcard@0 {
+ compatible = "mmc-spi-slot";
+ reg = <0x0>;
+ spi-max-frequency = <20000000>;
+ voltage-ranges = <3200 3400>;
+ pl022,hierarchy = <0x0>;
+ pl022,interface = <0x0>;
+ pl022,com-mode = <0x0>;
+ pl022,rx-level-trig = <0x0>;
+ pl022,tx-level-trig = <0x0>;
+ };
+ };
+
+ gpio@e1050000 { /* [0 : 7] */
+ compatible = "arm,pl061", "arm,primecell";
+ #gpio-cells = <0x2>;
+ reg = <0x0 0xe1050000 0x0 0x1000>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <0x2>;
+ interrupts = <0x0 0x166 0x4>;
+ clocks = <0x3>;
+ clock-names = "apb_pclk";
+ };
+
+ gpio@e0020000 { /* [8 : 15] */
+ status = "disabled";
+ compatible = "arm,pl061", "arm,primecell";
+ #gpio-cells = <0x2>;
+ reg = <0x0 0xe0020000 0x0 0x1000>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <0x2>;
+ interrupts = <0x0 0x16e 0x4>;
+ clocks = <0x3>;
+ clock-names = "apb_pclk";
+ };
+
+ gpio@e0030000 { /* [16 : 23] */
+ status = "disabled";
+ compatible = "arm,pl061", "arm,primecell";
+ #gpio-cells = <0x2>;
+ reg = <0x0 0xe0030000 0x0 0x1000>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <0x2>;
+ interrupts = <0x0 0x16d 0x4>;
+ clocks = <0x3>;
+ clock-names = "apb_pclk";
+ };
+
+ gpio@e0080000 { /* [24] */
+ compatible = "arm,pl061", "arm,primecell";
+ #gpio-cells = <0x2>;
+ reg = <0x0 0xe0080000 0x0 0x1000>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <0x2>;
+ interrupts = <0x0 0x169 0x4>;
+ clocks = <0x3>;
+ clock-names = "apb_pclk";
+ };
+
+ ccp: ccp@e0100000 {
+ compatible = "amd,ccp-seattle-v1a";
+ reg = <0x0 0xe0100000 0x0 0x10000>;
+ interrupts = <0x0 0x3 0x4>;
+ dma-coherent;
+ amd,zlib-support = <0x1>;
+ };
+
+ pcie: pcie@f0000000 {
+ compatible = "pci-host-ecam-generic";
+ #address-cells = <0x3>;
+ #size-cells = <0x2>;
+ #interrupt-cells = <0x1>;
+ iommu-map = <0x0 &pcie_smmu 0x0 0x10000>;
+ device_type = "pci";
+ bus-range = <0x0 0x7f>;
+ msi-parent = <0x4>;
+ reg = <0x0 0xf0000000 0x0 0x10000000>;
+ interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
+ interrupt-map = <0x1100 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x120 0x1>,
+ <0x1100 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x121 0x1>,
+ <0x1100 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x122 0x1>,
+ <0x1100 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x123 0x1>,
+
+ <0x1200 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x124 0x1>,
+ <0x1200 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x125 0x1>,
+ <0x1200 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x126 0x1>,
+ <0x1200 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x127 0x1>,
+
+ <0x1300 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x128 0x1>,
+ <0x1300 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x129 0x1>,
+ <0x1300 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x12a 0x1>,
+ <0x1300 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x12b 0x1>;
+ dma-coherent;
+ dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>;
+ ranges = <0x1000000 0x0 0x00000000 0x0 0xefff0000 0x00 0x00010000>, /* I/O Memory (size=64K) */
+ <0x2000000 0x0 0x40000000 0x0 0x40000000 0x00 0x80000000>, /* 32-bit MMIO (size=2G) */
+ <0x3000000 0x1 0x00000000 0x1 0x00000000 0x7f 0x00000000>; /* 64-bit MMIO (size= 124G) */
+ };
+
+ pcie_smmu: smmu@e0a00000 {
+ compatible = "arm,mmu-401";
+ reg = <0 0xe0a00000 0 0x10000>;
+ #global-interrupts = <1>;
+ interrupts = /* Uses combined intr for both
+ * global and context
+ */
+ <0 333 4>,
+ <0 333 4>;
+ #iommu-cells = <1>;
+ dma-coherent;
+ };
+
+ ccn@0xe8000000 {
+ compatible = "arm,ccn-504";
+ reg = <0x0 0xe8000000 0x0 0x1000000>;
+ interrupts = <0x0 0x17c 0x4>;
+ };
+
+ gwdt@e0bb0000 {
+ status = "disabled";
+ compatible = "arm,sbsa-gwdt";
+ reg = <0x0 0xe0bb0000 0x0 0x10000
+ 0x0 0xe0bc0000 0x0 0x10000>;
+ reg-names = "refresh", "control";
+ interrupts = <0x0 0x151 0x4>;
+ interrupt-names = "ws0";
+ };
+
+ kcs@e0010000 {
+ status = "disabled";
+ compatible = "ipmi-kcs";
+ device_type = "ipmi";
+ reg = <0x0 0xe0010000 0 0x8>;
+ interrupts = <0 389 4>;
+ interrupt-names = "ipmi_kcs";
+ reg-size = <1>;
+ reg-spacing = <4>;
+ };
+
+ clk250mhz_0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <250000000>;
+ clock-output-names = "xgmacclk0_dma_250mhz";
+ linux,phandle = <0x5>;
+ phandle = <0x5>;
+ };
+
+ clk250mhz_1 {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <250000000>;
+ clock-output-names = "xgmacclk0_ptp_250mhz";
+ linux,phandle = <0x6>;
+ phandle = <0x6>;
+ };
+
+ clk250mhz_2 {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <250000000>;
+ clock-output-names = "xgmacclk1_dma_250mhz";
+ linux,phandle = <0x7>;
+ phandle = <0x7>;
+ };
+
+ clk250mhz_3 {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <250000000>;
+ clock-output-names = "xgmacclk1_ptp_250mhz";
+ linux,phandle = <0x8>;
+ phandle = <0x8>;
+ };
+
+ phy@e1240800 {
+ status = "disabled";
+ compatible = "amd,xgbe-phy-seattle-v1a";
+ reg = <0x0 0xe1240800 0x0 0x0400>, /* SERDES RX/TX0 */
+ <0x0 0xe1250000 0x0 0x0060>, /* SERDES IR 1/2 */
+ <0x0 0xe12500f8 0x0 0x0004>; /* SERDES IR 2/2 */
+ interrupts = <0x0 0x143 0x4>;
+ amd,speed-set = <0x0>;
+ amd,serdes-blwc = <0x1 0x1 0x0>;
+ amd,serdes-cdr-rate = <0x2 0x2 0x7>;
+ amd,serdes-pq-skew = <0xa 0xa 0x12>;
+ amd,serdes-tx-amp = <0xf 0xf 0xa>;
+ amd,serdes-dfe-tap-config = <0x3 0x3 0x1>;
+ amd,serdes-dfe-tap-enable = <0x0 0x0 0x7f>;
+ linux,phandle = <0x9>;
+ phandle = <0x9>;
+ };
+
+ phy@e1240c00 {
+ status = "disabled";
+ compatible = "amd,xgbe-phy-seattle-v1a";
+ reg = <0x0 0xe1240c00 0x0 0x0400>, /* SERDES RX/TX0 */
+ <0x0 0xe1250080 0x0 0x0060>, /* SERDES IR 1/2 */
+ <0x0 0xe12500fc 0x0 0x0004>; /* SERDES IR 2/2 */
+ interrupts = <0x0 0x142 0x4>;
+ amd,speed-set = <0x0>;
+ amd,serdes-blwc = <0x1 0x1 0x0>;
+ amd,serdes-cdr-rate = <0x2 0x2 0x7>;
+ amd,serdes-pq-skew = <0xa 0xa 0x12>;
+ amd,serdes-tx-amp = <0xf 0xf 0xa>;
+ amd,serdes-dfe-tap-config = <0x3 0x3 0x1>;
+ amd,serdes-dfe-tap-enable = <0x0 0x0 0x7f>;
+ linux,phandle = <0xa>;
+ phandle = <0xa>;
+ };
+
+ xgmac0_smmu: smmu@e0600000 {
+ compatible = "arm,mmu-401";
+ reg = <0 0xe0600000 0 0x10000>;
+ #global-interrupts = <1>;
+ interrupts = /* Uses combined intr for both
+ * global and context
+ */
+ <0 336 4>,
+ <0 336 4>;
+ #iommu-cells = <2>;
+ dma-coherent;
+ };
+
+ xgmac1_smmu: smmu@e0800000 {
+ compatible = "arm,mmu-401";
+ reg = <0 0xe0800000 0 0x10000>;
+ #global-interrupts = <1>;
+ interrupts = /* Uses combined intr for both
+ * global and context
+ */
+ <0 335 4>,
+ <0 335 4>;
+ #iommu-cells = <2>;
+ dma-coherent;
+ };
+
+ xgmac@e0700000 {
+ status = "disabled";
+ compatible = "amd,xgbe-seattle-v1a";
+ reg = <0x0 0xe0700000 0x0 0x80000 0x0 0xe0780000 0x0 0x80000>;
+ interrupts = <0x0 0x145 0x4>,
+ <0x0 0x15a 0x1>,
+ <0x0 0x15b 0x1>,
+ <0x0 0x15c 0x1>,
+ <0x0 0x15d 0x1>;
+ amd,per-channel-interrupt;
+ mac-address = [02 a1 a2 a3 a4 a5];
+ clocks = <0x5 0x6>;
+ clock-names = "dma_clk", "ptp_clk";
+ phy-handle = <0x9>;
+ phy-mode = "xgmii";
+ dma-coherent;
+ iommus = <&xgmac0_smmu 0x00 0x1f>; /* 0-31 */
+ linux,phandle = <0xb>;
+ phandle = <0xb>;
+ };
+
+ xgmac@e0900000 {
+ status = "disabled";
+ compatible = "amd,xgbe-seattle-v1a";
+ reg = <0x0 0xe0900000 0x0 0x80000 0x0 0xe0980000 0x0 0x80000>;
+ interrupts = <0x0 0x144 0x4>,
+ <0x0 0x155 0x1>,
+ <0x0 0x156 0x1>,
+ <0x0 0x157 0x1>,
+ <0x0 0x158 0x1>;
+ amd,per-channel-interrupt;
+ mac-address = [02 b1 b2 b3 b4 b5];
+ clocks = <0x7 0x8>;
+ clock-names = "dma_clk", "ptp_clk";
+ phy-handle = <0xa>;
+ phy-mode = "xgmii";
+ dma-coherent;
+ iommus = <&xgmac1_smmu 0x00 0x1f>; /* 0-31 */
+ linux,phandle = <0xc>;
+ phandle = <0xc>;
+ };
+ };
+
+ chosen {
+ stdout-path = "/smb/serial@e1010000";
+ /* Note:
+ * Linux support for pci-probe-only DT is not
+ * stable. Disable this for now and let Linux
+ * take care of the resource assignment.
+ */
+ // linux,pci-probe-only;
+ };
+
+ psci {
+ compatible = "arm,psci-0.2", "arm,psci";
+ method = "smc";
+ };
+};
diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc new file mode 100644 index 0000000000..f256ffb97a --- /dev/null +++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc @@ -0,0 +1,762 @@ +#
+# Copyright (c) 2014 - 2016, AMD Incorporated. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made
+# available under the terms and conditions of the BSD License which
+# accompanies this distribution. The full text of the license may
+# be found at http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+
+DEFINE DO_XGBE = 1
+DEFINE NUM_CORES = 8
+DEFINE DO_PSCI = 1
+DEFINE DO_ISCP = 1
+DEFINE DO_KCS = 1
+DEFINE DO_FLASHER = FALSE
+
+ PLATFORM_NAME = Overdrive
+ PLATFORM_GUID = B2296C02-9DA1-4CD1-BD48-4D4F0F1276EB
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x00010005
+ OUTPUT_DIRECTORY = Build/Overdrive
+ SUPPORTED_ARCHITECTURES = AARCH64
+ BUILD_TARGETS = DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
+
+################################################################################
+#
+# Library Class section - list of all Library Classes needed by this Platform.
+#
+################################################################################
+[LibraryClasses.common]
+!if $(TARGET) == RELEASE
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+ UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
+!endif
+ DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+
+ BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+ SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+ IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+ PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+
+ UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+ UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+ UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+ DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+ UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
+ HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+ UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
+
+ UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+
+ #
+ # Allow dynamic PCDs
+ #
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+ PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
+
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf
+
+ # Networking Requirements
+ NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
+ DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf
+ UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
+ IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf
+
+ # ARM Architectural Libraries
+ CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
+ DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
+ CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf
+ ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
+ DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
+ ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf
+ ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf
+ ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
+ ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
+ PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
+
+ ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
+ ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
+ ArmPlatformLib|Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf
+ TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
+ UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
+
+ # ARM PL011 UART Driver
+ PL011UartLib|ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf
+ SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
+
+ #
+ # PCI support
+ #
+ PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
+ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+ PciHostBridgeLib|Silicon/AMD/Styx/Library/AmdStyxPciHostBridgeLib/AmdStyxPciHostBridgeLib.inf
+
+ #
+ # Styx specific libraries
+ #
+ AmdSataInit|Silicon/AMD/Styx/AmdModulePkg/Library/AmdSataInitLib/AmdSataInitLib.inf
+ AmdStyxAcpiLib|Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
+ ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf
+ RealTimeClockLib|Silicon/AMD/Styx/Library/RealTimeClockLib/RealTimeClockLib.inf
+
+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+ UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
+ PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+ BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
+ CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
+
+ #
+ # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window
+ # in the debugger will show load and unload commands for symbols. You can cut and paste this
+ # into the command window to load symbols. We should be able to use a script to do this, but
+ # the version of RVD I have does not support scripts accessing system memory.
+ #
+ #PeCoffExtraActionLib|ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
+ PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
+ #PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
+
+ DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
+ DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf
+
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+ FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+ FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+
+[LibraryClasses.common.SEC]
+ HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
+ PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ ArmPlatformLib|Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf
+
+ ArmPlatformSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf
+
+ DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf
+ DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf
+
+ # Trustzone Support
+ ArmTrustedMonitorLib|ArmPlatformPkg/Library/ArmTrustedMonitorLibNull/ArmTrustedMonitorLibNull.inf
+ ArmGicArchLib|ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf
+
+[LibraryClasses.common.PEIM, LibraryClasses.common.SEC]
+ MemoryInitPeiLib|Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+
+[LibraryClasses.common.PEI_CORE]
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+ PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
+ HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+ PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
+ PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
+ OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
+
+ PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+
+[LibraryClasses.common.PEIM]
+ PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
+ HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+ PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
+ PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
+ OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+ PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
+
+ PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+
+[LibraryClasses.common.DXE_CORE]
+ HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
+ MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
+ DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+ ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf
+
+[LibraryClasses.common.DXE_DRIVER]
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+ SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ NonDiscoverableDeviceRegistrationLib|MdeModulePkg/Library/NonDiscoverableDeviceRegistrationLib/NonDiscoverableDeviceRegistrationLib.inf
+
+[LibraryClasses.common.DXE_RUNTIME_DRIVER]
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+
+[LibraryClasses.common.UEFI_APPLICATION]
+ UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+
+[LibraryClasses.common.UEFI_DRIVER]
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+ UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
+ ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+
+[LibraryClasses.ARM]
+ #
+ # It is not possible to prevent the ARM compiler for generic intrinsic functions.
+ # This library provides the instrinsic functions generate by a given compiler.
+ # [LibraryClasses.ARM] and NULL mean link this library into all ARM images.
+ #
+ NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
+
+[LibraryClasses.AARCH64]
+ NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
+ NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
+
+###################################################################################################
+# BuildOptions Section - Define the module specific tool chain flags that should be used as
+# the default flags for a module. These flags are appended to any
+# standard flags that are defined by the build process.
+###################################################################################################
+
+[BuildOptions]
+ RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+ GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+
+ *_*_*_ASL_FLAGS = -tc -li -l -so
+ *_*_*_ASLPP_FLAGS = $(ARCHCC_FLAGS)
+ *_*_*_ASLCC_FLAGS = $(ARCHCC_FLAGS)
+
+ GCC:*_*_AARCH64_ARCHCC_FLAGS = -DDO_XGBE=$(DO_XGBE) -DDO_KCS=$(DO_KCS) -DNUM_CORES=$(NUM_CORES) -DARM_CPU_AARCH64
+ GCC:*_*_AARCH64_PP_FLAGS = -DDO_XGBE=$(DO_XGBE) -DDO_KCS=$(DO_KCS) -DNUM_CORES=$(NUM_CORES) -DARM_CPU_AARCH64
+
+ GCC:*_*_AARCH64_PLATFORM_FLAGS = -I$(BIN_DIR)/Silicon/AMD/Styx/AcpiTables/AcpiAml/OUTPUT
+
+[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
+ GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000
+
+[BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION]
+ GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x1000
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFeatureFlag.common]
+ # All pages are cached by default
+ gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
+
+ # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
+ gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
+
+ gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob|TRUE
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
+
+ ## If TRUE, Graphics Output Protocol will be installed on virtual handle
+ ## created by ConsplitterDxe. It could be set FALSE to save size.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE
+ gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport|FALSE
+
+[PcdsFixedAtBuild.common]
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000
+ gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000
+ gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF
+ gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1
+ gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
+ gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320
+
+ # DEBUG_ASSERT_ENABLED 0x01
+ # DEBUG_PRINT_ENABLED 0x02
+ # DEBUG_CODE_ENABLED 0x04
+ # CLEAR_MEMORY_ENABLED 0x08
+ # ASSERT_BREAKPOINT_ENABLED 0x10
+ # ASSERT_DEADLOOP_ENABLED 0x20
+!if $(TARGET) == RELEASE
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x21
+!else
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f
+!endif
+
+ # DEBUG_INIT 0x00000001 // Initialization
+ # DEBUG_WARN 0x00000002 // Warnings
+ # DEBUG_LOAD 0x00000004 // Load events
+ # DEBUG_FS 0x00000008 // EFI File system
+ # DEBUG_POOL 0x00000010 // Alloc & Free's
+ # DEBUG_PAGE 0x00000020 // Alloc & Free's
+ # DEBUG_INFO 0x00000040 // Verbose
+ # DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers
+ # DEBUG_VARIABLE 0x00000100 // Variable
+ # DEBUG_BM 0x00000400 // Boot Manager
+ # DEBUG_BLKIO 0x00001000 // BlkIo Driver
+ # DEBUG_NET 0x00004000 // SNI Driver
+ # DEBUG_UNDI 0x00010000 // UNDI Driver
+ # DEBUG_LOADFILE 0x00020000 // UNDI Driver
+ # DEBUG_EVENT 0x00080000 // Event messages
+ # DEBUG_GCD 0x00100000 // Global Coherency Database changes
+ # DEBUG_CACHE 0x00200000 // Memory range cachability changes
+ # DEBUG_ERROR 0x80000000 // Error
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F
+
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
+
+ #
+ # Optional feature to help prevent EFI memory map fragments
+ # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob
+ # Values are in EFI Pages (4K). DXE Core will make sure that
+ # at least this much of each type of memory can be allocated
+ # from a single memory range. This way you only end up with
+ # maximum of two fragements for each type in the memory map
+ # (the memory used, and the free memory that was prereserved
+ # but not used).
+ #
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|1000
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|1000
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|12000
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"AMD Seattle"
+
+ # Number of configured cores
+ gArmPlatformTokenSpaceGuid.PcdCoreCount|$(NUM_CORES)
+
+ # Stacks for MPCores in Normal World
+ gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x8001680000
+ gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000
+ gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x800
+
+ # Declare system memory base
+ gArmTokenSpaceGuid.PcdSystemMemoryBase|0x8000000000
+
+ # Size of the region used by UEFI in permanent memory (Reserved 64MB)
+ gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
+
+ # 40 bits of VA space is sufficient to support up to 512 GB of RAM in the
+ # range 0x80_0000_0000 - 0xFF_FFFF_FFFF (all platform and PCI MMIO is below
+ # that)
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40
+
+ #
+ # ARM PrimeCell
+ #
+
+ ## PL011 - Serial Terminal (Atlas UART)
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x0E1010000
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
+ # serial port is clocked at 100MHz
+ gArmPlatformTokenSpaceGuid.PL011UartClkInHz|100000000
+ gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
+
+ gAmdStyxTokenSpaceGuid.PcdSerialDbgRegisterBase|0x0E1010000
+ gAmdStyxTokenSpaceGuid.PcdUartDbgBaudRate|115200
+
+ #
+ # ARM General Interrupt Controller
+ #
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0xE1110000
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xE112F000
+
+ #
+ # AMD's B1 based Overdrive has 14 SATA ports across 2 controllers. However,
+ # it appears that Softiron's Overdrive 3000, which is also B1 based, does
+ # not have the second SATA controller enabled, and any attempts to use it
+ # will crash the firmware. So use the first controller only.
+ #
+ gAmdStyxTokenSpaceGuid.PcdSata0PortCount|8
+ gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xffff
+
+ # PCIe Support
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000
+
+ gArmTokenSpaceGuid.PcdPciBusMin|0x0
+ gArmTokenSpaceGuid.PcdPciBusMax|0x7F
+
+ gArmTokenSpaceGuid.PcdPciIoBase|0x1000
+ gArmTokenSpaceGuid.PcdPciIoSize|0xF000
+ gArmTokenSpaceGuid.PcdPciIoTranslation|0xEFFF0000
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16
+
+ gArmTokenSpaceGuid.PcdPciMmio32Base|0x40000000
+ gArmTokenSpaceGuid.PcdPciMmio32Size|0x80000000
+ gArmTokenSpaceGuid.PcdPciMmio32Translation|0x0
+
+ gArmTokenSpaceGuid.PcdPciMmio64Base|0x100000000
+ gArmTokenSpaceGuid.PcdPciMmio64Size|0x7F00000000
+ gArmTokenSpaceGuid.PcdPciMmio64Translation|0x0
+
+ ## Use PCI emulation for ATA PassThru
+ # gEfiMdeModulePkgTokenSpaceGuid.PcdAtaPassThruPciEmulation|TRUE
+
+ ## ACPI (no tables < 4GB)
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"AMDINC"
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x20454c5454414553 # SEATTLE
+
+ #
+ # Enable strict image permissions for all images. (This applies
+ # only to images that were built with >= 4 KB section alignment.)
+ #
+ gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy|0x3
+
+ #
+ # Enable NX memory protection for all non-code regions, including OEM and OS
+ # reserved ones, with the exception of LoaderData regions, of which OS loaders
+ # (i.e., GRUB) may assume that its contents are executable.
+ #
+ gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy|0xC000000000007FD1
+
+!if $(DO_PSCI)
+ gAmdStyxTokenSpaceGuid.PcdPsciOsSupport|TRUE
+!else
+ gAmdStyxTokenSpaceGuid.PcdPsciOsSupport|FALSE
+!endif
+
+!if $(DO_ISCP)
+ gAmdStyxTokenSpaceGuid.PcdIscpSupport|TRUE
+!else
+ gAmdStyxTokenSpaceGuid.PcdIscpSupport|FALSE
+!endif
+
+ # SMBIOS 3.0 only
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosEntryPointProvideMethod|0x2
+
+ gAmdModulePkgTokenSpaceGuid.PcdSataNumChPerSerdes|2
+ gAmdModulePkgTokenSpaceGuid.PcdSataSerdesBase|0xE1200000
+ gAmdModulePkgTokenSpaceGuid.PcdSataSerdesOffset|0x00010000
+
+ # map the stack as non-executable when entering the DXE phase
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE
+
+!if $(DO_XGBE)
+ gAmdModulePkgTokenSpaceGuid.PcdXgbeEnable|TRUE
+
+ gAmdModulePkgTokenSpaceGuid.PcdPort0PhyMode|0
+ gAmdModulePkgTokenSpaceGuid.PcdPort1PhyMode|0
+ gAmdModulePkgTokenSpaceGuid.PcdPort0NetSpeed|1
+ gAmdModulePkgTokenSpaceGuid.PcdPort1NetSpeed|1
+
+[PcdsDynamicDefault.common]
+ gAmdStyxTokenSpaceGuid.PcdEthMacA|0x02A1A2A3A4A5
+ gAmdStyxTokenSpaceGuid.PcdEthMacB|0x02B1B2B3B4B5
+
+[PcdsPatchableInModule]
+ gAmdModulePkgTokenSpaceGuid.PcdXgbeUseMacFromIscp|TRUE
+ gAmdModulePkgTokenSpaceGuid.PcdXgbeRev|2
+!endif
+
+[PcdsPatchableInModule]
+# PCIe Configuration: x4x4
+ gAmdModulePkgTokenSpaceGuid.PcdPcieCoreConfiguration|1
+ gAmdModulePkgTokenSpaceGuid.PcdPciePort0Present|1
+ gAmdModulePkgTokenSpaceGuid.PcdPciePort1Present|1
+ gAmdModulePkgTokenSpaceGuid.PcdPciePort2Present|1
+ gAmdModulePkgTokenSpaceGuid.PcdPcieHardcodeEnumeration|TRUE
+
+[PcdsDynamicDefault.common]
+ gAmdStyxTokenSpaceGuid.PcdSocCoreCount|$(NUM_CORES)
+ gArmTokenSpaceGuid.PcdSystemMemorySize|0x0400000000
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0x0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0
+
+[PcdsDynamicHii]
+ gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5
+
+ gAmdStyxTokenSpaceGuid.PcdEnableSmmus|L"StyxEnableSmmus"|gAmdStyxVariableGuid|0x0|FALSE
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+[Components.common]
+
+ #
+ # PEI Phase modules
+ #
+ ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+ MdeModulePkg/Core/Pei/PeiMain.inf
+ MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ }
+ ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+ Silicon/AMD/Styx/AmdModulePkg/Iscp/IscpPei.inf
+ Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf
+ ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
+ ArmPkg/Drivers/CpuPei/CpuPei.inf
+ MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+ MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
+ <LibraryClasses>
+ NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+ }
+
+ #
+ # DXE
+ #
+ MdeModulePkg/Core/Dxe/DxeMain.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
+ }
+ MdeModulePkg/Universal/PCD/Dxe/Pcd.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ }
+
+ #
+ # Architectural Protocols
+ #
+ ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+ MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+ MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+ MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+ MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
+ EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+ EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+ MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
+
+ #
+ # Console IO support
+ #
+ MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+ MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+ MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+ MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+ MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+
+ MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+ MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
+ ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+
+ #
+ # Environment Variables Protocol
+ #
+ MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
+ <LibraryClasses>
+ AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf
+ TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
+ VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf
+ NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
+ }
+ Silicon/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.inf
+
+ #
+ # Iscp support
+ #
+ Silicon/AMD/Styx/AmdModulePkg/Iscp/IscpDxe.inf
+
+ #
+ # FDT support
+ #
+ EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf {
+ <LibraryClasses>
+ FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
+ DtPlatformDtbLoaderLib|Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf
+ }
+
+ #
+ # PCI support
+ #
+ Silicon/AMD/Styx/AmdModulePkg/Gionb/Gionb.inf
+ ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
+ MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
+ MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+
+ #
+ # MP-Boot: ACPI[Parking Protocol] + FDT[Spin-Table]
+ #
+ Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf
+
+ #
+ # AHCI Support
+ #
+ MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+ MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+ MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
+ MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+ MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
+ MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf
+ Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/StyxSataPlatformDxe.inf
+
+ #
+ # USB Support
+ #
+ MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
+ MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
+ MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
+ MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
+ MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
+ MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
+
+!if $(DO_XGBE)
+ #
+ # SNP support
+ #
+ Silicon/AMD/Styx/AmdModulePkg/SnpDxe/SnpDxePort0.inf
+ Silicon/AMD/Styx/AmdModulePkg/SnpDxe/SnpDxePort1.inf
+!endif
+
+ #
+ # Networking stack
+ #
+ MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
+ MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
+ MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
+ MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
+# MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf
+ MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
+ MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf {
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x21
+ }
+ MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
+ MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
+ MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
+ MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
+ MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
+## Bug https://bugs.linaro.org/show_bug.cgi?id=2239
+# MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
+
+ #
+ # Core Info
+ #
+ Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.inf
+
+ #
+ # ACPI Support
+ #
+ MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf {
+ <LibraryClasses>
+ NULL|EmbeddedPkg/Library/PlatformHasAcpiLib/PlatformHasAcpiLib.inf
+ }
+
+ Silicon/AMD/Styx/AcpiTables/AcpiAml.inf
+ Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
+ MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
+
+ #
+ # SMBIOS Support
+ #
+ MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+ Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf
+
+ #
+ # FAT filesystem + GPT/MBR partitioning
+ #
+ MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ FatPkg/EnhancedFatDxe/Fat.inf
+ MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+
+ #
+ # Bds
+ #
+ MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+ MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+ MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+ MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+ MdeModulePkg/Application/UiApp/UiApp.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
+ NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
+ NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
+ }
+ MdeModulePkg/Logo/LogoDxe.inf
+
+ #
+ # Crypto Accelerator support (RNG only)
+ #
+ Silicon/AMD/Styx/Drivers/StyxRngDxe/StyxRngDxe.inf
+
+ #
+ # UEFI application (Shell Embedded Boot Loader)
+ #
+ ShellPkg/Application/Shell/Shell.inf {
+ <LibraryClasses>
+ ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
+ NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellTftpCommandLib/UefiShellTftpCommandLib.inf
+ HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+ BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf
+
+ FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
+ ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
+
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
+ gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
+ gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000
+ }
+
+!if $(DO_FLASHER) == TRUE
+ OpenPlatformPkg/Silicon/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf {
+ <LibraryClasses>
+ ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf
+ }
+!endif
diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf b/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf new file mode 100644 index 0000000000..23e57befcd --- /dev/null +++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf @@ -0,0 +1,415 @@ +#
+# Copyright (c) 2014 - 2016, AMD Incorporated. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+################################################################################
+#
+# FD Section
+# The [FD] Section is made up of the definition statements and a
+# description of what goes into the Flash Device Image. Each FD section
+# defines one flash "device" image. A flash device image may be one of
+# the following: Removable media bootable image (like a boot floppy
+# image,) an Option ROM image (that would be "flashed" into an add-in
+# card,) a System "Flash" image (that would be burned into a system's
+# flash) or an Update ("Capsule") image that will be used to update and
+# existing system flash.
+#
+################################################################################
+
+[FD.STYX_ROM]
+BaseAddress = 0x8000C80000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
+Size = 0x00500000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
+ErasePolarity = 1
+
+# This one is tricky, it must be: BlockSize * NumBlocks = Size
+BlockSize = 0x00001000
+NumBlocks = 0x500
+
+################################################################################
+#
+# Following are lists of FD Region layout which correspond to the locations of different
+# images within the flash device.
+#
+# Regions must be defined in ascending order and may not overlap.
+#
+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
+# the pipe "|" character, followed by the size of the region, also in hex with the leading
+# "0x" characters. Like:
+# Offset|Size
+# PcdOffsetCName|PcdSizeCName
+# RegionType <FV, DATA, or FILE>
+#
+################################################################################
+
+0x00000000|0x00200000
+FILE = Platform/AMD/OverdriveBoard/PreUefiFirmware.bin
+
+0x00200000|0x00260000
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
+FV = STYX_EFI
+
+!include Silicon/AMD/Styx/Common/Varstore.fdf.inc
+
+################################################################################
+#
+# FV Section
+#
+# [FV] section is used to define what components or modules are placed within a flash
+# device file. This section also defines order the components and modules are positioned
+# within the image. The [FV] section consists of define statements, set statements and
+# module statements.
+#
+################################################################################
+
+[FV.FvMain]
+FvNameGuid = 94f067ae-2aa6-4b30-aa07-4e47fe518bb8
+BlockSize = 0x40
+NumBlocks = 0 # This FV gets compressed so make it just big enough
+FvAlignment = 16 # FV alignment and FV attributes setting.
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ INF MdeModulePkg/Core/Dxe/DxeMain.inf
+ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
+
+ #
+ # PI DXE Drivers producing Architectural Protocols (EFI Services)
+ #
+ INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+ INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+ INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+ INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+ INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+ INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
+ INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+ INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+ INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
+
+ INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+ INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+
+ #
+ # Console IO support
+ #
+ INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+ INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+ INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+ INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+ INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+
+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
+ INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+
+ #
+ # FAT filesystem + GPT/MBR partitioning
+ #
+ INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ INF FatPkg/EnhancedFatDxe/Fat.inf
+ INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+
+ #
+ # Environment Variables Protocol
+ #
+ INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+ INF Silicon/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.inf
+
+ #
+ # Iscp support
+ #
+ INF Silicon/AMD/Styx/AmdModulePkg/Iscp/IscpDxe.inf
+
+ #
+ # FDT support
+ #
+ INF EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf
+
+ FILE FREEFORM = 25462CDA-221F-47DF-AC1D-259CFAA4E326 {
+ SECTION RAW = Platform/AMD/OverdriveBoard/FdtBlob/styx-overdrive.dtb
+ }
+
+ #
+ # PCI support
+ #
+ INF Silicon/AMD/Styx/AmdModulePkg/Gionb/Gionb.inf
+ INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
+ INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
+ INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+
+ #
+ # AHCI Support
+ #
+ INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+ INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+ INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
+ INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+ INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
+ INF MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf
+ INF Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/StyxSataPlatformDxe.inf
+
+ #
+ # USB Support
+ #
+ INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
+ INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
+ INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
+ INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
+ INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
+ INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
+
+!if $(DO_XGBE)
+ #
+ # SNP support
+ #
+ INF Silicon/AMD/Styx/AmdModulePkg/SnpDxe/SnpDxePort0.inf
+ INF Silicon/AMD/Styx/AmdModulePkg/SnpDxe/SnpDxePort1.inf
+!endif
+
+ #
+ # Networking stack
+ #
+ INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
+ INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
+ INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
+ INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
+# INF MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf
+ INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
+ INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
+ INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
+ INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
+ INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
+ INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
+ INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
+## Bug https://bugs.linaro.org/show_bug.cgi?id=2239
+# INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
+
+ #
+ # Core Info
+ #
+ INF Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.inf
+
+ #
+ # ACPI Support
+ #
+ INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+ INF RuleOverride=ACPITABLE Silicon/AMD/Styx/AcpiTables/AcpiAml.inf
+ INF Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
+ INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
+
+ #
+ # MP-Boot: ACPI[Parking Protocol] + FDT[Spin-Table]
+ #
+ INF Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf
+
+ #
+ # SMBIOS Support
+ #
+ INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+ INF Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf
+
+ #
+ # UEFI application (Shell Embedded Boot Loader)
+ #
+ INF ShellPkg/Application/Shell/Shell.inf
+
+ #
+ # Bds
+ #
+ INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+ INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+ INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+ INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+ INF MdeModulePkg/Application/UiApp/UiApp.inf
+ INF MdeModulePkg/Logo/LogoDxe.inf
+
+ #
+ # Crypto Accelerator support (RNG only)
+ #
+ INF Silicon/AMD/Styx/Drivers/StyxRngDxe/StyxRngDxe.inf
+
+[FV.STYX_EFI]
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+ INF MdeModulePkg/Core/Pei/PeiMain.inf
+ INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+ INF Silicon/AMD/Styx/AmdModulePkg/Iscp/IscpPei.inf
+ INF Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf
+ INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
+ INF ArmPkg/Drivers/CpuPei/CpuPei.inf
+ INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+ INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+ INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+
+ FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
+ SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+ SECTION FV_IMAGE = FVMAIN
+ }
+ }
+
+
+################################################################################
+#
+# Rules are use with the [FV] section's module INF type to define
+# how an FFS file is created for a given INF file. The following Rule are the default
+# rules for the different module type. User can add the customized rules to define the
+# content of the FFS file.
+#
+################################################################################
+
+
+############################################################################
+# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
+############################################################################
+#
+#[Rule.Common.DXE_DRIVER]
+# FILE DRIVER = $(NAMED_GUID) {
+# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+# COMPRESS PI_STD {
+# GUIDED {
+# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+# UI STRING="$(MODULE_NAME)" Optional
+# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+# }
+# }
+# }
+#
+############################################################################
+
+[Rule.Common.SEC]
+ FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
+ TE TE Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi
+ }
+
+[Rule.Common.PEI_CORE]
+ FILE PEI_CORE = $(NAMED_GUID) {
+ TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING ="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.PEIM]
+ FILE PEIM = $(NAMED_GUID) {
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.PEIM.Binary]
+ FILE PEIM = $(NAMED_GUID) {
+ PEI_DEPEX PEI_DEPEX Optional |.depex
+ TE TE Align = Auto |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.PEIM.TIANOCOMPRESSED]
+ FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+ }
+
+[Rule.Common.DXE_CORE]
+ FILE DXE_CORE = $(NAMED_GUID) {
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.UEFI_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.UEFI_DRIVER.Binary]
+ FILE DRIVER = $(NAMED_GUID) {
+ PE32 PE32 |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.DXE_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.DXE_RUNTIME_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.DXE_RUNTIME_DRIVER.Binary]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional |.depex
+ PE32 PE32 |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.UEFI_APPLICATION]
+ FILE APPLICATION = $(NAMED_GUID) {
+ UI STRING ="$(MODULE_NAME)" Optional
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ }
+
+[Rule.Common.UEFI_DRIVER.BINARY]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional |.depex
+ PE32 PE32 |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.UEFI_APPLICATION.BINARY]
+ FILE APPLICATION = $(NAMED_GUID) {
+ PE32 PE32 |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.USER_DEFINED.ACPITABLE]
+ FILE FREEFORM = $(NAMED_GUID) {
+ RAW ASL |.aml
+ }
+
|