diff options
author | Yeon Sil Yoon <yeon.sil.yoon@intel.com> | 2017-09-27 09:58:37 -0700 |
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committer | Guo Mang <mang.guo@intel.com> | 2017-10-10 09:53:19 +0800 |
commit | 0eff97a03f40aa5378845edd46a487c86580c4f9 (patch) | |
tree | 61158f6a7c0959e67953929731210aa75503bc65 /Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c | |
parent | 5ac9e5b74873c57860dbe22e04c26c4ee318ccb2 (diff) | |
download | edk2-platforms-0eff97a03f40aa5378845edd46a487c86580c4f9.tar.xz |
Enable SueCreek
1. Change SPI mode and speed for SueCreek
2. Update SueCreek HOST_IRQ and HOST_RST GPIO configuration
3. Add a PCD to make sure that SueCreek only reported to OS when it is actually present on the board.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yeon Sil Yoon <yeon.sil.yoon@intel.com>
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
Diffstat (limited to 'Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c')
-rw-r--r-- | Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c index 8b21b50a7e..536c390ec1 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c @@ -88,6 +88,11 @@ BensonGlacierPostMemInitCallback ( //
BufferSize = sizeof (EFI_GUID);
PcdSetPtr(PcdBoardVbtFileGuid, &BufferSize, (UINT8 *)&gPeiBensonGlacierVbtGuid);
+
+ //
+ // Set PcdSueCreek
+ //
+ PcdSetBool (PcdSueCreek, TRUE);
//
// Add init steps here
|