diff options
| author | zwei4 <david.wei@intel.com> | 2017-07-13 22:41:16 +0800 |
|---|---|---|
| committer | zwei4 <david.wei@intel.com> | 2017-07-13 22:41:16 +0800 |
| commit | 3bfaf23e95c68881bcbbfedececdece4cdff95f8 (patch) | |
| tree | a2fa529e7180bb207fde8f2cca3ba89adaa33184 /Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpios.h | |
| parent | 77de52c8dadec9e995590902dfd55b28ab2465e4 (diff) | |
| download | edk2-platforms-3bfaf23e95c68881bcbbfedececdece4cdff95f8.tar.xz | |
Multi board support.
Cleanup libraries for multi boards.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
Diffstat (limited to 'Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpios.h')
| -rw-r--r-- | Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpios.h | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpios.h b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpios.h index 9777d75003..de1c47683a 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpios.h +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpios.h @@ -1,7 +1,7 @@ /** @file
GPIO setting for Broxton.
- Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -13,8 +13,8 @@ **/
-#ifndef _BOARDGPIOS_H_
-#define _BOARDGPIOS_H_
+#ifndef _LEAFHILL_BOARDGPIOS_H_
+#define _LEAFHILL_BOARDGPIOS_H_
#include <PiPei.h>
#include"ChipsetAccess.h"
@@ -59,7 +59,7 @@ Wake_Enabled: //
// North Community
//
-BXT_GPIO_PAD_INIT mBXT_GpioInitData_N[] =
+BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_N[] =
{
//
// Group Pin#: pad_name, PMode,GPIO_Config,HostSw,GPO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, IOSTerm, MMIO_Offset ,Community
@@ -139,7 +139,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_N[] = //
// North West Community
//
-BXT_GPIO_PAD_INIT mBXT_GpioInitData_NW [] =
+BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_NW [] =
{
//
// Group Pin#: pad_name, PMode,GPIO_Config,HostSw,GPO_STATE,INT_Trigger, Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, IOSTerm, MMIO_Offset , Community
@@ -226,7 +226,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_NW [] = //
// West Community
//
-BXT_GPIO_PAD_INIT mBXT_GpioInitData_W [] =
+BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_W [] =
{
//
// Group Pin#: pad_name, PMode,GPIO_Config,HostSw,GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L, Inverted,GPI_ROUT,IOSstae, IOSTerm, MMIO_Offset , Community
@@ -275,7 +275,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_W [] = //
// South West Community
//
-BXT_GPIO_PAD_INIT mBXT_GpioInitData_SW[]=
+BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_SW[]=
{
//
// Group Pin#: pad_name, PMode,GPIO_Config,HostSw,GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, IOSTerm, MMIO_Offset , Community
@@ -314,7 +314,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_SW[]= BXT_GPIO_PAD_CONF(L"SMB_ALERTB", M0, GPI , GPIO_D , NA , NA ,Wake_Disabled, P_20K_H, NA , NA ,IOS_Masked,SAME ,GPIO_PADBAR+0x00F8 , SOUTHWEST),//not used on RVP
};
-BXT_GPIO_PAD_INIT mBXT_GpioInitData_Audio_SSP6 []=
+BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_Audio_SSP6 []=
{
//
// Group Pin#: pad_name, PMode,GPIO_Config,HostSw,GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, IOSTerm,MMIO_Offset, Community
@@ -328,7 +328,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_Audio_SSP6 []= BXT_GPIO_PAD_CONF(L"GPIO_192 DBI_SCL", M0 , HI_Z ,GPIO_D, HI , NA , Wake_Disabled, P_2K_H, NA , NA,NA , NA , GPIO_PADBAR+0x0028, NORTHWEST),//Feature: Codec Power Down PD Net in Sch: SOC_CODEC_PD_N
};
-BXT_GPIO_PAD_INIT mBXT_GpioInitData_FAB2[] =
+BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_FAB2[] =
{
//
// Group Pin#: pad_name, PMode,GPIO_Config,HostSw,GPO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, IOSTerm, MMIO_Offset ,Community
@@ -341,7 +341,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_FAB2[] = //
// GPIO 191 is only used if EPI reworks are applied on the board. This GPIO switches between SD Card data (if set to 1) and EPI data (if set to 0).
//
-BXT_GPIO_PAD_INIT mBXT_GpioInitData_EPI_Override[] =
+BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_EPI_Override[] =
{
//
// Group Pin#: pad_name, PMode,GPIO_Config,HostSw,GPO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, IOSTerm, MMIO_Offset ,Community
@@ -352,7 +352,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_EPI_Override[] = //
// North West Community
//
-BXT_GPIO_PAD_INIT mBXT_GpioInitData_NW_LH []=
+BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_NW_LH []=
{
//
// Group Pin#: pad_name, PMode,GPIO_Config,HostSw,GPO_STATE,INT_Trigger, Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, IOSTerm, MMIO_Offset, Community
@@ -392,7 +392,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_NW_LH []= };
-BXT_GPIO_PAD_INIT mBXT_GpioInitData_N_LH[] =
+BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_N_LH[] =
{
//
// Group Pin#: pad_name, PMode,GPIO_Config,HostSw,GPO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, IOSTerm,MMIO_Offset,Community
@@ -419,7 +419,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_N_LH[] = //
// West Community
//
-BXT_GPIO_PAD_INIT mBXT_GpioInitData_W_LH [] =
+BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_W_LH [] =
{
//
// Group Pin#: pad_name, PMode,GPIO_Config,HostSw,GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L, Inverted,GPI_ROUT,IOSstae, IOSTerm, MMIO_Offset, Community
@@ -439,7 +439,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_W_LH [] = //
// South West Community
//
-BXT_GPIO_PAD_INIT mBXT_GpioInitData_SW_LH []=
+BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_SW_LH []=
{
//
// Group Pin#: pad_name, PMode,GPIO_Config,HostSw,GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, IOSTerm,MMIO_Offset, Community
@@ -449,7 +449,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_SW_LH []= BXT_GPIO_PAD_CONF(L"SMB_ALERTB", M1, NA , NA , NA , NA ,Wake_Disabled, P_20K_H, NA , NA ,IOS_Masked, SAME, GPIO_PADBAR+ 0x00F8 , SOUTHWEST),//Feature: SMB_ALERTB
};
-BXT_GPIO_PAD_INIT mBXT_GpioInitData_LPSS_I2C[] =
+BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_LPSS_I2C[] =
{
BXT_GPIO_PAD_CONF(L"GPIO_134 LPSS_I2C5_SDA", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_H, NA , NA, HizRx0I, EnPd, GPIO_PADBAR+0x0050, WEST),
BXT_GPIO_PAD_CONF(L"GPIO_135 LPSS_I2C5_SCL", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_H, NA , NA, HizRx0I, EnPd, GPIO_PADBAR+0x0058, WEST),
@@ -457,7 +457,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_LPSS_I2C[] = BXT_GPIO_PAD_CONF(L"GPIO_137 LPSS_I2C6_SCL", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_H, NA , NA, HizRx0I, EnPd, GPIO_PADBAR+0x0068, WEST),
};
-BXT_GPIO_PAD_INIT LomDisableGpio[] =
+BXT_GPIO_PAD_INIT LeafHillLomDisableGpio[] =
{
//
// LAN
|