diff options
author | Marcin Wojtas <mw@semihalf.com> | 2017-09-01 13:17:53 +0200 |
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committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-09-01 13:06:37 +0100 |
commit | 8a6202d658436df7cbd6821bee5ffe0a70e72638 (patch) | |
tree | c0bc61f5591e6e43a7ae7e9c2ce48a1605e93c2f /Platform/Marvell/Armada | |
parent | 0b4ef4583f339994adbefb8134759c0eab44bb65 (diff) | |
download | edk2-platforms-8a6202d658436df7cbd6821bee5ffe0a70e72638.tar.xz |
Drivers/Net/Pp2Dxe: Move registers' description to macros
Registers' offset are constant for each PP2 controller instance,
so use macros with relative addresses for their description.
This allowed to remove 5 PCD's and will ease enabling second
controller on Armada8k. Update PortingGuide accordingly.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Diffstat (limited to 'Platform/Marvell/Armada')
-rw-r--r-- | Platform/Marvell/Armada/Armada70x0.dsc | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/Platform/Marvell/Armada/Armada70x0.dsc b/Platform/Marvell/Armada/Armada70x0.dsc index 3440038ff2..d86567b9bd 100644 --- a/Platform/Marvell/Armada/Armada70x0.dsc +++ b/Platform/Marvell/Armada/Armada70x0.dsc @@ -119,18 +119,12 @@ #NET
gMarvellTokenSpaceGuid.PcdPhySmiAddresses|{ 0xff, 0x0, 0x1 }
gMarvellTokenSpaceGuid.PcdPp2ClockFrequency|333333333
- gMarvellTokenSpaceGuid.PcdPp2GmacBaseAddress|0xf2130e00
- gMarvellTokenSpaceGuid.PcdPp2GmacDevSize|0x1000
gMarvellTokenSpaceGuid.PcdPp2GopIndexes|{ 0x0, 0x2, 0x3 }
gMarvellTokenSpaceGuid.PcdPp2InterfaceAlwaysUp|{ 0x1, 0x1, 0x0 }
gMarvellTokenSpaceGuid.PcdPp2InterfaceSpeed|{ 0x3, 0x4, 0x3 }
gMarvellTokenSpaceGuid.PcdPp2NumPorts|3
gMarvellTokenSpaceGuid.PcdPp2PortIds|{ 0x0, 0x1, 0x2 }
- gMarvellTokenSpaceGuid.PcdPp2Rfu1BaseAddress|0xf2441000
gMarvellTokenSpaceGuid.PcdPp2SharedAddress|0xf2000000
- gMarvellTokenSpaceGuid.PcdPp2SmiBaseAddress|0xf212A200
- gMarvellTokenSpaceGuid.PcdPp2XlgBaseAddress|0xf2130f00
- gMarvellTokenSpaceGuid.PcdPp2XlgDevSize|0x1000
#PciEmulation
gMarvellTokenSpaceGuid.PcdPciEXhci|{ 0x1, 0x1, 0x0, 0x0 }
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