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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-04-21 17:29:59 +0100 |
|---|---|---|
| committer | Leif Lindholm <leif.lindholm@linaro.org> | 2017-10-11 12:36:49 +0100 |
| commit | 594f589cffe859ef50e9333e6c5121dc9938f36f (patch) | |
| tree | 265497da05ecad377e2cb7149a6bf08cfe451b24 /Platform/Marvell | |
| parent | ed448d152632b060c1a1c90bc9969cd5848f9edb (diff) | |
| download | edk2-platforms-594f589cffe859ef50e9333e6c5121dc9938f36f.tar.xz | |
Marvell/Armada: Ensure GICC frames adjacency
The GIC architecture mandates that the CPU interface, which consists
of 2 consecutive 4 KB frames, can be mapped using separate mappings.
Since this is problematic on 64 KB pages, the MMU-400 aliases each
frame 16 times, and the two consecutive frames can be found at offset
0xf000.
Therefore use the last alias from the first series of aliases as the
base address, so that the first frame from the second series becomes
directly adjacent, whilst remaining covered by a separate 64KB page.
This patch is intended to expose correct GICC alias via
MADT, once ACPI support is added.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Platform/Marvell')
| -rw-r--r-- | Platform/Marvell/Armada/Armada.dsc.inc | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/Platform/Marvell/Armada/Armada.dsc.inc b/Platform/Marvell/Armada/Armada.dsc.inc index 5071bd5206..bd2336fab0 100644 --- a/Platform/Marvell/Armada/Armada.dsc.inc +++ b/Platform/Marvell/Armada/Armada.dsc.inc @@ -263,7 +263,14 @@ # ARM Generic Interrupt Controller
gArmTokenSpaceGuid.PcdGicDistributorBase|0xF0210000
- gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xF0220000
+
+ #
+ # NOTE: the GIC architecture mandates that the CPU interface, which consists
+ # of 2 consecutive 4 KB frames, can be mapped using separate mappings.
+ # Since this is problematic on 64 KB pages, the MMU-400 aliases each frame
+ # 16 times, and the two consecutive frames can be found at offset 0xf000
+ #
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xF022F000
# ARM Architectural Timer Support
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|25000000
|