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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2018-03-03 11:05:33 +0000
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2018-03-15 20:36:56 +0000
commite74f53df8b18e4aed0c9df0942ce0c30f78a68e2 (patch)
tree69c8d6adb1435bbdc8d2ee2017cee0f17672b7e1 /Platform/Socionext/DeveloperBox/DeveloperBox.fdf
parentca11ac71980cdb4c1bd3b4c2c6549b90fc47b4cc (diff)
downloadedk2-platforms-e74f53df8b18e4aed0c9df0942ce0c30f78a68e2.tar.xz
Platform/Socionext/DeveloperBox: add SMBIOS tables
This adds SMBIOS tables to the DeveloperBox platform describing the BIOS, system, enclosure, CPUs, caches, PCIe slots and system memory, which almost amounts to the mandatory minimum as given by the SMBIOS spec. Only the type 17 structures currently lack detailed information about the DIMMs: the SPDs are on a I2C bus that is only accessible by the SCP, and it currently does not share this information. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Platform/Socionext/DeveloperBox/DeveloperBox.fdf')
-rw-r--r--Platform/Socionext/DeveloperBox/DeveloperBox.fdf6
1 files changed, 6 insertions, 0 deletions
diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf b/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
index 0b52ff3470..2da8385097 100644
--- a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
+++ b/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
@@ -260,6 +260,12 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
INF RuleOverride = ACPITABLE Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
+ #
+ # SMBIOS/DMI support
+ #
+ INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+ INF Platform/Socionext/DeveloperBox/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+
[FV.FVMAIN_COMPACT]
FvAlignment = 16
BlockSize = 0x10000