Marvell/Drivers: MvSpiDxe: Enable using driver in RT

This patch applies necessary modifications, which allow to use
MvSpiDxe driver in variable support as a runtime service.

The driver's type is modified to DXE_RUNTIME_DRIVER, as well as
a new callback is introduced as a part of the SpiMasterProtocol.
It configures the memory space for mmio access to the host
controller registers.

Apply locking in the driver only during boot services. Once at
runtime, resource protection is handled by the operating system.

Moreover ensure proper execution order before MvSpiFlashDxe
(and hence MvFvbDxe) by setting according Depex dependency.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

5 files changed, 63 insertions, 6 deletions

diff --git a/Platform/Marvell/Drivers/Spi/MvSpiDxe.c b/Platform/Marvell/Drivers/Spi/MvSpiDxe.c
index c60a520efc..bab6cf4d56 100755
--- a/Platform/Marvell/Drivers/Spi/MvSpiDxe.c
+++ b/Platform/Marvell/Drivers/Spi/MvSpiDxe.c
@@ -211,7 +211,9 @@ MvSpiTransfer (
 

   Length = 8 * DataByteCount;

 

-  EfiAcquireLock (&SpiMaster->Lock);

+  if (!EfiAtRuntime ()) {

+    EfiAcquireLock (&SpiMaster->Lock);

+  }

 

   if (Flag & SPI_TRANSFER_BEGIN) {

     SpiActivateCs (Slave);

@@ -254,7 +256,9 @@ MvSpiTransfer (
     SpiDeactivateCs (Slave);

   }

 

-  EfiReleaseLock (&SpiMaster->Lock);

+  if (!EfiAtRuntime ()) {

+    EfiReleaseLock (&SpiMaster->Lock);

+  }

 

   return EFI_SUCCESS;

 }

@@ -338,6 +342,44 @@ MvSpiFreeSlave (
   return EFI_SUCCESS;

 }

 

+EFI_STATUS

+EFIAPI

+MvSpiConfigRuntime (

+  IN SPI_DEVICE *Slave

+  )

+{

+  EFI_STATUS Status;

+  UINTN AlignedAddress;

+

+  //

+  // Host register base may be not aligned to the page size,

+  // which is not accepted when setting memory space attributes.

+  // Add one aligned page of memory space which covers the host

+  // controller registers.

+  //

+  AlignedAddress = Slave->HostRegisterBaseAddress & ~(SIZE_4KB - 1);

+

+  Status = gDS->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo,

+                  AlignedAddress,

+                  SIZE_4KB,

+                  EFI_MEMORY_UC | EFI_MEMORY_RUNTIME);

+  if (EFI_ERROR (Status)) {

+    DEBUG ((DEBUG_ERROR, "%a: Failed to add memory space\n", __FUNCTION__));

+    return Status;

+  }

+

+  Status = gDS->SetMemorySpaceAttributes (AlignedAddress,

+                  SIZE_4KB,

+                  EFI_MEMORY_UC | EFI_MEMORY_RUNTIME);

+  if (EFI_ERROR (Status)) {

+    DEBUG ((DEBUG_ERROR, "%a: Failed to set memory attributes\n", __FUNCTION__));

+    gDS->RemoveMemorySpace (AlignedAddress, SIZE_4KB);

+    return Status;

+  }

+

+  return EFI_SUCCESS;

+}

+

 STATIC

 EFI_STATUS

 SpiMasterInitProtocol (

@@ -350,6 +392,7 @@ SpiMasterInitProtocol (
   SpiMasterProtocol->FreeDevice  = MvSpiFreeSlave;

   SpiMasterProtocol->Transfer    = MvSpiTransfer;

   SpiMasterProtocol->ReadWrite   = MvSpiReadWrite;

+  SpiMasterProtocol->ConfigRuntime = MvSpiConfigRuntime;

 

   return EFI_SUCCESS;

 }

@@ -363,8 +406,7 @@ SpiMasterEntryPoint (
 {

   EFI_STATUS  Status;

 

-  mSpiMasterInstance = AllocateZeroPool (sizeof (SPI_MASTER));

-

+  mSpiMasterInstance = AllocateRuntimeZeroPool (sizeof (SPI_MASTER));

   if (mSpiMasterInstance == NULL) {

     return EFI_OUT_OF_RESOURCES;

   }

diff --git a/Platform/Marvell/Drivers/Spi/MvSpiDxe.h b/Platform/Marvell/Drivers/Spi/MvSpiDxe.h
index e7e280a799..50cdc025c7 100644
--- a/Platform/Marvell/Drivers/Spi/MvSpiDxe.h
+++ b/Platform/Marvell/Drivers/Spi/MvSpiDxe.h
@@ -38,10 +38,12 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include <Library/PcdLib.h>

 #include <Library/UefiLib.h>

 #include <Library/DebugLib.h>

+#include <Library/DxeServicesTableLib.h>

 #include <Library/MemoryAllocationLib.h>

 #include <Uefi/UefiBaseType.h>

 #include <Library/BaseMemoryLib.h>

 #include <Library/UefiBootServicesTableLib.h>

+#include <Library/UefiRuntimeLib.h>

 

 #include <Protocol/Spi.h>

 

diff --git a/Platform/Marvell/Drivers/Spi/MvSpiDxe.inf b/Platform/Marvell/Drivers/Spi/MvSpiDxe.inf
index 08c6c04159..ac0e407092 100644
--- a/Platform/Marvell/Drivers/Spi/MvSpiDxe.inf
+++ b/Platform/Marvell/Drivers/Spi/MvSpiDxe.inf
@@ -33,7 +33,7 @@
   INF_VERSION                    = 0x00010005

   BASE_NAME                      = SpiMasterDxe

   FILE_GUID                      = c19dbc8a-f4f9-43b0-aee5-802e3ed03d15

-  MODULE_TYPE                    = DXE_DRIVER

+  MODULE_TYPE                    = DXE_RUNTIME_DRIVER

   VERSION_STRING                 = 1.0

   ENTRY_POINT                    = SpiMasterEntryPoint

 

@@ -53,8 +53,10 @@
   TimerLib

   UefiLib

   DebugLib

+  DxeServicesTableLib

   MemoryAllocationLib

   IoLib

+  UefiRuntimeLib

 

 [FixedPcd]

   gMarvellTokenSpaceGuid.PcdSpiRegBase

@@ -65,4 +67,7 @@
   gMarvellSpiMasterProtocolGuid

 

 [Depex]

-  TRUE

+  #

+  # MvSpiDxe must be loaded prior to MvSpiFlash driver

+  #

+  BEFORE gMarvellSpiFlashDxeGuid

diff --git a/Platform/Marvell/Include/Protocol/Spi.h b/Platform/Marvell/Include/Protocol/Spi.h
index d9930214b2..abbad19749 100644
--- a/Platform/Marvell/Include/Protocol/Spi.h
+++ b/Platform/Marvell/Include/Protocol/Spi.h
@@ -101,12 +101,19 @@ EFI_STATUS
   IN SPI_DEVICE *SpiDev

   );

 

+typedef

+EFI_STATUS

+(EFIAPI *MV_SPI_CONFIG_RT) (

+  IN SPI_DEVICE *SpiDev

+  );

+

 struct _MARVELL_SPI_MASTER_PROTOCOL {

   MV_SPI_INIT         Init;

   MV_SPI_READ_WRITE   ReadWrite;

   MV_SPI_TRANSFER     Transfer;

   MV_SPI_SETUP_DEVICE SetupDevice;

   MV_SPI_FREE_DEVICE  FreeDevice;

+  MV_SPI_CONFIG_RT    ConfigRuntime;

 };

 

 #endif // __MARVELL_SPI_MASTER_PROTOCOL_H__

diff --git a/Platform/Marvell/Marvell.dec b/Platform/Marvell/Marvell.dec
index e40771b0f4..2eb62388a1 100644
--- a/Platform/Marvell/Marvell.dec
+++ b/Platform/Marvell/Marvell.dec
@@ -57,6 +57,7 @@
   gShellSfHiiGuid = { 0x03a67756, 0x8cde, 0x4638, { 0x82, 0x34, 0x4a, 0x0f, 0x6d, 0x58, 0x81, 0x39 } }

 

   gMarvellFvbDxeGuid = { 0x42903750, 0x7e61, 0x4aaf, { 0x83, 0x29, 0xbf, 0x42, 0x36, 0x4e, 0x24, 0x85 } }

+  gMarvellSpiFlashDxeGuid = { 0x49d7fb74, 0x306d, 0x42bd, { 0x94, 0xc8, 0xc0, 0xc5, 0x4b, 0x18, 0x1d, 0xd7 } }

 

 [Protocols]

   # installed as a protocol by PlatInitDxe to force ordering between DXE drivers