diff options
| author | Gary Lin <glin@suse.com> | 2016-10-19 00:01:32 -0700 |
|---|---|---|
| committer | Michael Kinney <michael.d.kinney@intel.com> | 2016-10-25 13:44:03 -0700 |
| commit | 65aec00829912662cbfe842ab747d7608fc90553 (patch) | |
| tree | 09c2a49cf88ffbe991372311fe710eb9a3af4abe /QuarkPlatformPkg/Platform | |
| parent | 17dc8ebc0d76831cb9f7b0e32ccb87efa116b3ce (diff) | |
| download | edk2-platforms-65aec00829912662cbfe842ab747d7608fc90553.tar.xz | |
QuarkPlatformPkg: Fix typos in comments
- TURE -> TRUE
- reseting -> resetting
- retore -> restore
- boundry -> boundary
- tempory -> temporary
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Kelly Steele <kelly.steele@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gary Lin <glin@suse.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Diffstat (limited to 'QuarkPlatformPkg/Platform')
| -rw-r--r-- | QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.c b/QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.c index 0f71b1fda2..88b50c1c98 100644 --- a/QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.c +++ b/QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.c @@ -142,7 +142,7 @@ SetLanControllerMacAddr ( SaveBarReg = PciRead32 (DevPcieAddr + R_IOH_MAC_MEMBAR);
//
- // Use predefined tempory memory resource
+ // Use predefined temporary memory resource
//
PciWrite32 ( DevPcieAddr + R_IOH_MAC_MEMBAR, Bar0);
PciWrite8 ( DevPcieAddr + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE);
@@ -800,7 +800,7 @@ CheckForResetDueToErrors ( //
// Check if RMU reset system due to access violations.
- // RMU updates a SOC Unit register before reseting the system.
+ // RMU updates a SOC Unit register before resetting the system.
//
RegValue = QNCAltPortRead (QUARK_SCSS_SOC_UNIT_SB_PORT_ID, QUARK_SCSS_SOC_UNIT_CFG_STICKY_RW);
if ((RegValue & B_CFG_STICKY_RW_VIOLATION) != 0) {
@@ -1048,7 +1048,7 @@ EarlyPlatformGpioCtrlerInitAndManipulation ( SaveBarReg = PciRead32 (DevPcieAddr + PcdGet8 (PcdIohGpioBarRegister));
//
- // Use predefined tempory memory resource.
+ // Use predefined temporary memory resource.
//
PciWrite32 ( DevPcieAddr + PcdGet8 (PcdIohGpioBarRegister), IohGpioBase);
PciWrite8 ( DevPcieAddr + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE);
|