diff options
| author | Michael Kinney <michael.d.kinney@intel.com> | 2016-10-04 10:55:24 -0700 |
|---|---|---|
| committer | Michael Kinney <michael.d.kinney@intel.com> | 2016-10-07 14:56:37 -0700 |
| commit | 5f82e02a4b40f25462f0d592e85071bdeb80a2bd (patch) | |
| tree | 3c27a70efee02b08b6948706e2e865124b17df69 /QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmm.h | |
| parent | 29f169d17a0f09cd1e05c984da5965e08f2b696e (diff) | |
| download | edk2-platforms-5f82e02a4b40f25462f0d592e85071bdeb80a2bd.tar.xz | |
QuarkSocPkg/QncSmmDispatcher: Fix use after free issue
Update Quark North Cluster SMM dispatcher logic to handle
case where an SMI handler unregisters itself.
https://bugzilla.tianocore.org/show_bug.cgi?id=51
This issue was reproduced using the unit test at:
https://github.com/mdkinney/edk2/tree/Bug51/Reproduce
An ASSERT() is generated the 4th time the periodic SMI
handler is triggered when the periodic SMI handler
unregisters itself. After applying this patch, the
DEBUG() message from the periodic SMI handler in this
unit test is generated 4 times, the periodic SMI handler
is unregistered, and the UEFI Shell works as expected.
Cc: Kelly Steele <kelly.steele@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Kelly Steele <kelly.steele@intel.com>
Diffstat (limited to 'QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmm.h')
| -rw-r--r-- | QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmm.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmm.h b/QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmm.h index 797be16f79..ccf9dae1c5 100644 --- a/QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmm.h +++ b/QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmm.h @@ -387,6 +387,8 @@ struct _DATABASE_RECORD { UINT32 Signature;
LIST_ENTRY Link;
+ BOOLEAN Processed;
+
//
// Status and Enable bit description
//
|