SecurityPkg: Add TPM PTP support in TCG2 Config.

This patch add PTP CRB support in BIOS Setup.
It can:
1) Display the PTP capability (TIS/FIFO/CRB)
2) Display the PTP current interface (TIS/FIFO/CRB)
3) Let user select CRB/FIFO, if supported.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Zhang, Chao B" <chao.b.zhang@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19743 6f19259b-4bc3-4df7-8a09-765794883524

6 files changed, 299 insertions, 27 deletions

diff --git a/SecurityPkg/Tcg/Tcg2Config/Tcg2Config.vfr b/SecurityPkg/Tcg/Tcg2Config/Tcg2Config.vfr
index b3504441d0..a72f8246d1 100644
--- a/SecurityPkg/Tcg/Tcg2Config/Tcg2Config.vfr
+++ b/SecurityPkg/Tcg/Tcg2Config/Tcg2Config.vfr
@@ -1,7 +1,7 @@
 /** @file

   VFR file used by the TCG2 configuration component.

 

-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>

 This program and the accompanying materials 

 are licensed and made available under the terms and conditions of the BSD License 

 which accompanies this distribution.  The full text of the license may be found at 

@@ -51,6 +51,32 @@ formset
             option text = STRING_TOKEN(STR_TCG2_TPM_2_0_DTPM),     value = TPM_DEVICE_2_0_DTPM,     flags = RESET_REQUIRED;

     endoneof;

 

+    suppressif ideqvallist TCG2_CONFIGURATION.TpmDevice == TPM_DEVICE_NULL TPM_DEVICE_1_2;

+    text

+      help   = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_STATE_HELP),

+      text   = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_STATE_PROMPT),

+        text   = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT);

+

+    text

+      help   = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_CAPABILITY_HELP),

+      text   = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_CAPABILITY_PROMPT),

+        text   = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_CAPABILITY_CONTENT);

+

+    suppressif ideqval TCG2_CONFIGURATION_INFO.TpmDeviceInterfacePtpFifoSupported == 0

+            OR ideqval TCG2_CONFIGURATION_INFO.TpmDeviceInterfacePtpCrbSupported == 0;

+    oneof varid  = TCG2_CONFIGURATION_INFO.TpmDeviceInterfaceAttempt,

+          questionid = KEY_TPM_DEVICE_INTERFACE,

+          prompt = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_PROMPT),

+          help   = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_HELP),

+          flags  = INTERACTIVE,

+            option text = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_TIS),          value = TPM_DEVICE_INTERFACE_TIS,          flags = RESET_REQUIRED;

+            option text = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_PTP_FIFO),     value = TPM_DEVICE_INTERFACE_PTP_FIFO,     flags = RESET_REQUIRED;

+            option text = STRING_TOKEN(STR_TCG2_DEVICE_INTERFACE_PTP_CRB),      value = TPM_DEVICE_INTERFACE_PTP_CRB,      flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;

+    endoneof;

+    endif;

+

+    endif;

+

     subtitle text = STRING_TOKEN(STR_NULL);

 

     suppressif ideqvallist TCG2_CONFIGURATION.TpmDevice == TPM_DEVICE_NULL TPM_DEVICE_1_2;

diff --git a/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDriver.c b/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDriver.c
index 881368345b..968670f04d 100644
--- a/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDriver.c
+++ b/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDriver.c
@@ -1,7 +1,7 @@
 /** @file

   The module entry point for Tcg2 configuration module.

 

-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>

 This program and the accompanying materials 

 are licensed and made available under the terms and conditions of the BSD License 

 which accompanies this distribution.  The full text of the license may be found at 

@@ -159,20 +159,6 @@ Tcg2ConfigDriverEntryPoint (
   UpdateDefaultPCRBanks (Tcg2ConfigBin + sizeof(UINT32), ReadUnaligned32((UINT32 *)Tcg2ConfigBin) - sizeof(UINT32), CurrentActivePCRBanks);

 

   //

-  // Save to variable so platform driver can get it.

-  //

-  Status = gRT->SetVariable (

-                  TCG2_STORAGE_NAME,

-                  &gTcg2ConfigFormSetGuid,

-                  EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,

-                  sizeof(Tcg2Configuration),

-                  &Tcg2Configuration

-                  );

-  if (EFI_ERROR (Status)) {

-    DEBUG ((EFI_D_ERROR, "Tcg2ConfigDriver: Fail to set TCG2_STORAGE_NAME\n"));

-  }

-

-  //

   // Sync data from PCD to variable, so that we do not need detect again in S3 phase.

   //

   Tcg2DeviceDetection.TpmDeviceDetected = TPM_DEVICE_NULL;

@@ -184,6 +170,7 @@ Tcg2ConfigDriverEntryPoint (
   }

 

   PrivateData->TpmDeviceDetected = Tcg2DeviceDetection.TpmDeviceDetected;

+  Tcg2Configuration.TpmDevice = Tcg2DeviceDetection.TpmDeviceDetected;

 

   //

   // Save to variable so platform driver can get it.

@@ -208,6 +195,20 @@ Tcg2ConfigDriverEntryPoint (
   }

 

   //

+  // Save to variable so platform driver can get it.

+  //

+  Status = gRT->SetVariable (

+                  TCG2_STORAGE_NAME,

+                  &gTcg2ConfigFormSetGuid,

+                  EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,

+                  sizeof(Tcg2Configuration),

+                  &Tcg2Configuration

+                  );

+  if (EFI_ERROR (Status)) {

+    DEBUG ((EFI_D_ERROR, "Tcg2ConfigDriver: Fail to set TCG2_STORAGE_NAME\n"));

+  }

+

+  //

   // We should lock Tcg2DeviceDetection, because it contains information needed at S3.

   //

   Status = gBS->LocateProtocol (&gEdkiiVariableLockProtocolGuid, NULL, (VOID **)&VariableLockProtocol);

diff --git a/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf b/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf
index ba76541bd9..dd2247b957 100644
--- a/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf
+++ b/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf
@@ -4,7 +4,7 @@
 #  By this module, user may select TPM device, clear TPM state, etc.

 #  NOTE: This module is only for reference only, each platform should have its own setup page.

 #

-# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>

+# Copyright (c) 2015 - 2106, Intel Corporation. All rights reserved.<BR>

 # This program and the accompanying materials

 # are licensed and made available under the terms and conditions of the BSD License

 # which accompanies this distribution. The full text of the license may be found at

@@ -57,6 +57,7 @@
   Tpm2DeviceLib

   Tpm2CommandLib

   Tcg2PhysicalPresenceLib

+  IoLib

 

 [Guids]

   ## PRODUCES           ## HII

@@ -75,6 +76,7 @@
 [Pcd]

   gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid            ## CONSUMES

   gEfiSecurityPkgTokenSpaceGuid.PcdTcg2HashAlgorithmBitmap    ## CONSUMES

+  gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress             ## CONSUMES

 

 [Depex]

   gEfiTcg2ProtocolGuid              AND

diff --git a/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigImpl.c b/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigImpl.c
index 0d2956074a..db38bd45a3 100644
--- a/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigImpl.c
+++ b/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigImpl.c
@@ -2,7 +2,7 @@
   HII Config Access protocol implementation of TCG2 configuration module.

   NOTE: This module is only for reference only, each platform should have its own setup page.

 

-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>

 This program and the accompanying materials 

 are licensed and made available under the terms and conditions of the BSD License 

 which accompanies this distribution.  The full text of the license may be found at 

@@ -16,8 +16,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #include "Tcg2ConfigImpl.h"

 #include <Library/PcdLib.h>

 #include <Library/Tpm2CommandLib.h>

+#include <Library/IoLib.h>

 #include <Guid/TpmInstance.h>

 

+#include <IndustryStandard/TpmPtp.h>

+

 #define EFI_TCG2_EVENT_LOG_FORMAT_ALL   (EFI_TCG2_EVENT_LOG_FORMAT_TCG_1_2 | EFI_TCG2_EVENT_LOG_FORMAT_TCG_2)

 

 TPM_INSTANCE_ID  mTpmInstanceId[TPM_DEVICE_MAX + 1] = TPM_INSTANCE_ID_LIST;

@@ -57,6 +60,147 @@ HII_VENDOR_DEVICE_PATH          mTcg2HiiVendorDevicePath = {
 UINT8  mCurrentPpRequest;

 

 /**

+  Return PTP interface type.

+

+  @param[in] Register                Pointer to PTP register.

+

+  @return PTP interface type.

+**/

+UINT8

+GetPtpInterface (

+  IN VOID *Register

+  )

+{

+  PTP_CRB_INTERFACE_IDENTIFIER  InterfaceId;

+  PTP_FIFO_INTERFACE_CAPABILITY InterfaceCapability;

+

+  //

+  // Check interface id

+  //

+  InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);

+  InterfaceCapability.Uint32 = MmioRead32 ((UINTN)&((PTP_FIFO_REGISTERS *)Register)->InterfaceCapability);

+

+  if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) &&

+      (InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB) &&

+      (InterfaceId.Bits.CapCRB != 0)) {

+    return TPM_DEVICE_INTERFACE_PTP_CRB;

+  }

+  if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO) &&

+      (InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO) &&

+      (InterfaceId.Bits.CapFIFO != 0) &&

+      (InterfaceCapability.Bits.InterfaceVersion == INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP)) {

+    return TPM_DEVICE_INTERFACE_PTP_FIFO;

+  }

+  return TPM_DEVICE_INTERFACE_TIS;

+}

+

+/**

+  Return if PTP CRB is supported.

+

+  @param[in] Register                Pointer to PTP register.

+  

+  @retval TRUE  PTP CRB is supported.

+  @retval FALSE PTP CRB is unsupported.

+**/

+BOOLEAN

+IsPtpCrbSupported (

+  IN VOID                 *Register

+  )

+{

+  PTP_CRB_INTERFACE_IDENTIFIER  InterfaceId;

+

+  //

+  // Check interface id

+  //

+  InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);

+

+  if (((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) ||

+       (InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO)) &&

+      (InterfaceId.Bits.CapCRB != 0)) {

+    return TRUE;

+  }

+  return FALSE;

+}

+

+/**

+  Return if PTP FIFO is supported.

+

+  @param[in] Register                Pointer to PTP register.

+  

+  @retval TRUE  PTP FIFO is supported.

+  @retval FALSE PTP FIFO is unsupported.

+**/

+BOOLEAN

+IsPtpFifoSupported (

+  IN VOID                 *Register

+  )

+{

+  PTP_CRB_INTERFACE_IDENTIFIER  InterfaceId;

+

+  //

+  // Check interface id

+  //

+  InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);

+

+  if (((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) ||

+       (InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO)) &&

+      (InterfaceId.Bits.CapFIFO != 0)) {

+    return TRUE;

+  }

+  return FALSE;

+}

+

+/**

+  Set PTP interface type.

+

+  @param[in] Register                Pointer to PTP register.

+  @param[in] PtpInterface            PTP interface type.

+  

+  @retval EFI_SUCCESS                PTP interface type is set.

+  @retval EFI_INVALID_PARAMETER      PTP interface type is invalid.

+  @retval EFI_UNSUPPORTED            PTP interface type is unsupported.

+  @retval EFI_WRITE_PROTECTED        PTP interface is locked.

+**/

+EFI_STATUS

+SetPtpInterface (

+  IN VOID                 *Register,

+  IN UINT8                PtpInterface

+  )

+{

+  UINT8                         PtpInterfaceCurrent;

+  PTP_CRB_INTERFACE_IDENTIFIER  InterfaceId;

+

+  PtpInterfaceCurrent = GetPtpInterface (Register);

+  if ((PtpInterfaceCurrent != TPM_DEVICE_INTERFACE_PTP_FIFO) && 

+      (PtpInterfaceCurrent != TPM_DEVICE_INTERFACE_PTP_CRB)) {

+    return EFI_UNSUPPORTED;

+  }

+  InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);

+  if (InterfaceId.Bits.IntfSelLock != 0) {

+    return EFI_WRITE_PROTECTED;

+  }

+

+  switch (PtpInterface) {

+  case TPM_DEVICE_INTERFACE_PTP_FIFO:

+    if (InterfaceId.Bits.CapFIFO == 0) {

+      return EFI_UNSUPPORTED;

+    }

+    InterfaceId.Bits.InterfaceSelector = PTP_INTERFACE_IDENTIFIER_INTERFACE_SELECTOR_FIFO;

+    MmioWrite32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId, InterfaceId.Uint32);

+    return EFI_SUCCESS;

+  case TPM_DEVICE_INTERFACE_PTP_CRB:

+    if (InterfaceId.Bits.CapCRB == 0) {

+      return EFI_UNSUPPORTED;

+    }

+    InterfaceId.Bits.InterfaceSelector = PTP_INTERFACE_IDENTIFIER_INTERFACE_SELECTOR_CRB;

+    MmioWrite32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId, InterfaceId.Uint32);

+    return EFI_SUCCESS;

+  default:

+    return EFI_INVALID_PARAMETER;

+  }

+}

+

+/**

   This function allows a caller to extract the current configuration for one

   or more named elements from the target driver.

 

@@ -267,9 +411,27 @@ Tcg2Callback (
      OUT EFI_BROWSER_ACTION_REQUEST            *ActionRequest

   )

 {

+  EFI_INPUT_KEY               Key;

+

   if ((This == NULL) || (Value == NULL) || (ActionRequest == NULL)) {

     return EFI_INVALID_PARAMETER;

   }

+

+  if (Action == EFI_BROWSER_ACTION_CHANGING) {

+    if (QuestionId == KEY_TPM_DEVICE_INTERFACE) {

+      EFI_STATUS  Status;

+      Status = SetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress), Value->u8);

+      if (EFI_ERROR (Status)) {

+        CreatePopUp (

+          EFI_LIGHTGRAY | EFI_BACKGROUND_BLUE,

+          &Key,

+          L"Error: Fail to set PTP interface!",

+          NULL

+          );

+        return EFI_DEVICE_ERROR;

+      }

+    }

+  }

   

   if (Action == EFI_BROWSER_ACTION_CHANGED) {

     if (QuestionId == KEY_TPM_DEVICE) {

@@ -504,6 +666,7 @@ InstallTcg2ConfigForm (
   TPML_PCR_SELECTION              Pcrs;

   CHAR16                          TempBuffer[1024];

   TCG2_CONFIGURATION_INFO         Tcg2ConfigInfo;

+  UINT8                           TpmDeviceInterfaceDetected;

 

   DriverHandle = NULL;

   ConfigAccess = &PrivateData->ConfigAccess;

@@ -557,7 +720,7 @@ InstallTcg2ConfigForm (
     HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_STATE_CONTENT), L"TPM 1.2", NULL);

     break;

   case TPM_DEVICE_2_0_DTPM:

-    HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_STATE_CONTENT), L"TPM 2.0 (DTPM)", NULL);

+    HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_STATE_CONTENT), L"TPM 2.0", NULL);

     break;

   default:

     HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_STATE_CONTENT), L"Unknown", NULL);

@@ -605,6 +768,60 @@ InstallTcg2ConfigForm (
   HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_ACTIVE_PCR_BANKS_CONTENT), TempBuffer, NULL);

 

   //

+  // Update TPM device interface type

+  //

+  if (PrivateData->TpmDeviceDetected == TPM_DEVICE_2_0_DTPM) {

+    TpmDeviceInterfaceDetected = GetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));

+    switch (TpmDeviceInterfaceDetected) {

+    case TPM_DEVICE_INTERFACE_TIS:

+      HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"TIS", NULL);

+      break;

+    case TPM_DEVICE_INTERFACE_PTP_FIFO:

+      HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"PTP FIFO", NULL);

+      break;

+    case TPM_DEVICE_INTERFACE_PTP_CRB:

+      HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"PTP CRB", NULL);

+      break;

+     default:

+      HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"Unknown", NULL);

+      break;

+    }

+

+    Tcg2ConfigInfo.TpmDeviceInterfaceAttempt = TpmDeviceInterfaceDetected;

+    switch (TpmDeviceInterfaceDetected) {

+    case TPM_DEVICE_INTERFACE_TIS:

+      Tcg2ConfigInfo.TpmDeviceInterfacePtpFifoSupported = FALSE;

+      Tcg2ConfigInfo.TpmDeviceInterfacePtpCrbSupported  = FALSE;

+      HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_CAPABILITY_CONTENT), L"TIS", NULL);

+      break;

+    case TPM_DEVICE_INTERFACE_PTP_FIFO:

+    case TPM_DEVICE_INTERFACE_PTP_CRB:

+      Tcg2ConfigInfo.TpmDeviceInterfacePtpFifoSupported = IsPtpFifoSupported((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));

+      Tcg2ConfigInfo.TpmDeviceInterfacePtpCrbSupported  = IsPtpCrbSupported((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));

+      TempBuffer[0] = 0;

+      if (Tcg2ConfigInfo.TpmDeviceInterfacePtpFifoSupported) {

+        if (TempBuffer[0] != 0) {

+          StrCatS (TempBuffer, sizeof(TempBuffer) / sizeof (CHAR16), L", ");

+        }

+        StrCatS (TempBuffer, sizeof(TempBuffer) / sizeof (CHAR16), L"PTP FIFO");

+      }

+      if (Tcg2ConfigInfo.TpmDeviceInterfacePtpCrbSupported) {

+        if (TempBuffer[0] != 0) {

+          StrCatS (TempBuffer, sizeof(TempBuffer) / sizeof (CHAR16), L", ");

+        }

+        StrCatS (TempBuffer, sizeof(TempBuffer) / sizeof (CHAR16), L"PTP CRB");

+      }

+      HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_CAPABILITY_CONTENT), TempBuffer, NULL);

+      break;

+    default:

+      Tcg2ConfigInfo.TpmDeviceInterfacePtpFifoSupported = FALSE;

+      Tcg2ConfigInfo.TpmDeviceInterfacePtpCrbSupported  = FALSE;

+      HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_CAPABILITY_CONTENT), L"Unknown", NULL);

+      break;

+    }

+  }

+

+  //

   // Set ConfigInfo, to control the check box.

   //

   Status = gRT->SetVariable (

diff --git a/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigNvData.h b/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigNvData.h
index c6b3d32f49..20eaa508fa 100644
--- a/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigNvData.h
+++ b/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigNvData.h
@@ -1,7 +1,7 @@
 /** @file

   Header file for NV data structure definition.

 

-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>

 This program and the accompanying materials 

 are licensed and made available under the terms and conditions of the BSD License 

 which accompanies this distribution.  The full text of the license may be found at 

@@ -40,6 +40,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #define KEY_TPM2_PCR_BANKS_REQUEST_2            0x2005

 #define KEY_TPM2_PCR_BANKS_REQUEST_3            0x2006

 #define KEY_TPM2_PCR_BANKS_REQUEST_4            0x2007

+#define KEY_TPM_DEVICE_INTERFACE                       0x2008

 

 #define TPM_DEVICE_NULL           0

 #define TPM_DEVICE_1_2            1

@@ -48,6 +49,12 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #define TPM_DEVICE_MAX            TPM_DEVICE_2_0_DTPM

 #define TPM_DEVICE_DEFAULT        TPM_DEVICE_1_2

 

+#define TPM_DEVICE_INTERFACE_TIS       0

+#define TPM_DEVICE_INTERFACE_PTP_FIFO  1

+#define TPM_DEVICE_INTERFACE_PTP_CRB   2

+#define TPM_DEVICE_INTERFACE_MAX       TPM_DEVICE_INTERFACE_PTP_FIFO

+#define TPM_DEVICE_INTERFACE_DEFAULT   TPM_DEVICE_INTERFACE_PTP_CRB

+

 #define TCG2_PROTOCOL_VERSION_DEFAULT        0x0001

 #define EFI_TCG2_EVENT_LOG_FORMAT_DEFAULT    EFI_TCG2_EVENT_LOG_FORMAT_TCG_1_2

 

@@ -59,11 +66,14 @@ typedef struct {
 } TCG2_CONFIGURATION;

 

 typedef struct {

-  UINT8  Sha1Supported;

-  UINT8  Sha256Supported;

-  UINT8  Sha384Supported;

-  UINT8  Sha512Supported;

-  UINT8  Sm3Supported;

+  BOOLEAN  Sha1Supported;

+  BOOLEAN  Sha256Supported;

+  BOOLEAN  Sha384Supported;

+  BOOLEAN  Sha512Supported;

+  BOOLEAN  Sm3Supported;

+  UINT8    TpmDeviceInterfaceAttempt;

+  BOOLEAN  TpmDeviceInterfacePtpFifoSupported;

+  BOOLEAN  TpmDeviceInterfacePtpCrbSupported;

 } TCG2_CONFIGURATION_INFO;

 

 //

diff --git a/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigStrings.uni b/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigStrings.uni
index 459e44f44a..49cd4430ce 100644
--- a/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigStrings.uni
+++ b/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigStrings.uni
@@ -1,7 +1,7 @@
 /** @file

   String definitions for TCG configuration form.

 

-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>

 This program and the accompanying materials 

 are licensed and made available under the terms and conditions of the BSD License 

 which accompanies this distribution.  The full text of the license may be found at 

@@ -25,6 +25,22 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #string STR_TCG2_DEVICE_HELP                #language en-US "Attempt TPM Device: Disable, TPM1.2, or TPM2.0"

 #string STR_TCG2_DEVICE_CONTENT             #language en-US ""

 

+#string STR_TCG2_DEVICE_INTERFACE_STATE_PROMPT         #language en-US "Current TPM Device Interface"

+#string STR_TCG2_DEVICE_INTERFACE_STATE_HELP           #language en-US "Current TPM Device Interface: TIS, PTP FIFO, PTP CRB"

+#string STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT        #language en-US ""

+

+#string STR_TCG2_DEVICE_INTERFACE_CAPABILITY_PROMPT    #language en-US "PTP TPM Device Interface Capability"

+#string STR_TCG2_DEVICE_INTERFACE_CAPABILITY_HELP      #language en-US "PTP TPM Device Interface Capability: PTP FIFO, PTP CRB"

+#string STR_TCG2_DEVICE_INTERFACE_CAPABILITY_CONTENT   #language en-US ""

+

+#string STR_TCG2_DEVICE_INTERFACE_PROMPT               #language en-US "Attempt PTP TPM Device Interface"

+#string STR_TCG2_DEVICE_INTERFACE_HELP                 #language en-US "Attempt PTP TPM Device Interface: PTP FIFO, PTP CRB"

+#string STR_TCG2_DEVICE_INTERFACE_CONTENT              #language en-US ""

+

+#string STR_TCG2_DEVICE_INTERFACE_TIS                  #language en-US "TIS"

+#string STR_TCG2_DEVICE_INTERFACE_PTP_FIFO             #language en-US "PTP FIFO"

+#string STR_TCG2_DEVICE_INTERFACE_PTP_CRB              #language en-US "PTP CRB"

+

 #string STR_TCG2_PP_OPERATION              #language en-US "TPM2 Physical Presence Operation"

 

 #string STR_TCG2_OPERATION                 #language en-US "TPM2 Operation"

@@ -47,7 +63,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 

 #string STR_TCG2_TPM_DISABLE               #language en-US "Disable"

 #string STR_TCG2_TPM_1_2                   #language en-US "TPM 1.2"

-#string STR_TCG2_TPM_2_0_DTPM              #language en-US "TPM 2.0 (DTPM)"

+#string STR_TCG2_TPM_2_0_DTPM              #language en-US "TPM 2.0"

 

 #string STR_TPM2_ACTIVE_HASH_ALGO                 #language en-US "TPM2 Active PCR Hash Algorithm"

 #string STR_TPM2_ACTIVE_HASH_ALGO_HELP            #language en-US "TPM2 Active PCR Hash Algorithm: SHA1, SHA256, SHA384, SHA512, SM3_256"