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authorLiming Gao <liming.gao@intel.com>2016-07-28 16:31:57 +0800
committerLiming Gao <liming.gao@intel.com>2016-07-29 09:18:12 +0800
commit9b7143c9041c9e9e7d431e3dc3788feda475d9bc (patch)
tree7e03e85d4432a60d029994ad54ff43f1611c223b /ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
parent8e2de237520df9130a871531cb0b77a397eb2845 (diff)
downloadedk2-platforms-9b7143c9041c9e9e7d431e3dc3788feda475d9bc.tar.xz
ShellPkg: Correct files with CRLF line ending
Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jaben Carsey <jaben.carsey@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Diffstat (limited to 'ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c')
-rw-r--r--ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c42
1 files changed, 21 insertions, 21 deletions
diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
index 40fcdcdd1f..d0106c0b55 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
@@ -3,7 +3,7 @@
And give a interface of query a string out of a table.
Copyright (c) 2005 - 2015, Intel Corporation. All rights reserved.<BR>
- (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
+ (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -2304,26 +2304,26 @@ TABLE_ITEM MemoryDeviceTypeTable[] = {
{
0x19,
L" FBD2"
- },
- {
- 0x1A,
- L" DDR4"
- },
- {
- 0x1B,
- L" LPDDR"
- },
- {
- 0x1C,
- L" LPDDR2"
- },
- {
- 0x1D,
- L" LPDDR3"
- },
- {
- 0x1E,
- L" LPDDR4"
+ },
+ {
+ 0x1A,
+ L" DDR4"
+ },
+ {
+ 0x1B,
+ L" LPDDR"
+ },
+ {
+ 0x1C,
+ L" LPDDR2"
+ },
+ {
+ 0x1D,
+ L" LPDDR3"
+ },
+ {
+ 0x1E,
+ L" LPDDR4"
}
};