diff options
author | Heyi Guo <heyi.guo@linaro.org> | 2018-01-18 17:03:01 +0800 |
---|---|---|
committer | Leif Lindholm <leif.lindholm@linaro.org> | 2018-02-07 15:37:26 +0000 |
commit | c6ee6de56b95efb952bef9eb59e93c22e52fbb79 (patch) | |
tree | 1a2331357bc8850c949bc7709db10e1999e132d6 /Silicon/Hisilicon | |
parent | 759ab339929aaab6464bcd9440fae0cac5f68d2f (diff) | |
download | edk2-platforms-c6ee6de56b95efb952bef9eb59e93c22e52fbb79.tar.xz |
Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM
Add PXM method for Pcie device, HNS device and SAS device.
Add STA method for HNS.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: hensonwang <wanghuiqiang@huawei.com>
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
Diffstat (limited to 'Silicon/Hisilicon')
-rw-r--r-- | Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl | 9 | ||||
-rw-r--r-- | Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 34 | ||||
-rw-r--r-- | Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 19 |
3 files changed, 57 insertions, 5 deletions
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl index 11c28baf8c..7aa04afa29 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl @@ -233,6 +233,15 @@ Scope(_SB) }
})
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x00)
+ }
+ Method (_STA, 0, NotSerialized)
+ {
+ Return(0x0F)
+ }
+
//reset XGE port
//Arg0 : XGE port index in dsaf
//Arg1 : 0 reset, 1 cancle reset
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl index 55c7f50825..122e4f072c 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl @@ -141,7 +141,10 @@ Scope(_SB) {
Return (0xf)
}
-
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x00)
+ }
} // Device(PCI2)
Device (RES2)
@@ -240,7 +243,10 @@ Scope(_SB) {
Return (RBYV())
}
-
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x01)
+ }
} // Device(PCI4)
Device (RES4)
{
@@ -338,6 +344,10 @@ Scope(_SB) {
Return (RBYV())
}
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x01)
+ }
} // Device(PCI5)
Device (RES5)
{
@@ -435,6 +445,10 @@ Scope(_SB) {
Return (RBYV())
}
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x01)
+ }
} // Device(PCI6)
Device (RES6)
{
@@ -531,6 +545,10 @@ Scope(_SB) {
Return (RBYV())
}
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x01)
+ }
} // Device(PCI7)
Device (RES7)
{
@@ -690,6 +708,10 @@ Scope(_SB) {
Return (0xf)
}
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x02)
+ }
} // Device(PCIa)
Device (RESa)
{
@@ -810,6 +832,10 @@ Scope(_SB) {
Return (RBYV())
}
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x03)
+ }
} // Device(PCIc)
Device (RESc)
@@ -907,6 +933,10 @@ Scope(_SB) {
Return (RBYV())
}
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x03)
+ }
} // Device(PCId)
Device (RESd)
{
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl index 6455130d1d..d5b7e2fedf 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl @@ -88,7 +88,10 @@ Scope(_SB) Store(0x7ffff, CLK)
Sleep(1)
}
-
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x00)
+ }
Method (_STA, 0, NotSerialized)
{
Return (0x0)
@@ -169,8 +172,15 @@ Scope(_SB) Store(0x7ffff, CLK)
Sleep(1)
}
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x00)
+ }
+ Method (_STA, 0, NotSerialized)
+ {
+ Return(0x0F)
+ }
}
-
Device(SAS2) {
Name(_HID, "HISI0162")
Name(_CCA, 1)
@@ -244,7 +254,10 @@ Scope(_SB) Store(0x7ffff, CLK)
Sleep(1)
}
-
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x00)
+ }
Method (_STA, 0, NotSerialized)
{
Return (0x0)
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