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author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-01-27 17:40:46 +0000 |
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committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-01-29 16:06:53 +0000 |
commit | 265bb85cdfb8d9f43fa9a112bfb549bb6ad68123 (patch) | |
tree | ddd5bbe8ffe5cba5d9c4f31dc9f39bd6508e0fc2 /Silicon/Socionext/SynQuacer/DeviceTree | |
parent | e26d421e1108a80d772e00b0c27b4a516982fb0e (diff) | |
download | edk2-platforms-265bb85cdfb8d9f43fa9a112bfb549bb6ad68123.tar.xz |
Silicon/SynQuacer: set CNTFRQ field of MMIO timer frame
Even though the ARM ARM quite clearly states that the CNTFRQ field of
each MMIO timer frame should be a read-only alias of the CNTFRQ field
of the base frame, the SynQuacer SoC implements it as a register that
is programmable separately.
So let's program it from the hardware rather than overriding the
frequency using a DT property.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Silicon/Socionext/SynQuacer/DeviceTree')
-rw-r--r-- | Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi index 6ee7a0b7cc..fae3f033f9 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi @@ -368,7 +368,6 @@ mmio-timer@2a810000 {
compatible = "arm,armv7-timer-mem";
reg = <0x0 0x2a810000 0x0 0x10000>;
- clock-frequency = <100000000>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
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