diff options
| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-12-11 20:09:28 +0000 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-12-12 18:36:31 +0000 |
| commit | 054921cef0f1e39c93c4a868aa1064a18c8dce34 (patch) | |
| tree | dabf6697550097a338ef3df8b6a72bf6a8e5897e /Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | |
| parent | 676116c33577bde05d8141983e60af5dca682d1a (diff) | |
| download | edk2-platforms-054921cef0f1e39c93c4a868aa1064a18c8dce34.tar.xz | |
Silicon/SynQuacer/PlatformDxe: retrain PCIe switch links to Gen2 speed
For some reason, the Asmedia 118x PCIe switch needs a little help to
make sure that the downstream links train at Gen2 speed. So add a
PCI I/O protocol notifier that implements this for each PCIe downstream
port that is present on the system.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf')
| -rw-r--r-- | Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf index 00c1130906..7d3b88a5b5 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf @@ -23,6 +23,7 @@ ENTRY_POINT = PlatformDxeEntryPoint
[Sources]
+ Asmedia118x.c
PlatformDxe.c
[Packages]
@@ -41,6 +42,7 @@ MemoryAllocationLib
UefiBootServicesTableLib
UefiDriverEntryPoint
+ UefiLib
[Guids]
gFdtTableGuid
@@ -50,6 +52,7 @@ [Protocols]
gEdkiiNonDiscoverableDeviceProtocolGuid ## PRODUCES
+ gEfiPciIoProtocolGuid ## CONSUMES
gPcf8563RealTimeClockLibI2cMasterProtolGuid ## PRODUCES
[FixedPcd]
|