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author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-01-30 11:44:36 +0000 |
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committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-03-15 16:04:30 +0000 |
commit | b2aad8fc85a5c5bcd2a60208ac28d41ca2194620 (patch) | |
tree | a24d6b33d089192ef0eb12aa490b1025c8baef57 /Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h | |
parent | 3b5091beadc90b447849eeb03859d7d80ad88cda (diff) | |
download | edk2-platforms-b2aad8fc85a5c5bcd2a60208ac28d41ca2194620.tar.xz |
Silicon/SynQuacer/PlatformDxe: add option to enable ACPI mode
Create a HII menu option to choose between device tree and ACPI platform
descriptions. Note that the option is only active if PCIe compatibility
mode is enabled.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h')
-rw-r--r-- | Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h b/Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h index fbbcbd7d3e..bb0e476fc3 100644 --- a/Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h +++ b/Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h @@ -1,6 +1,6 @@ /** @file
- Copyright (c) 2017, Linaro, Ltd. All rights reserved.<BR>
+ Copyright (c) 2017 - 2018, Linaro, Ltd. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
@@ -22,12 +22,16 @@ #define PCIE_MAX_SPEED_UNLIMITED 0x0
#define PCIE_MAX_SPEED_GEN1 0x1
+#define ACPIPREF_DT 0x0
+#define ACPIPREF_ACPI 0x1
+
typedef struct {
UINT8 EnableEmmc;
UINT8 PcieSlot0MaxSpeed;
UINT8 PcieSlot1MaxSpeed;
UINT8 PcieSlot2MaxSpeed;
- UINT8 Reserved[4];
+ UINT8 AcpiPref;
+ UINT8 Reserved[3];
} SYNQUACER_PLATFORM_VARSTORE_DATA;
#endif
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