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author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-02-26 17:52:59 +0000 |
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committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-03-15 16:04:30 +0000 |
commit | f5951dd21469610de4f2308596404a8689f38e08 (patch) | |
tree | df0fb5b4f47e663571d7e7cdb8934faac08ce08d /Silicon/Socionext/SynQuacer/Include | |
parent | d9c87c7114127e3a6b2edd78cd942624d9aff4ec (diff) | |
download | edk2-platforms-f5951dd21469610de4f2308596404a8689f38e08.tar.xz |
Platform/Socionext/DeveloperBox: fix PCIe slot to B/D/F mapping
Fix the static B/D/F specifiers that refer to the pair of x1 PCIe slots
on the DeveloperBox PCB. The current configuration caused user-configurable
settings for slots 1/2 to apply to the incorrect one.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Silicon/Socionext/SynQuacer/Include')
-rw-r--r-- | Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h b/Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h index ee2357be9a..2d3d5cd91b 100644 --- a/Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h +++ b/Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h @@ -62,7 +62,7 @@ #define SYNQUACER_PCI_LOCATION(s,b,d) (((s) << 16) | ((b) << 8) | (d))
#define SYNQUACER_PCI_SLOT0_LOCATION SYNQUACER_PCI_LOCATION(1, 0, 0)
-#define SYNQUACER_PCI_SLOT1_LOCATION SYNQUACER_PCI_LOCATION(0, 1, 7)
-#define SYNQUACER_PCI_SLOT2_LOCATION SYNQUACER_PCI_LOCATION(0, 1, 3)
+#define SYNQUACER_PCI_SLOT1_LOCATION SYNQUACER_PCI_LOCATION(0, 1, 3)
+#define SYNQUACER_PCI_SLOT2_LOCATION SYNQUACER_PCI_LOCATION(0, 1, 7)
#endif
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