diff options
| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-01-25 12:08:56 +0000 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-01-25 18:01:03 +0000 |
| commit | c76bf98bc8f988ea2f3953563f94fab8268ec3bd (patch) | |
| tree | f447b43d63de6d653b74239d56a4aa4d151fbf62 /Silicon/Socionext/SynQuacer/SynQuacer.dec | |
| parent | 43467f4ee926acdadc1c6481a3d3407044ccc56d (diff) | |
| download | edk2-platforms-c76bf98bc8f988ea2f3953563f94fab8268ec3bd.tar.xz | |
Silicon/Socionext/SynQuacer: implement menu option to set max PCIe speed
Add menu options to the SynQuacer Platform menu screen to limit the
maximum PCIe link speed for each slot individually. This may be useful
to work around potential PCIe issues.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Silicon/Socionext/SynQuacer/SynQuacer.dec')
| -rw-r--r-- | Silicon/Socionext/SynQuacer/SynQuacer.dec | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec index 76529e3c21..eb4fc4ace2 100644 --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec @@ -27,6 +27,8 @@ gSynQuacerPlatformDxeFileGuid = { 0xac422cc1, 0xd916, 0x489a, { 0xb1, 0x65, 0x53, 0x6f, 0xdf, 0xc6, 0x33, 0xc2 } }
+ gSynQuacerPlatformFormSetGuid = { 0xe9cd576a, 0xaf9a, 0x4d41, { 0xbf, 0x1a, 0x29, 0xe1, 0xbc, 0x99, 0x99, 0x54 } }
+
[Ppis]
gSynQuacerDramInfoPpiGuid = { 0x3e1d7356, 0xdda4, 0x4b1a, { 0x93, 0x46, 0xbf, 0x89, 0x1c, 0x86, 0x46, 0xcc } }
@@ -45,3 +47,6 @@ [PcdsPatchableInModule, PcdsDynamic]
# Enable both RC #0 and RC #1 by default
gSynQuacerTokenSpaceGuid.PcdPcieEnableMask|0x3|UINT8|0x00000007
+
+[PcdsDynamic]
+ gSynQuacerTokenSpaceGuid.PcdPlatformSettings|0x0|UINT64|0x00000008
|