diff options
| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-01-24 09:53:35 +0000 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-01-25 13:08:06 +0000 |
| commit | 93d987e6adf91d1f00b207242965ec9be22882b0 (patch) | |
| tree | 5156cf509d5b331c05613c1975a9b8afdc5a8c0c /Silicon/Socionext | |
| parent | 88e967c5d2f07e633e681a9f594591c3bf698148 (diff) | |
| download | edk2-platforms-93d987e6adf91d1f00b207242965ec9be22882b0.tar.xz | |
Silicon/SynQuacer/PlatformDxe: enable spread spectrum mode for ASM1061 SATA
The ASM1061 SATA controller integrated into the DeveloperBox board
emits too much electromagnetic radiation, so it needs spread spectrum
mode enabled.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Silicon/Socionext')
| -rw-r--r-- | Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c (renamed from Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Asmedia118x.c) | 83 | ||||
| -rw-r--r-- | Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 2 |
2 files changed, 64 insertions, 21 deletions
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Asmedia118x.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c index 874e83a649..9af3dd942c 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Asmedia118x.c +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c @@ -15,9 +15,12 @@ #include "PlatformDxe.h"
#define ASMEDIA_VID 0x1b21
+#define ASM1061_PID 0x0612
#define ASM1182E_PID 0x1182
#define ASM1184E_PID 0x1184
+#define ASM1061_SSC_OFFSET 0xA10
+
#define ASM118x_PCIE_CAPABILITY_OFFSET 0x80
#define ASM118x_PCIE_LINK_CONTROL_OFFSET (ASM118x_PCIE_CAPABILITY_OFFSET + \
OFFSET_OF (PCI_CAPABILITY_PCIEXP, \
@@ -39,24 +42,10 @@ RetrainAsm1184eDownstreamPort ( IN EFI_PCI_IO_PROTOCOL *PciIo
)
{
- UINT16 PciVidPid[2];
EFI_STATUS Status;
PCIE_CAP Cap;
PCI_REG_PCIE_LINK_CONTROL LinkControl;
- Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, PCI_VENDOR_ID_OFFSET,
- ARRAY_SIZE (PciVidPid), &PciVidPid);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "%a: failed to read PCI vendor/product ID - %r\n",
- __FUNCTION__, Status));
- return;
- }
-
- if (PciVidPid[0] != ASMEDIA_VID ||
- (PciVidPid[1] != ASM1182E_PID && PciVidPid[1] != ASM1184E_PID)) {
- return;
- }
-
//
// The upstream and downstream ports share the same PID/VID, so check
// the port type. This assumes the PCIe Express capability block lives
@@ -91,6 +80,34 @@ RetrainAsm1184eDownstreamPort ( STATIC
VOID
+EnableAsm1061SpreadSpectrum (
+ IN EFI_PCI_IO_PROTOCOL *PciIo
+ )
+{
+ EFI_STATUS Status;
+ UINT8 SscVal;
+
+ DEBUG ((DEBUG_INFO, "%a: enabling spread spectrum mode 0 for ASM1061\n",
+ __FUNCTION__));
+
+ // SSC mode 0~-4000 ppm, 1:1 modulation
+
+ SscVal = 0;
+ Status = PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, ASM1061_SSC_OFFSET, 1,
+ &SscVal);
+ ASSERT_EFI_ERROR (Status);
+
+ MemoryFence ();
+ gBS->Stall (1); // delay at least 100 ns between writes of the same register
+
+ SscVal = 1;
+ Status = PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, ASM1061_SSC_OFFSET, 1,
+ &SscVal);
+ ASSERT_EFI_ERROR (Status);
+}
+
+STATIC
+VOID
EFIAPI
OnPciIoProtocolNotify (
IN EFI_EVENT Event,
@@ -101,6 +118,7 @@ OnPciIoProtocolNotify ( EFI_STATUS Status;
EFI_HANDLE HandleBuffer;
UINTN BufferSize;
+ UINT16 PciVidPid[2];
while (TRUE) {
BufferSize = sizeof (EFI_HANDLE);
@@ -114,12 +132,37 @@ OnPciIoProtocolNotify ( (VOID **)&PciIo);
ASSERT_EFI_ERROR (Status);
- //
- // The ASM1184E 4-port PCIe switch on the DeveloperBox board (and its
- // 2-port sibling of which samples were used in development) needs a
- // little nudge to get it to train the downstream links at Gen2 speed.
- //
- RetrainAsm1184eDownstreamPort (PciIo);
+ Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, PCI_VENDOR_ID_OFFSET,
+ ARRAY_SIZE (PciVidPid), &PciVidPid);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "%a: failed to read PCI vendor/product ID - %r\n",
+ __FUNCTION__, Status));
+ continue;
+ }
+
+ if (PciVidPid[0] != ASMEDIA_VID) {
+ continue;
+ }
+
+ switch (PciVidPid[1]) {
+ case ASM1061_PID:
+ //
+ // The ASM1061 SATA controller as integrated into the DeveloperBox design
+ // emits too much electromagnetic radiation. So enable spread spectrum
+ // mode.
+ //
+ EnableAsm1061SpreadSpectrum (PciIo);
+ break;
+ case ASM1182E_PID:
+ case ASM1184E_PID:
+ //
+ // The ASM1184E 4-port PCIe switch on the DeveloperBox board (and its
+ // 2-port sibling of which samples were used in development) needs a
+ // little nudge to get it to train the downstream links at Gen2 speed.
+ //
+ RetrainAsm1184eDownstreamPort (PciIo);
+ break;
+ }
}
}
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf index 7d3b88a5b5..766f4041c8 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf @@ -23,7 +23,7 @@ ENTRY_POINT = PlatformDxeEntryPoint
[Sources]
- Asmedia118x.c
+ Pci.c
PlatformDxe.c
[Packages]
|